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<title>Hardware Abstraction Architecture</title>
-<meta name="author" content="Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer, Cory Sharp, Adam Wolisz, David Culler, David Gay" />
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<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Best Current Practice</td>
</tr>
<tr><th class="docinfo-name">Status:</th>
-<td>Draft</td></tr>
-<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.0</td>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
</tr>
<tr><th class="docinfo-name">Author:</th>
-<td>Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer,
+<td>Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer,
Cory Sharp, Adam Wolisz, David Culler, David Gay</td></tr>
-<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">14-Sep-2004</td>
-</tr>
-<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.5</td>
-</tr>
-<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2007-02-28</td>
-</tr>
-<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu></td>
-</tr>
</tbody>
</table>
<div class="note">
lowest layer structures access to hardware registers and interrupts.</p>
<p>The rest of this TEP specifies:</p>
<ul class="simple">
-<li>the details of the <em>HAA</em> and its three distinct layers
+<li>the details of the <em>HAA</em> and its three distinct layers
(<a class="reference" href="#architecture">2. Architecture</a>)</li>
-<li>guidelines on selecting the "right" level of abstraction
+<li>guidelines on selecting the "right" level of abstraction
(<a class="reference" href="#combining-different-levels-of-abstraction">3. Combining different levels of abstraction</a>)</li>
<li>how hardware abstractions can be shared among different TinyOS
platforms (<a class="reference" href="#horizontal-decomposition">4. Horizontal decomposition</a>)</li>
-<li>the level of hardware abstraction for the processing units
+<li>the level of hardware abstraction for the processing units
(<a class="reference" href="#cpu-abstraction">5. CPU abstraction</a>)</li>
<li>how some hardware abstractions may realize different degrees of
-alignment with the <em>HAA</em> top layer
+alignment with the <em>HAA</em> top layer
(<a class="reference" href="#hil-alignment">6. HIL alignment</a>)</li>
</ul>
<p>The <em>HAA</em> is the architectural basis for many TinyOS 2.0 documentary
developer more freedom in the design and the implementation of
reusable applications.</p>
<pre class="literal-block" id="fig-1">
- +-----------------------------+
- | |
- | Cross-platform applications |
- | |
- +--------------+--------------+
-+-----------------+ | +-----------------+
-|Platform-specific| | |Platform-specific|
-| applications | | | applications |
-+--------+--------+ Platform-independent | hardware interface +--------+--------+
- | +-----------------+--------+--------+-----------------+ |
- | | | | | |
- | +-------+-------+ +-------+-------+ +-------+-------+ +-------+-------+ |
- | |.------+------.| |.------+------.| |.------+------.| |.------+------.| |
- | || || || || || || || HIL 4 || |
- | || HIL 1 || || HIL 2 || || HIL 3 || |`------+------'| |
- | || || |`------+------'| |`------+------'| | | | |
- | |`------+------'| | | | | | | | | +----+--+
- +--+----+ | | |.------+------.| | | | | | | |
- | | | | || || |.------+------.| |.------+--+---.|
- |.---+--+------.| || || || || || ||
- || || || HAL 2 || || || || ||
- || || || || || HAL 3 || || HAL 4 ||
- || HAL 1 || |`------+------'| || || || ||
- || || | | | || || || ||
- || || | | | |`------+------'| |`------+------'|
- |`------+------'| |.------+------.| | | | | | |
- | | | || || |.------+------.| | | |
- |.------+------.| || HPL 2 || || || |.------+------.|
- || HPL 1 || || || || HPL 3 || || HPL 4 ||
- |`------+------'| |`------+------'| |`------+------'| |`------+------'|
- +-------+-------+ +-------+-------+ +-------+-------+ +-------+-------+ HW/SW
- | | | | boundary
- ************************************************************************************
- +------+------+ +------+------+ +------+------+ +------+------+
- |HW Platform 1| |HW Platform 2| |HW Platform 3| |HW Platform 4|
- +-------------+ +-------------+ +-------------+ +-------------+
-
-
- Fig.1: The proposed Hardware Abstraction Architecture
+ +-----------------------------+
+ | |
+ | Cross-platform applications |
+ | |
+ +--------------+--------------+
++-----------------+ | +-----------------+
+|Platform-specific| | |Platform-specific|
+| applications | | | applications |
++--------+--------+ | +--------+--------+
+ | Platform-independent | hardware interface |
+ | +-------------+--------+----+-------------+ |
+ | | | | | |
+ | +-----+-----+ +-----+-----+ +-----+-----+ +-----+-----+ |
+ | |.----+----.| |.----+----.| |.----+----.| |.----+----.| |
+ | || || || || || || || HIL 4 || |
+ | || HIL 1 || || HIL 2 || || HIL 3 || |`----+----'| |
+ | || || |`----+----'| |`----+----'| | | | |
+ | |`----+----'| | | | | | | | | +--+--+
+ +--+--+ | | |.----+----.| | | | | | | |
+ | | | | || || |.----+----.| |.----+--+-.|
+ |.-+--+----.| || || || || || ||
+ || || || HAL 2 || || || || ||
+ || || || || || HAL 3 || || HAL 4 ||
+ || HAL 1 || |`----+----'| || || || ||
+ || || | | | || || || ||
+ || || | | | |`----+----'| |`----+----'|
+ |`----+----'| |.----+----.| | | | | | |
+ | | | || || |.----+----.| | | |
+ |.----+----.| || HPL 2 || || || |.----+----.|
+ || HPL 1 || || || || HPL 3 || || HPL 4 ||
+ |`----+----'| |`----+----'| |`----+----'| |`----+----'|
+ +-----+-----+ +-----+-----+ +-----+-----+ +-----+-----+ HW/SW
+ | | | | boundary
+ ************************************************************************
+ +------+-----+ +-----+-----+ +-----+-----+ +-----+-----+
+ |HW Plat 1 | |HW Plat 2 | |HW Plat 3 | |HW Plat 4 |
+ +------------+ +-----------+ +-----------+ +-----------+
+
+
+ Fig.1: The proposed Hardware Abstraction Architecture
</pre>
<p>In contrast to the more traditional two step approach used in other
embedded operating systems like <a class="citation-reference" href="#windowsce" id="id9" name="id9">[WindowsCE]</a>, the three-level design
<div class="section">
<h1><a id="author-s-address" name="author-s-address">Author's Address</a></h1>
<div class="line-block">
-<div class="line">Vlado Handziski (handzisk at tkn.tu-berlin.de) <a class="footnote-reference" href="#id27" id="id20" name="id20">[1]</a> </div>
-<div class="line">Joseph Polastre (polastre at cs.berkeley.edu) <a class="footnote-reference" href="#id28" id="id21" name="id21">[2]</a> </div>
+<div class="line">Vlado Handziski (handzisk at tkn.tu-berlin.de) <a class="footnote-reference" href="#id27" id="id20" name="id20">[1]</a></div>
+<div class="line">Joseph Polastre (polastre at cs.berkeley.edu) <a class="footnote-reference" href="#id28" id="id21" name="id21">[2]</a></div>
<div class="line">Jan-Hinrich Hauer (hauer at tkn.tu-berlin.de) <a class="footnote-reference" href="#id27" id="id22" name="id22">[1]</a></div>
<div class="line">Cory Sharp (cssharp at eecs.berkeley.edu) <a class="footnote-reference" href="#id28" id="id23" name="id23">[2]</a></div>
<div class="line">Adam Wolisz (awo at ieee.org) <a class="footnote-reference" href="#id27" id="id24" name="id24">[1]</a></div>
<table class="docutils footnote" frame="void" id="id27" rules="none">
<colgroup><col class="label" /><col /></colgroup>
<tbody valign="top">
-<tr><td class="label"><a name="id27">[1]</a></td><td><em>(<a class="fn-backref" href="#id20">1</a>, <a class="fn-backref" href="#id22">2</a>, <a class="fn-backref" href="#id24">3</a>)</em> Technische Universitaet Berlin
-Telecommunication Networks Group
-Sekr. FT 5, Einsteinufer 25
+<tr><td class="label"><a name="id27">[1]</a></td><td><em>(<a class="fn-backref" href="#id20">1</a>, <a class="fn-backref" href="#id22">2</a>, <a class="fn-backref" href="#id24">3</a>)</em> Technische Universitaet Berlin
+Telecommunication Networks Group
+Sekr. FT 5, Einsteinufer 25
10587 Berlin, Germany</td></tr>
</tbody>
</table>
<colgroup><col class="label" /><col /></colgroup>
<tbody valign="top">
<tr><td class="label"><a name="id28">[2]</a></td><td><em>(<a class="fn-backref" href="#id21">1</a>, <a class="fn-backref" href="#id23">2</a>, <a class="fn-backref" href="#id25">3</a>)</em> University of California, Berkeley
-Computer Science Department
+Computer Science Department
Berkeley, CA 94720 USA</td></tr>
</tbody>
</table>
<table class="docutils citation" frame="void" id="t2-tr" rules="none">
<colgroup><col class="label" /><col /></colgroup>
<tbody valign="top">
-<tr><td class="label"><a class="fn-backref" href="#id2" name="t2-tr">[T2_TR]</a></td><td>P. Levis, D. Gay, V. Handziski, J.-H.Hauer, B.Greenstein,
-M.Turon, J.Hui, K.Klues, C.Sharp, R.Szewczyk, J.Polastre,
-P.Buonadonna, L.Nachman, G.Tolle, D.Culler, and A.Wolisz,
-"T2: A Second Generation OS For Embedded Sensor Networks",
-<em>Technical Report TKN-05-007</em>, Telecommunication Networks Group,
-Technische Universität Berlin, November 2005.</td></tr>
+<tr><td class="label"><a class="fn-backref" href="#id2" name="t2-tr">[T2_TR]</a></td><td>P. Levis, D. Gay, V. Handziski, J.-H.Hauer, B.Greenstein,
+M.Turon, J.Hui, K.Klues, C.Sharp, R.Szewczyk, J.Polastre,
+P.Buonadonna, L.Nachman, G.Tolle, D.Culler, and A.Wolisz,
+"T2: A Second Generation OS For Embedded Sensor Networks",
+<em>Technical Report TKN-05-007</em>, Telecommunication Networks Group,
+Technische Universitaet Berlin, November 2005.</td></tr>
</tbody>
</table>
<table class="docutils citation" frame="void" id="windowsce" rules="none">
<table class="docutils citation" frame="void" id="netbsd" rules="none">
<colgroup><col class="label" /><col /></colgroup>
<tbody valign="top">
-<tr><td class="label"><a class="fn-backref" href="#id11" name="netbsd">[NetBSD]</a></td><td>"The NetBSD project home page", <em>Online</em>,
+<tr><td class="label"><a class="fn-backref" href="#id11" name="netbsd">[NetBSD]</a></td><td>"The NetBSD project home page", <em>Online</em>,
<a class="reference" href="http://www.netbsd.org">http://www.netbsd.org</a></td></tr>
</tbody>
</table>
<tr><td class="label"><a name="tep117">[TEP117]</a></td><td><em>(<a class="fn-backref" href="#id12">1</a>, <a class="fn-backref" href="#id18">2</a>)</em> Phil Buonadonna, Jonathan Hui, "Low-Level I/O"</td></tr>
</tbody>
</table>
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