-/* tab:4
+/*
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
*
* Copyright (c) 2004-2005 Crossbow Technology, Inc.
* Copyright (c) 2002-2003 Intel Corporation.
- * Copyright (c) 2000-2003 The Regents of the University of California.
+ * Copyright (c) 2000-2003 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
- *
+ *
* IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
* UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
+ *
* THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
#define READ_FLAG(port, flag) ((port) & (flag))
/* Enables interrupts. */
-inline void __nesc_enable_interrupt() {
+inline void __nesc_enable_interrupt() @safe() {
sei();
}
/* Disables all interrupts. */
-inline void __nesc_disable_interrupt() {
+inline void __nesc_disable_interrupt() @safe() {
cli();
}
though. */
/* Saves current interrupt mask state and disables interrupts. */
-inline __nesc_atomic_t
-__nesc_atomic_start(void) @spontaneous()
+inline __nesc_atomic_t
+__nesc_atomic_start(void) @spontaneous() @safe()
{
__nesc_atomic_t result = SREG;
__nesc_disable_interrupt();
}
/* Restores interrupt mask to original state. */
-inline void
-__nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous()
+inline void
+__nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous() @safe()
{
asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
SREG = original_SREG;
ATM128_POWER_EXT_STANDBY = 2,
ATM128_POWER_SAVE = 3,
ATM128_POWER_STANDBY = 4,
- ATM128_POWER_DOWN = 5,
+ ATM128_POWER_DOWN = 5,
};
/* Combine function. */
-mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) {
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() {
return (m1 < m2)? m1: m2;
}
uint8_t xmbk : 1; //!< External Memory Bus-keeper Enable
} Atm128_XMCRB_t;
+/* Floating-point network-type support.
+ These functions must convert to/from a 32-bit big-endian integer that follows
+ the layout of Java's java.lang.float.floatToRawIntBits method.
+ Conveniently, for the AVR family, this is a straight byte copy...
+*/
+
+typedef float nx_float __attribute__((nx_base_be(afloat)));
+
+inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
+ float f;
+ memcpy(&f, source, sizeof(float));
+ return f;
+}
+
+inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
+ memcpy(target, &value, sizeof(float));
+ return value;
+}
#endif //_H_atmega128hardware_H