uint8_t port_dir_addr,
uint8_t port_sel_addr,
uint8_t pin
- )
+ ) @safe()
{
provides interface HplMsp430GeneralIO as IO;
}
implementation
{
- #define PORTxIN (*(volatile TYPE_PORT_IN*)port_in_addr)
- #define PORTx (*(volatile TYPE_PORT_OUT*)port_out_addr)
- #define PORTxDIR (*(volatile TYPE_PORT_DIR*)port_dir_addr)
- #define PORTxSEL (*(volatile TYPE_PORT_SEL*)port_sel_addr)
+ #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* ONE, port_in_addr))
+ #define PORTx (*TCAST(volatile TYPE_PORT_OUT* ONE, port_out_addr))
+ #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* ONE, port_dir_addr))
+ #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* ONE, port_sel_addr))
async command void IO.set() { atomic PORTx |= (0x01 << pin); }
async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); }
async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); }
+ async command uint8_t IO.getOutRaw() { return PORTx & (0x01 << pin); }
+ async command bool IO.getOut() { return (call IO.getOutRaw() != 0); }
async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); }
async command bool IO.get() { return (call IO.getRaw() != 0); }
async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); }
+ async command bool IO.isInput() { return (PORTxDIR & (0x01 << pin)) == 0; }
async command void IO.makeOutput() { atomic PORTxDIR |= (0x01 << pin); }
+ async command bool IO.isOutput() { return (PORTxDIR & (0x01 << pin)) != 0; }
async command void IO.selectModuleFunc() { atomic PORTxSEL |= (0x01 << pin); }
+ async command bool IO.isModuleFunc() { return (PORTxSEL & (0x01<<pin)) != 0; }
async command void IO.selectIOFunc() { atomic PORTxSEL &= ~(0x01 << pin); }
+ async command bool IO.isIOFunc() { return (PORTxSEL & (0x01<<pin)) == 0; }
+ async command void IO.enableRen() {}
+ async command void IO.disableRen() {}
+ async command bool IO.isRen() { return FALSE; }
}