/**
* Specify the target cpu clock speed of your platform by overriding this file.
*
- * Be aware that tinyos relies on binary 4Mhz, that is 4096000 Hz. Some
+ * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some
* platforms have an external high frequency oscilator to generate the SMCLK
* (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These
* oscillators provide metric frequencies, but may not run in power down
#ifndef MS430DCOSPEC_H
#define MS430DCOSPEC_H
-#define TARGET_DCO_HZ 4096000 // the cpu clock rate in Hz
-
+#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz
+#define ACLK_KHZ 32 // the ACLK rate in binary kHz
#endif