Merge TinyOS 2.1.1 into master.

[tinyos-2.x.git] / tos / chips / msp430 / usci / HplMsp430UsciC.nc

diff --git a/tos/chips/msp430/usci/HplMsp430UsciC.nc b/tos/chips/msp430/usci/HplMsp430UsciC.nc
index 051e65467034b2ff91c32b7f088eb09f4e1e759b..05917df9b41d2a5b3fd4ab90151bd6137ef10b27 100644 (file)
--- a/tos/chips/msp430/usci/HplMsp430UsciC.nc
+++ b/tos/chips/msp430/usci/HplMsp430UsciC.nc
@@ -26,7 +26,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /**
  * Provides HPL access to both registers and interrupts of all USCI devices on
  * a supported msp430 processor.  The interfaces available are created
@@ -41,10 +41,10 @@
  *
  * 'A' devices offer UART, LIN, IrDA and SPI modes of operation.  'B' devices
  * are limited to SPI and I2C modes.
- * 
+ *
  * @author R. Steve McKown <rsmckown@gmail.com>
  */
- 
+
 configuration HplMsp430UsciC {
   provides {
 #if defined(__MSP430_HAS_USCI_AB0__) || defined(__MSP430_HAS_USCI__)
@@ -62,24 +62,7 @@ configuration HplMsp430UsciC {
   }
 }
 implementation {
-#if defined(__MSP430_HAS_USCI_AB0__)
-  components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
-    UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
-    UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_,
-    UCA0RXIFG, UCA0TXIFG)
-    as RegA0P;
-  RegA0 = RegA0P.Registers;
-
-  components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
-    0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
-    0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
-    UCB0I2CSA_, IE2_, IFG2_, UCB0RXIFG, UCB0TXIFG) as RegB0P;
-  RegB0 = RegB0P.Registers;
-
-  components HplMsp430UsciInt0P as Int0P;
-  IntA0 = Int0P.IntA;
-  IntB0 = Int0P.IntB;
-#elif defined(__MSP430_HAS_USCI__)
+#if defined(__MSP430_HAS_USCI_AB0__) || defined(__MSP430_HAS_USCI__)
   components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
     UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
     UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_,