Fix up io pin restoration after Uart peripheral is released.

[tinyos-2.x.git] / tos / chips / msp430 / usci / Msp430UartP.nc

diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc
index 742c167470cd62d73fda661f01ead91cf509c93a..605c426960f5d926d10670ec8582a70dc76383f6 100644 (file)
--- a/tos/chips/msp430/usci/Msp430UartP.nc
+++ b/tos/chips/msp430/usci/Msp430UartP.nc
@@ -26,7 +26,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /**
  * Uart implementation using a USCI device.
  *
@@ -35,7 +35,7 @@
  *
  * @author R. Steve McKown <rsmckown@gmail.com>
  */
- 
+
 generic module Msp430UartP() {
   provides {
     interface UartStream;
@@ -55,7 +55,7 @@ generic module Msp430UartP() {
 implementation {
   enum {
     /* Bit positions in m_pins */
-    PINS_RXD = 1,
+    PINS_RXD = 0,
     PINS_TXD
   };
 
@@ -104,12 +104,20 @@ implementation {
        call TXD.selectModuleFunc();
       }
 
+      /* Reset important state variables */
+      m_robuf = 0;
+      m_sobuf = 0;
+
       /* Clear interrupts; we'll add them as needed */
       call Registers.clrIeRx();
       call Registers.clrIeTx();
 
       /* Enable the device */
       call Registers.clrCtl1(UCSWRST);
+
+      /* TOS convention is for receive interrupts on by default. */
+      call Registers.clrIfgRx();
+      call Registers.setIeRx();
     }
   }
 
@@ -124,20 +132,21 @@ implementation {
       call Registers.clrIeTx();
       call Registers.clrIfgRx();
 
+      /* Reset important state variables */
+      m_robuf = 0;
+      m_sobuf = 0;
+
       /* Restore pins to their pre-configure state */
-      if (m_pins & PINS_RXD)
+      if (m_pins & (1 << PINS_RXD))
        call RXD.selectIOFunc();
-      if (m_pins & PINS_TXD)
+      if (m_pins & (1 << PINS_TXD))
        call TXD.selectIOFunc();
     }
   }
 
   async command error_t UartByte.send(uint8_t byte)
   {
-    /* FIXME: race with UartStream.send() */
     atomic {
-      if (m_sobuf)
-       return FAIL;
       while (!call Registers.getIfgTx());
       call Registers.setTxbuf(byte);
       return SUCCESS;
@@ -149,29 +158,30 @@ implementation {
     atomic {
       if (m_sobuf || !buf || !len)
        return FAIL;
-      m_sobuf = buf;
-      m_solen = len;
-      while (!call Registers.getIfgTx());
+      m_sbuf = m_sobuf = buf;
+      m_slen = m_solen = len;
       call Registers.setIeTx();
-      call Registers.setTxbuf(*m_sobuf);
-      m_slen = m_solen - 1;
-      if (m_slen)
-       m_sbuf = m_sobuf + 1;
       return SUCCESS;
     }
   }
 
   async event void Interrupts.tx()
   {
-    while (m_slen && call Registers.getIfgTx()) {
-      call Registers.setTxbuf(*m_sbuf);
-      if (--m_slen)
-       m_sbuf++;
-    }
-    if (m_slen == 0 && m_sobuf) {
-      call Registers.clrIeTx();
-      m_sobuf = 0;
-      signal UartStream.sendDone(m_sobuf, m_solen, SUCCESS);
+    /* FIXME: this can cause an arbitrarily long ISR, if m_slen is large.
+     * But depending on timing, we may always only write 1 byte.
+     */
+    if (m_sobuf) {
+      while (!call Registers.getIfgTx()); /* in case interleaved UB.send */
+      while (m_slen && call Registers.getIfgTx()) {
+       call Registers.setTxbuf(*m_sbuf);
+       if (--m_slen)
+         m_sbuf++;
+      }
+      if (m_slen == 0) {
+       call Registers.clrIeTx();
+       m_sobuf = 0;
+       signal UartStream.sendDone(m_sobuf, m_solen, SUCCESS);
+      }
     }
   }
 
@@ -238,6 +248,9 @@ implementation {
   {
     if (m_robuf) {
       /* receive() takes precedence if active */
+      /* FIXME: an arbitrarily long ISR may occur if m_rlen is large.
+       * But depending on timing, we may always only read 1 byte.
+       */
       while (m_rlen && call Registers.getIfgRx()) {
        *m_rbuf = byte;
        if (--m_rlen)
@@ -257,7 +270,7 @@ implementation {
 
   default async command const msp430_usci_uart_t* Configure.get()
   {
-    const static msp430_usci_uart_t def = { 
+    const static msp430_usci_uart_t def = {
       ctl0: UCMODE_0,          /* async, lsb first, 8N1 */
       ctl1: UCSWRST | UCSSEL_3,        /* clock uart from SMCLK */
       brx: UBRX_1MHZ_115200,