* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-
+
/**
* Header definitions for the USCI peripheral in newer msp430 processors.
* A USCI peripheral provides two communications devices, denoted A and B.
*
* A devices offer UART, LIN, IrDA and SPI modes of operation. B parts are
* limited to SPI and I2C modes.
- *
- * @author R. Steve McKown <smckown@gmail.com>
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
*/
-
+
#ifndef MSP430_USCI_h
#define MSP430_USCI_h
typedef enum {
USCI_REN_NONE = 0,
- USCI_REN_RX = 0x08,
- USCI_REN_RX_PULLUP = USCI_REN_RX + 0x01,
- USCI_REN_RX_PULLDOWN = USCI_REN_RX + 0x02,
+ /* For use in UART mode */
+ USCI_REN_TX = 0x03,
+ USCI_REN_TX_PULLUP = 0x01,
+ USCI_REN_TX_PULLDOWN = 0x02,
+ USCI_REN_RX = 0x0c,
+ USCI_REN_RX_PULLUP = 0x04,
+ USCI_REN_RX_PULLDOWN = 0x08,
- USCI_REN_TX = 0x80,
- USCI_REN_TX_PULLUP = USCI_REN_TX + 0x10,
- USCI_REN_TX_PULLDOWN = USCI_REN_TX + 0x20
+ /* For use in SPI mode */
+ USCI_REN_STE = 0x30,
+ USCI_REN_STE_PULLUP = 0x10,
+ USCI_REN_STE_PULLDOWN = 0x20,
+ USCI_REN_SIMO = USCI_REN_TX,
+ USCI_REN_SIMO_PULLUP = USCI_REN_TX_PULLUP,
+ USCI_REN_SIMO_PULLDOWN = USCI_REN_TX_PULLDOWN,
+ USCI_REN_SOMI = USCI_REN_RX,
+ USCI_REN_SOMI_PULLUP = USCI_REN_RX_PULLUP,
+ USCI_REN_SOMI_PULLDOWN = USCI_REN_RX_PULLDOWN,
+ USCI_REN_CLK = 0xc0,
+ USCI_REN_CLK_PULLUP = 0x40,
+ USCI_REN_CLK_PULLDOWN = 0x80,
+
+ /* For use in I2C mode */
+ USCI_REN_SDA = USCI_REN_TX,
+ USCI_REN_SDA_PULLUP = USCI_REN_TX_PULLUP,
+ USCI_REN_SDA_PULLDOWN = USCI_REN_TX_PULLDOWN,
+ USCI_REN_SCL = USCI_REN_RX,
+ USCI_REN_SCL_PULLUP = USCI_REN_RX_PULLUP,
+ USCI_REN_SCL_PULLDOWN = USCI_REN_RX_PULLDOWN
} msp430_ren_t;
+/* Baud rates for UART mode. Only 32KHz modes work right now. */
+typedef enum {
+ /* UCOS16=0. UMCTL = UCBRFx << 4 + UCBRSx << 1 + UCOS16.
+ * 1MHZ = 1,048576HZ, 1E6MHZ = 1,000,000HZ.
+ */
+ UBRX_32768HZ_9600=3, UMCTL_32768HZ_9600=(0 << 4) + (3 << 1) + 0,
+ UBRX_1MHZ_9600=109, UMCTL_1MHZ_9600=(0 << 4) + (2 << 1) + 0,
+ UBRX_1MHZ_19200=54, UMCTL_1MHZ_19200=(0 << 4) + (5 << 1) + 0,
+ UBRX_1MHZ_38400=27, UMCTL_1MHZ_38400=(0 << 4) + (2 << 1) + 0,
+ UBRX_1MHZ_115200=9, UMCTL_1MHZ_115200=(0 << 4) + (1 << 1) + 0,
+ UBRX_2MHZ_115200=18, UMCTL_2MHZ_115200=(8 << 4) + (2 << 1) + 0,
+ UBRX_4MHZ_115200=36, UMCTL_4MHZ_115200=(2 << 4) + (4 << 1) + 0,
+ UBRX_1E6HZ_9600=104, UMCTL_1E6HZ_9600=(0 << 4) + (1 << 1) + 0,
+ UBRX_1E6HZ_19200=52, UMCTL_1E6HZ_19200=(0 << 4) + (0 << 1) + 0,
+ UBRX_1E6HZ_115200=8, UMCTL_1E6HZ_115200=(0 << 4) + (6 << 1) + 0,
+} msp430_usci_uart_rate_t;
+
typedef struct {
uint8_t ctl0;
uint8_t ctl1;
uint8_t irtctl;
uint8_t irrctl;
uint8_t abctl;
+ bool uclisten;
msp430_ren_t ren;
-} __attribute__ ((packed)) msp430_usci_uart_t;
+} msp430_usci_uart_t;
-/* Baud rates for UART mode. Only 32KHz modes work right now. */
-typedef enum {
- /* UCOS16=0. UMCTL = UCBRFx << 4 + UCBRSx << 1 + UCOS16.
- * 1MHZ = 1,048576HZ, 1E6MHZ = 1,000,000HZ.
- */
- UBRX_32768HZ_9600=3, UMCTL_32768HZ_9600=(0 << 4) + (3 << 1) + 0,
- UBRX_1MHZ_9600=109, UMCTL_1MHZ_9600=(0 << 4) + (2 << 1) + 0,
- UBRX_1MHZ_115200=9, UMCTL_1MHZ_115200=(0 << 4) + (1 << 1) + 0,
- UBRX_1E6MHZ_9600=104, UMCTL_1E6MHZ_9600=(0 << 4) + (1 << 1) + 0,
- UBRX_1E6MHZ_115200=8, UMCTL_1E6MHZ_115200=(0 << 4) + (6 << 1) + 0,
-} msp430_usci_uart_rate_t;
+typedef struct {
+ uint8_t ctl0;
+ uint8_t ctl1;
+ uint16_t brx;
+ bool uclisten;
+ msp430_ren_t ren;
+} msp430_usci_spi_t;
-typedef union {
- msp430_usci_uart_t uart;
-} __attribute__ ((packed)) msp430_usci_config_t;
+typedef struct {
+ uint8_t ctl0;
+ uint8_t ctl1;
+ uint16_t brx;
+ uint8_t i2coa;
+ msp430_ren_t ren;
+} msp430_usci_i2c_t;
#endif