* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-
+
/**
* Header definitions for the USCI peripheral in newer msp430 processors.
* A USCI peripheral provides two communications devices, denoted A and B.
*
* A devices offer UART, LIN, IrDA and SPI modes of operation. B parts are
* limited to SPI and I2C modes.
- *
- * @author R. Steve McKown <smckown@gmail.com>
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
*/
-
+
#ifndef MSP430_USCI_h
#define MSP430_USCI_h
UBRX_1MHZ_19200=54, UMCTL_1MHZ_19200=(0 << 4) + (5 << 1) + 0,
UBRX_1MHZ_38400=27, UMCTL_1MHZ_38400=(0 << 4) + (2 << 1) + 0,
UBRX_1MHZ_115200=9, UMCTL_1MHZ_115200=(0 << 4) + (1 << 1) + 0,
- UBRX_1E6MHZ_9600=104, UMCTL_1E6MHZ_9600=(0 << 4) + (1 << 1) + 0,
- UBRX_1E6MHZ_115200=8, UMCTL_1E6MHZ_115200=(0 << 4) + (6 << 1) + 0,
+ UBRX_2MHZ_115200=18, UMCTL_2MHZ_115200=(8 << 4) + (2 << 1) + 0,
+ UBRX_4MHZ_115200=36, UMCTL_4MHZ_115200=(2 << 4) + (4 << 1) + 0,
+ UBRX_1E6HZ_9600=104, UMCTL_1E6HZ_9600=(0 << 4) + (1 << 1) + 0,
+ UBRX_1E6HZ_19200=52, UMCTL_1E6HZ_19200=(0 << 4) + (0 << 1) + 0,
+ UBRX_1E6HZ_115200=8, UMCTL_1E6HZ_115200=(0 << 4) + (6 << 1) + 0,
} msp430_usci_uart_rate_t;
typedef struct {
uint8_t ctl0;
uint8_t ctl1;
uint16_t brx;
- uint8_t i2cie;
uint8_t i2coa;
- uint8_t i2csa;
- bool uclisten;
msp430_ren_t ren;
} msp430_usci_i2c_t;