* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universität Berlin nor the names
+ * - Neither the name of the Titanium Mirror, Inc. nor the names
* of its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-
+
/**
* Defines the USCI_A1 peripheral.
- *
- * @author R. Steve McKown <smckown@gmail.com>
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
*/
-
+
configuration Msp430UsciA1C {
provides {
interface HplMsp430UsciReg as Registers;
- interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
interface Resource as Resource[uint8_t];
interface ResourceRequested as ResourceRequested[uint8_t];
interface ArbiterInfo;
}
- uses interface ResourceConfig as ResourceConfig[uint8_t];
+ uses interface ResourceConfigure as ResourceConfigure[uint8_t];
}
implementation {
- components new HplMsp430UsciRegP(UCA1CTL0_, UCA1CTL1_, UCA1BR0_, UCA1BR1_,
- UCA1MCTL_, 0/*UCA1I2CIE_*/, UCA1STAT_, UCA1RXBUF_, UCA1TXBUF_, UCA1ABCTL_,
- UCA1IRTCTL_, UCA1IRRCTL_, 0/*UCA1I2COA_*/, 0/*UCA1I2CSA_*/, IE2_, IFG2_)
- as RegP;
- Registers = RegP;
-
components new FcfsArbiterC(MSP430_USCIA1_RESOURCE) as ArbiterC;
Resource = ArbiterC;
ResourceRequested = ArbiterC;
ResourceConfigure = ArbiterC;
ArbiterInfo = ArbiterC;
- components new Msp430UsciIntDispatchAP() as IntDispatchA1P;
- Interrupts = IntDispatchA1P.IntAx;
+ components new Msp430UsciIntDispatchP() as IntDispatchA1P;
+ Interrupts = IntDispatchA1P;
IntDispatchA1P.ArbiterInfo -> ArbiterC;
- components HplMsp430UsciInt0C as Int0C;
- IntDispatchA1P.RawIntAx -> Int0C.IntA;
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegA1;
+ IntDispatchA1P.RawInt -> UsciC.IntA1;
}