Back to stable VeREF for now.

diff --git a/tos/platforms/tmirws/sensors/BatteryAdcP.nc b/tos/platforms/tmirws/sensors/BatteryAdcP.nc
index 7a4f44891b1eff4513d4657647014ebbe07ec96b..a6e27d74465646c2b180b45752bf7e7af4bb33a5 100644 (file)
--- a/tos/platforms/tmirws/sensors/BatteryAdcP.nc
+++ b/tos/platforms/tmirws/sensors/BatteryAdcP.nc
@@ -46,14 +46,18 @@ implementation {
       inch: INPUT_CHANNEL_A0,
 #if 0 /* internal references unstable */
       sref: REFERENCE_VREFplus_AVss,
-      ref2_5v: REFVOLT_LEVEL_1_5,
-      ref2_5v: REFVOLT_LEVEL_2_5,
+      ref2_5v: REFVOLT_LEVEL_1_5, /* REFVOLT_LEVEL_2_5, */
 #else /* external reference is stable */
       sref: REFERENCE_VeREFplus_AVss,
       ref2_5v: REFVOLT_LEVEL_1_5,
 #endif
+#if 0 /* clock source doesn't seem to affect stability */
       adc12ssel: SHT_SOURCE_ADC12OSC,
       adc12div: SHT_CLOCK_DIV_8,
+#else
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+#endif
       sht: SAMPLE_HOLD_8_CYCLES,
       sampcon_ssel: SAMPCON_SOURCE_ACLK,
       sampcon_id: SAMPCON_CLOCK_DIV_1

diff --git a/tos/platforms/tmirws/sensors/PyranometerAdcP.nc b/tos/platforms/tmirws/sensors/PyranometerAdcP.nc
index 6fd9b3edbdc5055940b598fd82f30d6067a1be75..69d67867fc491c151eb36d5306a38109dae3060d 100644 (file)
--- a/tos/platforms/tmirws/sensors/PyranometerAdcP.nc
+++ b/tos/platforms/tmirws/sensors/PyranometerAdcP.nc
@@ -43,14 +43,18 @@ implementation {
       inch: INPUT_CHANNEL_A3,
 #if 0 /* internal references unstable */
       sref: REFERENCE_VREFplus_AVss,
-      ref2_5v: REFVOLT_LEVEL_1_5,
-      ref2_5v: REFVOLT_LEVEL_2_5,
+      ref2_5v: REFVOLT_LEVEL_1_5, /* REFVOLT_LEVEL_2_5, */
 #else /* external reference is stable */
       sref: REFERENCE_VeREFplus_AVss,
       ref2_5v: REFVOLT_LEVEL_1_5,
 #endif
+#if 0 /* stability affected by clock source? */
       adc12ssel: SHT_SOURCE_ADC12OSC,
       adc12div: SHT_CLOCK_DIV_8,
+#else
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+#endif
       sht: SAMPLE_HOLD_8_CYCLES,
       sampcon_ssel: SAMPCON_SOURCE_ACLK,
       sampcon_id: SAMPCON_CLOCK_DIV_1