Make McuSleepC smarter about newer msp430 processors.

diff --git a/tos/chips/msp430/McuSleepC.nc b/tos/chips/msp430/McuSleepC.nc
index 3d47fc5d1fca9d1d04b017a2709566073024cc97..57c6d393aaefcb522c22cc0738cb56df82d14e24 100644 (file)
--- a/tos/chips/msp430/McuSleepC.nc
+++ b/tos/chips/msp430/McuSleepC.nc
@@ -69,10 +69,14 @@ implementation {
     if ((((TACCTL0 & CCIE) ||
          (TACCTL1 & CCIE) ||
          (TACCTL2 & CCIE)) &&
     if ((((TACCTL0 & CCIE) ||
          (TACCTL1 & CCIE) ||
          (TACCTL2 & CCIE)) &&

-        ((TACTL & TASSEL_3) == TASSEL_2)) ||
-       ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) ||
-       ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
-#ifdef __msp430_have_usart0_with_i2c
+        ((TACTL & TASSEL_3) == TASSEL_2))
+#ifdef __MSP430_HAS_UART0__
+       || ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1))
+#endif
+#ifdef __MSP430_HAS_UART1__
+       || ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
+#endif
+#ifdef __MSP430_HAS_I2C__

         // registers end in "nr" to prevent nesC race condition detection
         || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
             (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C))
         // registers end in "nr" to prevent nesC race condition detection
         || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
             (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C))


@@ -80,7 +84,7 @@ implementation {
        )
       pState = MSP430_POWER_LPM1;
     
        )
       pState = MSP430_POWER_LPM1;
     

-#ifdef __msp430_have_adc12
+#ifdef __MSP430_HAS_ADC12__

     // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE
     if (ADC12CTL0 & ADC12ON){
       if (ADC12CTL1 & ADC12SSEL_2){
     // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE
     if (ADC12CTL0 & ADC12ON){
       if (ADC12CTL1 & ADC12SSEL_2){