}
implementation
{
- #define PORTxIN (*(volatile TYPE_PORT_IN*)port_in_addr)
- #define PORTx (*(volatile TYPE_PORT_OUT*)port_out_addr)
- #define PORTxDIR (*(volatile TYPE_PORT_DIR*)port_dir_addr)
- #define PORTxSEL (*(volatile TYPE_PORT_SEL*)port_sel_addr)
+ #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* SINGLE NONNULL, port_in_addr))
+ #define PORTx (*TCAST(volatile TYPE_PORT_OUT* SINGLE NONNULL, port_out_addr))
+ #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* SINGLE NONNULL, port_dir_addr))
+ #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* SINGLE NONNULL, port_sel_addr))
async command void IO.set() { atomic PORTx |= (0x01 << pin); }
async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); }
}
implementation
{
- #define TxCCTLx (*(volatile TYPE_TACCTL0*)TxCCTLx_addr)
- #define TxCCRx (*(volatile TYPE_TACCR0*)TxCCRx_addr)
+ #define TxCCTLx (*TCAST(volatile TYPE_TACCTL0* SINGLE NONNULL, TxCCTLx_addr))
+ #define TxCCRx (*TCAST(volatile TYPE_TACCR0* SINGLE NONNULL, TxCCRx_addr))
typedef msp430_compare_control_t cc_t;
}
implementation
{
- #define TxIV (*(volatile TYPE_TAIV*)TxIV_addr)
- #define TxR (*(volatile TYPE_TAR*)TxR_addr)
- #define TxCTL (*(volatile TYPE_TACTL*)TxCTL_addr)
+ #define TxIV (*TCAST(volatile TYPE_TAIV* SINGLE NONNULL, TxIV_addr))
+ #define TxR (*TCAST(volatile TYPE_TAR* SINGLE NONNULL, TxR_addr))
+ #define TxCTL (*TCAST(volatile TYPE_TACTL* SINGLE NONNULL, TxCTL_addr))
async command uint16_t Timer.get()
{