+*.swp
+*.class
+support/sdk/java/net/tinyos/message/SerialPacket.java
+support/sdk/java/net/tinyos/packet/Serial.java
+support/sdk/java/net/tinyos/tools/PrintfMsg.java
/debian/control
--- /dev/null
+#-*-Makefile-*- vim:syntax=make
+# tmicore.target
+
+PLATFORM ?= tmicore
+
+#MSP_MCU = msp430x2417
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --device=cp2103
+
+#VOLUME_FILE = volumes-stm25p.xml
+#VOLUME_ALLOCATOR ?= tos-storage-stm25p
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+tmicore: $(BUILD_DEPS)
+ @:
--- /dev/null
+#-*-Makefile-*- vim:syntax=make
+# tmirws.target
+
+PLATFORM ?= tmirws
+
+#MSP_MCU = msp430x2417
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --device=cp2103
+
+#VOLUME_FILE = volumes-stm25p.xml
+#VOLUME_ALLOCATOR ?= tos-storage-stm25p
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+tmirws: $(BUILD_DEPS)
+ @:
+#!/bin/sh
+
mkdir config-aux
aclocal
autoheader
# $Id$
# @author Cory Sharp <cory@moteiv.com>
# @author Joe Polastre
+#
+# Changes to support CP2103 by R. Steve Mckown <rsmckown@gmail.com>
my $help = <<'EOF';
usage: motelist [options]
#
sub scan_sysfs {
- # Scan /sys/bus/usb/drivers/usb for FTDI devices
+ # Scan /sys/bus/usb/drivers/usb for FTDI and CP2103 devices
my @ftdidevs =
- grep { ($_->{UsbVendor}||"") eq "0403" && ($_->{UsbProduct}||"") eq "6001" }
+ grep { (($_->{UsbVendor}||"") eq "0403" && ($_->{UsbProduct}||"") eq "6001") || (($_->{UsbVendor}||"") eq "10c4" && ($_->{UsbProduct}||"") eq "ea60") }
map { {
SysPath => $_,
UsbVendor => snarf("$_/idVendor",1),
} }
glob("/sys/bus/usb/drivers/usb/*");
- # Gather information about each FTDI device
+ # Gather information about each FTDI and CP2103 device
for my $f (@ftdidevs) {
my $syspath = $f->{SysPath};
// @author Cory Sharp <cssharp@eecs.berkeley.edu>
+// Support for CP2103 by Sporian Microsystems, Inc. and R. Steve McKown
+// <rsmckown@gmail.com>
+
#include <iostream>
#include <string>
#include <vector>
case REG_DWORD:
data_int = *(DWORD*)_data;
- nbuf = sprintf( buf, "%d", *(DWORD*)_data );
+ nbuf = sprintf( buf, "%lu", *(DWORD*)_data );
data = String( buf, buf+nbuf );
break;
return refcnt;
}
-ListDevice getDevices()
+void getFTDIDevices(ListDevice& devs)
{
- ListDevice devs;
-
String ccs = "SYSTEM\\CurrentControlSet\\";
RegKey dclass( HKEY_LOCAL_MACHINE, ccs+"Control\\DeviceClasses" );
RegKey ftdibus( HKEY_LOCAL_MACHINE, ccs+"Enum\\FTDIBUS" );
devs.push_back(d);
}
}
+}
+
+void getCP210xDevices(ListDevice& devs)
+{
+ String ccs = "SYSTEM\\CurrentControlSet\\";
+ String enums = "Enum\\USB\\Vid_10c4&Pid_ea60";
+ RegKey dclass(HKEY_LOCAL_MACHINE, ccs+"Control\\DeviceClasses");
+ RegKey usb10c4(HKEY_LOCAL_MACHINE, ccs+enums);
+ RegKey usb10c4tty(HKEY_LOCAL_MACHINE, ccs+enums+"&Mi_00");
+
+ VecString cdev = usb10c4.getSubkeyNames();
+ for( VecString::const_iterator i=cdev.begin(); i!=cdev.end(); i++ )
+ {
+ Device d;
+ d.id = i->substr(0, 8);
+
+ try
+ {
+ RegKey devkey = usb10c4tty[*i+"_00"];
+ d.comm = devkey["Device Parameters"]("PortName").data;
+ }
+ catch( std::runtime_error e )
+ {
+ d.comm = "no_comm";
+ }
+
+ try { d.info = usb10c4[*i]("LocationInformation").data; }
+ catch( std::runtime_error e ) { }
+
+ try {
+ d.refcount = getRefCount( dclass, usb10c4[*i] );
+ }
+ catch( std::runtime_error e ) { }
+
+ String::size_type ncomm = d.comm.find_first_of("0123456789");
+ if( ncomm != String::npos )
+ d.sortnum = atoi( d.comm.substr(ncomm).c_str() );
+
+ devs.push_back(d);
+ }
+}
+
+
+ListDevice getDevices()
+{
+ ListDevice devs;
+
+ getFTDIDevices(devs);
+ getCP210xDevices(devs);
return devs;
}
--- /dev/null
+- The python code in tos-bsl.in runs on Linux or in Cygwin but the latter
+ requires installation of the cp210x_rt python shim module, which is not
+ yet built or installed by the makefile.
+
+- The Cygwin/Windows code is currently not built, but untarred from a tarball.
+ This code is apparently from V1.5 of tos-bsl, prior to support for the
+ modular architecture and cp2103 additions in V1.6. This code should be
+ rebuilt.
+
+- The Binary windows version should be built from source.
--- /dev/null
+
+// The following ifdef block is the standard way of creating macros which make exporting
+// from a DLL simpler. All files within this DLL are compiled with the CP210xRUNTIMEDLL_EXPORTS
+// symbol defined on the command line. this symbol should not be defined on any project
+// that uses this DLL. This way any other project whose source files include this file see
+// CP210xRUNTIMEDLL_API functions as being imported from a DLL, wheras this DLL sees symbols
+// defined with this macro as being exported.
+#ifdef CP210xRUNTIMEDLL_EXPORTS
+#define CP210xRUNTIMEDLL_API __declspec(dllexport)
+#else
+#define CP210xRUNTIMEDLL_API __declspec(dllimport)
+#endif
+
+#define CP210x_MAX_SETUP_LENGTH 65536
+
+#ifndef _CP210x_STANDARD_DEF_
+#define _CP210x_STANDARD_DEF_
+// GetDeviceVersion() return codes
+#define CP210x_CP2101_VERSION 0x01
+#define CP210x_CP2102_VERSION 0x02
+#define CP210x_CP2103_VERSION 0x03
+
+// Return codes
+#define CP210x_SUCCESS 0x00
+#define CP210x_DEVICE_NOT_FOUND 0xFF
+#define CP210x_INVALID_HANDLE 0x01
+#define CP210x_INVALID_PARAMETER 0x02
+#define CP210x_DEVICE_IO_FAILED 0x03
+#define CP210x_FUNCTION_NOT_SUPPORTED 0x04
+#define CP210x_GLOBAL_DATA_ERROR 0x05
+#define CP210x_COMMAND_FAILED 0x08
+#define CP210x_INVALID_ACCESS_TYPE 0x09
+
+// Type definitions
+typedef int CP210x_STATUS;
+#endif /*_CP210x_STANDARD_DEF_*/
+
+// Mask and Latch value bit definitions
+#define CP210x_GPIO_0 0x01
+#define CP210x_GPIO_1 0x02
+#define CP210x_GPIO_2 0x04
+#define CP210x_GPIO_3 0x08
+
+CP210xRUNTIMEDLL_API CP210x_STATUS WINAPI
+CP210xRT_ReadLatch( HANDLE cyHandle,
+ LPBYTE lpbLatch);
+
+CP210xRUNTIMEDLL_API CP210x_STATUS WINAPI
+CP210xRT_WriteLatch( HANDLE cyHandle,
+ BYTE bMask,
+ BYTE bLatch);
+
+
+CP210xRUNTIMEDLL_API CP210x_STATUS WINAPI
+CP210xRT_GetPartNumber( HANDLE cyHandle,
+ LPBYTE lpbPartNum);
--- /dev/null
+/* Copyright (c) 2006-2007 by Sporian Microsystems, Inc.
+ * All Rights Reserved.
+ *
+ * This document is the proprietary and confidential property of Sporian
+ * Microsystems, Inc. All use, distribution, reproduction or re-distribution
+ * is disallowed without the prior express written consent of Sporian
+ * Microsystems, Inc.
+ */
+
+#include <Python.h>
+#include <windows.h>
+#include <io.h>
+#include <dlfcn.h>
+#include "CP210xRuntimeDLL.h"
+
+typedef CP210xRUNTIMEDLL_API CP210x_STATUS WINAPI (*fn_t)(HANDLE, BYTE, BYTE);
+
+void* dll;
+fn_t writeLatch;
+PyObject* exception;
+
+
+static PyObject* cp210xrt_writeLatch(PyObject* self, PyObject* args)
+{
+ int fd;
+ BYTE bMask;
+ BYTE bData;
+ HANDLE hDevice;
+ CP210x_STATUS ret;
+
+ if (!PyArg_ParseTuple(args, "iBB", &fd, &bMask, &bData))
+ return NULL;
+ if (!writeLatch) {
+ PyErr_SetString(exception, "No access to CP210xRuntime.dll");
+ return NULL;
+ }
+
+ hDevice = (HANDLE)get_osfhandle(fd);
+ if (hDevice == INVALID_HANDLE_VALUE)
+ {
+ PyErr_SetString(exception, "No access to device");
+ return NULL;
+ }
+
+ /* If we don't call writeLatch, then we don't core dump when we return to
+ * the python caller. If we do call writeLatch, the latches are set, but
+ * when we return return into python, perhaps the stack has been corrupted
+ * somehow. We get a stackdump from cygwin.
+ *
+ * Note: when we opened the handle here, via CreateFile(), then closed it
+ * before returning, we had no problems.
+ */
+ ret = writeLatch(hDevice, bMask, bData);
+ if (ret != CP210x_SUCCESS) {
+ PyErr_SetString(exception, "IO Error with device");
+ return NULL;
+ }
+
+#if 1
+ Py_INCREF(Py_None);
+ return Py_None;
+#else
+ return Py_BuildValue("i", ret);
+#endif
+}
+
+
+static PyMethodDef cp210xrtMethods[] = {
+ { "writeLatch", cp210xrt_writeLatch, METH_VARARGS, "Set GPIO bits" },
+ { NULL, NULL, 0, NULL }
+};
+
+
+PyMODINIT_FUNC initcp210xrt(void)
+{
+ PyObject* m = Py_InitModule("cp210xrt", cp210xrtMethods);
+ exception = PyErr_NewException("cp210xrt.error", NULL, NULL);
+ Py_INCREF(exception);
+ PyModule_AddObject(m, "error", exception);
+
+ if (!dll) {
+ dll = dlopen("CP210xRuntime.dll", RTLD_NOW);
+ if (dll) {
+ dlerror();
+ writeLatch = (fn_t)dlsym(dll, "CP210xRT_WriteLatch");
+ if (dlerror())
+ writeLatch = NULL;
+ }
+ }
+}
+
--- /dev/null
+#!/usr/bin/python
+
+from distutils.core import setup, Extension
+
+module1 = Extension('cp210xrt', sources = ['cp210xrtmodule.c'])
+
+setup(name = 'cp210xrt', version = '0.1',
+ description = 'Interface to cp210x runtime dll',
+ ext_modules = [module1])
+
--- /dev/null
+#!/usr/bin/python
+
+import sys, os, time, serial, cp210xrt;
+
+sys.stderr.write("os.name is %s\n" % os.name);
+sys.stderr.write("sys.platform is %s\n" % sys.platform);
+
+serialport = serial.Serial(9, 9600, parity = serial.PARITY_EVEN,
+ timeout = 1000)
+sys.stderr.write("using serial port %r\n" % serialport.portstr)
+sys.stderr.write("serial port fd is %d\n" % serialport.fd)
+#sys.stderr.write("serial port HANDLE is %d\n" % _get_osfhandle(serialport.fd))
+
+
+sys.stderr.write("clear bit...\n")
+cp210xrt.writeLatch(serialport.fd, 0x04, 0x0)
+sys.stderr.write("clear bit done\n")
+time.sleep(0.250)
+sys.stderr.write("set bit...\n")
+cp210xrt.writeLatch(serialport.fd, 0x04, 0x04)
+
#!/usr/bin/env python
# Serial Bootstrap Loader software for the MSP430 embedded proccessor.
#
+# Copyright (c) 2006-2007 by Sporian Microsystems, Inc.
+# All Rights Reserved.
+#
+# This document is the proprietary and confidential property of Sporian
+# Microsystems, Inc. All use, distribution, reproduction or re-distribution
+# is disallowed without the prior express written consent of Sporian
+# Microsystems, Inc. Portions of this document are derived from a source
+# document covered by the license(s) below.
+#
+# This material is based upon work supported by the United States Navy under
+# Contract No. N00030-06-C-0032. Any opinions, findings and conclusions or
+# recommendations expressed in this material are those of the author(s) and do
+# not necessarily reflect the views of the United States Navy.
+#
# (C) 2001-2003 Chris Liechti <cliechti@gmx.net>
# this is distributed under a free software license, see license.txt
#
# fixes from Colin Domoney
#
-# based on the application note slas96b.pdf from Texas Instruments, Inc.,
+# based on the application note slaa96b.pdf from Texas Instruments, Inc.,
# Volker Rzehak
# additional infos from slaa089a.pdf
+#
+# Modularization by R. Steve McKown, including a simplification of the
+# concepts of inversion and assertion. Reviewed slaa089d and slaa096d;
+# no changes required due to updated documentation.
+#
+# Important conventions used in this code
+# =======================================
+# All functions that can set or clear a digital pin or signal state do so
+# relative to the assertion state of its signal. That is, SetXXX(1) asserts
+# signal XXX and SetXXX(0) unasserts signal XXX. Asserting a signal means its
+# logic value is set to that value that asserts, or activates, its condition.
+# Signals may be either active high or active low, as shown in the chart below.
+#
+# signal -- asserted -- - unasserted -
+# active --- value --- --- value ---
+# state logic voltage logic voltage
+# ----------------------------------------
+# high 1 Vcc 0 GND
+# low 0 GND 1 VCC
+#
+#
+# Important information about RS-232C signals
+# ===========================================
+#
+# Setting RS-232 signals, like DTR and RTS, from a host using Python using the
+# convention defined above:
+# A signal is asserted by calling serial.setXXX(1) [Ex: setDSR(1)]
+# A signal is unasserted by calling serial.setXXX(0) [Ex: setRTS(0)]
+#
+# RS-232C signal output mechanics:
+# An asserted RS-232C DTR or RTS signal is simultaneously:
+# logic 0
+# A SPACE condition
+# Has a voltage between +3v and +15v per the RS-232C specification
+# TTL level RS-232C pins use Vcc to indicate the logic 0 / SPACE condition
+# An unasserted DTR or RTS signal is simultaneously:
+# logic 1
+# A MARK condition
+# Has a voltage between -3v and -15v per the RS-232C specification
+#
+# PC serial ports often break the spec and use 0v to indicate logic 1/MARK
+#
+# TTL level RS-232C pins use GND to indicate the logic 0/SPACE and Vcc to
+# indicate logic 1/MARK
+#
+# RS-232C signal lines are active low, in that the asserted signal is
+# represented by a logic zero (0).
+#
+#
+# Important MSP430 signals
+# ========================
+#
+# The BSL protocol is entered by manipulating the RST and TCK pins on MSP430
+# uC's with dedicated JTAG pins, and by manipulating RST and TEST pins on
+# MSP430 uC's with shared JTAG pins. The assertion state of TEST and TCK
+# are always equal, so we use the term TTCK to imply either or both of them
+# simultaneously.
+#
+# RST and TCK are active low signals. TEST is active high.
+#
+# An MSP430 is reset by simplying asserting RST for a short period then
+# unasserting it.
+#
+# The BSL mode is entered by performing this sequence of events:
+# Assert RST
+# Assert TTCK
+# Unssert TTCK
+# Assert TTCK
+# Unssert RST
+# Unssert TTCK
+#
+#
+# The TI slaa096d Document
+# ========================
+#
+# The TI slaa096d document defines a circuit that can be used to program MSP430
+# parts using the BSL protocol. Other platforms, such as Telos, EyesIFx and
+# Tinynode to name a few, also incorporate support for BSL using circuitry
+# that can vary significantly from the TI schematic.
+#
+# The code presented in the TI document does not use a consistent methodology
+# to indicate what is happening when a SetXXX(n) function is called. In some
+# cases, 'n' represents the assertion state, where 1=asserted and 0=unasserted.
+# In other cases, 'n' represents the inverse of the assertion state. In yet
+# other cases, 'n' represents the logic value of the signal on a given pin, or
+# the inverse of the logic value.
+#
+# To improve readability, this code explicitly defines all SetXXX(n) functions
+# where 'n' represents the assertion state of the signal. In other words, when
+# n==1 the signal is asserted and when n==0 the signal is unasserted. One can
+# trivially determine the logic state of any signal pin by applying the current
+# assertion state to the signal's active state (see the chart above).
+#
+# Device support
+# ==============
+#
+# To add support for a new MSP430-based device, create a new class deriving
+# from bsl_standard or one of its specializations.
+#
-import sys, time, string, cStringIO, struct
+import sys, fcntl, time, string, cStringIO, struct
sys.path.append("@tinyoslibdir@")
import serial
#cpu types for "change baudrate"
#use strings as ID so that they can be used in outputs too
F1x = "F1x family"
+F2x = "F2x family"
F4x = "F4x family"
#known device list
deviceids = {
0xf149: F1x,
+ 0xf169: F1x,
0xf16c: F1x, #for telosb
0xf112: F1x,
0xf413: F4x,
0xf123: F1x,
0xf449: F4x,
0x1232: F1x,
+ 0xf26f: F2x,
}
class BSLException(Exception):
else:
self.prolongFactor = aProlongFactor
- #flags for inverted use of control pins
- #used for some hardware
- self.invertRST = 0
- self.invertTEST = 0
- self.swapRSTTEST = 0
- self.telosLatch = 0
- self.telosI2C = 0
-
self.protocolMode = self.MODE_BSL
self.BSLMemAccessWarning = 0 #Default: no warning.
self.slowmode = 0
timeout = self.timeout
)
if DEBUG: sys.stderr.write("using serial port %r\n" % self.serialport.portstr)
- self.SetRSTpin() #enable power
- self.SetTESTpin() #enable power
+ self.bslInit() #enable power
self.serialport.flushInput()
self.serialport.flushOutput()
used in other programs.
Returns zero if the function is successful."""
if DEBUG > 1: sys.stderr.write("* comDone()")
- self.SetRSTpin(1) #disable power
- self.SetTESTpin(0) #disable power
+ self.bslDone() #disable power
self.serialport.close()
def comRxHeader(self):
raise BSLException("Unknown header 0x%02x\nAre you downloading to RAM into an old device that requires the patch? Try option -U" % rxHeader)
- def SetDTR(self, level, invert):
- """Controls DTR pin (0: GND; 1: VCC; unless inverted flag is set)"""
- if invert:
- self.serialport.setDTR(not level)
- else:
- self.serialport.setDTR(level)
- if self.slowmode:
- time.sleep(0.040)
-
- def SetRTS(self, level, invert):
- """Controls RTS pin (0: GND; 1: VCC; unless inverted flag is set)"""
- if invert:
- self.serialport.setRTS(not level)
- else:
- self.serialport.setRTS(level)
- if self.slowmode:
- time.sleep(0.040)
-
- def SetRSTpin(self, level=1):
- """Controls RST/NMI pin (0: GND; 1: VCC; unless inverted flag is set)"""
- if self.swapRSTTEST:
- self.SetRTS(level, self.invertRST)
- else:
- self.SetDTR(level, self.invertRST)
-
- def SetTESTpin(self, level=1):
- """Controls TEST pin (inverted on board: 0: VCC; 1: GND; unless inverted flag is set)"""
- if self.swapRSTTEST:
- self.SetDTR(level, self.invertTEST)
- else:
- self.SetRTS(level, self.invertTEST)
-
- def telosSetSCL(self, level):
- self.serialport.setRTS(not level)
-
- def telosSetSDA(self, level):
- self.serialport.setDTR(not level)
-
- def telosI2CStart(self):
- self.telosSetSDA(1)
- self.telosSetSCL(1)
- self.telosSetSDA(0)
-
- def telosI2CStop(self):
- self.telosSetSDA(0)
- self.telosSetSCL(1)
- self.telosSetSDA(1)
-
- def telosI2CWriteBit(self, bit):
- self.telosSetSCL(0)
- self.telosSetSDA(bit)
- time.sleep(2e-6)
- self.telosSetSCL(1)
- time.sleep(1e-6)
- self.telosSetSCL(0)
-
- def telosI2CWriteByte(self, byte):
- self.telosI2CWriteBit( byte & 0x80 );
- self.telosI2CWriteBit( byte & 0x40 );
- self.telosI2CWriteBit( byte & 0x20 );
- self.telosI2CWriteBit( byte & 0x10 );
- self.telosI2CWriteBit( byte & 0x08 );
- self.telosI2CWriteBit( byte & 0x04 );
- self.telosI2CWriteBit( byte & 0x02 );
- self.telosI2CWriteBit( byte & 0x01 );
- self.telosI2CWriteBit( 0 ); # "acknowledge"
-
- def telosI2CWriteCmd(self, addr, cmdbyte):
- self.telosI2CStart()
- self.telosI2CWriteByte( 0x90 | (addr << 1) )
- self.telosI2CWriteByte( cmdbyte )
- self.telosI2CStop()
-
- def telosBReset(self,invokeBSL=0):
-
- # "BSL entry sequence at dedicated JTAG pins"
- # rst !s0: 0 0 0 0 1 1
- # tck !s1: 1 0 1 0 0 1
- # s0|s1: 1 3 1 3 2 0
-
- # "BSL entry sequence at shared JTAG pins"
- # rst !s0: 0 0 0 0 1 1
- # tck !s1: 0 1 0 1 1 0
- # s0|s1: 3 1 3 1 0 2
-
- if invokeBSL:
- self.telosI2CWriteCmd(0,1)
- self.telosI2CWriteCmd(0,3)
- self.telosI2CWriteCmd(0,1)
- self.telosI2CWriteCmd(0,3)
- self.telosI2CWriteCmd(0,2)
- self.telosI2CWriteCmd(0,0)
- else:
- self.telosI2CWriteCmd(0,3)
- self.telosI2CWriteCmd(0,2)
- self.telosI2CWriteCmd(0,0)
- time.sleep(0.250) #give MSP430's oscillator time to stabilize
- self.serialport.flushInput() #clear buffers
-
- def bslReset(self, invokeBSL=0):
- """Applies BSL entry sequence on RST/NMI and TEST/VPP pins
- Parameters:
- invokeBSL = 1: complete sequence
- invokeBSL = 0: only RST/NMI pin accessed
-
- RST is inverted twice on boot loader hardware
- TEST is inverted (only once)
- Need positive voltage on DTR, RTS for power-supply of hardware"""
- if self.telosI2C:
- self.telosBReset(invokeBSL)
- return
-
- if DEBUG > 1: sys.stderr.write("* bslReset(invokeBSL=%s)\n" % invokeBSL)
- self.SetRSTpin(1) #power suply
- self.SetTESTpin(1) #power suply
- time.sleep(0.250) #charge capacitor on boot loader hardware
-
- if self.telosLatch:
- self.SetTESTpin(0)
- self.SetRSTpin(0)
- self.SetTESTpin(1)
-
- self.SetRSTpin(0) #RST pin: GND
- if invokeBSL:
- self.SetTESTpin(1) #TEST pin: GND
- self.SetTESTpin(0) #TEST pin: Vcc
- self.SetTESTpin(1) #TEST pin: GND
- self.SetTESTpin(0) #TEST pin: Vcc
- self.SetRSTpin (1) #RST pin: Vcc
- self.SetTESTpin(1) #TEST pin: GND
- else:
- self.SetRSTpin(1) #RST pin: Vcc
- time.sleep(0.250) #give MSP430's oscillator time to stabilize
-
- self.serialport.flushInput() #clear buffers
def bslSync(self,wait=0):
"""Transmits Synchronization character and expects to receive Acknowledge character
self.loadTIText(open(filename, "rb"))
elif filename[-4:].lower() in ('.a43', '.hex'):
self.loadIHex(open(filename, "rb"))
+ elif filename[-5:].lower() in ('.ihex'):
+ self.loadIHex(open(filename, "rb"))
else:
self.loadELF(open(filename, "rb"))
continue
def programBlk(self, addr, blkout, action):
- """programm a memory block"""
+ """program a memory block"""
if DEBUG > 1: sys.stderr.write("* programBlk()\n")
#Check, if specified range is erased
#list of tuples or lists:
#segements = [ (addr1, [d0,d1,d2,...]), (addr2, [e0,e1,e2,...])]
def programData(self, segments, action):
- """programm or verify data"""
+ """program or verify data"""
if DEBUG > 1: sys.stderr.write("* programData()\n")
for seg in segments:
currentAddr = seg.startaddress
#Transmit password to get access to protected BSL functions.
self.txPasswd()
+ def actionMainErase(self):
+ """Erase the main flash memory only"""
+ sys.stderr.write("Main Erase...\n")
+ sys.stderr.flush()
+ self.bslReset(1) #Invoke the boot loader.
+ self.txPasswd(self.passwd) #transmit password
+ for i in range(self.meraseCycles):
+ if i == 1: sys.stderr.write("Additional Main Erase Cycles...\n")
+ self.bslTxRx(self.BSL_ERASE, #Command: Segment Erase
+ 0xfffe, #Any address within flash memory.
+ 0xa504) #Required setting for main erase!
+ self.passwd = None #Password gets erased
+
def actionStartBSL(self, usepatch=1, adjsp=1, replacementBSL=None, forceBSL=0, mayuseBSL=0, speed=None, bslreset=1):
"""start BSL, download patch if desired and needed, adjust SP if desired"""
sys.stderr.write("Invoking BSL...\n")
sys.stderr.write("Using built in BSL replacement for F4x devices\n")
sys.stderr.flush()
replacementBSL.loadTIText(cStringIO.StringIO(F4X_BSL)) #parse embedded BSL
- else:
+ elif self.cpu == F1x:
if DEBUG:
sys.stderr.write("Using built in BSL replacement for F1x devices\n")
sys.stderr.flush()
replacementBSL.loadTIText(cStringIO.StringIO(F1X_BSL)) #parse embedded BSL
+ else:
+ if DEBUG:
+ sys.stderr.write("NO built in BSL replacement for F2x devices\n")
+ sys.stderr.flush()
+ #replacementBSL.loadTIText(cStringIO.StringIO(F1X_BSL)) #parse embedded BSL
#now download the new BSL, if allowed and needed (version lower than the
#the replacement) or forced
raise BSLException, "verify without data not possible"
def actionReset(self):
- """perform a reset, start user programm"""
+ """perform a reset, start user program"""
sys.stderr.write("Reset device ...\n")
sys.stderr.flush()
self.bslReset(0) #only reset
19200:[0x86e0, 0x0001],
38400:[0x87e0, 0x0002],
},
+ F2x: {
+ 9600:[0x8580, 0x0000],
+ 19200:[0x8b00, 0x0001],
+ 38400:[0x8c80, 0x0002],
+ },
F4x: {
9600:[0x9800, 0x0000],
19200:[0xb000, 0x0001],
print "Device Type: 0x%04x\nBSL version: 0x%04x\n" % (family_type, bsl_version)
+class bsl_standard(BootStrapLoader):
+ """
+ This class supports the TI RS-232C programmer presented in slaa096d.
+ The programmer and the MSP430 being programmed are powered from power
+ scavenged off the DTR and RTS lines. Therefore, it is important that
+ DTR and RTS are asserted for some period before programming to charge
+ the programmer's power capacitor. Recall that an asserted RS-232
+ signal generates a voltage between +3v and +15v.
+
+ Per the documentation the signals' assertion states map as follows:
+ rs232.DTR -> (invert) -> msp430.RST
+ rs232.RTS -> (invert) -> msp430.TTCK
+ msp430.TTCK -> msp430.TCK
+ msp430.TTCK -> (invert) -> msp430.TEST
+ """
+ def __init__(self, *args, **kargs):
+ BootStrapLoader.__init__(self, *args, **kargs)
+
+ def mayuseBSL(self):
+ return 1
+
+ def speed(self):
+ return None
+
+ def setRST(self, assertme):
+ """
+ Calling setRST(1) asserts the RST signal at the msp430. Since RST
+ is active low, asserted=GND and unasserted=Vcc.
+
+ Do not override this method
+ """
+ self.lsetRST(assertme)
+ if (self.slowmode):
+ time.sleep(0.040)
+
+ def setTTCK(self, assertme):
+ """
+ Calling setTTCK(1) asserts TTCK. TTCK is a pseudo-signal that
+ acts as TCK and/or TEST. TCK is active high and TEST is active low.
+
+ Do not override this method
+ """
+ self.lsetTTCK(assertme)
+ if (self.slowmode):
+ time.sleep(0.040)
+
+ def lsetRST(self, assertme):
+ """ rs232.DTR -> (invert) -> msp430.RST """
+ self.serialport.setDTR(not assertme)
+
+ def lsetTTCK(self, assertme):
+ """ rs232.RTS -> (invert) -> msp430.TTCK """
+ self.serialport.setRTS(not assertme)
+
+ def bslInit(self):
+ """ Initial state: RST and TTCK are unasserted """
+ self.setRST(0)
+ self.setTTCK(0)
+
+ def bslPrepare(self):
+ """
+ bslInit unaserted RST and TTCK, which asserted DTR and RTS. Wait
+ a while to allow the programmer power cap to charge from the V+
+ supplied by DTR and RTS.
+ """
+ time.sleep(0.250)
+
+ def bslDone(self):
+ """ Unasserting RST and TTCK also cuts power to the programmer """
+ self.setRST(0)
+ self.setTTCK(0)
+
+ def bslReset(self, invokeBSL=0):
+ if DEBUG > 1: sys.stderr.write("* bslReset(invokeBSL=%s)\n" % invokeBSL)
+ self.bslInit()
+ self.bslPrepare()
+ self.setRST(1)
+ if invokeBSL:
+ self.setTTCK(1)
+ self.setTTCK(0)
+ self.setTTCK(1)
+ self.setRST(0)
+ self.setTTCK(0)
+ else:
+ self.setRST(0)
+ time.sleep(0.250) # Allow MSP430 oscillator time to stabilize
+ self.serialport.flushInput()
+
+
+class bsl_telosa(bsl_standard):
+ """
+ The telosa hardware allows for programming its MSP430 via a USB port
+ through a USB/serial chip. The mapping of serial to uC signals differ
+ from the standard TI bsl hardware supported in bsl_standard. DTR from
+ the USB/serial chip is tied directly to TCK and RST is configured
+ through inverters and a type D flip-flop to help prevent spurious uC
+ resets.
+
+ The signals' assertion states map as follows:
+ usbserial.RTS -> msp430.RST
+ usbserial.DTR -> msp430.TCK
+
+ When performing a bslReset(), RST must first be asserted by clearing
+ the onboard flip-flop:
+ assert usbserial.DTR
+ assert usbserial.RTS
+ unassert usbserial.DTR
+ """
+ def __init__(self, *args, **kargs):
+ bsl_standard.__init__(self, *args, **kargs)
+
+ def lsetRST(self, assertme):
+ """ rs232.RTS -> msp430.RST """
+ self.serialport.setRTS(assertme);
+
+ def lsetTTCK(self, assertme):
+ """ rs232.DTR -> msp430.TTCK """
+ self.serialport.setDTR(assertme);
+
+ def bslPrepare(self):
+ """ Run the standard bslPrepare, then set the telosa flip-flop """
+ bsl_standard.bslPrepare(self)
+ self.serialport.setDTR(1)
+ self.serialport.setRTS(1)
+ self.serialport.setDTR(0)
+
+
+class bsl_telosb(bsl_standard):
+ """
+ The telosb allows programming of its MSP430 via a USB port through a
+ USB/serial chip. It incorporates an I2C switch, whose SDA and SCL
+ inputs driven by the serial DTR and RTS signals. Switch outputs are
+ tied to the uC RST and TCK pins.
+
+ The signals' assertion states map as follows:
+ usbserial.RTS -> (invert) -> I2C.SCL
+ usbserial.DTR -> (invert) -> I2C.SDA
+ """
+ def __init__(self, *args, **kargs):
+ bsl_standard.__init__(self, *args, **kargs)
+
+ def mayuseBSL(self):
+ return 0
+
+ def speed(self):
+ return 38400
+
+ def setSCL(self, level):
+ self.serialport.setRTS(not level)
+
+ def setSDA(self, level):
+ self.serialport.setDTR(not level)
+
+ def i2cStart(self):
+ self.setSDA(1)
+ self.setSCL(1)
+ self.setSDA(0)
+
+ def i2cStop(self):
+ self.setSDA(0)
+ self.setSCL(1)
+ self.setSDA(1)
+
+ def i2cWriteBit(self, bit):
+ self.setSCL(0)
+ self.setSDA(bit)
+ time.sleep(2e-6)
+ self.setSCL(1)
+ time.sleep(1e-6)
+ self.setSCL(0)
+
+ def i2cWriteByte(self, byte):
+ self.i2cWriteBit( byte & 0x80 );
+ self.i2cWriteBit( byte & 0x40 );
+ self.i2cWriteBit( byte & 0x20 );
+ self.i2cWriteBit( byte & 0x10 );
+ self.i2cWriteBit( byte & 0x08 );
+ self.i2cWriteBit( byte & 0x04 );
+ self.i2cWriteBit( byte & 0x02 );
+ self.i2cWriteBit( byte & 0x01 );
+ self.i2cWriteBit( 0 ); # "acknowledge"
+
+ def i2cWriteCmd(self, addr, cmdbyte):
+ self.i2cStart()
+ self.i2cWriteByte( 0x90 | (addr << 1) )
+ self.i2cWriteByte( cmdbyte )
+ self.i2cStop()
+
+ def bslInit(self):
+ """ Not needed for telosb """
+
+ def bslDone(self):
+ """ Not needed for telosb """
+
+ def bslReset(self,invokeBSL=0):
+ # "BSL entry sequence at dedicated JTAG pins"
+ # rst !s0: 0 0 0 0 1 1
+ # tck !s1: 1 0 1 0 0 1
+ # s0|s1: 1 3 1 3 2 0
+
+ # "BSL entry sequence at shared JTAG pins"
+ # rst !s0: 0 0 0 0 1 1
+ # tck !s1: 0 1 0 1 1 0
+ # s0|s1: 3 1 3 1 0 2
+
+ if invokeBSL:
+ self.i2cWriteCmd(0,1)
+ self.i2cWriteCmd(0,3)
+ self.i2cWriteCmd(0,1)
+ self.i2cWriteCmd(0,3)
+ self.i2cWriteCmd(0,2)
+ self.i2cWriteCmd(0,0)
+ else:
+ self.i2cWriteCmd(0,3)
+ self.i2cWriteCmd(0,2)
+ self.i2cWriteCmd(0,0)
+ time.sleep(0.250) #give MSP430's oscillator time to stabilize
+ self.serialport.flushInput() #clear buffers
+
+
+class bsl_cp2103(bsl_standard):
+ """
+ Some boards allow programming of their MSP430 via an onboard cp2103
+ USB/serial chip configured such that two of its gpio pins are tied
+ directly to the RST and TCK pins of the uC. In this configuration the
+ RST and TCK signals are pulled up and the cp2103's gpio pins are
+ configured as open drain outputs. The gpio pins are active low and
+ are unasserted on power-up.
+
+ The signals' assertion states map as follows:
+ usbserial.GPIO_3 -> msp430.RST
+ usbserial.GPIO_2 -> msp430.TCK
+ """
+ def __init__(self, *args, **kargs):
+ bsl_standard.__init__(self, *args, **kargs)
+ self.cp2103 = None
+
+ def mayuseBSL(self):
+ return 0
+
+ def speed(self):
+ return 38400
+
+ def lsetRST(self, assertme):
+ """ usbserial.GPIO_3 -> msp430.RST """
+ self.cp2103.setGpio3(assertme);
+
+ def lsetTTCK(self, assertme):
+ """ usbserial.GPIO_2 -> msp430.TTCK """
+ self.cp2103.setGpio2(assertme);
+
+ def bslInit(self):
+ if not self.cp2103:
+ # We can't define cp2103 until the first call to bslInit, since
+ # self.serialport is not instantiated until then.
+ self.cp2103 = cp2103_factory(self.serialport)
+ bsl_standard.bslInit(self)
+
+
+GPIOBIC = 0x8002
+GPIOBIS = 0x8003
+GPIO_2 = 0x04
+GPIO_3 = 0x08
+
+class cp2103_posix:
+ """
+ Implements cp2103 gpio access for posix systems using ioctl() calls.
+ Requires a cp210x driver providing gpio control.
+ """
+ def __init__(self, serialport):
+ sys.stderr.write("cp2103_posix\n")
+ self.fd = serialport.fd
+
+ def setGpio2(self, assertme):
+ """ set not assertme to the gpio pin """
+ if not self.fd: raise "connection not open"
+ if assertme:
+ fcntl.ioctl(self.fd, GPIOBIC, GPIO_2)
+ else:
+ fcntl.ioctl(self.fd, GPIOBIS, GPIO_2)
+ time.sleep(0.010) # no sleep = too fast
+
+ def setGpio3(self, assertme):
+ """ set not assertme to the gpio pin """
+ if not self.fd: raise "connection not open"
+ if assertme:
+ fcntl.ioctl(self.fd, GPIOBIC, GPIO_3)
+ else:
+ fcntl.ioctl(self.fd, GPIOBIS, GPIO_3)
+ time.sleep(0.010) # no sleep = too fast
+
+
+class cp2103_cygwin:
+ """
+ Implements cp2103 gpio access for windows cygwin systems via the
+ cp210x VCP and the CP210xRuntime.dll.
+ """
+ def __init__(self, serialport):
+ import cp210xrt
+ sys.stderr.write("cp2103_cygwin\n")
+ self.fd = serialport.fd
+
+ def setGpio2(self, assertme):
+ """ set not assertme to the gpio pin """
+ import cp210xrt
+ if assertme:
+ cp210xrt.writeLatch(self.fd, GPIO_2, 0)
+ else:
+ cp210xrt.writeLatch(self.fd, GPIO_2, GPIO_2)
+
+ def setGpio3(self, assertme):
+ """ set not assertme to the gpio pin """
+ import cp210xrt
+ if assertme:
+ cp210xrt.writeLatch(self.fd, GPIO_3, 0)
+ else:
+ cp210xrt.writeLatch(self.fd, GPIO_3, GPIO_3)
+
+
+def cp2103_factory(serialport):
+ import os;
+ if os.name == 'posix':
+ if sys.platform == 'cygwin':
+ return cp2103_cygwin(serialport)
+ else:
+ return cp2103_posix(serialport)
+ else:
+ raise "No cp2103 support is available for your platform."
+
+
+def getClass(classname, modulename="__main__"):
+ """ Used by main() to select the appropriate bsl class based on device """
+ return getattr(__import__(modulename, globals(), locals(), [classname]),
+ classname)
+
+
def usage():
"""print some help message"""
sys.stderr.write("""
Possible values are 9600, 19200, 38400
(default 9600)
-1, --f1x Specify CPU family, in case autodetect fails
+ -2, --f2x Specify CPU family, in case autodetect fails
-4, --f4x Specify CPU family, in case autodetect fails
- --F1x and --f2x are only needed when the "change
+ --f1x, --f2x and --f4x are only needed when the "change
baudrate" feature is used and the autodetect feature
fails. If the device ID that is uploaded is known, it
has precedence to the command line option.
- --invert-reset Invert signal on RST pin (used for some BSL hardware)
- --invert-test Invert signal on TEST/TCK pin (used for some BSL
- hardware)
- --swap-reset-test Swap the RST and TEST pins (used for some BSL hardware)
- --telos-latch Special twiddle in BSL reset for Telos hardware
- --telos-i2c DTR/RTS map via an I2C switch to TCK/RST in Telos Rev.B
- --telos Implies options --invert-reset, --invert-test,
- --swap-reset-test, and --telos-latch
- --telosb Implies options --swap-reset-test, --telos-i2c,
- --no-BSL-download, and --speed=38400
- --tmote Identical operation to --telosb
+ --device=device Required device. Supported devices are:
+ standard - Standard BSL programmer per TI specs
+ telosa - Telos revA and compatible boards
+ telosb - Telos revB and compatible boards
+ cp2103 - Boards using cp2103 gpio for BSL support
+ cp2103_old - The old cp2103 gpio format
+ Most settings for a device are defined within the
+ device specific bsl_{device} class.
--no-BSL-download Do not download replacement BSL (disable automatic)
--force-BSL-download Download replacement BSL even if not needed (the one
in the device would have the required features)
Program Flow Specifiers:
-e, --masserase Mass Erase (clear all flash memory)
+ -M, --mainerase Erase main flash memory only (requires --password)
-E, --erasecheck Erase Check by file
-p, --program Program file
-v, --verify Verify by file
to redirect the output into a file.
Do before exit:
- -g, --go=address Start programm execution at specified address.
+ -g, --go=address Start program execution at specified address.
This implies option --wait.
-r, --reset Reset connected MSP430. Starts application.
This is a normal device reset and will start
- the programm that is specified in the reset
+ the program that is specified in the reset
vector. (see also -g)
-w, --wait Wait for <ENTER> before closing serial port.
reset = 0
wait = 0 #wait at the end
goaddr = None
- bsl = BootStrapLoader()
+ bsl = None # now defined dynamically BootStrapLoader()
toinit = []
todo = []
startaddr = None
try:
opts, args = getopt.getopt(sys.argv[1:],
- "hc:P:wf:m:eEpvrg:UDudsxbITNB:S:V14",
+ "hc:P:wf:m:eMEpvrg:UDu:ds:xbITNB:S:V124",
["help", "comport=", "password=", "wait", "framesize=",
- "erasecycles=", "masserase", "erasecheck", "program",
+ "erasecycles=", "masserase", "mainerase", "erasecheck", "program",
"verify", "reset", "go=", "unpatched", "debug",
"upload=", "download=", "size=", "hex", "bin",
"intelhex", "titext", "notimeout", "bsl=", "speed=",
- "bslversion", "f1x", "f4x", "invert-reset", "invert-test",
- "swap-reset-test", "telos-latch", "telos-i2c", "telos", "telosb",
- "tmote","no-BSL-download", "force-BSL-download", "slow"]
+ "bslversion", "f1x", "f2x", "f4x", "no-BSL-download",
+ "force-BSL-download", "slow", "device=" ]
)
except getopt.GetoptError:
# print help information and exit:
usage()
sys.exit(2)
+ # Get the --device setting first. If none, then use bsl_standard
+ for o, a in opts:
+ if o in ("--device", ):
+ # TBD: dynamically instantiate the correct bootloader class
+ bsl = getClass("bsl_%s" % a)()
+ if not bsl:
+ bsl = getClass("bsl_standard")()
+ if not callable(bsl.preparePatch):
+ raise BSLException("Invalid device %s\n" % a)
+ sys.stderr.write("Using device class %s\n" % bsl.__class__.__name__)
+ if callable(bsl.mayuseBSL):
+ mayuseBSL = bsl.mayuseBSL()
+ if callable(bsl.speed):
+ speed = bsl.speed()
+
for o, a in opts:
if o in ("-h", "--help"):
usage()
bsl.meraseCycles = meraseCycles
elif o in ("-e", "--masserase"):
toinit.append(bsl.actionMassErase) #Erase Flash
+ elif o in ("-M", "--mainerase"):
+ toinit.append(bsl.actionMainErase) #Erase main Flash
elif o in ("-E", "--erasecheck"):
toinit.append(bsl.actionEraseCheck) #Erase Check (by file)
- elif o in ("-p", "--programm"):
+ elif o in ("-p", "--program"):
todo.append(bsl.actionProgram) #Program file
elif o in ("-v", "--verify"):
todo.append(bsl.actionVerify) #Verify file
sys.stderr.write("speed must be decimal number\n")
sys.exit(2)
elif o in ("-1", "--f1x"):
+ # TBD: the cpu spec would best be defined in the device, eh?
bsl.cpu = F1x
+ elif o in ("-2", "--f2x"):
+ # TBD: the cpu spec would best be defined in the device, eh?
+ bsl.cpu = F2x
elif o in ("-4", "--f4x"):
+ # TBD: the cpu spec would best be defined in the device, eh?
bsl.cpu = F4x
- elif o in ("--invert-reset", ):
- bsl.invertRST = 1
- elif o in ("--invert-test", ):
- bsl.invertTEST = 1
- elif o in ("--swap-reset-test", ):
- bsl.swapRSTTEST = 1
- elif o in ("--telos-latch", ):
- bsl.telosLatch = 1
- elif o in ("--telos-i2c", ):
- bsl.telosI2C = 1
- elif o in ("--telos", ):
- bsl.invertRST = 1
- bsl.invertTEST = 1
- bsl.swapRSTTEST = 1
- bsl.telosLatch = 1
- elif o in ("--telosb", ):
- bsl.swapRSTTEST = 1
- bsl.telosI2C = 1
- mayuseBSL = 0
- speed = 38400
- elif o in ("--tmote", ):
- bsl.swapRSTTEST = 1
- bsl.telosI2C = 1
- mayuseBSL = 0
- speed = 38400
elif o in ("--no-BSL-download", ):
mayuseBSL = 0
elif o in ("--force-BSL-download", ):
if reset: #reset device first if desired
bsl.actionReset()
- if goaddr is not None: #start user programm at specified address
+ if goaddr is not None: #start user program at specified address
bsl.actionRun(goaddr) #load PC and execute
#upload datablock and output
see tos-bsl-license.txt for more details.
(C) 2001-2003 Chris Liechti <cliechti@gmx.net>
+(C) 2007-2008 Sporian Microsystems, Inc. <rsmckown@gmail.com>
Features
--------
+- new modular design supports multiple BSL interfacing techniques,
+ currently including standard serial as defined by TI, methods used by the
+ telosa and telosb platforms employing an FTDI usb/serial chip, and a new
+ open technique using the cp2103 usb/serial chip.
- understands TI-Text and Intel-hex
- download to Flash and/or RAM, erase, verify
- reset and wait for keypress (to run a device directly from the port
in the application note "slaa96b" from TI (see references). Then this
programm can be used to communicate between the PC and the MSP430 device.
-The program can be started by typing "python bsl.py" in a console. Often
-it works also with just "bsl.py" or "./bsl.py".
+The program can be started by typing "python tos-bsl" in a console. Often
+it works also with just "tos-bsl" or "./tos-bsl".
-USAGE: bsl.py [options] [file]
+USAGE: %s [options] [file]
+Version: %s
If "-" is specified as file the data is read from the stdinput.
A file ending with ".txt" is considered to be in TIText format,
Possible values are 9600, 19200, 38400
(default 9600)
-1, --f1x Specify CPU family, in case autodetect fails
+ -2, --f2x Specify CPU family, in case autodetect fails
-4, --f4x Specify CPU family, in case autodetect fails
- --F1x and --f2x are only needed when the "change
+ --f1x, --f2x and --f4x are only needed when the "change
baudrate" feature is used and the autodetect feature
fails. If the device ID that is uploaded is known, it
has precedence to the command line option.
- --invert-reset Invert signal on RST pin (used for some BSL hardware)
- --invert-test Invert signal on TEST/TCK pin (used for some BSL
- hardware)
+ --device=device Required device. Supported devices are:
+ standard - Standard BSL programmer per TI specs
+ telosa - Telos revA and compatible boards
+ telosb - Telos revB and compatible boards
+ cp2103 - Boards using cp2103 gpio for BSL support
+ cp2103_old - The old cp2103 gpio format
+ Most settings for a device are defined within the
+ device specific bsl_{device} class.
+ --no-BSL-download Do not download replacement BSL (disable automatic)
+ --force-BSL-download Download replacement BSL even if not needed (the one
+ in the device would have the required features)
--slow Add delays when operating the conrol pins. Useful if
the pins/circuit has high capacitance.
Program Flow Specifiers:
-e, --masserase Mass Erase (clear all flash memory)
+ -M, --mainerase Erase main flash memory only (requires --password)
-E, --erasecheck Erase Check by file
-p, --program Program file
-v, --verify Verify by file
to redirect the output into a file.
Do before exit:
- -g, --go=address Start programm execution at specified address.
+ -g, --go=address Start program execution at specified address.
This implies option --wait.
-r, --reset Reset connected MSP430. Starts application.
This is a normal device reset and will start
- the programm that is specified in the reset
+ the program that is specified in the reset
vector. (see also -g)
-w, --wait Wait for <ENTER> before closing serial port.
ELF file support
replacement BSLs are now internal
+ V1.6
+ modular design uses --device option to select a communications method
+ support for motes using a cp2103 usb/serial chip
+
+
References
----------
- Python: http://www.python.org
--- /dev/null
+# User makefiles include this one to setup the tinyos environment for this
+# instance of the TinyOS source tree and build scripts.
+#
+# The pro of this approach is that we don't need any environment support for
+# doing make-ish things in TinyOS. The con is that things that run outside
+# of make break, like tos-check-env, tos-deluge, and tos-bsl (the latter if
+# under Cygwin and using cp2103 based motes).
+
+# Set TOSROOT to the directory in which this include file is located
+this := $(word $(words $(MAKEFILE_LIST)),$(MAKEFILE_LIST))
+export TOSROOT := $(shell dirname $(this))
+
+# Build an updated CLASSPATH
+ifeq (,$(CLASSPATH))
+ tmpCLASS := $(TOSROOT)/support/sdk/java
+else
+ tmpCLASS := $(CLASSPATH):$(TOSROOT)/support/sdk/java
+endif
+
+export TOSDIR = $(TOSROOT)/tos
+export CLASSPATH = $(tmpCLASS)
+export MAKERULES = $(TOSROOT)/support/make/Makerules
+
+include $(MAKERULES)
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Header definitions for the BQ2403X charge controller chip family. Only the
+ * BQ2403X was considered when building this component.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#ifndef BQ2403X_H
+#define BQ2403X_H
+
+/* Conversion table, BQSTATX to charge state:
+ *
+ * Name BQSTAT1 BQSTAT2 Value Desired
+ * ----------------------------------------------
+ * Not charging 1 1 3 0
+ * Precharge 0 0 0 1
+ * Fast charge 0 1 1 2
+ * Charge done 1 0 2 3
+ */
+
+/* Conversion table, XXPGn to power state:
+ *
+ * Name ACPGn USBPGn Value Desired
+ * ----------------------------------------
+ * On Battery 1 1 3 0
+ * USB power 1 0 2 1
+ * AC power 0 1 1 2
+ * Both AC+USB 0 0 0 3
+ */
+
+typedef enum {
+ /* Charge part of the state variable */
+ BQ2403X_CHG_NONE = 0,
+ BQ2403X_CHG_PRE,
+ BQ2403X_CHG_FAST,
+ BQ2403X_CHG_DONE,
+ BQ2403X_CHG_MASK = 3,
+
+ /* Power part of the state variable */
+ BQ2403X_PWR_BATT = 0,
+ BQ2403X_PWR_USB = 0x10,
+ BQ2403X_PWR_AC = 0x20,
+ BQ2403X_PWR_BOTH = 0x30,
+ BQ2403X_PWR_MASK = 0x30,
+} bq2403x_state_t;
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HIL interface for the BQ2403X charge controller chip.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "BQ2403X.h"
+
+interface BQ2403X {
+ /**
+ * Get the current charge controller state.
+ */
+ async command bq2403x_state_t getState();
+
+ /**
+ * @returns The charge portion of the current state.
+ */
+ async command bq2403x_state_t getCharge();
+
+ /**
+ * @returns The power portion of the current state.
+ */
+ async command bq2403x_state_t getPower();
+
+ /**
+ * @returns TRUE if the battery is charging
+ */
+ async command bool isCharging();
+
+ /**
+ * @returns TRUE if no external power. Same as getPower() == 0.
+ */
+ async command bool battOnly();
+
+ /**
+ * Enable notifications from the charge controller via <t>change()</t>.
+ */
+ async command void enable();
+
+ /**
+ * Disnable notifications from the charge controller via <t>change()</t>.
+ */
+ async command void disable();
+
+ /**
+ * Signalled any time the state of the BQ2403X charge controller changes when
+ * the controller is <t>enable()</t>'d. A deglitch mechanism must be
+ * implemented by the provider, as a charge controller on AC or USB and with
+ * no battery attached will tend to "flash" between two states.
+ *
+ * @param current The current state of the charge controller.
+ * @param last The state of the charge controller at last query.
+ */
+ async event void change(bq2403x_state_t current, bq2403x_state_t last);
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HIL implementation for the BQ2403X charge controller chip family.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "BQ2403X.h"
+
+configuration BQ2403XC {
+ provides interface BQ2403X;
+}
+implementation {
+ components BQ2403XP;
+ BQ2403X = BQ2403XP;
+
+ components MainC;
+ MainC.SoftwareInit -> BQ2403XP.Init;
+
+ components BQ2403XPinsC as PinsC;
+ BQ2403XP.BQstat1 -> PinsC.BQstat1;
+ BQ2403XP.BQstat2 -> PinsC.BQstat2;
+ BQ2403XP.ACPGn -> PinsC.ACPGn;
+ BQ2403XP.USBPGn -> PinsC.USBPGn;
+ BQ2403XP.IntBQstat1 -> PinsC.IntBQstat1;
+ BQ2403XP.IntBQstat2 -> PinsC.IntBQstat2;
+ BQ2403XP.IntACPGn -> PinsC.IntACPGn;
+ BQ2403XP.IntUSBPGn -> PinsC.IntUSBPGn;
+
+ components new TimerMilliC();
+ BQ2403XP.Timer -> TimerMilliC;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HIL implementation for the BQ2403X charge controller chip family.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "BQ2403X.h"
+
+module BQ2403XP {
+ provides {
+ interface BQ2403X;
+ interface Init;
+ }
+ uses {
+ interface GeneralIO as BQstat1;
+ interface GeneralIO as BQstat2;
+ interface GeneralIO as ACPGn;
+ interface GeneralIO as USBPGn;
+
+ interface GpioInterrupt as IntBQstat1;
+ interface GpioInterrupt as IntBQstat2;
+ interface GpioInterrupt as IntACPGn;
+ interface GpioInterrupt as IntUSBPGn;
+
+ interface Timer<TMilli>;
+ }
+}
+implementation {
+ const static unsigned DELAY = 256; /* 1/4 sec in binary milliseconds */
+ bool enabled;
+ uint8_t state;
+ uint8_t lastState;
+
+ uint8_t bits2charge()
+ {
+ /* Conversion table:
+ * Name BQstat1 BQstat2 Value Desired
+ * ----------------------------------------------
+ * Not charging 1 1 3 0
+ * Precharge 0 0 0 1
+ * Fast charge 0 1 1 2
+ * Charge done 1 0 2 3
+ */
+ return ((call BQstat1.get() << 1) + call BQstat2.get() + 1) & 0x3;
+ }
+
+ uint8_t bits2power()
+ {
+ /* Conversion table:
+ * Name ACPGn USBPGn Value Desired
+ * ----------------------------------------
+ * On Battery 1 1 3 0
+ * USB power 1 0 2 1
+ * AC power 0 1 1 2
+ * Both AC+USB 0 0 0 3
+ */
+ return ~((call ACPGn.get() << 5) + (call USBPGn.get() << 4)) & 0x30;
+ }
+
+ void setInt()
+ {
+ /* Too many race conditions. Implement IO pins as toggles w/deglitch.
+ * Or, poll. Best solution is probably to interrupt on state change then
+ * poll a bit later to deal with deglitch.
+ */
+ if (call BQstat1.get())
+ call IntBQstat1.enableFallingEdge();
+ else
+ call IntBQstat1.enableRisingEdge();
+ if (call BQstat2.get())
+ call IntBQstat2.enableFallingEdge();
+ else
+ call IntBQstat2.enableRisingEdge();
+ if (call ACPGn.get())
+ call IntACPGn.enableFallingEdge();
+ else
+ call IntACPGn.enableRisingEdge();
+ if (call USBPGn.get())
+ call IntUSBPGn.enableFallingEdge();
+ else
+ call IntUSBPGn.enableRisingEdge();
+ }
+
+ void unsetInt()
+ {
+ call IntBQstat1.disable();
+ call IntBQstat2.disable();
+ call IntACPGn.disable();
+ call IntUSBPGn.disable();
+ }
+
+ void update()
+ {
+ atomic {
+ state = bits2power() + bits2charge();
+ setInt();
+ }
+ }
+
+ command error_t Init.init()
+ {
+ call BQstat1.makeInput();
+ call BQstat2.makeInput();
+ call ACPGn.makeInput();
+ call USBPGn.makeInput();
+
+ update();
+ lastState = state;
+ return SUCCESS;
+ }
+
+ async command void BQ2403X.enable()
+ {
+ atomic {
+ enabled = TRUE;
+ setInt();
+ }
+ }
+
+ async command void BQ2403X.disable()
+ {
+ atomic {
+ enabled = FALSE;
+ unsetInt();
+ }
+ }
+
+ async command bq2403x_state_t BQ2403X.getState()
+ {
+ return state;
+ }
+
+ async command bq2403x_state_t BQ2403X.getCharge()
+ {
+ return state & BQ2403X_CHG_MASK;
+ }
+
+ async command bq2403x_state_t BQ2403X.getPower()
+ {
+ return state & BQ2403X_PWR_MASK;
+ }
+
+ async command bool BQ2403X.isCharging()
+ {
+ return (state + 1) & 0x2;
+ }
+
+ async command bool BQ2403X.battOnly()
+ {
+ return call BQ2403X.getPower() == 0;
+ }
+
+ task void signalChange()
+ {
+ bq2403x_state_t cstate;
+
+ atomic cstate = state;
+ signal BQ2403X.change(cstate, lastState);
+ lastState = cstate;
+ }
+
+ task void startTimer()
+ {
+ call Timer.startOneShot(DELAY);
+ }
+
+ async event void IntBQstat1.fired()
+ {
+ post startTimer();
+ }
+
+ async event void IntBQstat2.fired()
+ {
+ post startTimer();
+ }
+
+ async event void IntACPGn.fired()
+ {
+ post startTimer();
+ }
+
+ async event void IntUSBPGn.fired()
+ {
+ post startTimer();
+ }
+
+ event void Timer.fired()
+ {
+ atomic {
+ update();
+ if (enabled)
+ post signalChange();
+ }
+ }
+
+ default async event void BQ2403X.change(bq2403x_state_t current,
+ bq2403x_state_t last) {}
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HIL interface for the CP210X USB/serial controller chip.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+interface CP210X {
+ /**
+ * @returns the current attach state of the USB connector.
+ */
+ async command bool isEnabled();
+
+ /**
+ * Enable notifications from the cp210x. This does not enable the USB bus.
+ */
+ async command void enable();
+
+ /**
+ * Disable notifications from the cp210x. This does not disable the USB bus.
+ */
+ async command void disable();
+
+ /**
+ * Signalled any time the USB connection moves from any other state to the
+ * enabled state. In the enabled state, USB is supplying power and data
+ * connections can be established. Signals are only send if notifications
+ * have been enabled.
+ */
+ async event void enabled();
+
+ /**
+ * Signalled any time the USB connection moves out of enabled state. This
+ * may be because the USB host or hub has placed the local USB device into
+ * suspend, the upstream hub has powered down, or the interconnecting cable
+ * has been disconnected. In all cases, only very minimal power is available
+ * from USB, all existing data connections are aborted and no new connections
+ * can be established. Signals are only sent if notifications have been
+ * enabled.
+ */
+ async event void suspended();
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HIL implementation for the CP210X USB/serial controller chip family.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration CP210XC {
+ provides interface CP210X;
+}
+implementation {
+ components CP210XP;
+ CP210X = CP210XP;
+
+ components MainC;
+ MainC.SoftwareInit -> CP210XP.Init;
+
+ components CP210XPinsC as PinsC;
+ CP210XP.USB_SUSPENDn -> PinsC.USB_SUSPENDn;
+ CP210XP.IntUSB_SUSPENDn -> PinsC.IntUSB_SUSPENDn;
+
+ components new TimerMilliC();
+ CP210XP.Timer -> TimerMilliC;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HIL implementation for the CP210X USB/serial controller chip family.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+module CP210XP {
+ provides {
+ interface Init;
+ interface CP210X;
+ }
+ uses {
+ interface GeneralIO as USB_SUSPENDn;
+ interface GpioInterrupt as IntUSB_SUSPENDn;
+ interface Timer<TMilli>;
+ }
+}
+implementation {
+ const static unsigned DELAY = 256; /* 1/4 sec in binary milliseconds */
+ bool enabled;
+
+ void setInt()
+ {
+ if (call USB_SUSPENDn.get())
+ call IntUSB_SUSPENDn.enableFallingEdge();
+ else
+ call IntUSB_SUSPENDn.enableRisingEdge();
+ }
+
+ void unsetInt()
+ {
+ call IntUSB_SUSPENDn.disable();
+ }
+
+ void update()
+ {
+ atomic setInt();
+ }
+
+ command error_t Init.init()
+ {
+ call USB_SUSPENDn.makeInput();
+
+ update();
+ return SUCCESS;
+ }
+
+ async command void CP210X.enable()
+ {
+ atomic {
+ enabled = TRUE;
+ setInt();
+ }
+ }
+
+ async command void CP210X.disable()
+ {
+ atomic {
+ enabled = FALSE;
+ unsetInt();
+ }
+ }
+
+ async command bool CP210X.isEnabled()
+ {
+ /* USB_SUSPENDn is active low and enabled is !suspend */
+ return call USB_SUSPENDn.get();
+ }
+
+ task void signalChange()
+ {
+ bool suspended;
+
+ atomic suspended = call USB_SUSPENDn.get();
+ if (suspended)
+ signal CP210X.suspended();
+ else
+ signal CP210X.enabled();
+ }
+
+ task void startTimer()
+ {
+ call Timer.startOneShot(DELAY);
+ }
+
+ async event void IntUSB_SUSPENDn.fired()
+ {
+ post startTimer();
+ }
+
+ event void Timer.fired()
+ {
+ atomic {
+ update();
+ if (enabled)
+ post signalChange();
+ }
+ }
+
+ default async event void CP210X.enabled() {}
+ default async event void CP210X.suspended() {}
+}
if ((((TACCTL0 & CCIE) ||
(TACCTL1 & CCIE) ||
(TACCTL2 & CCIE)) &&
- ((TACTL & TASSEL_3) == TASSEL_2)) ||
- ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) ||
- ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
-#ifdef __msp430_have_usart0_with_i2c
+ ((TACTL & TASSEL_3) == TASSEL_2))
+#ifdef __MSP430_HAS_UART0__
+ || ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1))
+#endif
+#ifdef __MSP430_HAS_UART1__
+ || ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
+#endif
+#ifdef __MSP430_HAS_I2C__
// registers end in "nr" to prevent nesC race condition detection
- || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
+ || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
(I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C))
#endif
)
pState = MSP430_POWER_LPM1;
-#ifdef __msp430_have_adc12
+#ifdef __MSP430_HAS_ADC12__
// ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE
if (ADC12CTL0 & ADC12ON){
if (ADC12CTL1 & ADC12SSEL_2){
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Clock initialization for msp430's with the newer basic clock +, sometimes
+ * referred to as basic clock 2. Derived from the Msp430ClockP for the
+ * original basic clock peripheral (chips/msp430/clock/Msp430ClockP.nc), with
+ * some refinements suggested by TI in ther example code, filename
+ * MSP430x261x_dco_flashcal.c.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Msp430Timer.h"
+
+generic module Msp430ClockP(uint16_t TARGET_DCO_KHZ, uint16_t ACLK_KHZ) @safe()
+{
+ provides interface Init;
+ provides interface Msp430ClockInit;
+}
+implementation
+{
+#if 0
+ MSP430REG_NORACE(IE1);
+ MSP430REG_NORACE(TACTL);
+ MSP430REG_NORACE(TAIV);
+ MSP430REG_NORACE(TBCTL);
+ MSP430REG_NORACE(TBIV);
+#endif
+
+ #if defined(__MSP430_HAS_BC2__) /* basic clock module+ */
+ #define FIRST_STEP 0x1000
+ #else /* orig basic clock module */
+ #define RSEL3 0
+ #define FIRST_STEP 0x800
+ #endif
+
+ enum
+ {
+ DCOX = DCO2 + DCO1 + DCO0,
+ MODX = MOD4 + MOD3 + MOD2 + MOD1 + MOD0,
+ RSELX = RSEL3 + RSEL2 + RSEL1 + RSEL0,
+ ACLK_CALIB_PERIOD = 8,
+ TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
+ };
+
+
+ command void Msp430ClockInit.defaultSetupDcoCalibrate()
+ {
+ /* WARNING: Haven't verified that CCI2B, selected via CCIS_1 below, maps
+ * to ACLK for all msp430 chips, as required by this component.
+ */
+
+ BCSCTL1 |= DIVA_3; /* ACLK/8 */
+ TACCTL2 = CM_1 + CCIS_1 + CAP; /* Capture on rising ACLK */
+ TACTL = TASSEL_2 + MC_2 + TACLR; /* Continuous mode, source SMCLK */
+ }
+
+ command void Msp430ClockInit.defaultInitClocks()
+ {
+ const unsigned int divider = TARGET_DCO_KHZ / 1000;
+
+ BCSCTL1 &= ~DIVA_3; /* ACLK = LFXT1/1 */
+
+ /* TinyOS upper layers assumes that SMCLK has been set to 1,048,576HZ. If
+ * DCOCLK has been set to 1x, 2x, 4x or 8x this value, we can set SMCLK to
+ * the expected value. Platforms using different clocks will have to set
+ * the divider or adjust its upper layers accordingly.
+ */
+ if (divider >= 8)
+ BCSCTL2 = DIVS_3;
+ else if (divider >= 4)
+ BCSCTL2 = DIVS_2;
+ else if (divider >= 2)
+ BCSCTL2 = DIVS_1;
+ else
+ BCSCTL2 = DIVS_0;
+
+ /* No interrupt for oscillator fault */
+ CLR_FLAG( IE1, OFIE );
+ }
+
+ command void Msp430ClockInit.defaultInitTimerA()
+ {
+ TACTL = TASSEL_2 | TACLR | TAIE;
+ }
+
+ command void Msp430ClockInit.defaultInitTimerB()
+ {
+ TBCTL = TBSSEL_1 | TACLR | TBIE;
+ }
+
+ default event void Msp430ClockInit.setupDcoCalibrate()
+ {
+ call Msp430ClockInit.defaultSetupDcoCalibrate();
+ }
+
+ default event void Msp430ClockInit.initClocks()
+ {
+ call Msp430ClockInit.defaultInitClocks();
+ }
+
+ default event void Msp430ClockInit.initTimerA()
+ {
+ call Msp430ClockInit.defaultInitTimerA();
+ }
+
+ default event void Msp430ClockInit.initTimerB()
+ {
+ call Msp430ClockInit.defaultInitTimerB();
+ }
+
+
+ void startTimerA()
+ {
+ /* Start TimerA for continuous mode */
+ TACTL = (TACTL & ~MC_3) | MC_2;
+ }
+
+ void stopTimerA()
+ {
+ TACTL &= ~MC_3;
+ }
+
+ void startTimerB()
+ {
+ /* Start TimerB in continuous mode */
+ TBCTL = (TBCTL & ~MC_3) | MC_2;
+ }
+
+ void stopTimerB()
+ {
+ TBCTL &= ~MC_3;
+ }
+
+ void set_dco_calib(uint16_t calib)
+ {
+ BCSCTL1 = (BCSCTL1 & ~RSELX) | ((calib >> 8) & RSELX);
+ DCOCTL = calib & 0xff;
+ }
+
+ uint16_t test_calib_busywait_delta(uint16_t calib)
+ {
+ uint16_t capture;
+
+ set_dco_calib(calib);
+
+ /* Capture first TAR on ACLK boundary */
+ while (!(CCIFG & TACCTL2));
+ TACCTL2 &= ~CCIFG;
+ capture = TACCR2;
+
+ /* Capture next TAR */
+ while (!(CCIFG & TACCTL2));
+ TACCTL2 &= ~CCIFG;
+
+ /* Return TimerA ticks in LFXT1/8 time window */
+ return TACCR2 - capture;
+ }
+
+ void busyCalibrateDco()
+ {
+ /* calib are these bits MSb to LSb: RSELx DCOx MODx */
+ uint16_t calib;
+ uint16_t step;
+
+ for (calib = 0, step = FIRST_STEP; step != 0; step >>= 1) {
+ // if the step is not past the target, commit it
+ if (test_calib_busywait_delta(calib | step) <= TARGET_DCO_DELTA )
+ calib |= step;
+ }
+
+ /* if DCOx is all 1's in calib, then MODx must be set to 0 */
+ if ((calib & DCOX) == DCOX)
+ calib &= ~RSELX;
+
+ set_dco_calib( calib );
+ TACCTL2 = 0; /* Stop TACCR2 */
+ TACTL = 0; /* Stop Timer_A */
+ }
+
+ command error_t Init.init()
+ {
+ /* Reset timers and clear interrupt vectors */
+ TACTL = TACLR;
+ TAIV = 0;
+ TBCTL = TBCLR;
+ TBIV = 0;
+
+ atomic
+ {
+ signal Msp430ClockInit.setupDcoCalibrate();
+ busyCalibrateDco();
+ signal Msp430ClockInit.initClocks();
+ signal Msp430ClockInit.initTimerA();
+ signal Msp430ClockInit.initTimerB();
+ startTimerA();
+ startTimerB();
+ }
+
+ return SUCCESS;
+ }
+}
+
#define TYPE_PORT_IN uint8_t
#define TYPE_PORT_DIR uint8_t
#define TYPE_PORT_SEL uint8_t
+#define TYPE_PORT_REN uint8_t
#define TYPE_P0DIR uint8_t
#define TYPE_P0IE uint8_t
#define TYPE_P0IES uint8_t
*/
async command void toggle();
+ /**
+ * Get the port OUT status that contains the pin.
+ *
+ * @return Status of the port that contains the given pin. The x'th
+ * pin on the port will be represented in the x'th bit.
+ */
+ async command uint8_t getOutRaw();
+
+ /**
+ * Read pin OUT value.
+ *
+ * @return TRUE if pin is high, FALSE otherwise.
+ */
+ async command bool getOut();
/**
* Get the port status that contains the pin.
*
async command void selectIOFunc();
async command bool isIOFunc();
+
+ /**
+ * Enable pullup/pulldown resistor. When enabled, the output state is used
+ * to determine which resistor is enabled. When set(), the pull-up is
+ * enabled; when clr(), the pull-down is enabled.
+ */
+ async command void enableRen();
+
+ /**
+ * Disable pullup/pulldown resistor.
+ */
+ async command void disableRen();
+
+ /**
+ * Return true if pullup/pulldown resistor is enabled
+ */
+ async command bool isRen();
}
configuration HplMsp430GeneralIOC
{
// provides all the ports as raw ports
-#ifdef __msp430_have_port1
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
provides interface HplMsp430GeneralIO as Port10;
provides interface HplMsp430GeneralIO as Port11;
provides interface HplMsp430GeneralIO as Port12;
provides interface HplMsp430GeneralIO as Port17;
#endif
-#ifdef __msp430_have_port2
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__ )
provides interface HplMsp430GeneralIO as Port20;
provides interface HplMsp430GeneralIO as Port21;
provides interface HplMsp430GeneralIO as Port22;
provides interface HplMsp430GeneralIO as Port27;
#endif
-#ifdef __msp430_have_port3
+#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
provides interface HplMsp430GeneralIO as Port30;
provides interface HplMsp430GeneralIO as Port31;
provides interface HplMsp430GeneralIO as Port32;
provides interface HplMsp430GeneralIO as Port37;
#endif
-#ifdef __msp430_have_port4
+#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
provides interface HplMsp430GeneralIO as Port40;
provides interface HplMsp430GeneralIO as Port41;
provides interface HplMsp430GeneralIO as Port42;
provides interface HplMsp430GeneralIO as Port47;
#endif
-#ifdef __msp430_have_port5
+#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
provides interface HplMsp430GeneralIO as Port50;
provides interface HplMsp430GeneralIO as Port51;
provides interface HplMsp430GeneralIO as Port52;
provides interface HplMsp430GeneralIO as Port57;
#endif
-#ifdef __msp430_have_port6
+#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
provides interface HplMsp430GeneralIO as Port60;
provides interface HplMsp430GeneralIO as Port61;
provides interface HplMsp430GeneralIO as Port62;
provides interface HplMsp430GeneralIO as Port67;
#endif
- // provides special ports explicitly
- // this section of HplMsp430GeneralIOC supports the F14x series
-#ifdef __msp430x14x
- provides interface HplMsp430GeneralIO as STE0;
- provides interface HplMsp430GeneralIO as SIMO0;
- provides interface HplMsp430GeneralIO as SOMI0;
- provides interface HplMsp430GeneralIO as UCLK0;
- provides interface HplMsp430GeneralIO as UTXD0;
- provides interface HplMsp430GeneralIO as URXD0;
+#if defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__)
+ provides interface HplMsp430GeneralIO as Port70;
+ provides interface HplMsp430GeneralIO as Port71;
+ provides interface HplMsp430GeneralIO as Port72;
+ provides interface HplMsp430GeneralIO as Port73;
+ provides interface HplMsp430GeneralIO as Port74;
+ provides interface HplMsp430GeneralIO as Port75;
+ provides interface HplMsp430GeneralIO as Port76;
+ provides interface HplMsp430GeneralIO as Port77;
+#endif
- provides interface HplMsp430GeneralIO as STE1;
- provides interface HplMsp430GeneralIO as SIMO1;
- provides interface HplMsp430GeneralIO as SOMI1;
- provides interface HplMsp430GeneralIO as UCLK1;
- provides interface HplMsp430GeneralIO as UTXD1;
- provides interface HplMsp430GeneralIO as URXD1;
+#if defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__)
+ provides interface HplMsp430GeneralIO as Port80;
+ provides interface HplMsp430GeneralIO as Port81;
+ provides interface HplMsp430GeneralIO as Port82;
+ provides interface HplMsp430GeneralIO as Port83;
+ provides interface HplMsp430GeneralIO as Port84;
+ provides interface HplMsp430GeneralIO as Port85;
+ provides interface HplMsp430GeneralIO as Port86;
+ provides interface HplMsp430GeneralIO as Port87;
+#endif
- provides interface HplMsp430GeneralIO as ADC0;
- provides interface HplMsp430GeneralIO as ADC1;
- provides interface HplMsp430GeneralIO as ADC2;
- provides interface HplMsp430GeneralIO as ADC3;
- provides interface HplMsp430GeneralIO as ADC4;
- provides interface HplMsp430GeneralIO as ADC5;
- provides interface HplMsp430GeneralIO as ADC6;
- provides interface HplMsp430GeneralIO as ADC7;
+#if defined(__MSP430_HAS_PORT9__)
+ provides interface HplMsp430GeneralIO as Port90;
+ provides interface HplMsp430GeneralIO as Port91;
+ provides interface HplMsp430GeneralIO as Port92;
+ provides interface HplMsp430GeneralIO as Port93;
+ provides interface HplMsp430GeneralIO as Port94;
+ provides interface HplMsp430GeneralIO as Port95;
+ provides interface HplMsp430GeneralIO as Port96;
+ provides interface HplMsp430GeneralIO as Port97;
+#endif
+
+#if defined(__MSP430_HAS_PORT10__)
+ provides interface HplMsp430GeneralIO as Port100;
+ provides interface HplMsp430GeneralIO as Port101;
+ provides interface HplMsp430GeneralIO as Port102;
+ provides interface HplMsp430GeneralIO as Port103;
+ provides interface HplMsp430GeneralIO as Port104;
+ provides interface HplMsp430GeneralIO as Port105;
+ provides interface HplMsp430GeneralIO as Port106;
+ provides interface HplMsp430GeneralIO as Port107;
#endif
- // this section of HplMsp430GeneralIOC supports the F16x series
-#ifdef __msp430x16x
+ // Interfaces for UART0, with optional I2C
+#if defined(__MSP430_HAS_UART0__)
provides interface HplMsp430GeneralIO as STE0;
provides interface HplMsp430GeneralIO as SIMO0;
- provides interface HplMsp430GeneralIO as SDA;
provides interface HplMsp430GeneralIO as SOMI0;
provides interface HplMsp430GeneralIO as UCLK0;
- provides interface HplMsp430GeneralIO as SCL;
provides interface HplMsp430GeneralIO as UTXD0;
provides interface HplMsp430GeneralIO as URXD0;
+#if defined (__MSP430_HAS_I2C__)
+ provides interface HplMsp430GeneralIO as SDA;
+ provides interface HplMsp430GeneralIO as SCL;
+#endif
+#endif
+ // Interfaces for UART1, with optional I2C
+#if defined(__MSP430_HAS_UART1__)
provides interface HplMsp430GeneralIO as STE1;
provides interface HplMsp430GeneralIO as SIMO1;
provides interface HplMsp430GeneralIO as SOMI1;
provides interface HplMsp430GeneralIO as UCLK1;
provides interface HplMsp430GeneralIO as UTXD1;
provides interface HplMsp430GeneralIO as URXD1;
+#endif
+
+ // Interfaces for USCI0, ports A and B
+#if defined(__MSP430_HAS_USCI_AB0__) || defined(__MSP430_HAS_USCI__)
+ provides interface HplMsp430GeneralIO as UCA0CLK;
+ provides interface HplMsp430GeneralIO as UCA0STE;
+ provides interface HplMsp430GeneralIO as UCA0TXD;
+ provides interface HplMsp430GeneralIO as UCA0SIMO;
+ provides interface HplMsp430GeneralIO as UCA0RXD;
+ provides interface HplMsp430GeneralIO as UCA0SOMI;
+
+ provides interface HplMsp430GeneralIO as UCB0STE;
+ provides interface HplMsp430GeneralIO as UCB0SIMO;
+ provides interface HplMsp430GeneralIO as UCB0SDA;
+ provides interface HplMsp430GeneralIO as UCB0SOMI;
+ provides interface HplMsp430GeneralIO as UCB0SCL;
+ provides interface HplMsp430GeneralIO as UCB0CLK;
+#endif
+
+ // Interfaces for USCI1, ports A and B
+#if defined(__MSP430_HAS_USCI_AB1__)
+ provides interface HplMsp430GeneralIO as UCA1TXD;
+ provides interface HplMsp430GeneralIO as UCA1SIMO;
+ provides interface HplMsp430GeneralIO as UCA1RXD;
+ provides interface HplMsp430GeneralIO as UCA1SOMI;
+ provides interface HplMsp430GeneralIO as UCA1CLK;
+ provides interface HplMsp430GeneralIO as UCA1STE;
+
+ provides interface HplMsp430GeneralIO as UCB1STE;
+ provides interface HplMsp430GeneralIO as UCB1SIMO;
+ provides interface HplMsp430GeneralIO as UCB1SDA;
+ provides interface HplMsp430GeneralIO as UCB1SOMI;
+ provides interface HplMsp430GeneralIO as UCB1SCL;
+ provides interface HplMsp430GeneralIO as UCB1CLK;
+#endif
+ // Interfaces for ADC10 or ADC12
+#if defined(__MSP430_HAS_ADC10__) || defined(__MSP430_HAS_ADC12__)
provides interface HplMsp430GeneralIO as ADC0;
provides interface HplMsp430GeneralIO as ADC1;
provides interface HplMsp430GeneralIO as ADC2;
provides interface HplMsp430GeneralIO as ADC5;
provides interface HplMsp430GeneralIO as ADC6;
provides interface HplMsp430GeneralIO as ADC7;
+#endif
+ // Interfaces for DAC12
+#if defined(__MSP430_HAS_DAC12__) || defined(__MSP430_HAS_DAC12_1__) || defined(__MSP430_HAS_DAC12_3__)
provides interface HplMsp430GeneralIO as DAC0;
provides interface HplMsp430GeneralIO as DAC1;
+#endif
+ // Interfaces for SVS
+#if defined(__MSP430_HAS_SVS)
provides interface HplMsp430GeneralIO as SVSIN;
provides interface HplMsp430GeneralIO as SVSOUT;
#endif
}
implementation
{
+#if defined(__MSP430_HAS_PORT1__)
components
-#ifdef __msp430_have_port1
new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 0) as P10,
new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 1) as P11,
new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 2) as P12,
new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 4) as P14,
new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 5) as P15,
new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 6) as P16,
- new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 7) as P17,
+ new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 7) as P17;
+#endif
+#if defined(__MSP430_HAS_PORT1_R__)
+ components
+ new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 0) as P10,
+ new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 1) as P11,
+ new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 2) as P12,
+ new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 3) as P13,
+ new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 4) as P14,
+ new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 5) as P15,
+ new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 6) as P16,
+ new HplMsp430GeneralIORenP(P1IN_, P1OUT_, P1DIR_, P1SEL_, P1REN_, 7) as P17;
#endif
-#ifdef __msp430_have_port2
+#if defined(__MSP430_HAS_PORT2__)
+ components
new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 0) as P20,
new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 1) as P21,
new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 2) as P22,
new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 4) as P24,
new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 5) as P25,
new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 6) as P26,
- new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 7) as P27,
+ new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 7) as P27;
+#endif
+#if defined(__MSP430_HAS_PORT2_R__)
+ components
+ new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 0) as P20,
+ new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 1) as P21,
+ new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 2) as P22,
+ new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 3) as P23,
+ new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 4) as P24,
+ new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 5) as P25,
+ new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 6) as P26,
+ new HplMsp430GeneralIORenP(P2IN_, P2OUT_, P2DIR_, P2SEL_, P2REN_, 7) as P27;
#endif
-#ifdef __msp430_have_port3
+#if defined(__MSP430_HAS_PORT3__)
+ components
new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 0) as P30,
new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 1) as P31,
new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 2) as P32,
new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 4) as P34,
new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 5) as P35,
new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 6) as P36,
- new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 7) as P37,
+ new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 7) as P37;
+#endif
+#if defined(__MSP430_HAS_PORT3_R__)
+ components
+ new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 0) as P30,
+ new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 1) as P31,
+ new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 2) as P32,
+ new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 3) as P33,
+ new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 4) as P34,
+ new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 5) as P35,
+ new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 6) as P36,
+ new HplMsp430GeneralIORenP(P3IN_, P3OUT_, P3DIR_, P3SEL_, P3REN_, 7) as P37;
#endif
-#ifdef __msp430_have_port4
+#if defined(__MSP430_HAS_PORT4__)
+ components
new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 0) as P40,
new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 1) as P41,
new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 2) as P42,
new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 4) as P44,
new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 5) as P45,
new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 6) as P46,
- new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 7) as P47,
+ new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 7) as P47;
+#endif
+#if defined(__MSP430_HAS_PORT4_R__)
+ components
+ new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 0) as P40,
+ new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 1) as P41,
+ new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 2) as P42,
+ new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 3) as P43,
+ new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 4) as P44,
+ new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 5) as P45,
+ new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 6) as P46,
+ new HplMsp430GeneralIORenP(P4IN_, P4OUT_, P4DIR_, P4SEL_, P4REN_, 7) as P47;
#endif
-#ifdef __msp430_have_port5
+#if defined(__MSP430_HAS_PORT5__)
+ components
new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 0) as P50,
new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 1) as P51,
new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 2) as P52,
new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 4) as P54,
new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 5) as P55,
new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 6) as P56,
- new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 7) as P57,
+ new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 7) as P57;
+#endif
+#if defined(__MSP430_HAS_PORT5_R__)
+ components
+ new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 0) as P50,
+ new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 1) as P51,
+ new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 2) as P52,
+ new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 3) as P53,
+ new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 4) as P54,
+ new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 5) as P55,
+ new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 6) as P56,
+ new HplMsp430GeneralIORenP(P5IN_, P5OUT_, P5DIR_, P5SEL_, P5REN_, 7) as P57;
#endif
-#ifdef __msp430_have_port6
+#if defined(__MSP430_HAS_PORT6__)
+ components
new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 0) as P60,
new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 1) as P61,
new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 2) as P62,
new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 4) as P64,
new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 5) as P65,
new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 6) as P66,
- new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 7) as P67
+ new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 7) as P67;
+#endif
+#if defined(__MSP430_HAS_PORT6_R__)
+ components
+ new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 0) as P60,
+ new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 1) as P61,
+ new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 2) as P62,
+ new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 3) as P63,
+ new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 4) as P64,
+ new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 5) as P65,
+ new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 6) as P66,
+ new HplMsp430GeneralIORenP(P6IN_, P6OUT_, P6DIR_, P6SEL_, P6REN_, 7) as P67;
#endif
- ;
-#ifdef __msp430_have_port1
+#if defined(__MSP430_HAS_PORT7__)
+ components
+ new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 0) as P70,
+ new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 1) as P71,
+ new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 2) as P72,
+ new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 3) as P73,
+ new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 4) as P74,
+ new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 5) as P75,
+ new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 6) as P76,
+ new HplMsp430GeneralIOP(P7IN_, P7OUT_, P7DIR_, P7SEL_, 7) as P77;
+#endif
+#if defined(__MSP430_HAS_PORT7_R__)
+ components
+ new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 0) as P70,
+ new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 1) as P71,
+ new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 2) as P72,
+ new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 3) as P73,
+ new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 4) as P74,
+ new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 5) as P75,
+ new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 6) as P76,
+ new HplMsp430GeneralIORenP(P7IN_, P7OUT_, P7DIR_, P7SEL_, P7REN_, 7) as P77;
+#endif
+
+#if defined(__MSP430_HAS_PORT8__)
+ components
+ new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 0) as P80,
+ new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 1) as P81,
+ new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 2) as P82,
+ new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 3) as P83,
+ new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 4) as P84,
+ new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 5) as P85,
+ new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 6) as P86,
+ new HplMsp430GeneralIOP(P8IN_, P8OUT_, P8DIR_, P8SEL_, 7) as P87;
+#endif
+#if defined(__MSP430_HAS_PORT8_R__)
+ components
+ new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 0) as P80,
+ new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 1) as P81,
+ new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 2) as P82,
+ new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 3) as P83,
+ new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 4) as P84,
+ new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 5) as P85,
+ new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 6) as P86,
+ new HplMsp430GeneralIORenP(P8IN_, P8OUT_, P8DIR_, P8SEL_, P8REN_, 7) as P87;
+#endif
+
+#if defined(__MSP430_HAS_PORT9__)
+ components
+ new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 0) as P90,
+ new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 1) as P91,
+ new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 2) as P92,
+ new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 3) as P93,
+ new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 4) as P94,
+ new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 5) as P95,
+ new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 6) as P96,
+ new HplMsp430GeneralIOP(P9IN_, P9OUT_, P9DIR_, P9SEL_, 7) as P97;
+#endif
+
+#if defined(__MSP430_HAS_PORT10__)
+ components
+ new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 0) as P100,
+ new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 1) as P101,
+ new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 2) as P102,
+ new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 3) as P103,
+ new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 4) as P104,
+ new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 5) as P105,
+ new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 6) as P106,
+ new HplMsp430GeneralIOP(P10IN_, P10OUT_, P10DIR_, P10SEL_, 7) as P107;
+#endif
+
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
Port10 = P10;
Port11 = P11;
Port12 = P12;
Port17 = P17;
#endif
-#ifdef __msp430_have_port2
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
Port20 = P20;
Port21 = P21;
Port22 = P22;
Port27 = P27;
#endif
-#ifdef __msp430_have_port3
+#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
Port30 = P30;
Port31 = P31;
Port32 = P32;
Port37 = P37;
#endif
-#ifdef __msp430_have_port4
+#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
Port40 = P40;
Port41 = P41;
Port42 = P42;
Port47 = P47;
#endif
-#ifdef __msp430_have_port5
+#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
Port50 = P50;
Port51 = P51;
Port52 = P52;
Port57 = P57;
#endif
-#ifdef __msp430_have_port6
+#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
Port60 = P60;
Port61 = P61;
Port62 = P62;
Port67 = P67;
#endif
-#ifdef __msp430x14x
- STE0 = P30;
- SIMO0 = P31;
- SOMI0 = P32;
- UCLK0 = P33;
- UTXD0 = P34;
- URXD0 = P35;
+#if defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__)
+ Port70 = P70;
+ Port71 = P71;
+ Port72 = P72;
+ Port73 = P73;
+ Port74 = P74;
+ Port75 = P75;
+ Port76 = P76;
+ Port77 = P77;
+#endif
- STE1 = P50;
- SIMO1 = P51;
- SOMI1 = P52;
- UCLK1 = P53;
- UTXD1 = P36;
- URXD1 = P37;
+#if defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__)
+ Port80 = P80;
+ Port81 = P81;
+ Port82 = P62;
+ Port83 = P83;
+ Port84 = P84;
+ Port85 = P85;
+ Port86 = P86;
+ Port87 = P87;
+#endif
- ADC0 = P60;
- ADC1 = P61;
- ADC2 = P62;
- ADC3 = P63;
- ADC4 = P64;
- ADC5 = P65;
- ADC6 = P66;
- ADC7 = P67;
+#if defined(__MSP430_HAS_PORT9__)
+ Port90 = P90;
+ Port91 = P91;
+ Port92 = P92;
+ Port93 = P93;
+ Port94 = P94;
+ Port95 = P95;
+ Port96 = P96;
+ Port97 = P97;
#endif
-#ifdef __msp430x16x
+#if defined(__MSP430_HAS_PORT10__)
+ Port100 = P100;
+ Port101 = P101;
+ Port102 = P102;
+ Port103 = P103;
+ Port104 = P104;
+ Port105 = P105;
+ Port106 = P106;
+ Port107 = P107;
+#endif
+
+#if defined(__MSP430_HAS_UART0__)
STE0 = P30;
SIMO0 = P31;
- SDA = P31;
SOMI0 = P32;
UCLK0 = P33;
- SCL = P33;
UTXD0 = P34;
URXD0 = P35;
+#if defined (__MSP430_HAS_I2C__)
+ SDA = P31;
+ SCL = P33;
+#endif
+#endif
+#if defined(__MSP430_HAS_UART1__)
STE1 = P50;
SIMO1 = P51;
SOMI1 = P52;
UCLK1 = P53;
UTXD1 = P36;
URXD1 = P37;
+#endif
+#if defined(__MSP430_HAS_USCI_AB0__) || defined(__MSP430_HAS_USCI__)
+ /* TODO: these mappings are broken for many parts defining
+ * __MSP430_HAS_USCI__. For example, the MSP420F2112 has USCI pin
+ * assignements different than below. Further, the pin assignements vary
+ * by package.
+ */
+ UCA0CLK = P30;
+ UCA0STE = P33;
+ UCA0TXD = P34;
+ UCA0SIMO = P34;
+ UCA0RXD = P35;
+ UCA0SOMI = P35;
+
+ UCB0STE = P30;
+ UCB0SIMO = P31;
+ UCB0SDA = P31;
+ UCB0SOMI = P32;
+ UCB0SCL = P32;
+ UCB0CLK = P33;
+#endif
+
+ // Interfaces for USCI1, ports A and B
+#if defined(__MSP430_HAS_USCI_AB1__)
+ UCA1TXD = P36;
+ UCA1SIMO = P36;
+ UCA1RXD = P37;
+ UCA1SOMI = P37;
+ UCA1CLK = P50;
+ UCA1STE = P53;
+
+ UCB1STE = P50;
+ UCB1SIMO = P51;
+ UCB1SDA = P51;
+ UCB1SOMI = P52;
+ UCB1SCL = P52;
+ UCB1CLK = P53;
+#endif
+
+
+#if defined(__MSP430_HAS_ADC10__) || defined(__MSP430_HAS_ADC12__)
ADC0 = P60;
ADC1 = P61;
ADC2 = P62;
ADC5 = P65;
ADC6 = P66;
ADC7 = P67;
+#endif
+#if defined(__MSP430_HAS_DAC12__) || defined(__MSP430_HAS_DAC12_1__) || defined(__MSP430_HAS_DAC12_3__)
DAC0 = P66;
DAC1 = P67;
+#endif
+#if defined(__MSP430_HAS_SVS)
SVSIN = P67;
SVSOUT = P57;
#endif
async command void IO.set() { atomic PORTx |= (0x01 << pin); }
async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); }
async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); }
+ async command uint8_t IO.getOutRaw() { return PORTx & (0x01 << pin); }
+ async command bool IO.getOut() { return (call IO.getOutRaw() != 0); }
async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); }
async command bool IO.get() { return (call IO.getRaw() != 0); }
async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); }
async command bool IO.isModuleFunc() { return (PORTxSEL & (0x01<<pin)) != 0; }
async command void IO.selectIOFunc() { atomic PORTxSEL &= ~(0x01 << pin); }
async command bool IO.isIOFunc() { return (PORTxSEL & (0x01<<pin)) == 0; }
+ async command void IO.enableRen() {}
+ async command void IO.disableRen() {}
+ async command bool IO.isRen() { return FALSE; }
}
--- /dev/null
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Modified from the original HplMsp430GeneralIOP to provide resistor enable
+ * support available on some msp430 parts.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "msp430regtypes.h"
+
+generic module HplMsp430GeneralIORenP(
+ uint8_t port_in_addr,
+ uint8_t port_out_addr,
+ uint8_t port_dir_addr,
+ uint8_t port_sel_addr,
+ uint8_t port_ren_addr,
+ uint8_t pin
+ ) @safe()
+{
+ provides interface HplMsp430GeneralIO as IO;
+}
+implementation
+{
+ #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* ONE, port_in_addr))
+ #define PORTx (*TCAST(volatile TYPE_PORT_OUT* ONE, port_out_addr))
+ #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* ONE, port_dir_addr))
+ #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* ONE, port_sel_addr))
+ #define PORTxREN (*TCAST(volatile TYPE_PORT_REN* ONE, port_ren_addr))
+
+ async command void IO.set() { atomic PORTx |= (0x01 << pin); }
+ async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); }
+ async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); }
+ async command uint8_t IO.getOutRaw() { return PORTx & (0x01 << pin); }
+ async command bool IO.getOut() { return (call IO.getOutRaw() != 0); }
+ async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); }
+ async command bool IO.get() { return (call IO.getRaw() != 0); }
+ async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); }
+ async command bool IO.isInput() { return (PORTxDIR & (0x01 << pin)) == 0; }
+ async command void IO.makeOutput() { atomic PORTxDIR |= (0x01 << pin); }
+ async command bool IO.isOutput() { return (PORTxDIR & (0x01 << pin)) != 0; }
+ async command void IO.selectModuleFunc() { atomic PORTxSEL |= (0x01 << pin); }
+ async command bool IO.isModuleFunc() { return (PORTxSEL & (0x01<<pin)) != 0; }
+ async command void IO.selectIOFunc() { atomic PORTxSEL &= ~(0x01 << pin); }
+ async command bool IO.isIOFunc() { return (PORTxSEL & (0x01<<pin)) == 0; }
+ async command void IO.enableRen() { atomic PORTxREN |= (0x01 << pin); }
+ async command void IO.disableRen() { atomic PORTxREN &= ~(0x01 << pin); }
+ async command bool IO.isRen() { return PORTxREN = (0x01 << pin) != 0; }
+}
*/
configuration HplMsp430InterruptC
{
-#ifdef __msp430_have_port1
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
provides interface HplMsp430Interrupt as Port10;
provides interface HplMsp430Interrupt as Port11;
provides interface HplMsp430Interrupt as Port12;
provides interface HplMsp430Interrupt as Port16;
provides interface HplMsp430Interrupt as Port17;
#endif
-#ifdef __msp430_have_port2
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
provides interface HplMsp430Interrupt as Port20;
provides interface HplMsp430Interrupt as Port21;
provides interface HplMsp430Interrupt as Port22;
implementation
{
components HplMsp430InterruptP as HplInterruptP;
-#ifdef __msp430_have_port1
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
Port10 = HplInterruptP.Port10;
Port11 = HplInterruptP.Port11;
Port12 = HplInterruptP.Port12;
Port16 = HplInterruptP.Port16;
Port17 = HplInterruptP.Port17;
#endif
-#ifdef __msp430_have_port2
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
Port20 = HplInterruptP.Port20;
Port21 = HplInterruptP.Port21;
Port22 = HplInterruptP.Port22;
*/
module HplMsp430InterruptP @safe()
{
-#ifdef __msp430_have_port1
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
provides interface HplMsp430Interrupt as Port10;
provides interface HplMsp430Interrupt as Port11;
provides interface HplMsp430Interrupt as Port12;
provides interface HplMsp430Interrupt as Port16;
provides interface HplMsp430Interrupt as Port17;
#endif
-#ifdef __msp430_have_port2
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
provides interface HplMsp430Interrupt as Port20;
provides interface HplMsp430Interrupt as Port21;
provides interface HplMsp430Interrupt as Port22;
implementation
{
-#ifdef __msp430_have_port1
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
TOSH_SIGNAL(PORT1_VECTOR)
{
volatile int n = P1IFG & P1IE;
}
#endif
-#ifdef __msp430_have_port2
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
TOSH_SIGNAL(PORT2_VECTOR)
{
volatile int n = P2IFG & P2IE;
* @author Cory Sharp <cssharp@eecs.berkeley.edu>
*/
-configuration Msp430ClockC
+generic configuration Msp430ClockC(uint16_t TARGET_DCO_KHZ, uint16_t ACLK_KHZ)
{
provides interface Init;
provides interface Msp430ClockInit;
}
implementation
{
- components Msp430ClockP, Msp430TimerC;
+ components new Msp430ClockP(TARGET_DCO_KHZ, ACLK_KHZ), Msp430TimerC;
Init = Msp430ClockP;
Msp430ClockInit = Msp430ClockP;
* @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
*/
-#include <Msp430DcoSpec.h>
-
#include "Msp430Timer.h"
-module Msp430ClockP @safe()
+generic module Msp430ClockP(uint16_t TARGET_DCO_KHZ, uint16_t ACLK_KHZ) @safe()
{
provides interface Init;
provides interface Msp430ClockInit;
MSP430REG_NORACE(TBCTL);
MSP430REG_NORACE(TBIV);
+ #if defined(__MSP430_HAS_BC2__) /* basic clock module+ */
+ #define FIRST_STEP 0x1000
+ #else /* orig basic clock module */
+ #define RSEL3 0
+ #define FIRST_STEP 0x800
+ #endif
+
enum
{
+ DCOX = DCO2 + DCO1 + DCO0,
+ MODX = MOD4 + MOD3 + MOD2 + MOD1 + MOD0,
+ RSELX = RSEL3 + RSEL2 + RSEL1 + RSEL0,
ACLK_CALIB_PERIOD = 8,
TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
};
command void Msp430ClockInit.defaultInitClocks()
{
+ const unsigned int divider = TARGET_DCO_KHZ / 1000;
+
// BCSCTL1
// .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
// .XTS = 0; set low frequency mode for LXFT1
// .DIVA = 0; set the divisor on ACLK to 1
// .RSEL, do not modify
- BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));
+ BCSCTL1 = XT2OFF | (BCSCTL1 & RSELX);
// BCSCTL2
// .SELM = 0; select DCOCLK as source for MCLK
// .DIVM = 0; set the divisor of MCLK to 1
// .SELS = 0; select DCOCLK as source for SCLK
- // .DIVS = 2; set the divisor of SCLK to 4
+ // .DIVS = see below
// .DCOR = 0; select internal resistor for DCO
- BCSCTL2 = DIVS1;
+ //
+ // TinyOS upper layers assume SMCLK runs at 1 binary MHz, or 1,048,576HZ.
+ // If DCOCLK has been set to 1, 2, 4 or 8 binary MHz, we can correctly set
+ // SMCLK to the expected value. Platforms using different clocks should
+ // set the divider by overriding Msp430ClockInit.initClocks(), calling
+ // Msp430ClockInit.defaultInitClocks(), then massaging the DIVS bits as
+ // required.
+ if (divider >= 8)
+ BCSCTL2 = DIVS_3;
+ else if (divider >= 4)
+ BCSCTL2 = DIVS_2;
+ else if (divider >= 2)
+ BCSCTL2 = DIVS_1;
+ else
+ BCSCTL2 = DIVS_0;
+
// IE1.OFIE = 0; no interrupt for oscillator fault
CLR_FLAG( IE1, OFIE );
void set_dco_calib( int calib )
{
- BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
+ BCSCTL1 = (BCSCTL1 & ~RSELX) | ((calib >> 8) & RSELX);
DCOCTL = calib & 0xff;
}
// Binary search for RSEL,DCO,DCOMOD.
// It's okay that RSEL isn't monotonic.
- for( calib=0,step=0x800; step!=0; step>>=1 )
+ for( calib=0,step=FIRST_STEP; step!=0; step>>=1 )
{
// if the step is not past the target, commit it
if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
calib |= step;
}
- // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
- if( (calib & 0x0e0) == 0x0e0 )
- calib &= ~0x01f;
+ // if DCOx is all 1s in calib, then MODx is not useable, set it to 0
+ if( (calib & DCOX) == DCOX )
+ calib &= ~MODX;
set_dco_calib( calib );
}
+++ /dev/null
-/* -*- mode:c++; indent-tabs-mode: nil -*-
- * Copyright (c) 2007, Technische Universitaet Berlin
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universitaet Berlin nor the names
- * of its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
- * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * Specify the target cpu clock speed of your platform by overriding this file.
- *
- * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some
- * platforms have an external high frequency oscilator to generate the SMCLK
- * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These
- * oscillators provide metric frequencies, but may not run in power down
- * modes. Here, we need to switch the SMCLK source, which is easier if
- * the external and thd DCO source frequency are the same.
- *
- * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
- */
-
-
-#ifndef MS430DCOSPEC_H
-#define MS430DCOSPEC_H
-
-#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz
-#define ACLK_KHZ 32 // the ACLK rate in binary kHz
-#endif
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Generic async configuration interface.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+interface AsyncConfigure<val_t> {
+ async command val_t get();
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Provides HPL access to both registers and interrupts of all USCI devices on
+ * a supported msp430 processor. The interfaces available are created
+ * depending upon the type of msp430 for which the code is being compiled.
+ * Currently most parts with one or two USCI peripherals supported by mspgcc
+ * (msp430-gcc) should be supported. The most common will probably be the
+ * parts offering two USCI peripherals, which use names like these to describe
+ * their provided serial devices:
+ *
+ * USCI_A0 and USCI_B0, from the first USCI peripheral; and
+ * USCI_A1 and USCI_B1, from the second USCI peripheral.
+ *
+ * 'A' devices offer UART, LIN, IrDA and SPI modes of operation. 'B' devices
+ * are limited to SPI and I2C modes.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration HplMsp430UsciC {
+ provides {
+#if defined(__MSP430_HAS_USCI_AB0__) || defined(__MSP430_HAS_USCI__)
+ interface HplMsp430UsciReg as RegA0;
+ interface HplMsp430UsciInt as IntA0;
+ interface HplMsp430UsciReg as RegB0;
+ interface HplMsp430UsciInt as IntB0;
+#endif
+#if defined(__MSP430_HAS_USCI_AB1__)
+ interface HplMsp430UsciReg as RegA1;
+ interface HplMsp430UsciInt as IntA1;
+ interface HplMsp430UsciReg as RegB1;
+ interface HplMsp430UsciInt as IntB1;
+#endif
+ }
+}
+implementation {
+#if defined(__MSP430_HAS_USCI_AB0__)
+ components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
+ UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
+ UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_,
+ UCA0RXIFG, UCA0TXIFG)
+ as RegA0P;
+ RegA0 = RegA0P.Registers;
+
+ components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
+ 0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
+ 0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
+ UCB0I2CSA_, IE2_, IFG2_, UCB0RXIFG, UCB0TXIFG) as RegB0P;
+ RegB0 = RegB0P.Registers;
+
+ components HplMsp430UsciInt0P as Int0P;
+ IntA0 = Int0P.IntA;
+ IntB0 = Int0P.IntB;
+#elif defined(__MSP430_HAS_USCI__)
+ components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
+ UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
+ UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_,
+ UCA0RXIFG, UCA0TXIFG) as RegA0P;
+ RegA0 = RegA0P.Registers;
+
+ components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
+ 0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
+ 0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
+ UCB0I2CSA_, IE2_, IFG2_, UCB0RXIFG, UCB0TXIFG) as RegB0P;
+ RegB0 = RegB0P.Registers;
+
+ components HplMsp430UsciInt0P as Int0P;
+ IntA0 = Int0P.IntA;
+ IntB0 = Int0P.IntB;
+#endif
+
+#if defined(__MSP430_HAS_USCI_AB1__)
+ components new HplMsp430UsciRegP(UCA1CTL0_, UCA1CTL1_, UCA1BR0_, UCA1BR1_,
+ UCA1MCTL_, 0/*UCA1I2CIE_*/, UCA1STAT_, UCA1RXBUF_, UCA1TXBUF_, UCA1ABCTL_,
+ UCA1IRTCTL_, UCA1IRRCTL_, 0/*UCA1I2COA_*/, 0/*UCA1I2CSA_*/, UC1IE_,
+ UC1IFG_, UCA1RXIFG, UCA1TXIFG) as RegA1P;
+ RegA1 = RegA1P.Registers;
+
+ components new HplMsp430UsciRegP(UCB1CTL0_, UCB1CTL1_, UCB1BR0_, UCB1BR1_,
+ 0/*UCB1MCTL_*/, UCB1I2CIE_, UCB1STAT_, UCB1RXBUF_, UCB1TXBUF_,
+ 0/*UCB1ABCTL_*/, 0/*UCB1IRTCTL_*/, 0/*UCB1IRRCTL_*/, UCB1I2COA_,
+ UCB1I2CSA_, UC1IE_, UC1IFG_, UCB1RXIFG, UCB1TXIFG) as RegB1P;
+ RegB1 = RegB1P.Registers;
+
+ components HplMsp430UsciInt1P as Int1P;
+ IntA1 = Int1P.IntA;
+ IntB1 = Int1P.IntB;
+#endif
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt interface for USCI peripherals. Although A and B devices have
+ * different interrupt sets since B only support I2C, we use a single set for
+ * both so that upper layers need not deal with the different sets. This is
+ * critical in the case of SPI communications, which is supported by both A
+ * and B devices.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Msp430Usci.h"
+
+interface HplMsp430UsciInt {
+ /**
+ * Signals a break received in UART modes if UCBRKIE is enabled. The
+ * provider must reset the UCxIFG.UCxxRXIFG and UCxSTAT.UCBRK bits prior to
+ * signalling the event to the user.
+ */
+ async event void brk();
+
+ /**
+ * Signals a character received for any USCI mode. The provider must reset
+ * UCxIFG.UCxxRXIFG before signalling the event to the user.
+ *
+ * @params byte The character received.
+ */
+ async event void rx(uint8_t byte);
+
+ /**
+ * Signals that the device's transmit buffer is empty and can accept
+ * another character. Note that the USCI device may still be in the
+ * process of transmitting the last character when this event is signalled.
+ * The UCxxTXIFG bit will automatically reset when the interface user writes
+ * a value to the related UCxxTXBUF register after receipt of this event.
+ */
+ async event void tx();
+
+ /**
+ * I2C mode only. Indicates the device has lost arbitration. Valid only in
+ * multi-master contexts.
+ */
+ async event void i2cCal();
+
+ /**
+ * I2C mode only. Indicates the device was expecting an ACK and it was not
+ * received.
+ */
+ async event void i2cNak();
+
+ /**
+ * I2C mode only. Indicates the device has detected a start condition
+ * together with its own address while in slave mode.
+ */
+ async event void i2cStart();
+
+ /**
+ * I2C mode only. Indicates the device has detected a stop condition while
+ * in slave mode.
+ */
+ async event void i2cStop();
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interrupt interface for the USCI0 peripheral.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Msp430Usci.h"
+#include "msp430hardware.h"
+
+#if defined(USCIRX_VECTOR) /* odd def for MSP430G461 */
+#define USCIAB0RX_VECTOR USCIRX_VECTOR
+#endif
+#if defined(USCITX_VECTOR) /* odd def for MSP430G461 */
+#define USCIAB0TX_VECTOR USCITX_VECTOR
+#endif
+
+module HplMsp430UsciInt0P @safe() {
+ provides {
+ interface HplMsp430UsciInt as IntA;
+ interface HplMsp430UsciInt as IntB;
+ }
+}
+
+implementation
+{
+#if 0
+ MSP430REG_NORACE(UC0IFG);
+ MSP430REG_NORACE(UCA0CTL0);
+ MSP430REG_NORACE(UCA0CTL1);
+ MSP430REG_NORACE(UCA0RXBUF);
+ MSP430REG_NORACE(UCB0CTL0);
+ MSP430REG_NORACE(UCB0CTL1);
+ MSP430REG_NORACE(UCB0RXBUF);
+#endif
+
+ /* This USCI_Ax and USCI_Bx interrupt vector signals receive events for UART
+ * and SPI modes, and status events for I2C modes. Only Bx can do I2C.
+ */
+ TOSH_SIGNAL(USCIAB0RX_VECTOR) {
+ if (READ_FLAG(UC0IFG, UCA0RXIFG)) {
+ volatile uint8_t c = UCA0RXBUF; /* read to clear UCA0RXIFG */
+ if (READ_FLAG(UCA0CTL1, UCBRK)) {
+ UCA0CTL1 &= ~UCBRK;
+ if (READ_FLAG(UCA0CTL0, UCMODE_3) == UCMODE_3)
+ UCA0CTL1 &= ~UCDORM;
+ signal IntA.brk();
+ } else
+ signal IntA.rx(c);
+ } else if (READ_FLAG(UC0IFG, UCB0RXIFG))
+ signal IntB.rx(UCB0RXBUF); /* read clears UCB0RXIFG */
+ else if (READ_FLAG(UCB0STAT, UCALIFG))
+ signal IntB.i2cCal();
+ else if (READ_FLAG(UCB0STAT, UCNACKIFG))
+ signal IntB.i2cNak();
+ else if (READ_FLAG(UCB0STAT, UCSTTIFG))
+ signal IntB.i2cStart();
+ else if (READ_FLAG(UCB0STAT, UCSTPIFG))
+ signal IntB.i2cStop();
+ }
+
+ /* This USCI_Ax and USCI_Bx interrupt vector signals transmit events for UART
+ * and SPI modes, and rx/tx events for I2C modes. Only Bx can do I2C.
+ */
+ TOSH_SIGNAL(USCIAB0TX_VECTOR) {
+ if (READ_FLAG(UC0IFG, UCB0RXIFG))
+ signal IntB.rx(UCB0RXBUF); /* I2C receive */
+ else if (READ_FLAG(UC0IFG, UCA0TXIFG))
+ signal IntA.tx();
+ else if (READ_FLAG(UC0IFG, UCB0TXIFG))
+ signal IntB.tx();
+ }
+
+ default async event void IntA.brk() {}
+ default async event void IntA.rx(uint8_t byte) {}
+ default async event void IntA.tx() {}
+ /* i2c is not available for A devices, so the below are never signalled */
+ default async event void IntA.i2cCal() {}
+ default async event void IntA.i2cNak() {}
+ default async event void IntA.i2cStart() {}
+ default async event void IntA.i2cStop() {}
+
+ default async event void IntB.brk() {}
+ default async event void IntB.rx(uint8_t byte) {}
+ default async event void IntB.tx() {}
+ default async event void IntB.i2cCal() {}
+ default async event void IntB.i2cNak() {}
+ default async event void IntB.i2cStart() {}
+ default async event void IntB.i2cStop() {}
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interrupt interface for the USCI1 peripheral.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Msp430Usci.h"
+#include "msp430hardware.h"
+
+module HplMsp430UsciInt1P @safe() {
+ provides {
+ interface HplMsp430UsciInt as IntA;
+ interface HplMsp430UsciInt as IntB;
+ }
+}
+
+implementation
+{
+#if 0
+ MSP430REG_NORACE(UC1IFG);
+ MSP430REG_NORACE(UCA1CTL0);
+ MSP430REG_NORACE(UCA1CTL1);
+ MSP430REG_NORACE(UCA1RXBUF);
+ MSP430REG_NORACE(UCB1CTL0);
+ MSP430REG_NORACE(UCB1CTL1);
+ MSP430REG_NORACE(UCB1RXBUF);
+#endif
+
+ /* This USCI_Ax and USCI_Bx interrupt vector signals receive events for UART
+ * and SPI modes, and status events for I2C modes. Only Bx can do I2C.
+ */
+ TOSH_SIGNAL(USCIAB1RX_VECTOR) {
+ if (READ_FLAG(UC1IFG, UCA1RXIFG)) {
+ volatile uint8_t c = UCA1RXBUF; /* read to clear UCA1RXIFG */
+ if (READ_FLAG(UCA1CTL1, UCBRK)) {
+ UCA1CTL1 &= ~UCBRK;
+ if (READ_FLAG(UCA1CTL0, UCMODE_3) == UCMODE_3)
+ UCA1CTL1 &= ~UCDORM;
+ signal IntA.brk();
+ } else
+ signal IntA.rx(c);
+ } else if (READ_FLAG(UC1IFG, UCB1RXIFG))
+ signal IntB.rx(UCB1RXBUF); /* read clears UCB1RXIFG */
+ else if (READ_FLAG(UCB1STAT, UCALIFG))
+ signal IntB.i2cCal();
+ else if (READ_FLAG(UCB1STAT, UCNACKIFG))
+ signal IntB.i2cNak();
+ else if (READ_FLAG(UCB1STAT, UCSTTIFG))
+ signal IntB.i2cStart();
+ else if (READ_FLAG(UCB1STAT, UCSTPIFG))
+ signal IntB.i2cStop();
+ }
+
+ /* This USCI_Ax and USCI_Bx interrupt vector signals transmit events for UART
+ * and SPI modes, and rx/tx events for I2C modes. Only Bx can do I2C.
+ */
+ TOSH_SIGNAL(USCIAB1TX_VECTOR) {
+ if (READ_FLAG(UC1IFG, UCB1RXIFG))
+ signal IntB.rx(UCB1RXBUF); /* I2C receive */
+ else if (READ_FLAG(UC1IFG, UCA1TXIFG))
+ signal IntA.tx();
+ else if (READ_FLAG(UC1IFG, UCB1TXIFG))
+ signal IntB.tx();
+ }
+
+ default async event void IntA.brk() {}
+ default async event void IntA.rx(uint8_t byte) {}
+ default async event void IntA.tx() {}
+ /* i2c is not available for A devices, so the below are never signalled */
+ default async event void IntA.i2cCal() {}
+ default async event void IntA.i2cNak() {}
+ default async event void IntA.i2cStart() {}
+ default async event void IntA.i2cStop() {}
+
+ default async event void IntB.brk() {}
+ default async event void IntB.rx(uint8_t byte) {}
+ default async event void IntB.tx() {}
+ default async event void IntB.i2cCal() {}
+ default async event void IntB.i2cNak() {}
+ default async event void IntB.i2cStart() {}
+ default async event void IntB.i2cStop() {}
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to a USCI peripheral device in UART mode.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Msp430Usci.h"
+
+interface HplMsp430UsciReg {
+ /**
+ * Return the current mode.
+ */
+ async command msp430_usci_mode_t getMode();
+
+ /**
+ * Prepare to set the mode. If the device supports the requested mode, its
+ * UCxxCTL1.UCSWRST bit is set and TRUE is returned. If the device does not
+ * support the requested mode, no operations are performed and FALSE is
+ * returned.
+ *
+ * @param msp430usci_mode_t The desired USCI mode.
+ * @return bool TRUE if the device supports the requested mode, else FALSE.
+ */
+ async command bool setMode(msp430_usci_mode_t mode);
+
+ /**
+ * Get pointer to the UCxxCTL0 register associated with the USCI device.
+ *
+ * @return The pointer to the device's UCxxCTL0 register.
+ */
+ async command volatile uint8_t* ptrCtl0();
+
+ /**
+ * Get bits from the UCxxCTL0 register associated with the USCI device.
+ *
+ * @parm mask The bits upon which the operation is to be performed must be
+ * set in <t>mask</t>.
+ * @return The value of the device's UCxxCTL0 register ANDed with
+ * <t>mask</t>.
+ */
+ async command uint8_t getCtl0(uint8_t mask);
+
+ /**
+ * Set bits in the UCxxCTL0 register associated with the USCI device.
+ * The operation is equivalent to: <t>UCxxCTL0 |= mask</t>.
+ *
+ * @parm mask The bits in set in <t>mask</t> to set in UCxxCTL0.
+ */
+ async command void setCtl0(uint8_t mask);
+
+ /**
+ * Clear bits in the UCxxCTL0 register associated with the USCI device.
+ * The operation is equivalent to: <t>UCxxCTL0 &= ~mask</t>.
+ *
+ * @parm mask The bits in set in <t>mask</t> to clear in UCxxCTL0.
+ */
+ async command void clrCtl0(uint8_t mask);
+
+ /**
+ * Assign the values of the bits in <t>value</t>, whose corresponding bits in
+ * <t>mask</t> are set, in the UCxxCTL0 register. The operation is
+ * equivalent to: <t>UCxxCTL0 = (UCxxCTL0 & ~mask) | (value & mask)</t>.
+ */
+ //async command void assignCtl0(uint8_t mask, uint8_t value);
+ async command void assignCtl0(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxCTL1 register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ async command volatile uint8_t* ptrCtl1();
+ async command uint8_t getCtl1(uint8_t mask);
+ async command void setCtl1(uint8_t mask);
+ async command void clrCtl1(uint8_t mask);
+ //async command void assignCtl1(uint8_t mask, uint8_t value);
+ async command void assignCtl1(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxBR0 register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ async command volatile uint8_t* ptrBr0();
+ async command uint8_t getBr0(uint8_t mask);
+ async command void setBr0(uint8_t mask);
+ async command void clrBr0(uint8_t mask);
+ //async command void assignBr0(uint8_t mask, uint8_t value);
+ async command void assignBr0(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxBR1 register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ async command volatile uint8_t* ptrBr1();
+ async command uint8_t getBr1(uint8_t mask);
+ async command void setBr1(uint8_t mask);
+ async command void clrBr1(uint8_t mask);
+ //async command void assignBr1(uint8_t mask, uint8_t value);
+ async command void assignBr1(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxMCTL register. See the methods that manipulate
+ * UCxxCTL0 for more information. These methods perform no operation on
+ * providers implementing a USCI_Bx device.
+ */
+ async command volatile uint8_t* ptrMctl();
+ async command uint8_t getMctl(uint8_t mask);
+ async command void setMctl(uint8_t mask);
+ async command void clrMctl(uint8_t mask);
+ //async command void assignMctl(uint8_t mask, uint8_t value);
+ async command void assignMctl(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxI2CIE register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Ax device.
+ */
+ async command volatile uint8_t* ptrI2Cie();
+ async command uint8_t getI2Cie(uint8_t mask);
+ async command void setI2Cie(uint8_t mask);
+ async command void clrI2Cie(uint8_t mask);
+ //async command void assignI2Cie(uint8_t mask, uint8_t value);
+ async command void assignI2Cie(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxSTAT register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ async command volatile uint8_t* ptrStat();
+ async command uint8_t getStat(uint8_t mask);
+ async command void setStat(uint8_t mask);
+ async command void clrStat(uint8_t mask);
+ //async command void assignStat(uint8_t mask, uint8_t value);
+ async command void assignStat(uint8_t value);
+
+ /**
+ * Return pointer to the UCAxxRXBUF register used by the USCI device.
+ */
+ async command volatile uint8_t* ptrRxbuf();
+
+ /**
+ * Read the contents of the UCAxxRXBUF register. This register cannot be
+ * written.
+ */
+ async command uint8_t getRxbuf();
+
+ /**
+ * Return pointer to the UCAxxTXBUF register used by the USCI device.
+ */
+ async command volatile uint8_t* ptrTxbuf();
+
+ /**
+ * Read the contents of the UCAxxTXBUF register.
+ */
+ async command uint8_t getTxbuf();
+
+ /**
+ * Write a byte to the UCAxxTXBUF register.
+ */
+ async command void setTxbuf(uint8_t byte);
+
+ /**
+ * Manipulate bits in the UCxxABCTL register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Bx device.
+ */
+ async command volatile uint8_t* ptrAbctl();
+ async command uint8_t getAbctl(uint8_t mask);
+ async command void setAbctl(uint8_t mask);
+ async command void clrAbctl(uint8_t mask);
+ //async command void assignAbctl(uint8_t mask, uint8_t value);
+ async command void assignAbctl(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxIRTCTL register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Bx device.
+ */
+ async command volatile uint8_t* ptrIrtctl();
+ async command uint8_t getIrtctl(uint8_t mask);
+ async command void setIrtctl(uint8_t mask);
+ async command void clrIrtctl(uint8_t mask);
+ //async command void assignIrtctl(uint8_t mask, uint8_t value);
+ async command void assignIrtctl(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxIRRCTL register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Bx device.
+ */
+ async command volatile uint8_t* ptrIrrctl();
+ async command uint8_t getIrrctl(uint8_t mask);
+ async command void setIrrctl(uint8_t mask);
+ async command void clrIrrctl(uint8_t mask);
+ //async command void assignIrrctl(uint8_t mask, uint8_t value);
+ async command void assignIrrctl(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxI2COA register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Ax device.
+ */
+ async command volatile uint8_t* ptrI2Coa();
+ async command uint8_t getI2Coa(uint8_t mask);
+ async command void setI2Coa(uint8_t mask);
+ async command void clrI2Coa(uint8_t mask);
+ //async command void assignI2Coa(uint8_t mask, uint8_t value);
+ async command void assignI2Coa(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxI2COA register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Ax device.
+ */
+ async command volatile uint8_t* ptrI2Csa();
+ async command uint8_t getI2Csa(uint8_t mask);
+ async command void setI2Csa(uint8_t mask);
+ async command void clrI2Csa(uint8_t mask);
+ //async command void assignI2Csa(uint8_t mask, uint8_t value);
+ async command void assignI2Csa(uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxIE register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ async command bool getIeRx();
+ async command void setIeRx();
+ async command void clrIeRx();
+ async command bool getIeTx();
+ async command void setIeTx();
+ async command void clrIeTx();
+
+ /**
+ * Manipulate bits in the UCxxIFG register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ async command bool getIfgRx();
+ async command void setIfgRx();
+ async command void clrIfgRx();
+ async command bool getIfgTx();
+ async command void setIfgTx();
+ async command void clrIfgTx();
+
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL register interface to USCI peripherals. The interface abstracts the
+ * differences between pysical devices (aka addresses) such that a user of
+ * the interface can equally use any USCI device, providing the device
+ * provides the necessary capabilities. For example, I2C is only available
+ * on USCI_Bx ports.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Msp430Usci.h"
+#include "msp430hardware.h"
+
+generic module HplMsp430UsciRegP(
+ uint16_t Ctl0_addr,
+ uint16_t Ctl1_addr,
+ uint16_t Br0_addr,
+ uint16_t Br1_addr,
+ uint16_t Mctl_addr, /* A devices only */
+ uint16_t I2Cie_addr, /* B devices only */
+ uint16_t Stat_addr,
+ uint16_t Rxbuf_addr,
+ uint16_t Txbuf_addr,
+ uint16_t Abctl_addr, /* A devices only */
+ uint16_t Irtctl_addr, /* A devices only */
+ uint16_t Irrctl_addr, /* A devices only */
+ uint16_t I2Coa_addr, /* B devices only */
+ uint16_t I2Csa_addr, /* B devices only */
+ uint16_t Ie_addr,
+ uint16_t Ifg_addr,
+ uint16_t UCxxRXIFG, /* We rely on xIE and xIFG at same bit positions */
+ uint16_t UCxxTXIFG
+ ) @safe() {
+ provides interface HplMsp430UsciReg as Registers;
+}
+
+implementation
+{
+ #define IS_USCI_Ax (Mctl_addr != 0)
+ #define IS_USCI_Bx (I2Cie_addr != 0)
+
+ #define UCxxCtl0 (*TCAST(volatile uint8_t* ONE, Ctl0_addr))
+ #define UCxxCtl1 (*TCAST(volatile uint8_t* ONE, Ctl1_addr))
+ #define UCxxBr0 (*TCAST(volatile uint8_t* ONE, Br0_addr))
+ #define UCxxBr1 (*TCAST(volatile uint8_t* ONE, Br1_addr))
+ #define UCAxMctl (*TCAST(volatile uint8_t* ONE, Mctl_addr))
+ #define UCBxI2Cie (*TCAST(volatile uint8_t* ONE, I2Cie_addr))
+ #define UCxxStat (*TCAST(volatile uint8_t* ONE, Stat_addr))
+ #define UCxxRxbuf (*TCAST(volatile uint8_t* ONE, Rxbuf_addr))
+ #define UCxxTxbuf (*TCAST(volatile uint8_t* ONE, Txbuf_addr))
+ #define UCAxAbctl (*TCAST(volatile uint8_t* ONE, Abctl_addr))
+ #define UCAxIrtctl (*TCAST(volatile uint8_t* ONE, Irtctl_addr))
+ #define UCAxIrrctl (*TCAST(volatile uint8_t* ONE, Irrctl_addr))
+ #define UCBxI2Coa (*TCAST(volatile uint8_t* ONE, I2Coa_addr))
+ #define UCBxI2Csa (*TCAST(volatile uint8_t* ONE, I2Csa_addr))
+ #define UCxxIe (*TCAST(volatile uint8_t* ONE, Ie_addr))
+ #define UCxxIfg (*TCAST(volatile uint8_t* ONE, Ifg_addr))
+
+#if 0
+ #define ASSIGNBITS(reg, mask, value) \
+ (reg = ((reg) & ~(mask)) | ((value) & (mask)))
+#endif
+
+ #define RENDER(name) \
+ async command volatile uint8_t* Registers.ptr##name() { \
+ return &UCxx##name; \
+ } \
+ async command uint8_t Registers.get##name(uint8_t mask) { \
+ return READ_FLAG(UCxx##name, mask); \
+ } \
+ async command void Registers.set##name(uint8_t mask) { \
+ SET_FLAG(UCxx##name, mask); \
+ } \
+ async command void Registers.clr##name(uint8_t mask) { \
+ CLR_FLAG(UCxx##name, mask); \
+ } \
+ async command void Registers.assign##name(uint8_t value) { \
+ UCxx##name = value; \
+ }
+
+ #define RENDER_A(name) \
+ async command volatile uint8_t* Registers.ptr##name() { \
+ return &UCAx##name; \
+ } \
+ async command uint8_t Registers.get##name(uint8_t mask) { \
+ if (IS_USCI_Ax) \
+ return READ_FLAG(UCAx##name, mask); \
+ else \
+ return 0; \
+ } \
+ async command void Registers.set##name(uint8_t mask) { \
+ if (IS_USCI_Ax) \
+ SET_FLAG(UCAx##name, mask); \
+ } \
+ async command void Registers.clr##name(uint8_t mask) { \
+ if (IS_USCI_Ax) \
+ CLR_FLAG(UCAx##name, mask); \
+ } \
+ async command void Registers.assign##name(uint8_t value) { \
+ if (IS_USCI_Ax) \
+ UCAx##name = value; \
+ }
+
+ #define RENDER_B(name) \
+ async command volatile uint8_t* Registers.ptr##name() { \
+ return &UCBx##name; \
+ } \
+ async command uint8_t Registers.get##name(uint8_t mask) { \
+ if (IS_USCI_Bx) \
+ return READ_FLAG(UCBx##name, mask); \
+ else \
+ return 0; \
+ } \
+ async command void Registers.set##name(uint8_t mask) { \
+ if (IS_USCI_Bx) \
+ SET_FLAG(UCBx##name, mask); \
+ } \
+ async command void Registers.clr##name(uint8_t mask) { \
+ if (IS_USCI_Bx) \
+ CLR_FLAG(UCBx##name, mask); \
+ } \
+ async command void Registers.assign##name(uint8_t value) { \
+ if (IS_USCI_Bx) \
+ UCBx##name = value; \
+ }
+
+#if 0
+ MSP430REG_NORACE(UCxxCtl0);
+ MSP430REG_NORACE(UCxxCtl0);
+ MSP430REG_NORACE(UCxxCtl1);
+ MSP430REG_NORACE(UCxxBr0);
+ MSP430REG_NORACE(UCxxBr1);
+ MSP430REG_NORACE(UCAxMctl);
+ MSP430REG_NORACE(UCBxI2Cie);
+ MSP430REG_NORACE(UCxxStat);
+ MSP430REG_NORACE(UCxxRxbuf);
+ MSP430REG_NORACE(UCxxTxbuf);
+ MSP430REG_NORACE(UCAxAbctl);
+ MSP430REG_NORACE(UCAxIrtctl);
+ MSP430REG_NORACE(UCAxIrrctl);
+ MSP430REG_NORACE(UCBxI2Coa);
+ MSP430REG_NORACE(UCBxI2Csa);
+ MSP430REG_NORACE(UCxIe);
+ MSP430REG_NORACE(UCxIfg);
+#endif
+
+ async command msp430_usci_mode_t Registers.getMode()
+ {
+ if (READ_FLAG(UCxxCtl0, UCSYNC)) {
+ if (READ_FLAG(UCxxCtl0, UCMODE_3) == UCMODE_3)
+ return USCI_I2C;
+ else
+ return USCI_SPI;
+ } else {
+ return USCI_UART;
+ }
+ }
+
+ /* Doesn't really set the mode, but checks the most for the device and inits
+ * the device.
+ */
+ async command bool Registers.setMode(msp430_usci_mode_t mode)
+ {
+ if (mode == USCI_UART && IS_USCI_Bx)
+ return FALSE;
+ if (mode == USCI_I2C && IS_USCI_Ax)
+ return FALSE;
+ SET_FLAG(UCxxCtl1, UCSWRST);
+ return TRUE;
+ }
+
+ RENDER(Ctl0);
+ RENDER(Ctl1);
+ RENDER(Br0);
+ RENDER(Br1);
+ RENDER_A(Mctl);
+ RENDER_B(I2Cie);
+ RENDER(Stat);
+
+ /* RENDER(Rxbuf); */
+ async command volatile uint8_t* Registers.ptrRxbuf()
+ {
+ return &UCxxRxbuf;
+ }
+
+ async command uint8_t Registers.getRxbuf()
+ {
+ return UCxxRxbuf;
+ }
+
+ /* RENDER(Txbuf); */
+ async command volatile uint8_t* Registers.ptrTxbuf()
+ {
+ return &UCxxTxbuf;
+ }
+
+ async command uint8_t Registers.getTxbuf()
+ {
+ return UCxxTxbuf;
+ }
+
+ async command void Registers.setTxbuf(uint8_t byte)
+ {
+ UCxxTxbuf = byte;
+ }
+
+ RENDER_A(Abctl);
+ RENDER_A(Irtctl);
+ RENDER_A(Irrctl);
+ RENDER_B(I2Coa);
+ RENDER_B(I2Csa);
+
+ /* RENDER(Ie); */
+ async command bool Registers.getIeRx()
+ {
+ return READ_FLAG(UCxxIe, UCxxRXIFG);
+ }
+
+ async command void Registers.setIeRx()
+ {
+ SET_FLAG(UCxxIe, UCxxRXIFG);
+ }
+
+ async command void Registers.clrIeRx()
+ {
+ CLR_FLAG(UCxxIe, UCxxRXIFG);
+ }
+
+ async command bool Registers.getIeTx()
+ {
+ return READ_FLAG(UCxxIe, UCxxTXIFG);
+ }
+
+ async command void Registers.setIeTx()
+ {
+ SET_FLAG(UCxxIe, UCxxTXIFG);
+ }
+
+ async command void Registers.clrIeTx()
+ {
+ CLR_FLAG(UCxxIe, UCxxTXIFG);
+ }
+
+ /* RENDER(Ifg); */
+ async command bool Registers.getIfgRx()
+ {
+ return READ_FLAG(UCxxIfg, UCxxRXIFG);
+ }
+
+ async command void Registers.setIfgRx()
+ {
+ SET_FLAG(UCxxIfg, UCxxRXIFG);
+ }
+
+ async command void Registers.clrIfgRx()
+ {
+ CLR_FLAG(UCxxIfg, UCxxRXIFG);
+ }
+
+ async command bool Registers.getIfgTx()
+ {
+ return READ_FLAG(UCxxIfg, UCxxTXIFG);
+ }
+
+ async command void Registers.setIfgTx()
+ {
+ SET_FLAG(UCxxIfg, UCxxTXIFG);
+ }
+
+ async command void Registers.clrIfgTx()
+ {
+ CLR_FLAG(UCxxIfg, UCxxTXIFG);
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This configuration provides the interface for using USCI_A0 in its SPI
+ * mode.
+ *
+ * The instantiator should set the blockSize, which represents the maximum
+ * number of bytes the underlying SPI stack will transmit or receive in a
+ * single interrupt service. Increasing the block size decreases SPI
+ * communications time at the expense of reducing system responsiveness to
+ * other events.
+ *
+ * The blockSize is best set by considering the maximum time the SPI stack
+ * should be able to delay other events. A rule of thumb formula would be:
+ *
+ * block_time = block_size / (spi_bitclock/8)
+ *
+ * For example, using a 500KHZ SPI bitclock, a block size of 64 bytes
+ * equates to a block time of 1 ms. Note that this calculation is rough
+ * because it does not take into account ISR overhead and other factors.
+ *
+ * The implementation will use a default blockSize if set to 0 here.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#if !defined(__MSP430_HAS_USCI_AB0__)
+#error "Target does not have a USCI_A0 peripheral (SPI)"
+#endif
+
+#include "Msp430Usci.h"
+
+generic configuration Msp430SpiA0C(uint16_t blockSize) {
+ provides {
+ interface Resource;
+ interface ResourceRequested;
+ interface SpiByte;
+ interface SpiPacket;
+ interface ArbiterInfo; /* ??? */
+ }
+ uses {
+ interface AsyncConfigure<const msp430_usci_spi_t*> as Configure;
+ interface GeneralIO as CSn; /* wire only if a SPI slave only */
+ }
+}
+implementation {
+ enum {
+ CLIENT_ID = unique(MSP430_USCIA0_RESOURCE)
+ };
+
+ components new Msp430SpiP(blockSize) as SpiP;
+ SpiByte = SpiP;
+ SpiPacket = SpiP;
+ Configure = SpiP;
+ CSn = SpiP;
+
+ components Msp430UsciA0C as UsciC;
+ Resource = UsciC.Resource[CLIENT_ID];
+ ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
+ ArbiterInfo = UsciC.ArbiterInfo;
+ SpiP -> UsciC.Registers;
+ SpiP -> UsciC.Interrupts[CLIENT_ID];
+ SpiP -> UsciC.ArbiterInfo;
+ UsciC.ResourceConfigure[CLIENT_ID] -> SpiP;
+
+ components HplMsp430GeneralIOC as IOC;
+ SpiP.STE -> IOC.UCA0STE;
+ SpiP.SIMO -> IOC.UCA0SIMO;
+ SpiP.SOMI -> IOC.UCA0SOMI;
+ SpiP.CLK -> IOC.UCA0CLK;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This configuration provides the interface for using USCI_B0 in its SPI
+ * mode.
+ *
+ * The instantiator should set the blockSize, which represents the maximum
+ * number of bytes the underlying SPI stack will transmit or receive in a
+ * single interrupt service. Increasing the block size decreases SPI
+ * communications time at the expense of reducing system responsiveness to
+ * other events.
+ *
+ * The blockSize is best set by considering the maximum time the SPI stack
+ * should be able to delay other events. A rule of thumb formula would be:
+ *
+ * block_time = block_size / (spi_bitclock/8)
+ *
+ * For example, using a 500KHZ SPI bitclock, a block size of 64 bytes
+ * equates to a block time of 1 ms. Note that this calculation is rough
+ * because it does not take into account ISR overhead and other factors.
+ *
+ * The implementation will use a default blockSize if set to 0 here.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#if !defined(__MSP430_HAS_USCI_AB0__)
+#error "Target does not have a USCI_B0 peripheral (SPI)"
+#endif
+
+#include "Msp430Usci.h"
+
+generic configuration Msp430SpiB0C(uint16_t blockSize) {
+ provides {
+ interface Resource;
+ interface ResourceRequested;
+ interface SpiByte;
+ interface SpiPacket;
+ interface ArbiterInfo; /* ??? */
+ }
+ uses {
+ interface AsyncConfigure<const msp430_usci_spi_t*> as Configure;
+ interface GeneralIO as CSn; /* wire only if a SPI slave only */
+ }
+}
+implementation {
+ enum {
+ CLIENT_ID = unique(MSP430_USCIB0_RESOURCE)
+ };
+
+ components new Msp430SpiP(blockSize) as SpiP;
+ SpiByte = SpiP;
+ SpiPacket = SpiP;
+ Configure = SpiP;
+ CSn = SpiP;
+
+ components Msp430UsciB0C as UsciC;
+ Resource = UsciC.Resource[CLIENT_ID];
+ ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
+ ArbiterInfo = UsciC.ArbiterInfo;
+ SpiP -> UsciC.Registers;
+ SpiP -> UsciC.Interrupts[CLIENT_ID];
+ SpiP -> UsciC.ArbiterInfo;
+ UsciC.ResourceConfigure[CLIENT_ID] -> SpiP;
+
+ components HplMsp430GeneralIOC as IOC;
+ SpiP.STE -> IOC.UCB0STE;
+ SpiP.SIMO -> IOC.UCB0SIMO;
+ SpiP.SOMI -> IOC.UCB0SOMI;
+ SpiP.CLK -> IOC.UCB0CLK;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This configuration provides the interface for using USCI_B1 in its SPI
+ * mode.
+ *
+ * The instantiator should set the blockSize, which represents the maximum
+ * number of bytes the underlying SPI stack will transmit or receive in a
+ * single interrupt service. Increasing the block size decreases SPI
+ * communications time at the expense of reducing system responsiveness to
+ * other events.
+ *
+ * The blockSize is best set by considering the maximum time the SPI stack
+ * should be able to delay other events. A rule of thumb formula would be:
+ *
+ * block_time = block_size / (spi_bitclock/8)
+ *
+ * For example, using a 500KHZ SPI bitclock, a block size of 64 bytes
+ * equates to a block time of 1 ms. Note that this calculation is rough
+ * because it does not take into account ISR overhead and other factors.
+ *
+ * The implementation will use a default blockSize if set to 0 here.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#if !defined(__MSP430_HAS_USCI_AB1__)
+#error "Target does not have a USCI_B1 peripheral (SPI)"
+#endif
+
+#include "Msp430Usci.h"
+
+generic configuration Msp430SpiB1C(uint16_t blockSize) {
+ provides {
+ interface Resource;
+ interface ResourceRequested;
+ interface SpiByte;
+ interface SpiPacket;
+ interface ArbiterInfo; /* ??? */
+ }
+ uses {
+ interface AsyncConfigure<const msp430_usci_spi_t*> as Configure;
+ interface GeneralIO as CSn; /* wire only if a SPI slave only */
+ }
+}
+implementation {
+ enum {
+ CLIENT_ID = unique(MSP430_USCIB1_RESOURCE)
+ };
+
+ components new Msp430SpiP(blockSize) as SpiP;
+ SpiByte = SpiP;
+ SpiPacket = SpiP;
+ Configure = SpiP;
+ CSn = SpiP;
+
+ components Msp430UsciB1C as UsciC;
+ Resource = UsciC.Resource[CLIENT_ID];
+ ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
+ ArbiterInfo = UsciC.ArbiterInfo;
+ SpiP -> UsciC.Registers;
+ SpiP -> UsciC.Interrupts[CLIENT_ID];
+ SpiP -> UsciC.ArbiterInfo;
+ UsciC.ResourceConfigure[CLIENT_ID] -> SpiP;
+
+ components HplMsp430GeneralIOC as IOC;
+ SpiP.STE -> IOC.UCB1STE;
+ SpiP.SIMO -> IOC.UCB1SIMO;
+ SpiP.SOMI -> IOC.UCB1SOMI;
+ SpiP.CLK -> IOC.UCB1CLK;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Spi implementation using a USCI device. When being used as a SPI slave, the
+ * CSn interface should be wired to the chip select driven by the SPI master so
+ * the module can know when a communications session is terminated unexpectedly.
+ *
+ * TODO: Implement error checking via UCxxSTAT
+ *
+ * NOTE: Define NO_REN_ON_SPI to disable PxREN bits when SPI is acquired.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+generic module Msp430SpiP(uint16_t blockSize) {
+ provides {
+ interface SpiByte;
+ interface SpiPacket;
+ interface ResourceConfigure;
+ }
+ uses {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciInt as Interrupts;
+ interface GeneralIO as CSn;
+ interface HplMsp430GeneralIO as STE;
+ interface HplMsp430GeneralIO as SIMO;
+ interface HplMsp430GeneralIO as SOMI;
+ interface HplMsp430GeneralIO as CLK;
+ interface AsyncConfigure<const msp430_usci_spi_t*> as Configure;
+ interface ArbiterInfo;
+ }
+}
+implementation {
+ enum {
+ BLOCKSIZE_DEFAULT = 64,
+
+ /* Bit positions in m_pins */
+ PINS_STE = 0,
+ PINS_SOMI,
+ PINS_SIMO,
+ PINS_CLK,
+#ifdef NO_REN_ON_SPI
+ PINS_RENADDR, /* This gets added to store the PxREN bit */
+#endif
+ };
+
+ uint8_t m_pins;
+ norace uint8_t* m_txBuf;
+ norace uint8_t* m_rxBuf;
+ norace uint16_t m_len;
+ norace uint16_t m_pos;
+
+ inline bool is4pin() /* TRUE if the SPI bus is in 4-pin mode */
+ {
+ return (call Registers.getCtl0(UCMODE_3)) != UCMODE_0;
+ }
+
+ inline bool isBusy() /* TRUE if a SPI transaction is in progress */
+ {
+ atomic return m_len != 0;
+ }
+
+ async command void ResourceConfigure.configure()
+ {
+ atomic {
+ const msp430_usci_spi_t* config = call Configure.get();
+ uint8_t ctl0;
+
+ call Registers.setCtl1(UCSWRST);
+
+ /* UCMODE_3 is invalid for SPI. Presume the configuration data
+ * are wrong and force 3-pin SPI as a minimially safe alternative.
+ */
+ ctl0 = config->ctl0 | UCSYNC;
+ if ((ctl0 & UCMODE_3) == UCMODE_3)
+ ctl0 &= ~(UCMODE_3);
+
+ /* Configure USCI registers */
+ call Registers.assignCtl0(ctl0);
+ call Registers.assignCtl1(config->ctl1 | UCSWRST);
+ call Registers.assignBr0(config->brx & 0xff);
+ call Registers.assignBr1(config->brx >> 8);
+ call Registers.assignMctl(0);
+ if (config->uclisten)
+ call Registers.setStat(UCLISTEN);
+ else
+ call Registers.clrStat(UCLISTEN);
+
+ /* Configure pins for SPI, saving prior pin states */
+ m_pins = 0;
+#ifdef NO_REN_ON_SPI
+ /* - First save off and disable PxREN bits */
+ if (is4pin() && call STE.isRen()) {
+ m_pins |= (1 << (PINS_STE + PINS_RENADDR));
+ call STE.disableRen();
+ }
+ if (call SOMI.isRen()) {
+ m_pins |= (1 << (PINS_SOMI + PINS_RENADDR));
+ call SOMI.disableRen();
+ }
+ if (call SIMO.isRen()) {
+ m_pins |= (1 << (PINS_SIMO + PINS_RENADDR));
+ call SIMO.disableRen();
+ }
+ if (call CLK.isRen()) {
+ m_pins |= (1 << (PINS_CLK + PINS_RENADDR));
+ call CLK.disableRen();
+ }
+#endif
+ /* - Then save off IOFunc state and enable ModuleFunc */
+ if (is4pin() && call STE.isIOFunc()) {
+ m_pins |= (1 << PINS_STE);
+ call STE.selectModuleFunc();
+ }
+ if (call SOMI.isIOFunc()) {
+ m_pins |= (1 << PINS_SOMI);
+ call SOMI.selectModuleFunc();
+ }
+ if (call SIMO.isIOFunc()) {
+ m_pins |= (1 << PINS_SIMO);
+ call SIMO.selectModuleFunc();
+ }
+ if (call CLK.isIOFunc()) {
+ m_pins |= (1 << PINS_CLK);
+ call CLK.selectModuleFunc();
+ }
+
+ /* Clear interrupts; we'll add them as needed */
+ call Registers.clrIeRx();
+ call Registers.clrIeTx();
+
+ /* Enable the device */
+ call Registers.clrCtl1(UCSWRST);
+ }
+ }
+
+ task void signalSendDone()
+ {
+ error_t error = (m_pos == m_len) ? SUCCESS : FAIL;
+
+ m_len = 0;
+ atomic signal SpiPacket.sendDone(m_txBuf, m_rxBuf, m_pos, error);
+ }
+
+ async command void ResourceConfigure.unconfigure()
+ {
+ atomic {
+ /* Disable the device */
+ call Registers.setCtl1(UCSWRST);
+
+ /* Ensure SpiPacket.sendDone is posted if a trx was in progress */
+ if (m_len)
+ post signalSendDone();
+
+ /* Clear interrupts and interrupt flags. We only used Rx */
+ call Registers.clrIeRx();
+ call Registers.clrIfgRx();
+
+ /* Restore pins to their pre-configure state */
+ /* - First restore IOFunc states */
+ if (is4pin() && (m_pins & (1 << PINS_STE)))
+ call STE.selectIOFunc();
+ if (m_pins & (1 << PINS_SIMO))
+ call SIMO.selectIOFunc();
+ if (m_pins & (1 << PINS_SOMI))
+ call SOMI.selectIOFunc();
+ if (m_pins & (1 << PINS_CLK))
+ call CLK.selectIOFunc();
+ /* - Then restore PxREN bits */
+#ifdef NO_REN_ON_SPI
+ if (is4pin() && (m_pins & (1 << (PINS_STE + PINS_RENADDR))))
+ call STE.enableRen();
+ if (m_pins & (1 << (PINS_SIMO + PINS_RENADDR)))
+ call SIMO.enableRen();
+ if (m_pins & (1 << (PINS_SOMI + PINS_RENADDR)))
+ call SOMI.enableRen();
+ if (m_pins & (1 << (PINS_CLK + PINS_RENADDR)))
+ call CLK.enableRen();
+#endif
+ }
+ }
+
+ bool waitOnRx()
+ {
+ for (;;) {
+ if (call Registers.getIfgRx())
+ return TRUE;
+ if (call CSn.get()) /* SPI master has unselected us */
+ return FALSE;
+ }
+ }
+
+ bool waitOnTx()
+ {
+ for (;;) {
+ if (call Registers.getIfgTx())
+ return TRUE;
+ if (call CSn.get()) /* SPI master has unselected us */
+ return FALSE;
+ }
+ }
+
+ async command uint8_t SpiByte.write(uint8_t byte)
+ {
+ if (isBusy())
+ return 0;
+ else {
+ waitOnTx();
+ call Registers.setTxbuf(byte);
+ waitOnRx();
+ return call Registers.getRxbuf();
+ }
+ }
+
+ /* If we are a slave, return FALSE if the master has unasserted CSn. */
+ bool sendData()
+ {
+ atomic {
+ uint16_t end = m_pos + (blockSize ? blockSize : BLOCKSIZE_DEFAULT);
+ uint8_t tmp;
+
+ if (end > m_len)
+ end = m_len;
+ call Registers.setTxbuf(m_txBuf ? m_txBuf[m_pos] : 0);
+ while (++m_pos < end) {
+ waitOnRx();
+ tmp = call Registers.getRxbuf();
+ if (m_rxBuf)
+ m_rxBuf[m_pos - 1] = tmp;
+ waitOnTx();
+ call Registers.setTxbuf(m_txBuf ? m_txBuf[m_pos] : 0);
+ }
+ return call CSn.get() ? FALSE : TRUE;
+ }
+ }
+
+ async command error_t SpiPacket.send(uint8_t* txBuf, uint8_t* rxBuf,
+ uint16_t len)
+ {
+ if (isBusy() || (!txBuf && !rxBuf) || len == 0)
+ return FAIL;
+ else {
+ m_txBuf = txBuf;
+ m_rxBuf = rxBuf;
+ m_len = len;
+ m_pos = 0;
+ if (sendData())
+ call Registers.setIeRx();
+ else
+ post signalSendDone();
+ return SUCCESS;
+ }
+ }
+
+ async event void Interrupts.tx() {}
+
+ async event void Interrupts.rx(uint8_t byte)
+ {
+ if (m_rxBuf)
+ m_rxBuf[m_pos - 1] = byte;
+
+ if (m_pos < m_len) {
+ if (sendData())
+ return;
+ }
+ call Registers.clrIeRx();
+ post signalSendDone();
+ }
+
+ default async event void SpiPacket.sendDone(uint8_t*, uint8_t*, uint16_t,
+ error_t) {}
+
+ default async command const msp430_usci_spi_t* Configure.get()
+ {
+ const static msp430_usci_spi_t def = {
+ ctl0: UCSYNC | UCMODE_0 | UCMST, /* 3-pin SPI mode 0, LSB first */
+ ctl1: UCSWRST | UCSSEL_3, /* SPI clock source is SMCLK */
+ brx: 10, /* SPI clock=SMCLK/10; ~105KHz if SMCLK=1MHz */
+ uclisten: FALSE,
+ ren: USCI_REN_NONE
+ };
+
+ return &def;
+ }
+
+ async event void Interrupts.i2cStart() {}
+ async event void Interrupts.i2cStop() {}
+ async event void Interrupts.i2cCal() {}
+ async event void Interrupts.brk() {}
+ async event void Interrupts.i2cNak() {}
+
+ default async command bool CSn.get() { return FALSE; }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This configuration provides the interface for using USCI_A0 in its UART
+ * mode.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#if !defined(__MSP430_HAS_USCI_AB0__)
+#error "Target does not have a USCI_A0 peripheral (UART)"
+#endif
+
+#include "Msp430Usci.h"
+
+generic configuration Msp430UartA0C() {
+ provides {
+ interface Resource;
+ interface ResourceRequested;
+ interface UartStream;
+ interface UartByte;
+ interface ArbiterInfo; /* ??? */
+ }
+ uses interface AsyncConfigure<const msp430_usci_uart_t*> as Configure;
+}
+implementation {
+ enum {
+ CLIENT_ID = unique(MSP430_USCIA0_RESOURCE)
+ };
+
+ components new Msp430UartP() as UartP;
+ UartStream = UartP;
+ UartByte = UartP;
+ Configure = UartP;
+
+ components Msp430UsciA0C as UsciC;
+ Resource = UsciC.Resource[CLIENT_ID];
+ ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
+ ArbiterInfo = UsciC.ArbiterInfo;
+ UartP -> UsciC.Registers;
+ UartP -> UsciC.Interrupts[CLIENT_ID];
+ UartP -> UsciC.ArbiterInfo;
+ UsciC.ResourceConfigure[CLIENT_ID] -> UartP;
+
+ components HplMsp430GeneralIOC as IOC;
+ UartP.RXD -> IOC.UCA0RXD;
+ UartP.TXD -> IOC.UCA0TXD;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This configuration provides the interface for using USCI_A1 in its UART
+ * mode.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#if !defined(__MSP430_HAS_USCI_AB0__)
+#error "Target does not have a USCI_A1 peripheral (UART)"
+#endif
+
+#include "Msp430Usci.h"
+
+generic configuration Msp430UartA1C() {
+ provides {
+ interface Resource;
+ interface ResourceRequested;
+ interface UartStream;
+ interface UartByte;
+ interface ArbiterInfo; /* ??? */
+ }
+ uses interface AsyncConfigure<const msp430_usci_uart_t*> as Configure;
+}
+implementation {
+ enum {
+ CLIENT_ID = unique(MSP430_USCIA1_RESOURCE)
+ };
+
+ components new Msp430UartP() as UartP;
+ UartStream = UartP;
+ UartByte = UartP;
+ Configure = UartP;
+
+ components Msp430UsciA1C as UsciC;
+ Resource = UsciC.Resource[CLIENT_ID];
+ ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
+ ArbiterInfo = UsciC.ArbiterInfo;
+ UartP -> UsciC.Registers;
+ UartP -> UsciC.Interrupts[CLIENT_ID];
+ UartP -> UsciC.ArbiterInfo;
+ UsciC.ResourceConfigure[CLIENT_ID] -> UartP;
+
+ components HplMsp430GeneralIOC as IOC;
+ UartP.RXD -> IOC.UCA1RXD;
+ UartP.TXD -> IOC.UCA1TXD;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Uart implementation using a USCI device.
+ *
+ * TODO: Implement blocking like in Msp430UartSpiP.nc.
+ * Implement error checking via UCAxSTAT.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+generic module Msp430UartP() {
+ provides {
+ interface UartStream;
+ interface UartByte;
+ interface ResourceConfigure;
+ }
+ uses {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciInt as Interrupts;
+ interface HplMsp430GeneralIO as RXD;
+ interface HplMsp430GeneralIO as TXD;
+ interface AsyncConfigure<const msp430_usci_uart_t*> as Configure;
+ interface Counter<T32khz,uint16_t>;
+ interface ArbiterInfo;
+ }
+}
+implementation {
+ enum {
+ /* Bit positions in m_pins */
+ PINS_RXD = 1,
+ PINS_TXD
+ };
+
+ uint8_t m_pins;
+ uint8_t* m_sobuf; /* Original buffer ptr from UartStream.send() */
+ uint8_t m_solen; /* Original buffer len from UartStream.send() */
+ uint8_t* m_sbuf; /* Position of next char to send */
+ uint8_t m_slen; /* Len of chars in m_sbuf to send */
+ bool m_rxie; /* Set if rxie has been enabled to UartStream.receive() */
+ uint8_t* m_robuf; /* Original receive buffer */
+ uint8_t m_rolen; /* Original (maximum) receive len */
+ uint8_t* m_rbuf; /* Position of next byte in which to receive a char */
+ uint8_t m_rlen; /* Remaining length in receive buffer */
+
+ sfrb(MYBRX, 219U);
+
+ async command void ResourceConfigure.configure()
+ {
+ atomic {
+ const msp430_usci_uart_t* config = call Configure.get();
+
+ call Registers.setCtl1(UCSWRST);
+
+ /* Configure USCI registers */
+ call Registers.assignCtl0(config->ctl0 & ~UCSYNC);
+ call Registers.assignCtl1(config->ctl1 | UCSWRST);
+ call Registers.assignBr0(config->brx & 0xff);
+ call Registers.assignBr1(config->brx >> 8);
+ call Registers.assignMctl(config->mctl);
+ call Registers.assignIrtctl(config->irtctl);
+ call Registers.assignIrrctl(config->irrctl);
+ call Registers.assignAbctl(config->abctl);
+ if (config->uclisten)
+ call Registers.setStat(UCLISTEN);
+ else
+ call Registers.clrStat(UCLISTEN);
+
+ /* Configure pins for UART, saving prior pin states */
+ m_pins = 0;
+ if (call RXD.isIOFunc()) {
+ m_pins |= (1 << PINS_RXD);
+ call RXD.selectModuleFunc();
+ }
+ if (call TXD.isIOFunc()) {
+ m_pins |= (1 << PINS_TXD);
+ call TXD.selectModuleFunc();
+ }
+
+ /* Clear interrupts; we'll add them as needed */
+ call Registers.clrIeRx();
+ call Registers.clrIeTx();
+
+ /* Enable the device */
+ call Registers.clrCtl1(UCSWRST);
+ }
+ }
+
+ async command void ResourceConfigure.unconfigure()
+ {
+ atomic {
+ /* Disable the device */
+ call Registers.setCtl1(UCSWRST);
+
+ /* Clear interrupts and interrupt flags */
+ call Registers.clrIeRx();
+ call Registers.clrIeTx();
+ call Registers.clrIfgRx();
+ call Registers.clrIfgTx();
+
+ /* Restore pins to their pre-configure state */
+ if (m_pins & PINS_RXD)
+ call RXD.selectIOFunc();
+ if (m_pins & PINS_TXD)
+ call TXD.selectIOFunc();
+ }
+ }
+
+ async command error_t UartByte.send(uint8_t byte)
+ {
+ /* FIXME: race with UartStream.send() */
+ atomic {
+ if (m_sobuf)
+ return FAIL;
+ while (!call Registers.getIfgTx());
+ call Registers.setTxbuf(byte);
+ return SUCCESS;
+ }
+ }
+
+ async command error_t UartStream.send(uint8_t* buf, uint16_t len)
+ {
+ atomic {
+ if (m_sobuf || !buf || !len)
+ return FAIL;
+ m_sobuf = buf;
+ m_solen = len;
+ call Registers.setIeTx();
+ call Registers.setTxbuf(*m_sobuf);
+ m_slen = m_solen - 1;
+ if (m_slen)
+ m_sbuf = m_sobuf + 1;
+ return SUCCESS;
+ }
+ }
+
+ async event void Interrupts.tx()
+ {
+ while (m_slen && call Registers.getIfgTx()) {
+ call Registers.setTxbuf(*m_sbuf);
+ if (--m_slen)
+ m_sbuf++;
+ }
+ if (m_slen == 0 && m_sobuf) {
+ call Registers.clrIeTx();
+ call Registers.clrIfgTx();
+ m_sobuf = 0;
+ signal UartStream.sendDone(m_sobuf, m_solen, SUCCESS);
+ }
+ }
+
+ async command error_t UartStream.enableReceiveInterrupt()
+ {
+ atomic {
+ if (!m_robuf)
+ call Registers.clrIfgRx();
+ call Registers.setIeRx();
+ m_rxie = FALSE;
+ return SUCCESS;
+ }
+ }
+
+ async command error_t UartStream.disableReceiveInterrupt()
+ {
+ atomic {
+ if (!m_robuf) {
+ call Registers.clrIeRx();
+ call Registers.clrIfgRx();
+ } else
+ m_rxie = TRUE;
+ return SUCCESS;
+ }
+ }
+
+ async command error_t UartByte.receive(uint8_t* byte, uint8_t timeout)
+ {
+ atomic {
+ uint16_t t;
+
+ /* FIXME: race with UartStream.receive() */
+ if (m_robuf || !byte)
+ return FAIL;
+ /* TODO: implement timeout, byte-time units. For now, 1-2 sec */
+ t = TBR;
+ while (t < TBR) {
+ if (call Registers.getIfgRx()) {
+ *byte = call Registers.getRxbuf();
+ return SUCCESS;
+ }
+ }
+ return FAIL;
+ }
+ }
+
+ async command error_t UartStream.receive(uint8_t* buf, uint16_t len)
+ {
+ atomic {
+ if (m_robuf || !buf || !len)
+ return FAIL;
+ m_robuf = m_rbuf = buf;
+ m_rolen = m_rlen = len;
+ if (!call Registers.getIeRx()) {
+ call Registers.clrIfgRx();
+ call Registers.setIeRx();
+ m_rxie = TRUE;
+ } else
+ m_rxie = FALSE;
+ }
+ }
+
+ async event void Interrupts.rx(uint8_t byte)
+ {
+ atomic {
+ if (m_robuf) {
+ /* receive() takes precedence if active */
+ while (m_rlen && call Registers.getIfgRx()) {
+ *m_rbuf = byte;
+ if (--m_rlen)
+ m_rbuf++;
+ }
+ if (m_rlen == 0 && m_robuf) {
+ if (m_rxie) {
+ call Registers.clrIeRx();
+ call Registers.clrIfgRx();
+ }
+ m_robuf = 0;
+ signal UartStream.receiveDone(m_robuf, m_rolen, SUCCESS);
+ }
+ } else
+ signal UartStream.receivedByte(byte);
+ }
+ }
+
+ default async command const msp430_usci_uart_t* Configure.get()
+ {
+ const static msp430_usci_uart_t def = {
+ ctl0: UCMODE_0, /* async, lsb first, 8N1 */
+ ctl1: UCSWRST | UCSSEL_3, /* clock uart from SMCLK */
+ brx: UBRX_1MHZ_115200,
+ mctl: UMCTL_1MHZ_115200,
+ irtctl: 0,
+ irrctl: 0,
+ abctl: 0,
+ uclisten: FALSE,
+ ren: USCI_REN_NONE
+ };
+
+ return &def;
+ }
+
+ async event void Interrupts.i2cStart() {}
+ async event void Interrupts.i2cStop() {}
+ async event void Interrupts.i2cCal() {}
+ async event void Interrupts.brk() {}
+ async event void Interrupts.i2cNak() {}
+ async event void Counter.overflow() {}
+
+ default async event void UartStream.sendDone( uint8_t* buf, uint16_t len,
+ error_t error ) {}
+ default async event void UartStream.receivedByte( uint8_t byte ) {}
+ default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len,
+ error_t error ) {}
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Header definitions for the USCI peripheral in newer msp430 processors.
+ * A USCI peripheral provides two communications devices, denoted A and B.
+ * Many parts have 2 USCI peripherals, denoted by 0 and 1. Therefore, a
+ * part with 2 USCI peripherals has 4 communications devices:
+ *
+ * USCI_A0 and USCI_B0, from the first USCI peripheral; and
+ * USCI_A1 and USCI_B1, from the second USCI peripheral.
+ *
+ * A devices offer UART, LIN, IrDA and SPI modes of operation. B parts are
+ * limited to SPI and I2C modes.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#ifndef MSP430_USCI_h
+#define MSP430_USCI_h
+
+#define MSP430_USCIA0_RESOURCE "Msp430UsciA0.Resource"
+#define MSP430_USCIB0_RESOURCE "Msp430UsciB0.Resource"
+#define MSP430_USCIA1_RESOURCE "Msp430UsciA1.Resource"
+#define MSP430_USCIB1_RESOURCE "Msp430UsciB1.Resource"
+
+typedef enum
+{
+ USCI_UART = 0,
+ USCI_SPI,
+ USCI_I2C
+} msp430_usci_mode_t;
+
+typedef enum {
+ USCI_REN_NONE = 0,
+
+ /* For use in UART mode */
+ USCI_REN_TX = 0x03,
+ USCI_REN_TX_PULLUP = 0x01,
+ USCI_REN_TX_PULLDOWN = 0x02,
+ USCI_REN_RX = 0x0c,
+ USCI_REN_RX_PULLUP = 0x04,
+ USCI_REN_RX_PULLDOWN = 0x08,
+
+ /* For use in SPI mode */
+ USCI_REN_STE = 0x30,
+ USCI_REN_STE_PULLUP = 0x10,
+ USCI_REN_STE_PULLDOWN = 0x20,
+ USCI_REN_SIMO = USCI_REN_TX,
+ USCI_REN_SIMO_PULLUP = USCI_REN_TX_PULLUP,
+ USCI_REN_SIMO_PULLDOWN = USCI_REN_TX_PULLDOWN,
+ USCI_REN_SOMI = USCI_REN_RX,
+ USCI_REN_SOMI_PULLUP = USCI_REN_RX_PULLUP,
+ USCI_REN_SOMI_PULLDOWN = USCI_REN_RX_PULLDOWN,
+ USCI_REN_CLK = 0xc0,
+ USCI_REN_CLK_PULLUP = 0x40,
+ USCI_REN_CLK_PULLDOWN = 0x80,
+
+ /* For use in I2C mode */
+ USCI_REN_SDA = USCI_REN_TX,
+ USCI_REN_SDA_PULLUP = USCI_REN_TX_PULLUP,
+ USCI_REN_SDA_PULLDOWN = USCI_REN_TX_PULLDOWN,
+ USCI_REN_SCL = USCI_REN_RX,
+ USCI_REN_SCL_PULLUP = USCI_REN_RX_PULLUP,
+ USCI_REN_SCL_PULLDOWN = USCI_REN_RX_PULLDOWN
+} msp430_ren_t;
+
+/* Baud rates for UART mode. Only 32KHz modes work right now. */
+typedef enum {
+ /* UCOS16=0. UMCTL = UCBRFx << 4 + UCBRSx << 1 + UCOS16.
+ * 1MHZ = 1,048576HZ, 1E6MHZ = 1,000,000HZ.
+ */
+ UBRX_32768HZ_9600=3, UMCTL_32768HZ_9600=(0 << 4) + (3 << 1) + 0,
+ UBRX_1MHZ_9600=109, UMCTL_1MHZ_9600=(0 << 4) + (2 << 1) + 0,
+ UBRX_1MHZ_19200=54, UMCTL_1MHZ_19200=(0 << 4) + (5 << 1) + 0,
+ UBRX_1MHZ_38400=27, UMCTL_1MHZ_38400=(0 << 4) + (2 << 1) + 0,
+ UBRX_1MHZ_115200=9, UMCTL_1MHZ_115200=(0 << 4) + (1 << 1) + 0,
+ UBRX_1E6MHZ_9600=104, UMCTL_1E6MHZ_9600=(0 << 4) + (1 << 1) + 0,
+ UBRX_1E6MHZ_115200=8, UMCTL_1E6MHZ_115200=(0 << 4) + (6 << 1) + 0,
+} msp430_usci_uart_rate_t;
+
+typedef struct {
+ uint8_t ctl0;
+ uint8_t ctl1;
+ uint16_t brx;
+ uint8_t mctl;
+ uint8_t irtctl;
+ uint8_t irrctl;
+ uint8_t abctl;
+ bool uclisten;
+ msp430_ren_t ren;
+} msp430_usci_uart_t;
+
+typedef struct {
+ uint8_t ctl0;
+ uint8_t ctl1;
+ uint16_t brx;
+ bool uclisten;
+ msp430_ren_t ren;
+} msp430_usci_spi_t;
+
+typedef struct {
+ uint8_t ctl0;
+ uint8_t ctl1;
+ uint16_t brx;
+ uint8_t i2cie;
+ uint8_t i2coa;
+ uint8_t i2csa;
+ bool uclisten;
+ msp430_ren_t ren;
+} msp430_usci_i2c_t;
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Defines the USCI_A0 peripheral.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration Msp430UsciA0C {
+ provides {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
+ interface Resource as Resource[uint8_t];
+ interface ResourceRequested as ResourceRequested[uint8_t];
+ interface ArbiterInfo;
+ }
+ uses interface ResourceConfigure as ResourceConfigure[uint8_t];
+}
+implementation {
+ components new FcfsArbiterC(MSP430_USCIA0_RESOURCE) as ArbiterC;
+ Resource = ArbiterC;
+ ResourceRequested = ArbiterC;
+ ResourceConfigure = ArbiterC;
+ ArbiterInfo = ArbiterC;
+
+ components new Msp430UsciIntDispatchP() as IntDispatchA0P;
+ Interrupts = IntDispatchA0P;
+ IntDispatchA0P.ArbiterInfo -> ArbiterC;
+
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegA0;
+ IntDispatchA0P.RawInt -> UsciC.IntA0;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Defines the USCI_A1 peripheral.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration Msp430UsciA1C {
+ provides {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
+ interface Resource as Resource[uint8_t];
+ interface ResourceRequested as ResourceRequested[uint8_t];
+ interface ArbiterInfo;
+ }
+ uses interface ResourceConfigure as ResourceConfigure[uint8_t];
+}
+implementation {
+ components new FcfsArbiterC(MSP430_USCIA1_RESOURCE) as ArbiterC;
+ Resource = ArbiterC;
+ ResourceRequested = ArbiterC;
+ ResourceConfigure = ArbiterC;
+ ArbiterInfo = ArbiterC;
+
+ components new Msp430UsciIntDispatchP() as IntDispatchA1P;
+ Interrupts = IntDispatchA1P;
+ IntDispatchA1P.ArbiterInfo -> ArbiterC;
+
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegA1;
+ IntDispatchA1P.RawInt -> UsciC.IntA1;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Defines the USCI_B0 peripheral.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration Msp430UsciB0C {
+ provides {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
+ interface Resource as Resource[uint8_t];
+ interface ResourceRequested as ResourceRequested[uint8_t];
+ interface ArbiterInfo;
+ }
+ uses interface ResourceConfigure as ResourceConfigure[uint8_t];
+}
+implementation {
+ components new FcfsArbiterC(MSP430_USCIB0_RESOURCE) as ArbiterC;
+ Resource = ArbiterC;
+ ResourceRequested = ArbiterC;
+ ResourceConfigure = ArbiterC;
+ ArbiterInfo = ArbiterC;
+
+ components new Msp430UsciIntDispatchP() as IntDispatchB0P;
+ Interrupts = IntDispatchB0P;
+ IntDispatchB0P.ArbiterInfo -> ArbiterC;
+
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegB0;
+ IntDispatchB0P.RawInt -> UsciC.IntB0;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Defines the USCI_B1 peripheral.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration Msp430UsciB1C {
+ provides {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
+ interface Resource as Resource[uint8_t];
+ interface ResourceRequested as ResourceRequested[uint8_t];
+ interface ArbiterInfo;
+ }
+ uses interface ResourceConfigure as ResourceConfigure[uint8_t];
+}
+implementation {
+ components new FcfsArbiterC(MSP430_USCIB1_RESOURCE) as ArbiterC;
+ Resource = ArbiterC;
+ ResourceRequested = ArbiterC;
+ ResourceConfigure = ArbiterC;
+ ArbiterInfo = ArbiterC;
+
+ components new Msp430UsciIntDispatchP() as IntDispatchB1P;
+ Interrupts = IntDispatchB1P;
+ IntDispatchB1P.ArbiterInfo -> ArbiterC;
+
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegB1;
+ IntDispatchB1P.RawInt -> UsciC.IntB1;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt dispatch for USCI_Ax and USCI_Bx devices.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+generic module Msp430UsciIntDispatchP() @safe() {
+ provides interface HplMsp430UsciInt as Interrupts[uint8_t id];
+ uses {
+ interface HplMsp430UsciInt as RawInt;
+ interface ArbiterInfo;
+ }
+}
+
+implementation {
+ async event void RawInt.brk()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.brk[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.rx(uint8_t byte)
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.rx[call ArbiterInfo.userId()](byte);
+ }
+
+ async event void RawInt.tx()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.tx[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.i2cCal()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.i2cCal[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.i2cNak()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.i2cNak[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.i2cStart()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.i2cStart[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.i2cStop()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.i2cStop[call ArbiterInfo.userId()]();
+ }
+
+ default async event void Interrupts.brk[uint8_t id]() {}
+ default async event void Interrupts.rx[uint8_t id](uint8_t byte) {}
+ default async event void Interrupts.tx[uint8_t id]() {}
+ default async event void Interrupts.i2cCal[uint8_t id]() {}
+ default async event void Interrupts.i2cNak[uint8_t id]() {}
+ default async event void Interrupts.i2cStart[uint8_t id]() {}
+ default async event void Interrupts.i2cStop[uint8_t id]() {}
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Header definitions for the SCP1000.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#ifndef SCP1000_H
+#define SCP1000_H
+
+typedef struct {
+ unsigned int temp;
+ unsigned long pressure;
+} scp1000_t;
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Main user component for the SCP1000 pressure sensor. This is a highly
+ * abstracted component designed for infrequent pressure measurements where
+ * energy costs are to be minimized.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Scp1000.h"
+
+configuration Scp1000C {
+ provides interface ReadRef<scp1000_t>;
+}
+implementation {
+ components new Scp1000P();
+ ReadRef = Scp1000P;
+
+ components Scp1000PinsC;
+ Scp1000P.CSn -> Scp1000PinsC.CSn;
+ Scp1000P.PD -> Scp1000PinsC.PD;
+ Scp1000P.DRDY -> Scp1000PinsC.DRDY;
+ Scp1000P.IntDRDY -> Scp1000PinsC;
+
+ components Scp1000SpiC;
+ Scp1000P.Resource -> Scp1000SpiC;
+ Scp1000P.SpiByte -> Scp1000SpiC;
+
+ components new TimerMilliC();
+ Scp1000P.Timer -> TimerMilliC;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * scp1000 implementation.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Scp1000.h"
+
+generic module Scp1000P() @safe()
+{
+ provides interface ReadRef<scp1000_t>;
+ uses {
+ interface GeneralIO as CSn;
+ interface GeneralIO as PD;
+ interface GeneralIO as DRDY;
+ interface GpioInterrupt as IntDRDY;
+ interface Resource;
+ interface SpiByte;
+ interface Timer<TMilli>;
+ }
+}
+implementation
+{
+ enum {
+ /* Data register names for SCP1000 */
+ OPERATION = 3,
+ STATUS = 7,
+ DATARD8 = 0x1f,
+ DATARD16 = 0x20,
+ TEMPOUT = 0x21,
+
+ /* Timer states */
+ TIMER_NONE = 0,
+ TIMER_POWER,
+ TIMER_CHECK,
+ TIMER_DRDY
+ };
+
+ scp1000_t* m_ptr;
+ uint8_t tstate;
+ uint8_t counter;
+
+ inline uint8_t addrOut(uint8_t addr, bool write)
+ {
+ return (addr << 2) + (write ? 2 : 0);
+ }
+
+ uint8_t readByte(uint8_t addr)
+ {
+ uint8_t data;
+
+ call CSn.clr();
+ call SpiByte.write(addrOut(addr, FALSE));
+ data = call SpiByte.write(0);
+ call CSn.set();
+ return data;
+ }
+
+ void writeByte(uint8_t addr, uint8_t data)
+ {
+ call CSn.clr();
+ call SpiByte.write(addrOut(addr, TRUE));
+ call SpiByte.write(data);
+ call CSn.set();
+ }
+
+ uint16_t readWord(uint8_t addr)
+ {
+ uint16_t data;
+
+ call CSn.clr();
+ call SpiByte.write(addrOut(addr, FALSE));
+ data = (call SpiByte.write(0) << 8);
+ data += call SpiByte.write(0);
+ call CSn.set();
+ return data;
+ }
+
+ void signalDone(error_t error)
+ {
+ scp1000_t* tmp = m_ptr;
+
+ call PD.set();
+ call Resource.release();
+ m_ptr = 0;
+ signal ReadRef.readDone(error, tmp);
+ }
+
+ command error_t ReadRef.read(scp1000_t* ptr)
+ {
+ if (m_ptr || !ptr)
+ return FAIL;
+ m_ptr = ptr;
+ call Resource.request();
+ return SUCCESS;
+ }
+
+ event void Resource.granted()
+ {
+ /* Begin powerup sequence */
+ call PD.clr();
+ tstate = TIMER_POWER;
+ call Timer.startOneShot(60);
+ }
+
+ task void check()
+ {
+ /* Abort if we've waited too long for ready state */
+ if (counter++ == 6) {
+ signalDone(FAIL);
+ return;
+ }
+
+ /* Poll to see if the sensor is ready */
+ if (readByte(STATUS) & 0x01) {
+ tstate = TIMER_CHECK;
+ call Timer.startOneShot(10);
+ return;
+ }
+
+ /* Verify EEPROM was loaded without error */
+ if (!(readByte(DATARD8) & 0x01)) {
+ signalDone(FAIL);
+ return;
+ }
+
+ /* We could use the low noise configuration by also doing:
+ * writeByte(0x2d, 0x03);
+ * wait_ms(100);
+ * writeByte(OPERATION, 0);
+ * wait_ms(10);
+ * writeByte(OPERATION, 0x0a); -- 0x0a is high resolution mode
+ * wait_ms(100);
+ */
+
+ /* Initiate a reading. DRDY will assert when done, ~ 500ms from now */
+ tstate = TIMER_DRDY;
+ call Timer.startOneShot(1024);
+ call IntDRDY.enableRisingEdge();
+ writeByte(OPERATION, 0x0c);
+ }
+
+ task void results();
+
+ async event void IntDRDY.fired()
+ {
+ call IntDRDY.disable();
+ post results();
+ }
+
+ task void results()
+ {
+ call Timer.stop();
+ m_ptr->temp = readWord(TEMPOUT); /* 20ths of a degree C */
+ m_ptr->pressure = (uint32_t)readByte(DATARD8) << 16;
+ m_ptr->pressure += readWord(DATARD16); /* 4ths of a Pa? */
+ signalDone(SUCCESS);
+ return;
+ }
+
+ event void Timer.fired()
+ {
+ uint8_t tmp = tstate;
+
+ tstate = TIMER_NONE;
+ switch (tmp) {
+ case TIMER_POWER:
+ counter = 0;
+ post check();
+ break;
+ case TIMER_CHECK:
+ post check();
+ break;
+ case TIMER_DRDY:
+ signalDone(FAIL);
+ break;
+ default:
+ }
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of Titanium Mirror, Inc. nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This BusyWait interface is solely designed for use in providing the
+ * necessary 5us timing when bit-banging the SHT1X sensibus clock pin in
+ * SensirionSht11LogicP, which only calls BusyWait.wait() with an argument of
+ * 5 (us). For most microprocessors running at under 10MHz, the implementation
+ * need do nothing to achieve the required timing. This default implementation
+ * is designed for such platforms. Platforms using higher performance
+ * microprocessors may need to override this component with a platform-specific
+ * one to provide the necessary wait time.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+module SensirionBusyWaitC {
+ provides interface BusyWait<TMicro, uint8_t>;
+}
+implementation {
+ async command void BusyWait.wait(uint8_t us) {}
+}
uses interface GeneralIO as CLOCK;
uses interface GpioInterrupt as InterruptDATA;
+ uses interface BusyWait<TMicro, uint8_t>;
uses interface Timer<TMilli>;
uses interface Leds;
call DATA.makeOutput();
call DATA.set();
call CLOCK.clr();
+ call BusyWait.wait(5);
call CLOCK.set();
+ call BusyWait.wait(5);
call DATA.clr();
+ call BusyWait.wait(5);
call CLOCK.clr();
+ call BusyWait.wait(5);
call CLOCK.set();
+ call BusyWait.wait(5);
call DATA.set();
+ call BusyWait.wait(5);
call CLOCK.clr();
}
call DATA.clr();
byte = byte << 1;
call CLOCK.set();
+ call BusyWait.wait(5);
call CLOCK.clr();
}
}
call DATA.makeOutput();
call DATA.clr();
call CLOCK.set();
+ call BusyWait.wait(5);
call CLOCK.clr();
call DATA.makeInput();
call DATA.set();
call DATA.makeOutput();
call DATA.set();
call CLOCK.set();
+ call BusyWait.wait(5);
call CLOCK.clr();
}
implementation
{
components PlatformP
- , Msp430ClockC
+ , new Msp430ClockC(4096, 32)
;
Init = PlatformP;
"big_endian=false " .
"underscore_name=false " .
"__builtin_va_list=true " .
- "__thread_is_keyword=true";
\ No newline at end of file
+ "__thread_is_keyword=true";
implementation
{
- components Msp430ClockC;
+ components new Msp430ClockC(4096, 32);
MoteClockInit = Msp430ClockC.Init;
}
"underscore_name=false " .
"__builtin_va_list=true " .
"__thread_is_keyword=true";
-
\ No newline at end of file
+
implementation
{
- components Msp430ClockC;
+ components new Msp430ClockC(4096, 32);
MoteClockInit = Msp430ClockC.Init;
}
SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+ components SensirionBusyWaitC;
+ SensirionSht11LogicP.BusyWait -> SensirionBusyWaitC;
+
components new TimerMilliC();
SensirionSht11LogicP.Timer -> TimerMilliC;
implementation
{
- components Msp430ClockC, MoteClockP;
+ components new Msp430ClockC(4096, 32), MoteClockP;
MoteClockInit = Msp430ClockC.Init;
//MoteClockP.Msp430ClockInit -> Msp430ClockC;
implementation
{
components PlatformP
- , Msp430ClockC
+ , new Msp430ClockC(4096, 32)
;
Init = PlatformP;
--- /dev/null
+# Includes that should take precedence come first. Platforms come before
+# chips because they may override files. These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+ %T/platforms/tmicore
+ %T/platforms/tmicore/chips/bq2403x
+ %T/platforms/tmicore/chips/cp210x
+ %T/platforms/telosa
+ %T/chips/msp430
+ %T/chips/msp430/adc12
+ %T/chips/msp430/dma
+ %T/chips/msp430/pins
+ %T/chips/msp430/timer
+ %T/chips/msp430/usci
+ %T/chips/msp430/sensors
+ %T/chips/bq2403x
+ %T/chips/cp210x
+ %T/lib/timer
+ %T/lib/serial
+ %T/lib/adc
+ %T/lib/power
+) );
+
+@opts = qw(
+ -gcc=msp430-gcc
+ -mmcu=msp430x2417
+ -fnesc-target=msp430
+ -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+ "version_major=3 " .
+ "version_minor=2 " .
+ "version=msp430-3.2.3 " .
+ "short=2,2 " .
+ "int=2,2 " .
+ "long=4,2 " .
+ "long_long=8,2 " .
+ "pointer=2,2 " .
+ "enum=2,2 " .
+ "float=4,2 " .
+ "double=4,2 " .
+ "long_double=4,2 " .
+ "void=1,1 " .
+ "fun=1,2 " .
+ "wchar_size_size=2,2 " .
+ "alignof_string=1 " .
+ "max_alignment=1 " .
+ "char_wchar_signed=true,true " .
+ "const_string_literals=true " .
+ "big_endian=false " .
+ "underscore_name=false " .
+ "__builtin_va_list=true " .
+ "__thread_is_keyword=true";
+
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC.
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ *
+ */
+
+generic configuration DemoSensorC()
+{
+ provides interface Read<uint16_t>;
+}
+implementation
+{
+ components new VoltageC() as DemoSensor;
+ Read = DemoSensor;
+}
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * DemoSensorNowC is a generic sensor device that provides a 16-bit
+ * value that can be read from async context. The platform author
+ * chooses which sensor actually sits behind DemoSensorNowC, and
+ * though it's probably Voltage, Light, or Temperature, there are no
+ * guarantees.
+ *
+ * This particular DemoSensorNowC on the telosb platform provides a
+ * voltage reading, using VoltageC.
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ *
+ */
+
+generic configuration DemoSensorNowC()
+{
+ provides interface Resource;
+ provides interface ReadNow<uint16_t>;
+}
+implementation
+{
+ components new Msp430InternalVoltageC() as DemoSensorNow;
+
+ Resource = DemoSensorNow;
+ ReadNow = DemoSensorNow;
+}
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * DemoSensorStreamC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorStreamC on the telosb platform provides a
+ * voltage reading, using VoltageStreamC.
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ *
+ */
+
+generic configuration DemoSensorStreamC()
+{
+ provides interface ReadStream<uint16_t>;
+}
+implementation
+{
+ components new VoltageStreamC() as DemoSensor;
+ ReadStream = DemoSensor;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration HplUserButtonC {
+ provides interface GeneralIO;
+ provides interface GpioInterrupt;
+}
+implementation {
+ components HplMsp430GeneralIOC as GeneralIOC;
+ components HplMsp430InterruptC as InterruptC;
+
+ components new Msp430GpioC() as UserButtonC;
+ UserButtonC -> GeneralIOC.Port25;
+ GeneralIO = UserButtonC;
+
+ components new Msp430InterruptC() as InterruptUserButtonC;
+ InterruptUserButtonC.HplInterrupt -> InterruptC.Port25;
+ GpioInterrupt = InterruptUserButtonC.Interrupt;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Set the DCO and ACLK specs here, effectively overriding those in
+ * $TOSDIR/tos/chips/msp430/timer/Msp430DcoSpec.h This is a little hokey.
+ * I think I'd rather do it using a generic interface.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration MoteClockC {
+ provides interface Init as MoteClockInit;
+}
+implementation {
+ components MoteClockP;
+ MoteClockInit = MoteClockP.Init;
+
+ components new Msp430ClockC(8192, 32);
+ MoteClockP.SubInit -> Msp430ClockC.Init;
+ MoteClockP.Msp430ClockInit -> Msp430ClockC;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Msp430Timer.h"
+
+module MoteClockP {
+ provides interface Init;
+ uses {
+ interface Init as SubInit;
+ interface Msp430ClockInit;
+ }
+}
+
+implementation {
+ command error_t Init.init()
+ {
+ uint16_t i;
+
+#if defined (CALDCO_8MHZ_) && !defined(__DisableCalData)
+ if (CALBC1_8MHZ != 0xff || CALDCO_8MHZ != 0xff) {
+ /* Use built-in constant */
+ atomic {
+ /* Initialize timers */
+ TACTL = TASSEL_2 | TACLR | TAIE;
+ TAIV = 0;
+ TBCTL = TBSSEL_1 | TBCLR | TBIE;
+ TBIV = 0;
+
+ /* Initialize DCO from calibrated data. DCO = 8MHz. SMCLK = DCO/8 */
+ BCSCTL1 = CALBC1_8MHZ;
+ BCSCTL2 = SELM_0 | DIVM_0 | DIVS_3;
+ DCOCTL = CALDCO_8MHZ;
+
+ /* Turn on timers A and B */
+ TACTL |= MC_2;
+ TBCTL |= MC_2;
+ }
+ return SUCCESS;
+ }
+#endif
+
+ /* Calibrate DCOCLK to ACLK when calibration data are disabled or erased */
+ for (i = 0; i < 0xfffe; i++); /* ensure LFXT1 is stable */
+ return call SubInit.init();
+ }
+
+ event void Msp430ClockInit.setupDcoCalibrate()
+ {
+ call Msp430ClockInit.defaultSetupDcoCalibrate();
+ }
+
+ event void Msp430ClockInit.initClocks()
+ {
+ call Msp430ClockInit.defaultInitClocks();
+ }
+
+ event void Msp430ClockInit.initTimerA()
+ {
+ call Msp430ClockInit.defaultInitTimerA();
+ }
+
+ event void Msp430ClockInit.initTimerB()
+ {
+ call Msp430ClockInit.defaultInitTimerB();
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+module MotePlatformC @safe() {
+ provides interface Init;
+}
+implementation {
+ command error_t Init.init() {
+ /* reset all of the ports to be input and using i/o functionality */
+ atomic
+ {
+#ifdef __MSP430_HAS_WDT__
+ /* Stop the watchdog, if running. Should be somewhere in chips/msp430... */
+ WDTCTL = WDTPW + WDTHOLD;
+#endif
+
+ /* Port 1: 7:BQSTAT2, 6:BQSTAT1, 5:-, 4:-, 3:CP_CTS, 2:CP_RTS,
+ * 1:BSL_TX, 0:-
+ */
+ P1SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P1OUT = 0x31; /* 0 0 1 1 0 0 0 1 */
+ P1DIR = 0x08; /* 0 0 0 0 1 0 0 0 */
+ P1REN = 0x35; /* 0 0 1 1 0 1 0 1 */
+
+ /* Port 2:
+ * 7:-, 6:-, 5:BUTTONn, 4:USB_SUSPENDn, 3:-, 2:BSL_RX, 1:USBPGn,
+ * 0:SOLARPGn
+ */
+ P2SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P2OUT = 0xc8; /* 1 1 0 0 1 0 0 0 */
+ P2DIR = 0x00; /* 0 0 0 0 0 0 0 0 */
+ P2REN = 0xc8; /* 1 1 0 0 1 0 0 0 */
+
+ /* Port 3:
+ * 7:UC_RX, 6:UC_TX, 5:-, 4:-, 3:UC_SCK, 2:UC_SOMI, 1:UC_SIMO, 0:-
+ */
+ P3SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P3OUT = 0x3f; /* 0 0 1 1 1 1 1 1 */
+ P3DIR = 0x4a; /* 0 1 0 0 1 0 1 0 */
+ P3REN = 0xb5; /* 1 0 1 1 0 1 0 1 */
+
+ /* Port 4:
+ * 7:-, 6:LED2n, 5:LED1n, 4:-, 3:-, 2:-, 1:-, 0:-
+ */
+ P4SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P4OUT = 0xff; /* 1 1 1 1 1 1 1 1 */
+ P4DIR = 0x60; /* 0 1 1 0 0 0 0 0 */
+ P4REN = 0x9f; /* 1 0 0 1 1 1 1 1 */
+
+ /* Port 5:
+ * 7:-, 6:-, 5:-, 4:-, 3:-, 2:-, 1:-, 0:-
+ */
+ P5SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P5OUT = 0xff; /* 1 1 1 1 1 1 1 1 */
+ P5DIR = 0; /* 0 0 0 0 0 0 0 0 */
+ P5REN = 0xff; /* 1 1 1 1 1 1 1 1 */
+
+ /* Port 6:
+ * 7:-, 6:-, 5:-, 4:-, 3:-, 2:-, 1:-, 0:ADC_VBATT
+ */
+ P6SEL = 0x01; /* 0 0 0 0 0 0 0 1 */
+ P6OUT = 0; /* 0 0 0 0 0 0 0 0 */
+ P6DIR = 0; /* 0 0 0 0 0 0 0 0 */
+ P6REN = 0xfe; /* 1 1 1 1 1 1 1 0 */
+
+ P1IE = 0;
+ P2IE = 0;
+ }
+ return SUCCESS;
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC {
+ provides {
+ interface GeneralIO as Led0;
+ interface GeneralIO as Led1;
+ interface GeneralIO as Led2;
+ }
+ uses interface Init;
+}
+implementation
+{
+ components PlatformP;
+ Init = PlatformP.LedsInit;
+
+ components HplMsp430GeneralIOC as GeneralIOC;
+
+ components new Msp430GpioC() as Led0Impl;
+ Led0 = Led0Impl;
+ Led0Impl -> GeneralIOC.Port45;
+
+ components new Msp430GpioC() as Led1Impl;
+ Led1 = Led1Impl;
+ Led1Impl -> GeneralIOC.Port46;
+
+ components new NoPinC() as Led2Impl;
+ Led2 = Led2Impl;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration PlatformSerialC {
+ provides interface Resource;
+ provides interface UartStream;
+ provides interface UartByte;
+}
+implementation {
+ components new Msp430UartA1C() as UartC;
+ Resource = UartC;
+ UartStream = UartC;
+ UartByte = UartC;
+
+#if 0 /* If you want to change the configuration... */
+ components SomeConfigurationComponentC as ConfigC;
+ UartC.AsyncConfigure -> ConfigC;
+#endif
+}
--- /dev/null
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Generic layer to translate a GIO into a toggle switch
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+#include <UserButton.h>
+
+generic module SwitchToggleC() {
+ provides interface Get<bool>;
+ provides interface Notify<bool>;
+
+ uses interface GeneralIO;
+ uses interface GpioInterrupt;
+}
+implementation {
+ norace bool m_pinHigh;
+
+ task void sendEvent();
+
+ command bool Get.get() { return call GeneralIO.get(); }
+
+ command error_t Notify.enable() {
+ call GeneralIO.makeInput();
+
+ if ( call GeneralIO.get() ) {
+ m_pinHigh = TRUE;
+ return call GpioInterrupt.enableFallingEdge();
+ } else {
+ m_pinHigh = FALSE;
+ return call GpioInterrupt.enableRisingEdge();
+ }
+ }
+
+ command error_t Notify.disable() {
+ return call GpioInterrupt.disable();
+ }
+
+ async event void GpioInterrupt.fired() {
+ call GpioInterrupt.disable();
+
+ m_pinHigh = !m_pinHigh;
+
+ post sendEvent();
+ }
+
+ task void sendEvent() {
+ bool pinHigh;
+ pinHigh = m_pinHigh;
+
+ signal Notify.notify( pinHigh );
+
+ if ( pinHigh ) {
+ call GpioInterrupt.enableFallingEdge();
+ } else {
+ call GpioInterrupt.enableRisingEdge();
+ }
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#ifndef USERBUTTON_H
+#define USERBUTTON_H
+
+typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include <UserButton.h>
+
+configuration UserButtonC {
+ provides interface Get<button_state_t>;
+ provides interface Notify<button_state_t>;
+}
+implementation {
+ components HplUserButtonC;
+ components new SwitchToggleC();
+ SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
+ SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO;
+
+ components UserButtonP;
+ Get = UserButtonP;
+ Notify = UserButtonP;
+
+ UserButtonP.GetLower -> SwitchToggleC.Get;
+ UserButtonP.NotifyLower -> SwitchToggleC.Notify;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include <UserButton.h>
+
+module UserButtonP {
+ provides interface Get<button_state_t>;
+ provides interface Notify<button_state_t>;
+
+ uses interface Get<bool> as GetLower;
+ uses interface Notify<bool> as NotifyLower;
+}
+implementation {
+
+ command button_state_t Get.get() {
+ /* tmirws user button pin is high when released - active low */
+ if ( call GetLower.get() ) {
+ return BUTTON_RELEASED;
+ } else {
+ return BUTTON_PRESSED;
+ }
+ }
+
+ command error_t Notify.enable() {
+ return call NotifyLower.enable();
+ }
+
+ command error_t Notify.disable() {
+ return call NotifyLower.disable();
+ }
+
+ event void NotifyLower.notify( bool val ) {
+ /* tmirws user button pin is high when released - active low */
+ if ( val ) {
+ signal Notify.notify( BUTTON_RELEASED );
+ } else {
+ signal Notify.notify( BUTTON_PRESSED );
+ }
+ }
+
+ default event void Notify.notify( button_state_t val ) { }
+}
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ */
+
+generic configuration VoltageC() {
+ provides interface Read<uint16_t>;
+}
+implementation {
+ components new Msp430InternalVoltageC();
+ Read = Msp430InternalVoltageC.Read;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ */
+
+generic configuration VoltageStreamC() {
+ provides interface ReadStream<uint16_t>;
+}
+implementation {
+ components new Msp430InternalVoltageC();
+ ReadStream = Msp430InternalVoltageC.ReadStream;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * USCI Spi test program runs the peripheral in loopback mode.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+module At25dfSpiConfigP {
+ provides interface AsyncConfigure<const msp430_usci_spi_t*> as Configure;
+}
+implementation {
+ const static msp430_usci_spi_t def = {
+ ctl0: UCSYNC | UCMODE_0 | UCMST | UCMSB | UCCKPL, /* SPI mode0 master, MSB first */
+ ctl1: UCSWRST | UCSSEL_3, /* clock spi from SMCLK */
+ brx: 1,
+ uclisten: FALSE,
+ ren: USCI_REN_NONE
+ };
+
+ async command const msp430_usci_spi_t* Configure.get()
+ {
+ return &def;
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for a ST M25P chip
+ * connected to a TI MSP430.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ */
+
+configuration HplStm25pPinsC {
+ provides {
+ interface GeneralIO as CSN;
+ interface GeneralIO as Hold;
+ }
+}
+implementation {
+ components new Msp430GpioC() as CSNM;
+ CSN = CSNM;
+
+ components new NoMsp430GpioC() as HoldM;
+ Hold = HoldM;
+
+ components HplMsp430GeneralIOC as HplGeneralIOC;
+ CSNM -> HplGeneralIOC.Port44;
+}
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the Spi bus for a ST M25P chip connected to a
+ * TI MSP430.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ */
+
+configuration HplStm25pSpiC {
+ provides {
+ interface Resource;
+ interface SpiByte;
+ interface SpiPacket;
+ }
+}
+implementation {
+ components new Msp430SpiB0C(0) as SpiC;
+ Resource = SpiC;
+ SpiByte = SpiC;
+ SpiPacket = SpiC;
+
+ components At25dfSpiConfigP;
+ SpiC.Configure -> At25dfSpiConfigP;
+}
--- /dev/null
+
+/* "Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * A noop version of Msp430GpioC.
+ *
+ * @author Joe Polastre
+ * @see Please refer to TEP 117 for more information about this component and its
+ * intended use.
+ */
+
+generic module NoMsp430GpioC() @safe() {
+ provides interface GeneralIO;
+}
+implementation {
+
+ async command void GeneralIO.set() {}
+ async command void GeneralIO.clr() {}
+ async command void GeneralIO.toggle() {}
+ async command bool GeneralIO.get() { return FALSE; }
+ async command void GeneralIO.makeInput() {}
+ async command bool GeneralIO.isInput() { return TRUE; }
+ async command void GeneralIO.makeOutput() {}
+ async command bool GeneralIO.isOutput() { return FALSE; }
+
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Pin assignments for the bq24032 on the tmicore.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration BQ2403XPinsC {
+ provides {
+ interface GeneralIO as BQstat1;
+ interface GeneralIO as BQstat2;
+ interface GeneralIO as ACPGn;
+ interface GeneralIO as USBPGn;
+
+ interface GpioInterrupt as IntBQstat1;
+ interface GpioInterrupt as IntBQstat2;
+ interface GpioInterrupt as IntACPGn;
+ interface GpioInterrupt as IntUSBPGn;
+ }
+}
+implementation {
+ components new Msp430GpioC() as BQstat1C;
+ BQstat1 = BQstat1C;
+
+ components new Msp430GpioC() as BQstat2C;
+ BQstat2 = BQstat2C;
+
+ components new Msp430GpioC() as ACPGnC;
+ ACPGn = ACPGnC;
+
+ components new Msp430GpioC() as USBPGnC;
+ USBPGn = USBPGnC;
+
+ components new Msp430InterruptC() as IntBQstat1C;
+ IntBQstat1 = IntBQstat1C;
+
+ components new Msp430InterruptC() as IntBQstat2C;
+ IntBQstat2 = IntBQstat2C;
+
+ components new Msp430InterruptC() as IntACPGnC;
+ IntACPGn = IntACPGnC;
+
+ components new Msp430InterruptC() as IntUSBPGnC;
+ IntUSBPGn = IntUSBPGnC;
+
+ components HplMsp430GeneralIOC as IOC;
+ BQstat1C.HplGeneralIO -> IOC.Port16;
+ BQstat2C.HplGeneralIO -> IOC.Port17;
+ ACPGnC.HplGeneralIO -> IOC.Port20;
+ USBPGnC.HplGeneralIO -> IOC.Port21;
+
+ components HplMsp430InterruptC as IntC;
+ IntBQstat1C.HplInterrupt -> IntC.Port16;
+ IntBQstat2C.HplInterrupt -> IntC.Port17;
+ IntACPGnC.HplInterrupt -> IntC.Port20;
+ IntUSBPGnC.HplInterrupt -> IntC.Port21;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Pin assignments for the cp2103 on the tmicore.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration CP210XPinsC {
+ provides {
+ interface GeneralIO as USB_SUSPENDn;
+ interface GpioInterrupt as IntUSB_SUSPENDn;
+ }
+}
+implementation {
+ components new Msp430GpioC() as USB_SUSPENDnC;
+ USB_SUSPENDn = USB_SUSPENDnC;
+
+ components new Msp430InterruptC() as IntUSB_SUSPENDnC;
+ IntUSB_SUSPENDn = IntUSB_SUSPENDnC;
+
+ components HplMsp430GeneralIOC as IOC;
+ USB_SUSPENDnC.HplGeneralIO -> IOC.Port24;
+
+ components HplMsp430InterruptC as IntC;
+ IntUSB_SUSPENDnC.HplInterrupt -> IntC.Port24;
+}
--- /dev/null
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+//#include "MSP430ADC12.h"
+//#include "CC2420Const.h"
+//#include "AM.h"
+
+// need to undef atomic inside header files or nesC ignores the directive
+#undef atomic
+
+#endif // _H_hardware_h
--- /dev/null
+# Includes that should take precedence come first. Platforms come before
+# chips because they may override files. These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+ %T/platforms/tmirws
+ %T/platforms/tmirws/chips/scp1000
+ %T/platforms/tmirws/chips/sht11
+ %T/platforms/tmicore
+ %T/platforms/tmicore/chips/bq2403x
+ %T/platforms/tmicore/chips/cp210x
+ %T/platforms/telosa
+ %T/chips/msp430
+ %T/chips/msp430/adc12
+ %T/chips/msp430/dma
+ %T/chips/msp430/pins
+ %T/chips/msp430/timer
+ %T/chips/msp430/usci
+ %T/chips/msp430/sensors
+ %T/chips/bq2403x
+ %T/chips/cp210x
+ %T/chips/scp1000
+ %T/chips/sht11
+ %T/lib/timer
+ %T/lib/serial
+ %T/lib/adc
+ %T/lib/power
+) );
+
+@opts = qw(
+ -gcc=msp430-gcc
+ -mmcu=msp430x2417
+ -fnesc-target=msp430
+ -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+ "version_major=3 " .
+ "version_minor=2 " .
+ "version=msp430-3.2.3 " .
+ "short=2,2 " .
+ "int=2,2 " .
+ "long=4,2 " .
+ "long_long=8,2 " .
+ "pointer=2,2 " .
+ "enum=2,2 " .
+ "float=4,2 " .
+ "double=4,2 " .
+ "long_double=4,2 " .
+ "void=1,1 " .
+ "fun=1,2 " .
+ "wchar_size_size=2,2 " .
+ "alignof_string=1 " .
+ "max_alignment=1 " .
+ "char_wchar_signed=true,true " .
+ "const_string_literals=true " .
+ "big_endian=false " .
+ "underscore_name=false " .
+ "__builtin_va_list=true " .
+ "__thread_is_keyword=true";
+
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+module MotePlatformC @safe() {
+ provides interface Init;
+}
+implementation {
+ command error_t Init.init() {
+ /* reset all of the ports to be input and using i/o functionality */
+ atomic
+ {
+#ifdef __MSP430_HAS_WDT__
+ /* Stop the watchdog, if running. Should be somewhere in chips/msp430... */
+ WDTCTL = WDTPW + WDTHOLD;
+#endif
+
+ /* Port 1: 7:BQSTAT2, 6:BQSTAT1, 5:RAIN, 4:-, 3:CP_CTS, 2:CP_RTS,
+ * 1:BSL_TX, 0:WSPEED
+ */
+ P1SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P1OUT = 0x10; /* 0 0 0 1 0 0 0 0 */
+ P1DIR = 0x08; /* 0 0 0 0 1 0 0 0 */
+ P1REN = 0x14; /* 0 0 0 1 0 1 0 0 */
+
+ /* Port 2:
+ * 7:SHT_DATA, 6:SCP_DRDY, 5:BUTTONn, 4:USB_SUSPENDn, 3:GM_PWRMON,
+ * 2:BSL_RX, 1:USBPGn, 0:SOLARPGn
+ */
+ P2SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P2OUT = 0x88; /* 1 0 0 0 1 0 0 0 */
+ P2DIR = 0x00; /* 0 0 0 0 0 0 0 0 */
+ P2REN = 0x88; /* 1 0 0 0 1 0 0 0 */
+
+ /* Port 3:
+ * 7:UC_RX, 6:UC_TX, 5:GM_RXD, 4:GM_TXD, 3:UC_SCK, 2:UC_SOMI, 1:UC_SIMO,
+ * 0:SHT_SCK
+ */
+ P3SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P3OUT = 0x3f; /* 0 0 1 1 1 1 1 1 */
+ P3DIR = 0x4b; /* 0 1 0 0 1 0 1 1 */
+ P3REN = 0xb4; /* 1 0 1 1 0 1 0 0 */
+
+ /* Port 4:
+ * 7:GM_RTS, 6:LED2n, 5:LED1n, 4:FLH_CSn, 3:SCP_CSn, 2:SCP_PD, 1:GM_ONn,
+ * 0:GM_VGM_EN
+ */
+ P4SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P4OUT = 0xfe; /* 1 1 1 1 1 1 1 0 */
+ P4DIR = 0x7c; /* 0 1 1 1 1 1 0 0 */
+ P4REN = 0x83; /* 1 0 0 0 0 0 1 1 */
+
+ /* Port 5:
+ * 7:WPOWER, 6:WDEAD, 5:-, 4:-, 3:-, 2:-, 1:-, 0:-
+ */
+ P5SEL = 0; /* 0 0 0 0 0 0 0 0 */
+ P5OUT = 0x3f; /* 0 0 1 1 1 1 1 1 */
+ P5DIR = 0x80; /* 1 0 0 0 0 0 0 0 */
+ P5REN = 0x3f; /* 0 0 1 1 1 1 1 1 */
+
+ /* Port 6:
+ * 7:TEMP_PWR, 6:TEMP3, 5:TEMP2, 4:TEMP1, 3:PHOTO, 2:ADC_WIND, 1:-,
+ * 0:ADC_VBATT
+ */
+ P6SEL = 0x7d; /* 0 1 1 1 1 1 0 1 */
+ P6OUT = 0; /* 0 0 0 0 0 0 0 0 */
+ P6DIR = 0x80; /* 1 0 0 0 0 0 0 0 */
+ P6REN = 0x02; /* 0 0 0 0 0 0 1 0 */
+
+ P1IE = 0;
+ P2IE = 0;
+ }
+ return SUCCESS;
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Platform specific pin mapping for the Scp1000.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration Scp1000PinsC {
+ provides {
+ interface GeneralIO as CSn;
+ interface GeneralIO as PD;
+ interface GeneralIO as DRDY;
+ interface GpioInterrupt as IntDRDY;
+ }
+}
+implementation {
+ components new Msp430GpioC() as CSn_;
+ CSn = CSn_.GeneralIO;
+
+ components new Msp430GpioC() as DRDY_;
+ DRDY = DRDY_.GeneralIO;
+
+ components new Msp430InterruptC() as IntDRDY_;
+ IntDRDY = IntDRDY_.Interrupt;
+
+ components HplMsp430GeneralIOC as IOC;
+ CSn_.HplGeneralIO -> IOC.Port43;
+ DRDY_.HplGeneralIO -> IOC.Port26;
+
+ components HplMsp430InterruptC as IntC;
+ IntDRDY_.HplInterrupt -> IntC.Port26;
+
+ components new Scp1000PinsP() as PinsP;
+ PD = PinsP.PD;
+ PinsP.CSn -> IOC.Port43;
+ PinsP._PD -> IOC.Port42;
+ PinsP.DRDY -> IOC.Port26;
+
+ components MainC;
+ MainC.SoftwareInit -> PinsP;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Platform dependent scp1000 pin initialization.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "Scp1000.h"
+
+generic module Scp1000PinsP() @safe()
+{
+ provides {
+ interface Init;
+ interface GeneralIO as PD;
+ }
+ uses {
+ interface HplMsp430GeneralIO as CSn;
+ interface HplMsp430GeneralIO as _PD;
+ interface HplMsp430GeneralIO as DRDY;
+ }
+}
+implementation
+{
+ command error_t Init.init()
+ {
+ call CSn.selectIOFunc();
+ call CSn.disableRen();
+ call CSn.set();
+ call CSn.makeOutput();
+ call _PD.selectIOFunc();
+ call _PD.disableRen();
+ call _PD.set();
+ call _PD.makeOutput();
+ call DRDY.selectIOFunc();
+ call DRDY.enableRen();
+ call DRDY.makeInput();
+ return SUCCESS;
+ }
+
+ async command void PD.set()
+ {
+ /* When we turn off the device we need to enable the pull-up so the pin
+ * doesn't float and cause unwanted current consumption.
+ */
+ call DRDY.enableRen();
+ call _PD.set();
+ }
+
+ async command void PD.clr()
+ {
+ /* When the device is powered up, we no longer need the pull-up. This is
+ * a little bit pedantic, as the unit won't be on that long, but having
+ * the pull-up on does increase power consumption while DRDY is low during
+ * the process of taking a reading. On the order of 2.5/35K = 71uA.
+ */
+ call _PD.clr();
+ call DRDY.disableRen();
+ }
+
+ async command void PD.toggle()
+ {
+ }
+
+ async command bool PD.get()
+ {
+ return call _PD.get();
+ }
+
+ async command void PD.makeInput()
+ {
+ }
+
+ async command bool PD.isInput()
+ {
+ return FALSE;
+ }
+
+ async command void PD.makeOutput()
+ {
+ }
+
+ async command bool PD.isOutput()
+ {
+ return TRUE;
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Platform dependent SPI mapping for Scp1000.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration Scp1000SpiC {
+ provides {
+ interface Resource;
+ interface SpiByte;
+ interface SpiPacket;
+ }
+}
+implementation {
+ components new Msp430SpiB0C(0) as SpiC;
+ Resource = SpiC;
+ SpiByte = SpiC;
+ SpiPacket = SpiC;
+
+ components Scp1000SpiConfigC;
+ SpiC.Configure -> Scp1000SpiConfigC;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SPI configuration for Scp1000.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+module Scp1000SpiConfigC {
+ provides interface AsyncConfigure<const msp430_usci_spi_t*> as Configure;
+}
+implementation {
+ const static msp430_usci_spi_t def = {
+ ctl0: UCSYNC | UCMODE_0 | UCMST | UCMSB | UCCKPL, /* SPI mode0 master, MSB first */
+ ctl1: UCSWRST | UCSSEL_3, /* clock spi from SMCLK */
+ brx: 2, /* part says max 500KHz; this is 524288Hz */
+ uclisten: FALSE,
+ ren: USCI_REN_NONE
+ };
+
+ async command const msp430_usci_spi_t* Configure.get()
+ {
+ return &def;
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalSensirionSht11C is an advanced access component for the
+ * Sensirion SHT11 model humidity and temperature sensor, available on
+ * the telosb platform. This component provides the SensirionSht11
+ * interface, which offers full control over the device. Please
+ * acquire the Resource before using it.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ */
+
+configuration HalSensirionSht11C {
+ provides interface Resource[ uint8_t client ];
+ provides interface SensirionSht11[ uint8_t client ];
+}
+implementation {
+ components new SensirionSht11LogicP();
+ SensirionSht11 = SensirionSht11LogicP;
+
+ components HplSensirionSht11C;
+ Resource = HplSensirionSht11C.Resource;
+ SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
+ SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
+ SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+
+ components SensirionBusyWaitC;
+ SensirionSht11LogicP.BusyWait -> SensirionBusyWaitC;
+
+ components new TimerMilliC();
+ SensirionSht11LogicP.Timer -> TimerMilliC;
+
+ components LedsC;
+ SensirionSht11LogicP.Leds -> LedsC;
+}
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplSensirionSht11C is a low-level component, intended to provide
+ * the physical resources used by the Sensirion SHT11 sensor on the
+ * telosb platform so that the chip driver can make use of them. You
+ * really shouldn't be wiring to this, unless you're writing a new
+ * Sensirion SHT11 driver.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.6 $ $Date: 2007/02/04 19:56:29 $
+ */
+
+configuration HplSensirionSht11C {
+ provides interface Resource[ uint8_t id ];
+ provides interface GeneralIO as DATA;
+ provides interface GeneralIO as SCK;
+ provides interface GpioInterrupt as InterruptDATA;
+}
+implementation {
+ components new Msp430OpenDrainC() as DATAM;
+ DATA = DATAM;
+
+ components new Msp430GpioC() as SCKM;
+ SCK = SCKM;
+
+ components HplMsp430GeneralIOC;
+ DATAM -> HplMsp430GeneralIOC.Port27;
+ SCKM -> HplMsp430GeneralIOC.Port30;
+
+ components new NoPinC() as PWRM;
+ components HplSensirionSht11P;
+ HplSensirionSht11P.PWR -> PWRM;
+ HplSensirionSht11P.DATA -> DATAM;
+ HplSensirionSht11P.SCK -> SCKM;
+
+ components new TimerMilliC();
+ HplSensirionSht11P.Timer -> TimerMilliC;
+
+ components HplMsp430InterruptC;
+ components new Msp430InterruptC() as InterruptDATAC;
+ InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port27;
+ InterruptDATA = InterruptDATAC.Interrupt;
+
+ components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
+ Resource = Arbiter;
+
+ components new SplitControlPowerManagerC();
+ SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P;
+ SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
+ SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
+}
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Timer.h"
+
+/**
+ * HplSensirionSht11P is a low-level component that controls power for
+ * the Sensirion SHT11 sensor on the telosb platform.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006/12/12 18:23:45 $
+ */
+
+module HplSensirionSht11P {
+ provides interface SplitControl;
+ uses interface Timer<TMilli>;
+ uses interface GeneralIO as PWR;
+ uses interface GeneralIO as DATA;
+ uses interface GeneralIO as SCK;
+}
+implementation {
+ task void stopTask();
+
+ command error_t SplitControl.start() {
+ call PWR.makeOutput();
+ call PWR.set();
+ call Timer.startOneShot( 11 );
+ return SUCCESS;
+ }
+
+ event void Timer.fired() {
+ signal SplitControl.startDone( SUCCESS );
+ }
+
+ command error_t SplitControl.stop() {
+ call SCK.makeOutput();
+ call SCK.clr();
+ call DATA.makeInput();
+ call DATA.set();
+ call PWR.clr();
+ post stopTask();
+ return SUCCESS;
+ }
+
+ task void stopTask() {
+ signal SplitControl.stopDone( SUCCESS );
+ }
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implement an open drain output using an HplMsp430GeneralIO, represented as
+ * a GeneralIO. This component uses the Msp430's internal pull up/down
+ * capability, present on only some devices.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+generic configuration Msp430OpenDrainC()
+{
+ provides interface GeneralIO;
+ uses interface HplMsp430GeneralIO as HplGeneralIO;
+}
+implementation
+{
+ components new Msp430OpenDrainP();
+ GeneralIO = Msp430OpenDrainP;
+ HplGeneralIO = Msp430OpenDrainP;
+
+ components MainC;
+ MainC.SoftwareInit -> Msp430OpenDrainP;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implement an open drain output using an HplMsp430GeneralIO, represented as
+ * a GeneralIO. Uses the pull-up resistor built into the msp430 for each io
+ * pin to deliver the pull-up necessary. set() is pin in input with pull-up,
+ * clr() is in output with no pull-up.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+generic module Msp430OpenDrainP()
+{
+ provides {
+ interface Init;
+ interface GeneralIO;
+ }
+ uses interface HplMsp430GeneralIO as HplGeneralIO;
+}
+implementation
+{
+ command error_t Init.init()
+ {
+ call HplGeneralIO.makeInput();
+ call HplGeneralIO.set();
+ call HplGeneralIO.enableRen(); /* this is the important bit */
+ return SUCCESS;
+ }
+
+ async command void GeneralIO.set() { call HplGeneralIO.set(); }
+ async command void GeneralIO.clr() { call HplGeneralIO.clr(); }
+ async command void GeneralIO.toggle() { call HplGeneralIO.toggle(); }
+ //async command uint8_t GeneralIO.getOutRaw() { call HplGeneralIO.getOutRaw(); }
+ //async command bool GeneralIO.getOut() { return call HplGeneralIO.getOut(); }
+ //async command uint8_t GeneralIO.getRaw() { call HplGeneralIO.getRaw(); }
+ async command bool GeneralIO.get() { return call HplGeneralIO.get(); }
+ async command void GeneralIO.makeInput() {} // call HplGeneralIO.makeInput(); }
+ async command bool GeneralIO.isInput() { return TRUE; } //call HplGeneralIO.isInput(); }
+ async command void GeneralIO.makeOutput() {} // call HplGeneralIO.makeOutput(); }
+ async command bool GeneralIO.isOutput() { return TRUE; } //call HplGeneralIO.isOutput(); }
+ //async command void GeneralIO.selectModuleFunc() { call HplGeneralIO.selectModuleFunc(); }
+ //async command bool GeneralIO.isModuleFunc() { return call HplGeneralIO.isModuleFunc(); }
+ //async command void GeneralIO.selectIOFunc() { call HplGeneralIO.selectIOFunc(); }
+ //async command bool GeneralIO.isIOFunc() { return call HplGeneralIO.isIOFunc(); }
+ //async command void GeneralIO.enableRen() { call HplGeneralIO.enableRen(); }
+ //async command void GeneralIO.disableRen() { call HplGeneralIO.disableRen(); }
+ //async command bool GeneralIO.isRen() { return call HplGeneralIO.isRen(); }
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implement an open drain output using a GeneralIO, represented as a
+ * GeneralIO. Requires an external pull-up for proper operation.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+generic configuration OpenDrainC()
+{
+ provides interface GeneralIO;
+ uses interface GeneralIO as RawIO;
+}
+implementation
+{
+ components new OpenDrainP();
+ GeneralIO = OpenDrainP;
+ RawIO = OpenDrainP;
+
+ components MainC;
+ MainC.SoftwareInit -> OpenDrainP;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implement an open drain output using a GeneralIO, represented as a
+ * GeneralIO. clr() puts the pin in input mode, simulating open drain and
+ * therefore requiring a pull-up on the net. set() puts the pin in output
+ * mode and sinks current by outputting a logic zero. By definition, the
+ * pin wrapped by this component can only be used as an output.
+ *
+ * TODO: there could be a version of this component that uses the msp430's
+ * built-in pull-up resistor...
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+generic module OpenDrainP()
+{
+ provides {
+ interface Init;
+ interface GeneralIO;
+ }
+ uses interface GeneralIO as RawIO;
+}
+implementation
+{
+ command error_t Init.init()
+ {
+ call RawIO.clr();
+ call RawIO.makeInput();
+ return SUCCESS;
+ }
+
+ async command bool GeneralIO.get()
+ {
+ return call RawIO.get();
+ }
+
+ async command void GeneralIO.set()
+ {
+ call RawIO.makeInput();
+ }
+
+ async command void GeneralIO.clr()
+ {
+ call RawIO.makeOutput();
+ }
+
+ async command void GeneralIO.toggle()
+ {
+ if (call RawIO.isInput())
+ call RawIO.makeOutput();
+ else
+ call RawIO.makeInput();
+ }
+
+ async command void GeneralIO.makeInput() {}
+
+ async command void GeneralIO.makeOutput() {}
+
+ async command bool GeneralIO.isInput()
+ {
+ return FALSE;
+ }
+
+ async command bool GeneralIO.isOutput()
+ {
+ return TRUE;
+ }
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11C is a top-level access component for the Sensirion
+ * SHT11 model humidity and temperature sensor, available on the
+ * telosb platform. Because this component represents one physical
+ * device, simultaneous calls to read temperature and humidity will be
+ * arbitrated and executed in sequential order. Feel free to read both
+ * at the same time, just be aware that they'll come back
+ * sequentially.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007/04/13 21:46:18 $
+ */
+
+generic configuration SensirionSht11C() {
+ provides interface Read<uint16_t> as Temperature;
+ provides interface DeviceMetadata as TemperatureMetadata;
+ provides interface Read<uint16_t> as Humidity;
+ provides interface DeviceMetadata as HumidityMetadata;
+}
+implementation {
+ components new SensirionSht11ReaderP();
+
+ Temperature = SensirionSht11ReaderP.Temperature;
+ TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata;
+ Humidity = SensirionSht11ReaderP.Humidity;
+ HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata;
+
+ components HalSensirionSht11C;
+
+ enum { TEMP_KEY = unique("Sht11.Resource") };
+ enum { HUM_KEY = unique("Sht11.Resource") };
+
+ SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
+ SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+ SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
+ SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+}
SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+ components SensirionBusyWaitC;
+ SensirionSht11LogicP.BusyWait -> SensirionBusyWaitC;
components new TimerMilliC();
SensirionSht11LogicP.Timer -> TimerMilliC;
projects / tinyos-2.x.git / commitdiff