--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Provides HPL access to both registers and interrupts of all USCI devices on
+ * a supported msp430 processor. The interfaces available are created
+ * depending upon the type of msp430 for which the code is being compiled.
+ * Currently most parts with one or two USCI peripherals supported by mspgcc
+ * (msp430-gcc) should be supported. The most common will probably be the
+ * parts offering two USCI peripherals, which use names like these to describe
+ * their provided serial devices:
+ *
+ * USCI_A0 and USCI_B0, from the first USCI peripheral; and
+ * USCI_A1 and USCI_B1, from the second USCI peripheral.
+ *
+ * 'A' devices offer UART, LIN, IrDA and SPI modes of operation. 'B' devices
+ * are limited to SPI and I2C modes.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+configuration HplMsp430UsciC {
+ provides {
+#if defined(__MSP430_HAS_USCIAB0__) || defined(__MSP430_HAS_USCI__)
+ interface HplMsp430UsciReg as RegA0;
+ interface HplMsp430UsciIntA as IntA0;
+ interface HplMsp430UsciReg as RegB0;
+ interface HplMsp430UsciIntB as IntB0;
+#endif
+#if defined(__MSP430_HAS_USCIAB1__)
+ interface HplMsp430UsciReg as RegA1;
+ interface HplMsp430UsciIntA as IntA1;
+ interface HplMsp430UsciReg as RegB1;
+ interface HplMsp430UsciIntB as IntB1;
+#endif
+ }
+}
+implementation {
+#if defined(__MSP430_HAS_USCI__)
+ /* FIXME: some of these names may be wrong */
+ components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
+ UCA0MCTL_, 0/*i2cie*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
+ UCA0IRTCTL, UCA0IRRCTL_, 0/*i2coa*/, 0/*i2csa*/, IE2_, IFG2_) as RegA0P;
+ RegA0 = RegA0P.Reg;
+
+ components new HplMsp430UsciRegP(UCB0CTL1_, UCB0BR0_, UCB0BR1_, 0/*mctl*/,
+ UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_, 0/*abctl*/, 0/*irtctl*/, 0/*irrctl*/,
+ UCB0I2COA, UCB0I2CSA, IE2_, IFG2_) as RegB0P;
+ RegB0 = RegB0P.Reg;
+
+ components new HplMsp430UsciIntP(USCIARX_VECTOR, USCITX_VECTOR, UCA0RXIFG,
+ UCA0TXIFG, UCA0CTL0_, UCA0CTL1_, UCA0RXBUF_, UCB0CTL0_, UCB0CTL1_,
+ UCB0RXBUF_, IFG2_) as Int0P;
+ IntA0 = Int0P.IntA;
+ IntB0 = Int0P.IntB;
+#elif defined(__MSP430_HAS_USCIAB0__)
+ components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
+ UCA0MCTL_, 0/*i2cie*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
+ UCA0IRTCTL, UCA0IRRCTL_, 0/*i2coa*/, 0/*i2csa*/, IE2_, IFG2_) as RegA0P;
+ RegA0 = RegA0P.Reg;
+
+ components new HplMsp430UsciRegP(UCB0CTL1_, UCB0BR0_, UCB0BR1_, 0/*mctl*/,
+ UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_, 0/*abctl*/, 0/*irtctl*/, 0/*irrctl*/,
+ UCB0I2COA, UCB0I2CSA, IE2_, IFG2_) as RegB0P;
+ RegB0 = RegB0P.Reg;
+
+ components new HplMsp430UsciIntP(USCIAB0RX_VECTOR, USCIAB0TX_VECTOR,
+ UCA0RXIFG, UCA0TXIFG, UCA0CTL0_, UCA0CTL1_, UCA0RXBUF_, UCB0CTL0_,
+ UCB0CTL1_, UCB0RXBUF_, IFG2_,) as Int0P;
+ IntA0 = Int0P.IntA;
+ IntB0 = Int0P.IntB; #endif
+
+#if defined(__MSP430_HAS_USCIAB1__)
+ components new HplMsp430UsciRegP(UCA1CTL0_, UCA1CTL1_, UCA1BR0_, UCA1BR1_,
+ UCA1MCTL_, 0/*i2cie*/, UCA1STAT_, UCA1RXBUF_, UCA1TXBUF_, UCA1ABCTL_,
+ UCA1IRTCTL, UCA1IRRCTL_, 0/*i2coa*/, 0/*i2csa*/, IE2_, IFG2_) as RegA1P;
+ RegA1 = RegA1P.Reg;
+
+ components new HplMsp430UsciRegP(UCB1CTL1_, UCB1BR0_, UCB1BR1_, 0/*mctl*/,
+ UCB1STAT_, UCB1RXBUF_, UCB1TXBUF_, 0/*abctl*/, 0/*irtctl*/, 0/*irrctl*/,
+ UCB1I2COA, UCB1I2CSA) as RegB1P;
+ RegB1 = RegB1P.Reg;
+
+ components new HplMsp430UsciIntP(USCIAB1RX_VECTOR, USCIAB1TX_VECTOR,
+ UCA1RXIFG, UCA1TXIFG, UCA1CTL0_, UCA1CTL1_, UCA1RXBUF_, UCB1CTL0_,
+ UCB1CTL1_, UCB1RXBUF_, UC1IFG_) as Int1P;
+ IntA1 = Int1P.IntA;
+ IntB1 = Int1P.IntB;
+#endif
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interrupt interface for USCI_A0/B0.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "msp430usci.h"
+
+configuration HplMsp430UsciInt0C {
+ provides interface HplMsp430UsciIntA as IntA;
+ provides interface HplMsp430UsciIntA as IntB;
+}
+implementation {
+ components new HplMsp430UsciIntP(USCIAB0RX_VECTOR, USCIAB0TX_VECTOR,
+ UCA0RXIFG, UCA0TXIFG, UCA0CTL0_, UCA0CTL1_, UCA0RXBUF_, UCB0CTL0_,
+ UCB0CTL1_, UCB0RXBUF_, IFG2_) as IntP;
+ IntA = IntP.HplMsp430UsciInt;
+ IntB = IntP.HplMsp430UsciInt;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interrupt interface for USCI_A1/B1.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "msp430usci.h"
+
+configuration HplMsp430UsciInt1C {
+ provides interface HplMsp430UsciIntA as IntA;
+ provides interface HplMsp430UsciIntA as IntB;
+}
+implementation {
+ components new HplMsp430UsciIntP(USCIAB1RX_VECTOR, USCIAB1TX_VECTOR,
+ UCA1RXIFG, UCA1TXIFG, UCA1CTL0_, UCA1CTL1_, UCA1RXBUF_, UCB1CTL0_,
+ UCB1CTL1_, UCB1RXBUF_, UC1IFG_) as IntP;
+ IntA = IntP.HplMsp430UsciInt;
+ IntB = IntP.HplMsp430UsciInt;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt interface for USCI_Ax devices.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "msp430usci.h"
+
+interface HplMsp430UsciIntA {
+ /**
+ * Signals a break received in UART modes if UCBRKIE is enabled. The
+ * provider must reset the UCxIFG.UCAxRXIFG and UCxSTAT.UCBRK bits prior to
+ * signalling the event to the user.
+ */
+ async event void brk();
+
+ /**
+ * Signals a character received for any USCI mode. The provider must reset
+ * UCxIFG.UCAxRXIFG before signalling the event to the user.
+ *
+ * @params c The character received.
+ */
+ async event void rx(char c);
+
+ /**
+ * Signals that the device's transmit buffer is empty and can accept
+ * another character. Note that the USCI device may still be in the
+ * process of transmitting the last character when this event is signalled.
+ * The UCAxTXIFG bit will automatically reset when the interface user writes
+ * a value to the related UCAxTXBUF register after receipt of this event.
+ */
+ async event void tx();
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt interface for USCI_Bx devices.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "msp430usci.h"
+
+interface HplMsp430UsciIntB {
+ /**
+ * Signals a break received in UART modes if UCBRKIE is enabled. The
+ * provider must reset the UCxIFG.UCBxRXIFG and UCxSTAT.UCBRK bits prior to
+ * signalling the event to the user.
+ */
+ async event void brk();
+
+ /**
+ * Signals a character received for any USCI mode. The provider must reset
+ * UCxIFG.UCBxRXIFG before signalling the event to the user.
+ *
+ * @params c The character received.
+ */
+ async event void rx(char c);
+
+ /**
+ * Signals that the device's transmit buffer is empty and can accept
+ * another character. Note that the USCI device may still be in the
+ * process of transmitting the last character when this event is signalled.
+ * The UCBxTXIFG bit will automatically reset when the interface user writes
+ * a value to the related UCBxTXBUF register after receipt of this event.
+ */
+ async event void tx();
+
+ /**
+ * I2C mode only. Indicates the device has lost arbitration. Valid only in
+ * multi-master contexts.
+ */
+ async event void i2cCal();
+
+ /**
+ * I2C mode only. Indicates the device was expecting an ACK and it was not
+ * received.
+ */
+ async event void i2cNak();
+
+ /**
+ * I2C mode only. Indicates the device has detected a start condition
+ * together with its own address while in slave mode.
+ */
+ async event void i2cStart();
+
+ /**
+ * I2C mode only. Indicates the device has detected a stop condition while
+ * in slave mode.
+ */
+ async event void i2cStop();
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interrupt interface for a given USCI's Ax and Bx devices.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "msp430usci.h"
+
+generic module HplMsp430UsciIntP(
+ uint8_t USCIABxRX_VECTOR,
+ uint8_t USCIABxTX_VECTOR,
+ uint8_t UCAxRXIFG,
+ uint8_t UCAxTXIFG,
+ uint8_t Ucaxctl0_addr,
+ uint8_t Ucaxctl1_addr,
+ uint8_t Ucaxrxbuf_addr,
+ uint8_t Ucbxctl0_addr,
+ uint8_t Ucbxctl1_addr,
+ uint8_t Ucbxrxbuf_addr,
+ uint8_t Ucxifg_addr
+ ) @safe() {
+ provides {
+ interface HplMsp430UsciIntA as IntA; /* Interrupts for USCI_Ax */
+ interface HplMsp430UsciIntB as IntB; /* Interrupts for USCI_Bx */
+ }
+}
+
+implementation
+{
+ #define UCxIFG (*TCAST(volatile uint8_t* ONE, Ucxifg_addr))
+ #define UCAxCTL0 (*TCAST(volatile uint8_t* ONE, Ucaxctl0_addr))
+ #define UCAxCTL1 (*TCAST(volatile uint8_t* ONE, Ucaxctl1_addr))
+ #define UCAxRXBUF (*TCAST(volatile uint8_t* ONE, Ucaxrxbuf_addr))
+ #define UCBxCTL0 (*TCAST(volatile uint8_t* ONE, Ucbxctl0_addr))
+ #define UCBxCTL1 (*TCAST(volatile uint8_t* ONE, Ucbxctl1_addr))
+ #define UCBxRXBUF (*TCAST(volatile uint8_t* ONE, Ucbxrxbuf_addr))
+
+ MSP430REG_NORACE(UCxIFG);
+ MSP430REG_NORACE(UCAxCTL0);
+ MSP430REG_NORACE(UCAxCTL1);
+ MSP430REG_NORACE(UCAxRXBUF);
+ MSP430REG_NORACE(UCBxCTL0);
+ MSP430REG_NORACE(UCBxCTL1);
+ MSP430REG_NORACE(UCBxRXBUF);
+
+ /* This USCI_Ax and USCI_Bx interrupt vector signals receive events for UART
+ * and SPI modes, and status events for I2C modes. Only Bx can do I2C.
+ */
+ TOSH_SIGNAL(USCIABxRX_VECTOR) {
+ if (READ_FLAG(UCxIFG, UCAxRXIFG)) {
+ volatile uint8_t c = UCAxRXBUF; /* read to clear UCAxRXIFG */
+ if (READ_FLAG(UCAxCTL1, UCBRK)) {
+ UCAxCTL1 &= ~UCBRK;
+ if (READ_FLAG(UCAxCTL0, UCMODE_3) == UCMODE_3)
+ UCAxCTL1 &= ~UCDORM;
+ signal IntA.brk();
+ } else
+ signal IntA.rx(c);
+ } else if (READ_FLAG(UCxIFG, UCBxRXIFG)) {
+ volatile uint8_t c = UCBxRXBUF; /* read to clear UCBxRXIFG */
+ if (READ_FLAG(UCBxCTL1, UCBRK)) {
+ CLR_FLAG(UCBxCTL1, UCBRK);
+ if (READ_FLAG(UCBxCTL0, UCMODE_3) == UCMODE_3)
+ CLR_FLAG(UCBxCTL1, UCDORM);
+ signal IntB.brk();
+ } else
+ signal IntB.rx(c);
+ } else if (READ_FLAG(UCBxSTAT & UCALIFG))
+ signal IntB.i2cCal();
+ else if (READ_FLAG(UCBxSTAT, UCNAKIFG))
+ signal IntB.i2cNak();
+ else if (READ_FLAG(UCBxSTAT, UCSTTIFG))
+ signal IntB.i2cStart();
+ else if (READ_FLAG(UCBxSTAT, UCSTPIFG))
+ signal IntB.i2cStop();
+ }
+
+ /* This USCI_Ax and USCI_Bx interrupt vector signals transmit events for UART
+ * and SPI modes, and rx/tx events for I2C modes. Only Bx can do I2C.
+ */
+ TOSH_SIGNAL(USCIABxTX_VECTOR) {
+ if (READ_FLAG(UCxIFG, UCBxRXIFG))
+ signal IntB.rx(UCBxRXBUF); /* I2C receive */
+ else if (READ_FLAG(UCxIFG, UCAxTXIFG))
+ signal IntA.tx();
+ else if (READ_FLAG(UCxIFG, UCBxTXIFG))
+ signal IntB.tx();
+ }
+
+ default async event void IntA.brk() {}
+ default async event void IntA.rx(char c) {}
+ default async event void IntA.tx() {}
+
+ default async event void IntB.brk() {}
+ default async event void IntB.rx(char c) {}
+ default async event void IntB.tx() {}
+ default async event void IntB.i2cCal() {}
+ default async event void IntB.i2cNak() {}
+ default async event void IntB.i2cStart() {}
+ default async event void IntB.i2cStop() {}
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to a USCI peripheral device in UART mode.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+#include "Msp430Usci.h"
+
+interface HplMsp430UsciReg {
+ /**
+ * Return the current mode.
+ */
+ command msp430usci_mode_t getMode();
+
+ /**
+ * Prepare to set the mode. If the device supports the requested mode, its
+ * UCxxCTL1.UCSWRST bit is set and true is returned. If the device does not
+ * support the requested mode, no operations are performed and false is
+ * returned.
+ *
+ * @param msp430usci_mode_t The desired USCI mode.
+ * @return bool true if the device supports the requested mode, else false.
+ */
+ command bool setMode(msp430_usci_mode_t mode);
+
+ /**
+ * Get pointer to the UCxxCTL0 register associated with the USCI device.
+ *
+ * @return The pointer to the device's UCxxCTL0 register.
+ */
+ command uint8_t* ptrCtl0();
+
+ /**
+ * Get bits from the UCxxCTL0 register associated with the USCI device.
+ *
+ * @parm mask The bits upon which the operation is to be performed must be
+ * set in <t>mask</t>.
+ * @return The value of the device's UCxxCTL0 register ANDed with
+ * <t>mask</t>.
+ */
+ command uint8_t getCtl0(uint8_t mask);
+
+ /**
+ * Set bits in the UCxxCTL0 register associated with the USCI device.
+ * The operation is equivalent to: <t>UCxxCTL0 |= mask</t>.
+ *
+ * @parm mask The bits in set in <t>mask</t> to set in UCxxCTL0.
+ */
+ command void setCtl0(uint8_t mask);
+
+ /**
+ * Clear bits in the UCxxCTL0 register associated with the USCI device.
+ * The operation is equivalent to: <t>UCxxCTL0 &= ~mask</t>.
+ *
+ * @parm mask The bits in set in <t>mask</t> to clear in UCxxCTL0.
+ */
+ command void clrCtl0(uint8_t mask);
+
+ /**
+ * Assign the values of the bits in <t>value</t>, whose corresponding bits in
+ * <t>mask</t> are set, in the UCxxCTL0 register. The operation is
+ * equivalent to: <t>UCxxCTL0 = (UCxxCTL0 & ~mask) | (value & mask)</t>.
+ */
+ command void assignCtl0(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxCTL1 register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ command uint8_t* ptrCtl1(uint8_t mask);
+ command uint8_t getCtl1(uint8_t mask);
+ command void setCtl1(uint8_t mask);
+ command void clrCtl1(uint8_t mask);
+ command void assignCtl1(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxBR0 register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ command uint8_t* ptrBr0(uint8_t mask);
+ command uint8_t getBr0(uint8_t mask);
+ command void setBr0(uint8_t mask);
+ command void clrBr0(uint8_t mask);
+ command void assignBr0(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxBR1 register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ command uint8_t* ptrBr1(uint8_t mask);
+ command uint8_t getBr1(uint8_t mask);
+ command void setBr1(uint8_t mask);
+ command void clrBr1(uint8_t mask);
+ command void assignBr1(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxMCTL register. See the methods that manipulate
+ * UCxxCTL0 for more information. These methods perform no operation on
+ * providers implementing a USCI_Bx device.
+ */
+ command uint8_t* ptrMctl(uint8_t mask);
+ command uint8_t getMctl(uint8_t mask);
+ command void setMctl(uint8_t mask);
+ command void clrMctl(uint8_t mask);
+ command void assignMctl(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxI2CIE register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Ax device.
+ */
+ command uint8_t* ptrI2Cie(uint8_t mask);
+ command uint8_t getI2Cie(uint8_t mask);
+ command void setI2Cie(uint8_t mask);
+ command void clrI2Cie(uint8_t mask);
+ command void assignI2Cie(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxSTAT register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ command uint8_t* ptrStat(uint8_t mask);
+ command uint8_t getStat(uint8_t mask);
+ command void setStat(uint8_t mask);
+ command void clrStat(uint8_t mask);
+ command void assignStat(uint8_t mask, uint8_t value);
+
+ /**
+ * Return pointer to the UCAxxRXBUF register used by the USCI device.
+ */
+ command uint8_t* ptrRxbuf();
+
+ /**
+ * Read the contents of the UCAxxRXBUF register. This register cannot be
+ * written.
+ */
+ command uint8_t getRxbuf();
+
+ /**
+ * Return pointer to the UCAxxTXBUF register used by the USCI device.
+ */
+ command uint8_t* ptrTxbuf();
+
+ /**
+ * Read the contents of the UCAxxTXBUF register.
+ */
+ command uint8_t getTxbuf();
+
+ /**
+ * Write a byte to the UCAxxTXBUF register.
+ */
+ command void setTxbuf(uint8_t byte);
+
+ /**
+ * Manipulate bits in the UCxxABCTL register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Bx device.
+ */
+ command uint8_t* ptrAbctl(uint8_t mask);
+ command uint8_t getAbctl(uint8_t mask);
+ command void setAbctl(uint8_t mask);
+ command void clrAbctl(uint8_t mask);
+ command void assignAbctl(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxIRTCTL register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Bx device.
+ */
+ command uint8_t* ptrIrtctl(uint8_t mask);
+ command uint8_t getIrtctl(uint8_t mask);
+ command void setIrtctl(uint8_t mask);
+ command void clrIrtctl(uint8_t mask);
+ command void assignIrtctl(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxIRRCTL register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Bx device.
+ */
+ command uint8_t* ptrIrrctl(uint8_t mask);
+ command uint8_t getIrrctl(uint8_t mask);
+ command void setIrrctl(uint8_t mask);
+ command void clrIrrctl(uint8_t mask);
+ command void assignIrrctl(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxI2COA register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Ax device.
+ */
+ command uint8_t* ptrI2Coa(uint8_t mask);
+ command uint8_t getI2Coa(uint8_t mask);
+ command void setI2Coa(uint8_t mask);
+ command void clrI2Coa(uint8_t mask);
+ command void assignI2Coa(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxI2COA register. See the methods that
+ * manipulate UCxxCTL0 for more information. These methods perform no
+ * operation on providers implementing a USCI_Ax device.
+ */
+ command uint8_t* ptrI2Csa(uint8_t mask);
+ command uint8_t getI2Csa(uint8_t mask);
+ command void setI2Csa(uint8_t mask);
+ command void clrI2Csa(uint8_t mask);
+ command void assignI2Csa(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxIE register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ command uint8_t* ptrIe(uint8_t mask);
+ command uint8_t getIe(uint8_t mask);
+ command void setIe(uint8_t mask);
+ command void clrIe(uint8_t mask);
+ command void assignIe(uint8_t mask, uint8_t value);
+
+ /**
+ * Manipulate bits in the UCxxIFG register. See the methods that manipulate
+ * UCxxCTL0 for more information.
+ */
+ command uint8_t* ptrIfg(uint8_t mask);
+ command uint8_t getIfg(uint8_t mask);
+ command void setIfg(uint8_t mask);
+ command void clrIfg(uint8_t mask);
+ command void assignIfg(uint8_t mask, uint8_t value);
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL register interface to USCI peripherals. The interface abstracts the
+ * differences between pysical devices (aka addresses) such that a user of
+ * the interface can equally use any USCI device, providing the device
+ * provides the necessary capabilities. For example, I2C is only available
+ * on USCI_Bx ports.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "msp430usci.h"
+
+generic module HplMsp430UsciRegP(
+ uint8_t Ctl0_addr,
+ uint8_t Ctl1_addr,
+ uint8_t Br0_addr,
+ uint8_t Br1_addr,
+ uint8_t Mctl_addr, /* A devices only */
+ uint8_t I2Cie_addr, /* B devices only */
+ uint8_t Stat_addr,
+ uint8_t Rxbuf_addr,
+ uint8_t Txbuf_addr,
+ uint8_t Abctl_addr, /* A devices only */
+ uint8_t Irtctl_addr, /* A devices only */
+ uint8_t Irrctl_addr, /* A devices only */
+ uint8_t I2Coa_addr, /* B devices only */
+ uint8_t I2Csa_addr, /* B devices only */
+ uint8_t Ie_addr,
+ uint8_t Ifg_addr
+ ) @safe() {
+ provides interface HplMsp430UsciReg as Registers;
+}
+
+implementation
+{
+ #define IS_USCI_Ax (Mctl_addr != 0)
+ #define IS_USCI_Bx (I2Cie_addr != 0)
+
+ #define UCxxCtl0 (*TCAST(volatile uint8_t* ONE, Ctl0_addr))
+ #define UCxxCtl1 (*TCAST(volatile uint8_t* ONE, Ctl1_addr))
+ #define UCxxBr0 (*TCAST(volatile uint8_t* ONE, Br0_addr))
+ #define UCxxBr1 (*TCAST(volatile uint8_t* ONE, Br1_addr))
+ #define UCAxMctl (*TCAST(volatile uint8_t* ONE, Mctl_addr))
+ #define UCBxI2Cie (*TCAST(volatile uint8_t* ONE, I2Cie_addr))
+ #define UCxxStat (*TCAST(volatile uint8_t* ONE, Stat_addr))
+ #define UCxxRxbuf (*TCAST(volatile uint8_t* ONE, Rxbuf_addr))
+ #define UCxxTxbuf (*TCAST(volatile uint8_t* ONE, Txbuf_addr))
+ #define UCAxAbctl (*TCAST(volatile uint8_t* ONE, Abctl_addr))
+ #define UCAxIrtctl (*TCAST(volatile uint8_t* ONE, Irtctl_addr))
+ #define UCAxIrrctl (*TCAST(volatile uint8_t* ONE, Irrctl_addr))
+ #define UCBxI2Coa (*TCAST(volatile uint8_t* ONE, I2Coa_addr))
+ #define UCBxI2Csa (*TCAST(volatile uint8_t* ONE, I2Csa_addr))
+ #define UCxxIe (*TCAST(volatile uint8_t* ONE, Ie_addr))
+ #define UCxxIfg (*TCAST(volatile uint8_t* ONE, Ifg_addr))
+
+ #define ASSIGNBITS(reg, mask, value) \
+ (reg = ((reg) & ~(mask)) | ((value) & (mask)))
+
+ #define RENDER(name) \
+ command uint8_t Registers.get##name(uint8_t mask) { \
+ return READ_FLAG(UCxx##name, mask); \
+ } \
+ command void Registers.set##name(uint8_t mask) { \
+ return SET_FLAG(UCxx##name, mask); \
+ } \
+ command void Registers.clr##name(uint8_t mask) { \
+ return CLR_FLAG(UCxx##name, mask); \
+ } \
+ command void Registers.assign##name(uint8_t mask, uint8_t value) { \
+ return ASSIGNBITS(UCxx##name, mask, value); \
+ }
+
+ #define RENDER_A(name) \
+ command uint8_t Registers.get##name(uint8_t mask) { \
+ if (IS_USCI_Ax) \
+ return READ_FLAG(UCAx##name, mask); \
+ } \
+ command void Registers.set##name(uint8_t mask) { \
+ if (IS_USCI_Ax) \
+ return SET_FLAG(UCAx##name, mask); \
+ } \
+ command void Registers.clr##name(uint8_t mask) { \
+ if (IS_USCI_Ax) \
+ return CLR_FLAG(UCAx##name, mask); \
+ } \
+ command void Registers.assign##name(uint8_t mask, uint8_t value) { \
+ if (IS_USCI_Ax) \
+ return ASSIGNBITS(UCAx##name, mask, value); \
+ }
+
+ #define RENDER_B(name) \
+ command uint8_t Registers.get##name(uint8_t mask) { \
+ if (IS_USCI_Bx) \
+ return READ_FLAG(UCBx##name, mask); \
+ } \
+ command void Registers.set##name(uint8_t mask) { \
+ if (IS_USCI_Bx) \
+ return SET_FLAG(UCBx##name, mask); \
+ } \
+ command void Registers.clr##name(uint8_t mask) { \
+ if (IS_USCI_Bx) \
+ return CLR_FLAG(UCBx##name, mask); \
+ } \
+ command void Registers.assign##name(uint8_t mask, uint8_t value) { \
+ if (IS_USCI_Bx) \
+ return ASSIGNBITS(UCBx##name, mask, value); \
+ }
+
+#if 0
+ MSP430REG_NORACE(UCxxCtl0);
+ MSP430REG_NORACE(UCxxCtl0);
+ MSP430REG_NORACE(UCxxCtl1);
+ MSP430REG_NORACE(UCxxBr0);
+ MSP430REG_NORACE(UCxxBr1);
+ MSP430REG_NORACE(UCAxMctl);
+ MSP430REG_NORACE(UCBxI2Cie);
+ MSP430REG_NORACE(UCxxStat);
+ MSP430REG_NORACE(UCxxRxbuf);
+ MSP430REG_NORACE(UCxxTxbuf);
+ MSP430REG_NORACE(UCAxAbctl);
+ MSP430REG_NORACE(UCAxIrtctl);
+ MSP430REG_NORACE(UCAxIrrctl);
+ MSP430REG_NORACE(UCBxI2Coa);
+ MSP430REG_NORACE(UCBxI2Csa);
+ MSP430REG_NORACE(UCxIe);
+ MSP430REG_NORACE(UCxIfg);
+#endif
+
+ command msp430usci_mode_t Registers.getMode()
+ {
+ if (READ_FLAG(UCxxCtl0, UCSYNC)) {
+ if (READ_FLAG(UCxxCtl0 == UCMODE_3))
+ return UCSYNC_I2C;
+ else
+ return UCSYNC_SPI;
+ } else {
+ return UCSYNC_UART;
+ }
+ }
+
+ command bool Registers.setMode(msp430_usci_mode_t mode)
+ {
+ if (mode == UCSYNC_UART && IS_USCI_Bx)
+ return false;
+ if (mode == UCI2C && IS_USCI_Ax)
+ return false;
+ SET_FLAG(UCxxCtl0, UCSYNC)
+ }
+
+ RENDER(Ctl0);
+ RENDER(Ctl1);
+ RENDER(Br0);
+ RENDER(Br1);
+ RENDER_A(Mctl);
+ RENDER_B(I2Cie);
+ RENDER(Stat);
+
+ command uint8_t* Registers.ptrRxbuf()
+ {
+ return UCxxRXBuf;
+ }
+
+ command uint8_t Registers.getRxbuf()
+ {
+ return UCxxRXBuf;
+ }
+
+ command uint8_t* Registers.ptrTxbuf()
+ {
+ return UCxxTXBuf;
+ }
+
+ command uint8_t Registers.getTxbuf()
+ {
+ return UCxxTXBuf;
+ }
+
+ command void Registers.setTxbuf(uint8_t byte)
+ {
+ UCxxTXBuf = byte;
+ }
+
+ RENDER_A(Abctl);
+ RENDER_A(Irtctl);
+ RENDER_A(Irrctl);
+ RENDER_B(I2Coa);
+ RENDER_B(I2Csa);
+ RENDER(Ie);
+ RENDER(Ifg);
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This configuration provides the interface for using USCI_A0 in its UART
+ * mode.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+#if !defined(__MSP430_HAS_USCI_AB0__)
+#error "Target does not have a USCI_A0 peripheral (UART)"
+#endif
+
+configuration Msp430UartA0C {
+ provides {
+ interface Resource;
+ interface ResourceRequested;
+ interface UartStream;
+ interface UartByte;
+ interface ArbiterInfo; /* ??? */
+ }
+ uses interface Msp430UsciUartConfigure; /* would be nice to use Msp430UartConfigure, same as USART analog */
+}
+implementation {
+ enum {
+ CLIENT_ID = unique(MSP430_USCIA0_RESOURCE)
+ };
+
+ components Msp430UartP as UartP;
+ UartStream = UartP;
+ UartByte = UartP;
+ Msp430UsciUartConfigure = UartP;
+
+ components new Msp430UsciA0C() as UsciC;
+ Resource = UsciC.Resource[CLIENT_ID];
+ ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
+ ArbiterInfo = UsciC.ArbiterInfo;
+ UartP -> UsciC.Registers;
+ UartP -> UsciC.Interrupts[CLIENT_ID];
+ UartP -> UsciC.ArbiterInfo;
+ UsciC.ResourceConfigure[CLIENT_ID] -> UartP;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Uart implementation using a USCI device.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+generic module Msp430UartP() {
+ provides {
+ interface UartStream;
+ interface UartByte;
+ }
+ uses {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciInt as Interrupts;
+ interface Msp430UsciUartConfigure; /* maybe just Msp430UsciConfigure */
+ interface Counter<T32khz,uint16_6>
+ interface ArbiterInfo;
+ }
+}
+implementation {
+ enum {
+ CLIENT_ID = unique(MSP430_USCIA0_RESOURCE)
+ };
+
+ components Msp430UartP as UartP;
+ UartStream = UartP;
+ UartByte = UartP;
+ Msp430UsciUartConfigure = UartP;
+
+ components new Msp430UsciA0C() as UsciC;
+ Resource = UsciC.Resource[CLIENT_ID];
+ ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
+ ArbiterInfo = UsciC.ArbiterInfo;
+ UartP -> UsciC.Registers;
+ UartP -> UsciC.Interrupts[CLIENT_ID];
+ UartP -> UsciC.ArbiterInfo;
+ UsciC.ResourceConfigure[CLIENT_ID] -> UartP;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Header definitions for the USCI peripheral in newer msp430 processors.
+ * A USCI peripheral provides two communications devices, denoted A and B.
+ * Many parts have 2 USCI peripherals, denoted by 0 and 1. Therefore, a
+ * part with 2 USCI peripherals has 4 communications devices:
+ *
+ * USCI_A0 and USCI_B0, from the first USCI peripheral; and
+ * USCI_A1 and USCI_B1, from the second USCI peripheral.
+ *
+ * A devices offer UART, LIN, IrDA and SPI modes of operation. B parts are
+ * limited to SPI and I2C modes.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+#ifndef MSP430USCI_h
+#define MSP430USCI_h
+
+#define MSP430_HPLUSCIA0_RESOURCE "Msp430UsciA0.Resource"
+#define MSP430_HPLUSCIB0_RESOURCE "Msp430UsciB0.Resource"
+#define MSP430_HPLUSCIA1_RESOURCE "Msp430UsciA0.Resource"
+#define MSP430_HPLUSCIB1_RESOURCE "Msp430UsciB0.Resource"
+
+/* Values of UCAxCTL0 only looking at the UCMODEx bits */
+typedef enum
+{
+ USCI_UART = 0,
+ USCI_SPI,
+ USCI_I2C
+} msp430_usci_mode_t;
+
+/* FIXME
+ * There are different meanings to these fields based upon the mode
+ * (uart/spi/etc) and the device (USCI_x0 or USCI_x1).
+ */
+
+/* Packed bitfields are lsb first */
+
+typedef struct {
+ unsigned int ucsync: 1; /* Synchronous mode enable. 0=async, 1=sync */
+ unsigned int ucmodex: 2; /* USCI mode. 00=uart, 01=idle-line, 10=addr-bit, 11=autobaud */
+ unsigned int ucspb: 1; /* Stop bit select. 0=one bit, 1=two bits */
+ unsigned int uc7bit: 1; /* Character length. 0=8 bits, 1=7 bits */
+ unsigned int ucmsb: 1; /* MSB first select. 0=LSB(it) first, 1=MSB(it) first */
+ unsigned int ucpar: 1; /* Parity select. 0=odd parity, 1=even parity */
+ unsigned int ucpen: 1; /* Parity enable. 0=parity disabled, 1=parity enabled */
+} __attribute__ ((packed)) msp430_ucaxctl0_t ;
+
+typedef struct {
+ unsigned int ucswrst: 1; // Software resent enable. 0=disabled (operational), 1=enabled (reset) */
+ unsigned int uctxbrk:1; // Next frame is a break or break/sync: 0=no, 1=yes */
+ unsigned int uctxaddr:1; // Next transmit frame is an address. 0=no, 1=yes */
+ unsigned int ucdorm: 1; // Dormant; USCI in sleep. 0=!dormant, 1=dormant */
+ unsigned int ucbrkie: 1; // Receive break sets UCAxRXIFG interrupt. 0=no, 1=yes */
+ unsigned int ucrxeie: 1; // Receive erroneous char sets UCAxRXIFG interrupt. 0=no, 1=yes */
+ unsigned int ucucsselx: 2; // USCI clock source (BRCLK). 00=UCLK, 01=ACLK, 10=SMCLK, 11=SMCLK */
+} __attribute__ ((packed)) msp430_ucaxctl1_t;
+
+typedef struct {
+ unsigned int ucbusy:1; /* USCI busy; tx or rx in process. 0=no, 1=yes */
+ unsigned int ucidleaddr:1; /* In idle-line mode: Idle line detected. 0=no, 1=yes */
+ /* In addr-bit mode: Last char rx is addr. 0=no, 1=yes */
+ unsigned int ucrxerr:1; /* Receive error flag. 0=none, 1=(ucfe|ucpe|ucoe) */
+ unsigned int ucbrk:1; /* Break detection flag. 0=no, 1=yes */
+ unsigned int ucpe:1; /* Parity error flag. 0=no or ucaxctl0.ucpen=0, 1=yes */
+ unsigned int ucoe:1; /* Overrun error flag. 0=no, 1=yes */
+ unsigned int ucfe:1; /* Framing error flag. 0=no, 1=yes */
+ unsigned int uclisten:1; /* Listen enable (loopback). 0=disabled, 1=enabled */
+} __attribute__ ((packed)) msp430_ucaxstat_t;
+
+typdef struct {
+ unsigned int uciren:1; /* IrDA decoder. 0=disabled, 1=enabled */
+ unsigned int unirtxclk:1; /* IrDA transmit pulse clock select. 0=BRCLK, 1=BRCLK16 if ucos16=1 else BRCLK */
+ unsigned ucirtxplx:6; /* Pulse length. t(pulse) = (ucirtxplx + 1)/(2 * f(irtxclk)) */
+} __attribute__ ((packed)) msp430_ucaxirtctl_t;
+
+typedef struct {
+ unsigned int ucirrxfe:1; /* IrDA recv filter. 0=disabled, 1=enabled */
+ unsigned int ucirrxpl:1; /* IrDA recv input ucaxrxd polarity. 0=high w/light pulse, 1=low */
+ unsigned int ucirrxflx:6; /* IrDA recv filter len. t(min) = (ucirrxflx + 4)/(2 * f(irtxclk)) */
+} __attribute__ ((packed)) msp430_ucaxirtctl_t;
+
+typdef struct {
+ unsigned int ucabden:1; /* Auto baud rate detect enable. 0=no, 1=yes (baud calc from break/sync) */
+ unsigned int reserved:1; /* Reserved */
+ unsigned int ucbtoe:1; /* Break time out error. 0=no, 1=yes: break len > 22 bit times */
+ unsigned int ucstoe:1; /* Synch field timeout error. 0=no, 1=yes: sync len > measurable time */
+ unsigned int ucdelimx:1; /* Break/synch delimiter length in bit times. 00=1, 01=2, 10=3, 11=4 */
+ unsigned int reserved2:2; /* Reserved */
+} __attribute__ ((packed)) msp430_ucaxabctl_t;
+
+/* FIXME: provide baud rate and configuration stuff */
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Defines the USCI_A0 peripheral.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+configuration Msp430UsciA0C {
+ provides {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface Resource as Resource[uint8_t];
+ interface ResourceRequested as ResourceRequested[uint8_t];
+ interface ArbiterInfo;
+ }
+ uses interface ResourceConfig as ResourceConfig[uint8_t];
+}
+implementation {
+ components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
+ UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
+ UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_)
+ as RegP;
+ Registers = RegP;
+
+ components new FcfsArbiterC(MSP430_USCIA0_RESOURCE) as ArbiterC;
+ Resource = ArbiterC;
+ ResourceRequested = ArbiterC;
+ ResourceConfigure = ArbiterC;
+ ArbiterInfo = ArbiterC;
+
+ components new Msp430UsciIntDispatchAP() as IntDispatchA0P;
+ Interrupts = IntDispatchA0P.IntAx;
+ IntDispatchA0P.ArbiterInfo -> ArbiterC;
+
+ components HplMsp430UsciInt0C as Int0C;
+ IntDispatchA0P.RawIntAx -> Int0C.IntA;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Defines the USCI_A1 peripheral.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+configuration Msp430UsciA1C {
+ provides {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface Resource as Resource[uint8_t];
+ interface ResourceRequested as ResourceRequested[uint8_t];
+ interface ArbiterInfo;
+ }
+ uses interface ResourceConfig as ResourceConfig[uint8_t];
+}
+implementation {
+ components new HplMsp430UsciRegP(UCA1CTL0_, UCA1CTL1_, UCA1BR0_, UCA1BR1_,
+ UCA1MCTL_, 0/*UCA1I2CIE_*/, UCA1STAT_, UCA1RXBUF_, UCA1TXBUF_, UCA1ABCTL_,
+ UCA1IRTCTL_, UCA1IRRCTL_, 0/*UCA1I2COA_*/, 0/*UCA1I2CSA_*/, IE2_, IFG2_)
+ as RegP;
+ Registers = RegP;
+
+ components new FcfsArbiterC(MSP430_USCIA1_RESOURCE) as ArbiterC;
+ Resource = ArbiterC;
+ ResourceRequested = ArbiterC;
+ ResourceConfigure = ArbiterC;
+ ArbiterInfo = ArbiterC;
+
+ components new Msp430UsciIntDispatchAP() as IntDispatchA1P;
+ Interrupts = IntDispatchA1P.IntAx;
+ IntDispatchA1P.ArbiterInfo -> ArbiterC;
+
+ components HplMsp430UsciInt0C as Int0C;
+ IntDispatchA1P.RawIntAx -> Int0C.IntA;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Defines the USCI_B0 peripheral.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+configuration Msp430UsciB0C {
+ provides {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface Resource as Resource[uint8_t];
+ interface ResourceRequested as ResourceRequested[uint8_t];
+ interface ArbiterInfo;
+ }
+ uses interface ResourceConfig as ResourceConfig[uint8_t];
+}
+implementation {
+ components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
+ 0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
+ 0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
+ UCB0I2CSA_, IE2_, IFG2_) as RegP;
+ Registers = RegP;
+
+ components new FcfsArbiterC(MSP430_USCIB0_RESOURCE) as ArbiterC;
+ Resource = ArbiterC;
+ ResourceRequested = ArbiterC;
+ ResourceConfigure = ArbiterC;
+ ArbiterInfo = ArbiterC;
+
+ components new Msp430UsciIntDispatchAP() as IntDispatchB0P;
+ Interrupts = IntDispatchB0P.IntAx;
+ IntDispatchB0P.ArbiterInfo -> ArbiterC;
+
+ components HplMsp430UsciInt0C as Int0C;
+ IntDispatchB0P.RawIntAx -> Int0C.IntA;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Defines the USCI_B1 peripheral.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+configuration Msp430UsciB1C {
+ provides {
+ interface HplMsp430UsciReg as Registers;
+ interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface Resource as Resource[uint8_t];
+ interface ResourceRequested as ResourceRequested[uint8_t];
+ interface ArbiterInfo;
+ }
+ uses interface ResourceConfig as ResourceConfig[uint8_t];
+}
+implementation {
+ components new HplMsp430UsciRegP(UCB1CTL0_, UCB1CTL1_, UCB1BR0_, UCB1BR1_,
+ 0/*UCB1MCTL_*/, UCB1I2CIE_, UCB1STAT_, UCB1RXBUF_, UCB1TXBUF_,
+ 0/*UCB1ABCTL_*/, 0/*UCB1IRTCTL_*/, 0/*UCB1IRRCTL_*/, UCB1I2COA_,
+ UCB1I2CSA_, IE2_, IFG2_) as RegP;
+ Registers = RegP;
+
+ components new FcfsArbiterC(MSP430_USCIB1_RESOURCE) as ArbiterC;
+ Resource = ArbiterC;
+ ResourceRequested = ArbiterC;
+ ResourceConfigure = ArbiterC;
+ ArbiterInfo = ArbiterC;
+
+ components new Msp430UsciIntDispatchAP() as IntDispatchB1P;
+ Interrupts = IntDispatchB1P.IntAx;
+ IntDispatchB1P.ArbiterInfo -> ArbiterC;
+
+ components HplMsp430UsciInt0C as Int0C;
+ IntDispatchB1P.RawIntAx -> Int0C.IntA;
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt dispatch for USCI_Ax devices.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+generic module Msp430UsciIntDispatchAP() @safe() {
+ provides interface HplMsp430UsciIntA as IntAx[uint8_t id];
+ uses {
+ interface HplMsp430UsciIntA as RawIntAx;
+ interface ArbiterInfo;
+ }
+}
+
+implementation {
+ async event void RawIntAx.brk()
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntAx.brk[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawIntAx.rx(char c)
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntAx.rx[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawIntAx.tx()
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntAx.tx[call ArbiterInfo.userId()]();
+ }
+
+ default async event void IntAx.brk[uint8_t id]() {}
+ default async event void IntAx.rx[uint8_t id]() {}
+ default async event void IntAx.tx[uint8_t id]() {}
+}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt dispatch for USCI_Bx devices.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+generic module Msp430UsciIntDispatchBP() @safe() {
+ provides interface HplMsp430UsciIntB as IntBx[uint8_t id];
+ uses {
+ interface HplMsp430UsciIntB as RawIntBx;
+ interface ArbiterInfo;
+ }
+}
+
+implementation {
+ async event void RawIntBx.brk()
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntBx.brk[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawIntBx.rx(char c)
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntBx.rx[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawIntBx.tx()
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntBx.tx[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawIntBx.i2cCal()
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntBx.i2cCal[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawIntBx.i2cNak()
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntBx.i2cNak[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawIntBx.i2cStart()
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntBx.i2cStart[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawIntBx.i2cStop()
+ {
+ if (call ArbiterInfo.inUse())
+ signal IntBx.i2cStop[call ArbiterInfo.userId()]();
+ }
+
+ default async event void IntBx.brk[uint8_t id]() {}
+ default async event void IntBx.rx[uint8_t id]() {}
+ default async event void IntBx.tx[uint8_t id]() {}
+ default async event void IntBx.i2cCal[uint8_t id]() {}
+ default async event void IntBx.i2cNak[uint8_t id]() {}
+ default async event void IntBx.i2cStart[uint8_t id]() {}
+ default async event void IntBx.i2cStop[uint8_t id]() {}
+}
projects / tinyos-2.x.git / commitdiff