Update Msp430UartA0C.nc to match recent changes in Msp430UartA1C. Spruce up

SPI support files, but they still aren't ready for prime-time.

diff --git a/tos/chips/msp430/usci/Msp430SpiB1C.nc b/tos/chips/msp430/usci/Msp430SpiB1C.nc
index ad0997a4a1e14762a94c480156c66dc3eba16456..5d9e71c00ddf8ee6569db9127b15e558e8bd949c 100644 (file)
--- a/tos/chips/msp430/usci/Msp430SpiB1C.nc
+++ b/tos/chips/msp430/usci/Msp430SpiB1C.nc
@@ -48,7 +48,7 @@ generic configuration Msp430SpiB1C() {
     interface SpiPacket;
     interface ArbiterInfo; /* ??? */
   }
-  uses interface Msp430UsciSpiConfigure; /* would be nice to use Msp430SpiConfigure, same as USART analog */
+  uses interface Msp430UsciConfigure;
 }
 implementation {
   enum {
@@ -58,7 +58,7 @@ implementation {
   components new Msp430SpiP() as SpiP;
   SpiByte = SpiP;
   SpiPacket = SpiP;
-  Msp430UsciSpiConfigure = SpiP;
+  Msp430UsciConfigure = SpiP;
 
   components Msp430UsciA0C as UsciC;
   Resource = UsciC.Resource[CLIENT_ID];

diff --git a/tos/chips/msp430/usci/Msp430SpiP.nc b/tos/chips/msp430/usci/Msp430SpiP.nc
index 22584fd8f39d2545ed998a9cef127e8fa80db243..dc59ce248a1b5c482d85fbe4ee29d98117947e70 100644 (file)
--- a/tos/chips/msp430/usci/Msp430SpiP.nc
+++ b/tos/chips/msp430/usci/Msp430SpiP.nc
@@ -79,54 +79,121 @@ implementation {
   uint8_t dir; /* Pin state storage to allow for proper unconfiguration */
   uint8_t out;
   uint8_t ren;
+  uint8_t* sobuf; /* Original buffer ptr from UartStream.send() */
+  uint8_t solen;       /* Original buffer len from UartStream.send() */
+  uint8_t* sbuf; /* Position of next char to send */
+  uint8_t slen;        /* Len of chars in sbuf to send */
+  bool rxie;   /* Set if rxie has been enabled to UartStream.receive() */
+  uint8_t* robuf; /* Original receive buffer */
+  uint8_t rolen; /* Original (maximum) receive len */
+  uint8_t* rbuf; /* Position of next byte in which to receive a char */
+  uint8_t rlen; /* Remaining length in receive buffer */
 
-  async command void ResourceConfigure.configure();
+  async command void ResourceConfigure.configure()
   {
-    call Registers.setCtl0(UCSYNC);
-    /* Save pin states */
-    dir = out = ren = 0;
-    saveBits(STE, 0, dir, out, ren);
-    saveBits(SIMO, 1, dir, out, ren);
-    saveBits(SOMI, 2, dir, out, ren);
-    saveBits(SCL, 3, dir, out, ren);
-    /* FIXME: use Msp430UsciConfig to configure ports */
-    /* FIXME: we may need to have REN/DIR stuff in the configuration... */
-    if (call Registers.getCtl1(UCMODE_3) != UCMODE_0) {
-      call STE.selectModuleFunc();
-    call SIMO.selectModuleFunc();
-    call SOMI.selectModuleFunc();
-    call SCL.selectModuleFunc();
-    /* Clear interrupts; we'll add them as needed */
-    call Registers.clrCtl1(UCRXEIE|UCBRKIE);
-    call Registers.clrIeRx();
-    call Registers.clrIeTx();
-    /* Enable the device */
-    call Registers.clrCtl0(UCSYNC);
+    atomic {
+      const msp430_usci_config_t* config = call Msp430UsciConfigure.get();
+
+      call Registers.setCtl1(UCSWRST);
+
+      /* Configure USCI registers */
+      call Registers.assignCtl0(config->spi.ctl0);
+      call Registers.assignCtl1(config->spi.ctl1|UCSWRST);
+      call Registers.assignBr0(config->spi.brx & 0xff);
+      call Registers.assignBr1(config->spi.brx >> 8);
+      call Registers.assignMctl(config->spi.mctl);
+      call Registers.assignIrtctl(config->spi.irtctl);
+      call Registers.assignIrrctl(config->spi.irrctl);
+      call Registers.assignAbctl(config->spi.abctl);
+      call Registers.clrStat(UCLISTEN);
+
+      /* Save pin IO states */
+      dir = out = ren = 0;
+      saveBits(RXD, 0, dir, out, ren);
+      saveBits(TXD, 1, dir, out, ren);
+
+      /* Configure RX pin for UART use */
+      call RXD.makeInput();
+      if (config->spi.ren & USCI_REN_RX) {
+       if (config->spi.ren & USCI_REN_RX_PULLUP)
+         call RXD.set();
+       else
+         call RXD.clr();
+       call RXD.enableRen();
+      }
+      call RXD.selectModuleFunc();
+
+#if 0 /* pull-ups don't make sense on TXD, since it doesn't appear that
+       * enabling an open-drain emulation mode via USCI is possible.
+       */
+
+      /* Configure TX pin for UART use */
+      if (config->spi.ren & USCI_REN_TX) {
+       if (config->spi.ren & USCI_REN_TX_PULLUP)
+         call TXD.set();
+       else
+         call TXD.clr();
+       call TXD.enableRen();
+      }
+      call TXD.selectModuleFunc();
+#endif
+
+      /* Clear interrupts; we'll add them as needed */
+      call Registers.clrIeRx();
+      call Registers.clrIeTx();
+
+      /* Enable the device */
+      call Registers.clrCtl1(UCSWRST);
+    }
   }
 
-  async command void ResourceConfigure.unconfigure();
+  async command void ResourceConfigure.unconfigure()
   {
-    /* Disable the device */
-    call Registers.setCtl0(UCSYNC);
-    /* Clear interrupts and interrupt flags */
-    call Registers.clrIeRx();
-    call Registers.clrIeTx();
-    call Registers.clrIfgRx();
-    call Registers.clrIfgTx();
-    /* Restore pins to state just before configure() */
-    restoreBits(SIMO, 1, dir, out, ren);
-    restoreBits(SOMI, 2, dir, out, ren);
-    restoreBits(SCL, 3, dir, out, ren);
-    call SIMO.selectIOFunc();
-    call SOMI.selectIOFunc();
-    call SCL.selectIOFunc();
-    /* Restore more if we were using 4-pin SPI */
-    if (call Registers.getCtl1(UCMODE_3) != UCMODE_0) {
-      restoreBits(STE, 0, dir, out, ren);
-      call STE.selectIOFunc();
+    atomic {
+      /* Disable the device */
+      call Registers.setCtl1(UCSYNC);
+
+      /* Clear interrupts and interrupt flags */
+      call Registers.clrIeRx();
+      call Registers.clrIeTx();
+      call Registers.clrIfgRx();
+      call Registers.clrIfgTx();
+
+      /* Restore pins to their preconfigured state */
+#if 0
+      restoreBits(RXD, 0, dir, out, ren);
+      restoreBits(TXD, 0, dir, out, ren);
+#endif
+      call RXD.selectIOFunc();
+      call TXD.selectIOFunc();
     }
   }
 
+  async command error_t UartByte.send(uint8_t byte)
+  {
+    /* FIXME: race with UartStream.send() */
+    atomic {
+      if (sobuf)
+       return FAIL;
+      while (call Registers.getStat(UCBUSY));
+      call Registers.setTxbuf(byte);
+      return SUCCESS;
+    }
+  }
+
+  async command error_t UartStream.send(uint8_t* buf, uint16_t len)
+  {
+    if (sobuf || !buf || !len)
+      return FAIL;
+    sobuf = buf;
+    solen = len;
+    call Registers.setIeTx();
+    call Registers.setTxbuf(*sobuf);
+    slen = solen - 1;
+    if (slen)
+      sbuf = sobuf + 1;
+    return SUCCESS;
+  }
 
   async event void Interrupts.tx()
   {
@@ -143,6 +210,57 @@ implementation {
     }
   }
 
+  async command error_t UartStream.enableReceiveInterrupt()
+  {
+    if (!robuf)
+      call Registers.clrIfgRx();
+    call Registers.setIeRx();
+    rxie = FALSE;
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.disableReceiveInterrupt()
+  {
+    if (!robuf) {
+      call Registers.clrIeRx();
+      call Registers.clrIfgRx();
+    } else
+      rxie = TRUE;
+    return SUCCESS;
+  }
+
+  async command error_t UartByte.receive(uint8_t* byte, uint8_t timeout)
+  {
+    uint16_t t;
+
+    /* FIXME: race with UartStream.receive() */
+    if (robuf || !byte)
+      return FAIL;
+    /* TODO: implement timeout, byte-time units.  For now, 1-2 sec */
+    t = TBR;
+    while (t < TBR) {
+      if (call Registers.getIfgRx()) {
+       *byte = call Registers.getRxbuf();
+       return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+
+  async command error_t UartStream.receive(uint8_t* buf, uint16_t len)
+  {
+    if (robuf || !buf || !len)
+      return FAIL;
+    robuf = rbuf = buf;
+    rolen = rlen = len;
+    if (!call Registers.getIeRx()) {
+      call Registers.clrIfgRx();
+      call Registers.setIeRx();
+      rxie = TRUE;
+    } else
+      rxie = FALSE;
+  }
+
   async event void Interrupts.rx(uint8_t byte)
   {
     if (robuf) {
@@ -163,4 +281,35 @@ implementation {
     } else
       signal UartStream.receivedByte(byte);
   }
+
+  default async command const msp430_usci_config_t* Msp430UsciConfigure.get()
+  {
+    const static msp430_usci_config_t def = { 
+      spi: {
+       ctl0: UCMODE_0,         /* async, lsb first, 8N1 */
+       ctl1: UCSWRST|UCSSEL_1, /* clock spi from SMCLK */
+       brx: UBRX_32768HZ_9600,
+       mctl: UMCTL_32768HZ_9600,
+       irtctl: 0,
+       irrctl: 0,
+       abctl: 0,
+       ren: USCI_REN_NONE
+      }
+    };
+
+    return &def;
+  }
+
+  async event void Interrupts.i2cStart() {}
+  async event void Interrupts.i2cStop() {}
+  async event void Interrupts.i2cCal() {}
+  async event void Interrupts.brk() {}
+  async event void Interrupts.i2cNak() {}
+  async event void Counter.overflow() {}
+
+  default async event void UartStream.sendDone( uint8_t* buf, uint16_t len,
+      error_t error ) {}
+  default async event void UartStream.receivedByte( uint8_t byte ) {}
+  default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len,
+      error_t error ) {}
 }

diff --git a/tos/chips/msp430/usci/Msp430UartA0C.nc b/tos/chips/msp430/usci/Msp430UartA0C.nc
index 39b2e43b8ade314c4ec4757167aa3ecaca3fde16..e8e661450566ced3786377f4cfb2d9821b7844e6 100644 (file)
--- a/tos/chips/msp430/usci/Msp430UartA0C.nc
+++ b/tos/chips/msp430/usci/Msp430UartA0C.nc
@@ -48,7 +48,7 @@ generic configuration Msp430UartA0C() {
     interface UartByte;
     interface ArbiterInfo; /* ??? */
   }
-  uses interface Msp430UsciUartConfigure; /* would be nice to use Msp430UartConfigure, same as USART analog */
+  uses interface Msp430UsciConfigure;
 }
 implementation {
   enum {
@@ -58,7 +58,7 @@ implementation {
   components new Msp430UartP() as UartP;
   UartStream = UartP;
   UartByte = UartP;
-  Msp430UsciUartConfigure = UartP;
+  Msp430UsciConfigure = UartP;
 
   components Msp430UsciA0C as UsciC;
   Resource = UsciC.Resource[CLIENT_ID];