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adjusting wait time for powercycle based upon wider testing of sd card
authorayer1 <ayer1>
Wed, 13 Jan 2010 15:08:56 +0000 (15:08 +0000)
committerayer1 <ayer1>
Wed, 13 Jan 2010 15:08:56 +0000 (15:08 +0000)
brands for successful transition between spi and raw data modes; many
fail at 20ms.


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