comment missing

diff --git a/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc b/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc
index 46f1af115758c28dc6eecea3c5945dfc2f3dda28..67c1da4b6359e2e379ead441fe88b5afa492a544 100644 (file)
--- a/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc
+++ b/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc
@@ -1,3 +1,25 @@
+// $Id$
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Build a 32-bit alarm and counter from the atmega128's 8-bit timer 0
+ * in asynchronous mode. Attempting to use the generic Atm128AlarmC
+ * component and the generic timer components runs into problems
+ * apparently related to letting timer 0 overflow.
+ * 
+ * So, instead, this version (inspired by the 1.x code and a remark from
+ * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 0
+ * and never lets timer 0 overflow.
+ *
+ * @author David Gay
+ */
 generic configuration Atm128AlarmAsyncC(typedef precision, int divider) {
   provides {
     interface Init @atleastonce();