Added a comment about FIFOP

diff --git a/tos/chips/cc2420/receive/CC2420ReceiveP.nc b/tos/chips/cc2420/receive/CC2420ReceiveP.nc
index 3a440356d65f8efa1209f7f4af2452c406fe7d13..a85b62e8a2fbaa441216f1d37d363e5c498be059 100644 (file)
--- a/tos/chips/cc2420/receive/CC2420ReceiveP.nc
+++ b/tos/chips/cc2420/receive/CC2420ReceiveP.nc
@@ -394,6 +394,16 @@ implementation {
       }
       
       atomic receivingPacket = FALSE;
+      
+      /*
+       * The FIFOP pin here is high when there are 0 bytes in the RX FIFO
+       * and goes low as soon as there are bytes in the RX FIFO.  The pin
+       * is inverted from what the datasheet says, and its threshold is 127.
+       * Whenever the FIFOP line goes low, as you can see from the interrupt
+       * handler elsewhere in this module, it means we received a new packet.
+       * If the line stays low without generating an interrupt, that means
+       * there's still more data to be received.
+       */
       if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get() ) {
         // A new packet is buffered up and ready to go
         if ( m_missed_packets ) {