Remove need for volatiles in scheduler by fixing McuSleep.sleep to tell

system that memory may change when interrupts are enabled

diff --git a/tos/chips/atm128/McuSleepC.nc b/tos/chips/atm128/McuSleepC.nc
index 9d03201efa5f55f565fef271ad5f1393450582cb..a7c7433a24d93e6563c48a6ec9bb0df4e98b4542 100644 (file)
--- a/tos/chips/atm128/McuSleepC.nc
+++ b/tos/chips/atm128/McuSleepC.nc
@@ -102,7 +102,8 @@ implementation {
       (MCUCR & 0xe3) | 1 << SE | read_uint8_t(&atm128PowerBits[powerState]);
 
     sei();
-    asm volatile ("sleep");
+    // All of memory may change at this point...
+    asm volatile ("sleep" : : : "memory");
     cli();
   }
 

diff --git a/tos/chips/atm128/sim/McuSleepC.nc b/tos/chips/atm128/sim/McuSleepC.nc
index 5919ea19afc2e631898b5188eb8c4a191599e608..2344bc99d1a15f17c020592e7cff2b1be2e4429f 100644 (file)
--- a/tos/chips/atm128/sim/McuSleepC.nc
+++ b/tos/chips/atm128/sim/McuSleepC.nc
@@ -110,7 +110,8 @@ implementation {
       MCUCR = temp;
     }
     sei();
-    asm volatile ("sleep");
+    // All of memory may change at this point...
+    asm volatile ("sleep" : : : "memory");
     cli();
   }
 

diff --git a/tos/chips/atm1281/McuSleepC.nc b/tos/chips/atm1281/McuSleepC.nc
index ad4a4ab0aca11e3a6ed9817cff84602efa288908..19b8738cb868ec21cae440ec2d205b1ae25fe762 100644 (file)
--- a/tos/chips/atm1281/McuSleepC.nc
+++ b/tos/chips/atm1281/McuSleepC.nc
@@ -132,7 +132,8 @@ implementation {
     SMCR =
       (SMCR & 0xf0) | 1 << SE | read_uint8_t(&atm128PowerBits[powerState]);
     sei();
-    asm volatile ("sleep");
+    // All of memory may change at this point...
+    asm volatile ("sleep" : : : "memory");
     cli();
 
     CLR_BIT(SMCR, SE);

diff --git a/tos/chips/msp430/McuSleepC.nc b/tos/chips/msp430/McuSleepC.nc
index 369737c85e7533cebc1ca6c8ae44fd909b3e0724..504e9add33adeaf1a387e331cabab971eb2d9079 100644 (file)
--- a/tos/chips/msp430/McuSleepC.nc
+++ b/tos/chips/msp430/McuSleepC.nc
@@ -114,6 +114,8 @@ implementation {
     }
     temp = msp430PowerBits[powerState] | SR_GIE;
     __asm__ __volatile__( "bis  %0, r2" : : "m" (temp) );
+    // All of memory may change at this point...
+    asm volatile ("" : : : "memory");
     __nesc_disable_interrupt();
   }
 

diff --git a/tos/chips/pxa27x/McuSleepC.nc b/tos/chips/pxa27x/McuSleepC.nc
index 85d6864f7135273795b962ccf86ce08311be100d..45f98c7eefc5e4524e4c402fe36f88abed035588 100644 (file)
--- a/tos/chips/pxa27x/McuSleepC.nc
+++ b/tos/chips/pxa27x/McuSleepC.nc
@@ -58,6 +58,8 @@ implementation {
                  : "r" (PWRMODE_M_IDLE)
                  );
     __nesc_enable_interrupt();
+    // All of memory may change at this point...
+    asm volatile ("" : : : "memory");
     __nesc_disable_interrupt();
     return;
   }

diff --git a/tos/system/SchedulerBasicP.nc b/tos/system/SchedulerBasicP.nc
index d80968ed473120cf16f53ea35d6268a644a8a01c..9f99fd668e1e9ae1acc57f39374079c1582dad2c 100644 (file)
--- a/tos/system/SchedulerBasicP.nc
+++ b/tos/system/SchedulerBasicP.nc
@@ -53,9 +53,11 @@ implementation
     NO_TASK = 255,
   };
 
-  volatile uint8_t m_head;
-  volatile uint8_t m_tail;
-  volatile uint8_t m_next[NUM_TASKS];
+  uint8_t m_head;
+  uint8_t m_tail;
+  uint8_t m_next[NUM_TASKS];
+
+#define v_head (*(volatile uint8_t *)&m_head)
 
   // Helper functions (internal functions) intentionally do not have atomic
   // sections.  It is left as the duty of the exported interface functions to