P1.1, BSL_TX, must be an input, since it is tied to P3.6 UC_TX, which is the

output.

diff --git a/tos/platforms/tmicore/MoteClockC.nc b/tos/platforms/tmicore/MoteClockC.nc
index 46da184eac1311a3461f54e1134d900508119a0d..395707a43d2af682a475796962aab2e65676eca9 100644 (file)
--- a/tos/platforms/tmicore/MoteClockC.nc
+++ b/tos/platforms/tmicore/MoteClockC.nc
@@ -35,9 +35,12 @@
  * @author R. Steve McKown <smckown@gmail.com>
  */
  
+#if 0
 #define MS430DCOSPEC_H
 #define TARGET_DCO_KHZ 8192 // the target DCO clock rate in binary kHz
+//#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz
 #define ACLK_KHZ 32 // the ACLK rate in binary kHz
+#endif
 
 configuration MoteClockC {
   provides interface Init as MoteClockInit;

diff --git a/tos/platforms/tmicore/MotePlatformC.nc b/tos/platforms/tmicore/MotePlatformC.nc
index 25622f99c9e82e104a8f10d972690cc7e3fb2dc1..7477a5627544a798152ae62c5af98ccdb0c1cb1d 100644 (file)
--- a/tos/platforms/tmicore/MotePlatformC.nc
+++ b/tos/platforms/tmicore/MotePlatformC.nc
@@ -46,8 +46,8 @@ implementation {
 
        /* Port 1: 7:BQSTAT2, 6:BQSTAT1, 5:-, 4:-, 3:CP_CTS, 2:CP_RTS, 1:BSL_TX, 0:- */
        P1SEL = 0;      /* 0 0 0 0 0 0 0 0 */
-       P1OUT = 0x3b;   /* 0 0 1 1 1 0 1 1 */
-       P1DIR = 0x3b;   /* 0 0 1 1 1 0 1 1 */
+       P1OUT = 0x39;   /* 0 0 1 1 1 0 0 1 */
+       P1DIR = 0x39;   /* 0 0 1 1 1 0 0 1 */
  
        /* Port 2: 7:-, 6:-, 5:nBUTTON, 4:nUSB_SUSPEND, 3:-, 2:BSL_RX, 1:nUSBPG, 0:nSOLARPG */
        P2SEL = 0;      /* 0 0 0 0 0 0 0 0 */