Merge TinyOS 2.1.1 into master.

[tinyos-2.x.git] / tos / chips / cc2420 / spi / CC2420SpiC.nc

diff --git a/tos/chips/cc2420/spi/CC2420SpiC.nc b/tos/chips/cc2420/spi/CC2420SpiC.nc
index e925e9a549a7e782eeac93a7add912da99161fa5..582b46af58d34c405ae667b2aa17fff47091713b 100644 (file)
--- a/tos/chips/cc2420/spi/CC2420SpiC.nc
+++ b/tos/chips/cc2420/spi/CC2420SpiC.nc
@@ -42,33 +42,56 @@ generic configuration CC2420SpiC() {
   provides interface ChipSpiResource;
 
   // commands
-  provides interface CC2420Strobe as SFLUSHRX;
-  provides interface CC2420Strobe as SFLUSHTX;
   provides interface CC2420Strobe as SNOP;
+  provides interface CC2420Strobe as SXOSCON;
+  provides interface CC2420Strobe as STXCAL;
   provides interface CC2420Strobe as SRXON;
-  provides interface CC2420Strobe as SRFOFF;
   provides interface CC2420Strobe as STXON;
   provides interface CC2420Strobe as STXONCCA;
-  provides interface CC2420Strobe as SXOSCON;
+  provides interface CC2420Strobe as SRFOFF;
   provides interface CC2420Strobe as SXOSCOFF;
-  
+  provides interface CC2420Strobe as SFLUSHRX;
+  provides interface CC2420Strobe as SFLUSHTX;
   provides interface CC2420Strobe as SACK;
+  provides interface CC2420Strobe as SACKPEND;
+  provides interface CC2420Strobe as SRXDEC;
+  provides interface CC2420Strobe as STXENC;
+  provides interface CC2420Strobe as SAES;
 
   // registers
-  provides interface CC2420Register as FSCTRL;
-  provides interface CC2420Register as IOCFG0;
-  provides interface CC2420Register as IOCFG1;
+  provides interface CC2420Register as MAIN;
   provides interface CC2420Register as MDMCTRL0;
   provides interface CC2420Register as MDMCTRL1;
+  provides interface CC2420Register as RSSI;
+  provides interface CC2420Register as SYNCWORD;
   provides interface CC2420Register as TXCTRL;
+  provides interface CC2420Register as RXCTRL0;
   provides interface CC2420Register as RXCTRL1;
-  provides interface CC2420Register as RSSI;
+  provides interface CC2420Register as FSCTRL;
+  provides interface CC2420Register as SECCTRL0;
+  provides interface CC2420Register as SECCTRL1;
+  provides interface CC2420Register as BATTMON;
+  provides interface CC2420Register as IOCFG0;
+  provides interface CC2420Register as IOCFG1;
+  provides interface CC2420Register as MANFIDL;
+  provides interface CC2420Register as MANFIDH;
+  provides interface CC2420Register as FSMTC;
+  provides interface CC2420Register as MANAND;
+  provides interface CC2420Register as MANOR;
+  provides interface CC2420Register as AGCCTRL;
+  provides interface CC2420Register as RXFIFO_REGISTER;
 
   // ram
   provides interface CC2420Ram as IEEEADR;
   provides interface CC2420Ram as PANID;
   provides interface CC2420Ram as SHORTADR;
   provides interface CC2420Ram as TXFIFO_RAM;
+  provides interface CC2420Ram as RXFIFO_RAM;
+  provides interface CC2420Ram as KEY0;
+  provides interface CC2420Ram as KEY1;
+  provides interface CC2420Ram as SABUF;
+  provides interface CC2420Ram as TXNONCE;
+  provides interface CC2420Ram as RXNONCE;
 
   // fifos
   provides interface CC2420Fifo as RXFIFO;
@@ -81,7 +104,7 @@ implementation {
   enum {
     CLIENT_ID = unique( "CC2420Spi.Resource" ),
   };
-
+  
   components HplCC2420PinsC as Pins;
   components CC2420SpiWireC as Spi;
   
@@ -89,32 +112,56 @@ implementation {
   Resource = Spi.Resource[ CLIENT_ID ];
   
   // commands
-  SFLUSHRX = Spi.Strobe[ CC2420_SFLUSHRX ];
-  SFLUSHTX = Spi.Strobe[ CC2420_SFLUSHTX ];
   SNOP = Spi.Strobe[ CC2420_SNOP ];
+  SXOSCON = Spi.Strobe[ CC2420_SXOSCON ];
+  STXCAL = Spi.Strobe[ CC2420_STXCAL ];
   SRXON = Spi.Strobe[ CC2420_SRXON ];
-  SRFOFF = Spi.Strobe[ CC2420_SRFOFF ];
   STXON = Spi.Strobe[ CC2420_STXON ];
   STXONCCA = Spi.Strobe[ CC2420_STXONCCA ];
-  SXOSCON = Spi.Strobe[ CC2420_SXOSCON ];
+  SRFOFF = Spi.Strobe[ CC2420_SRFOFF ];
   SXOSCOFF = Spi.Strobe[ CC2420_SXOSCOFF ];
+  SFLUSHRX = Spi.Strobe[ CC2420_SFLUSHRX ];
+  SFLUSHTX = Spi.Strobe[ CC2420_SFLUSHTX ];
   SACK = Spi.Strobe[ CC2420_SACK ];
-
+  SACKPEND = Spi.Strobe[ CC2420_SACKPEND ];
+  SRXDEC = Spi.Strobe[ CC2420_SRXDEC ];
+  STXENC = Spi.Strobe[ CC2420_STXENC ];
+  SAES = Spi.Strobe[ CC2420_SAES ];
+  
   // registers
-  FSCTRL = Spi.Reg[ CC2420_FSCTRL ];
-  IOCFG0 = Spi.Reg[ CC2420_IOCFG0 ];
-  IOCFG1 = Spi.Reg[ CC2420_IOCFG1 ];
+  MAIN = Spi.Reg[ CC2420_MAIN ];
   MDMCTRL0 = Spi.Reg[ CC2420_MDMCTRL0 ];
   MDMCTRL1 = Spi.Reg[ CC2420_MDMCTRL1 ];
+  RSSI = Spi.Reg[ CC2420_RSSI ];
+  SYNCWORD = Spi.Reg[ CC2420_SYNCWORD ];
   TXCTRL = Spi.Reg[ CC2420_TXCTRL ];
+  RXCTRL0 = Spi.Reg[ CC2420_RXCTRL0 ];
   RXCTRL1 = Spi.Reg[ CC2420_RXCTRL1 ];
-  RSSI = Spi.Reg[ CC2420_RSSI ];
-
+  FSCTRL = Spi.Reg[ CC2420_FSCTRL ];
+  SECCTRL0 = Spi.Reg[ CC2420_SECCTRL0 ];
+  SECCTRL1 = Spi.Reg[ CC2420_SECCTRL1 ];
+  BATTMON = Spi.Reg[ CC2420_BATTMON ];
+  IOCFG0 = Spi.Reg[ CC2420_IOCFG0 ];
+  IOCFG1 = Spi.Reg[ CC2420_IOCFG1 ];
+  MANFIDL = Spi.Reg[ CC2420_MANFIDL ];
+  MANFIDH = Spi.Reg[ CC2420_MANFIDH ];
+  FSMTC = Spi.Reg[ CC2420_FSMTC ];
+  MANAND = Spi.Reg[ CC2420_MANAND ];
+  MANOR = Spi.Reg[ CC2420_MANOR ];
+  AGCCTRL = Spi.Reg[ CC2420_AGCCTRL ];
+  RXFIFO_REGISTER = Spi.Reg[ CC2420_RXFIFO ];
+  
   // ram
   IEEEADR = Spi.Ram[ CC2420_RAM_IEEEADR ];
   PANID = Spi.Ram[ CC2420_RAM_PANID ];
   SHORTADR = Spi.Ram[ CC2420_RAM_SHORTADR ];
   TXFIFO_RAM = Spi.Ram[ CC2420_RAM_TXFIFO ];
+  RXFIFO_RAM = Spi.Ram[ CC2420_RAM_RXFIFO ];
+  KEY0 = Spi.Ram[ CC2420_RAM_KEY0 ];
+  KEY1 = Spi.Ram[ CC2420_RAM_KEY1 ];
+  SABUF = Spi.Ram[ CC2420_RAM_SABUF ];
+  TXNONCE = Spi.Ram[ CC2420_RAM_TXNONCE ];
+  RXNONCE = Spi.Ram[ CC2420_RAM_RXNONCE ];
 
   // fifos
   RXFIFO = Spi.Fifo[ CC2420_RXFIFO ];