USCI fixes.

[tinyos-2.x.git] / tos / chips / msp430 / usci / Msp430SpiP.nc

diff --git a/tos/chips/msp430/usci/Msp430SpiP.nc b/tos/chips/msp430/usci/Msp430SpiP.nc
index 0aaf9bd34c06c17784a526fa9c4d1aa7675d8537..142edb7b9f9996a8a15b1ad96a759a2b8b2a8c73 100644 (file)
--- a/tos/chips/msp430/usci/Msp430SpiP.nc
+++ b/tos/chips/msp430/usci/Msp430SpiP.nc
@@ -72,10 +72,10 @@ implementation {
   };
 
   uint8_t m_pins;
-  uint8_t* m_txBuf;
-  uint8_t* m_rxBuf;
-  uint16_t m_len;
-  uint16_t m_pos;
+  norace uint8_t* m_txBuf;
+  norace uint8_t* m_rxBuf;
+  norace uint16_t m_len;
+  norace uint16_t m_pos;
 
   inline bool is4pin() /* TRUE if the SPI bus is in 4-pin mode */
   {
@@ -163,11 +163,10 @@ implementation {
 
   task void signalSendDone()
   {
-    atomic {
-      uint16_t len = m_len;
-      m_len = 0;
-      signal SpiPacket.sendDone(m_txBuf, m_rxBuf, len, SUCCESS);
-    }
+    error_t error = (m_pos == m_len) ? SUCCESS : FAIL;
+
+    m_len = 0;
+    atomic signal SpiPacket.sendDone(m_txBuf, m_rxBuf, m_pos, error);
   }
 
   async command void ResourceConfigure.unconfigure()
@@ -230,17 +229,19 @@ implementation {
 
   async command uint8_t SpiByte.write(uint8_t byte)
   {
-    if (isBusy())
-      return 0;
-    else {
-      waitOnTx();
-      call Registers.setTxbuf(byte);
-      waitOnRx();
-      return call Registers.getRxbuf();
+    atomic {
+      if (isBusy())
+       return 0;
+      else {
+       waitOnTx();
+       call Registers.setTxbuf(byte);
+       waitOnRx();
+       return call Registers.getRxbuf();
+      }
     }
   }
 
-  /* Return FALSE if we are in reset, so callers can clean up as appropriate. */
+  /* If we are a slave, return FALSE if the master has unasserted CSn. */
   bool sendData()
   {
     atomic {
@@ -249,6 +250,7 @@ implementation {
 
       if (end > m_len)
        end = m_len;
+      waitOnTx(); /* Don't assume that the last tx is done already */
       call Registers.setTxbuf(m_txBuf ? m_txBuf[m_pos] : 0);
       while (++m_pos < end) {
        waitOnRx();
@@ -268,19 +270,15 @@ implementation {
     if (isBusy() || (!txBuf && !rxBuf) || len == 0)
       return FAIL;
     else {
-      atomic {
-       m_txBuf = txBuf;
-       m_rxBuf = rxBuf;
-       m_len = len;
-       m_pos = 0;
-       if (sendData()) {
-         call Registers.setIeRx();
-         return SUCCESS;
-       } else {
-         m_len = 0;
-         return FAIL;
-       }
-      }
+      m_txBuf = txBuf;
+      m_rxBuf = rxBuf;
+      m_len = len;
+      m_pos = 0;
+      if (sendData())
+       call Registers.setIeRx();
+      else
+       post signalSendDone();
+      return SUCCESS;
     }
   }
 
@@ -296,7 +294,7 @@ implementation {
        return;
     }
     call Registers.clrIeRx();
-    post signalSendDone(); /* Don't signal from ISR context */
+    post signalSendDone();
   }
 
   default async event void SpiPacket.sendDone(uint8_t*, uint8_t*, uint16_t,