/* tc-c30.c -- Assembly code for the Texas Instruments TMS320C30
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2006, 2007
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009
Free Software Foundation, Inc.
Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
op_hash = hash_new ();
{
- const template *current_optab = tic30_optab;
+ const insn_template *current_optab = tic30_optab;
for (; current_optab < tic30_optab_end; current_optab++)
{
} immediate;
} operand;
-template *opcode;
+insn_template *opcode;
struct tic30_insn
{
- template *tm; /* Template of current instruction. */
+ insn_template *tm; /* Template of current instruction. */
unsigned opcode; /* Final opcode. */
unsigned int operands; /* Number of given operands. */
/* Type of operand given in instruction. */
it from the buffer so it can pass through hash_find(). */
if (found_ar)
{
- as_bad ("More than one AR register found in indirect reference");
+ as_bad (_("More than one AR register found in indirect reference"));
return NULL;
}
if (*(token + count + 1) < '0' || *(token + count + 1) > '7')
{
- as_bad ("Illegal AR register in indirect reference");
+ as_bad (_("Illegal AR register in indirect reference"));
return NULL;
}
ar_number = *(token + count + 1) - '0';
if (found_disp)
{
- as_bad ("More than one displacement found in indirect reference");
+ as_bad (_("More than one displacement found in indirect reference"));
return NULL;
}
count++;
{
if (!is_digit_char (*(token + count)))
{
- as_bad ("Invalid displacement in indirect reference");
+ as_bad (_("Invalid displacement in indirect reference"));
return NULL;
}
disp[disp_posn++] = *(token + (count++));
ind_buffer[buffer_posn] = '\0';
if (!found_ar)
{
- as_bad ("AR register not found in indirect reference");
+ as_bad (_("AR register not found in indirect reference"));
return NULL;
}
else if ((ind_addr_op->displacement == DISP_REQUIRED) && !found_disp)
{
/* Maybe an implied displacement of 1 again. */
- as_bad ("required displacement wasn't given in indirect reference");
+ as_bad (_("required displacement wasn't given in indirect reference"));
return 0;
}
}
else
{
- as_bad ("illegal indirect reference");
+ as_bad (_("illegal indirect reference"));
return NULL;
}
if (found_disp && (disp_number < 0 || disp_number > 255))
{
- as_bad ("displacement must be an unsigned 8-bit number");
+ as_bad (_("displacement must be an unsigned 8-bit number"));
return NULL;
}
if (!is_space_char (*current_posn)
&& *current_posn != PARALLEL_SEPARATOR)
{
- as_bad ("Invalid character %s before %s operand",
+ as_bad (_("Invalid character %s before %s operand"),
output_invalid (*current_posn),
ordinal_names[insn.operands]);
return 1;
{
if (paren_not_balanced)
{
- as_bad ("Unbalanced parenthesis in %s operand.",
+ as_bad (_("Unbalanced parenthesis in %s operand."),
ordinal_names[insn.operands]);
return 1;
}
else if (!is_operand_char (*current_posn)
&& !is_space_char (*current_posn))
{
- as_bad ("Invalid character %s in %s operand",
+ as_bad (_("Invalid character %s in %s operand"),
output_invalid (*current_posn),
ordinal_names[insn.operands]);
return 1;
p_insn.operands[found_separator]++;
if (p_insn.operands[found_separator] > MAX_OPERANDS)
{
- as_bad ("Spurious operands; (%d operands/instruction max)",
+ as_bad (_("Spurious operands; (%d operands/instruction max)"),
MAX_OPERANDS);
return 1;
}
{
if (expecting_operand)
{
- as_bad ("Expecting operand after ','; got nothing");
+ as_bad (_("Expecting operand after ','; got nothing"));
return 1;
}
if (*current_posn == ',')
{
- as_bad ("Expecting operand before ','; got nothing");
+ as_bad (_("Expecting operand before ','; got nothing"));
return 1;
}
}
if (*++current_posn == END_OF_INSN)
{
/* Just skip it, if it's \n complain. */
- as_bad ("Expecting operand after ','; got nothing");
+ as_bad (_("Expecting operand after ','; got nothing"));
return 1;
}
expecting_operand = 1;
if (p_insn.operands[0] != p_insn.tm->operands_1)
{
- as_bad ("incorrect number of operands given in the first instruction");
+ as_bad (_("incorrect number of operands given in the first instruction"));
return 1;
}
if (p_insn.operands[1] != p_insn.tm->operands_2)
{
- as_bad ("incorrect number of operands given in the second instruction");
+ as_bad (_("incorrect number of operands given in the second instruction"));
return 1;
}
if ((p_insn.operand_type[count][i]->op_type &
p_insn.tm->operand_types[count][i]) == 0)
{
- as_bad ("%s instruction, operand %d doesn't match",
+ as_bad (_("%s instruction, operand %d doesn't match"),
ordinal_names[count], i + 1);
return 1;
}
/* Check for the multiply instructions. */
if (num_rn != 2)
{
- as_bad ("incorrect format for multiply parallel instruction");
+ as_bad (_("incorrect format for multiply parallel instruction"));
return 1;
}
if (num_ind != 2)
{
/* Shouldn't get here. */
- as_bad ("incorrect format for multiply parallel instruction");
+ as_bad (_("incorrect format for multiply parallel instruction"));
return 1;
}
if ((p_insn.operand_type[0][2]->reg.opcode != 0x00)
&& (p_insn.operand_type[0][2]->reg.opcode != 0x01))
{
- as_bad ("destination for multiply can only be R0 or R1");
+ as_bad (_("destination for multiply can only be R0 or R1"));
return 1;
}
if ((p_insn.operand_type[1][2]->reg.opcode != 0x02)
&& (p_insn.operand_type[1][2]->reg.opcode != 0x03))
{
- as_bad ("destination for add/subtract can only be R2 or R3");
+ as_bad (_("destination for add/subtract can only be R2 or R3"));
return 1;
}
p_insn.opcode |= (p_insn.operand_type[1][1]->reg.opcode << 19);
p_insn.opcode |= (p_insn.operand_type[0][1]->reg.opcode << 22);
if (p_insn.operand_type[1][1]->reg.opcode == p_insn.operand_type[0][1]->reg.opcode)
- as_warn ("loading the same register in parallel operation");
+ as_warn (_("loading the same register in parallel operation"));
break;
case OO_4op3:
default:
*sizeP = 0;
- return "Bad call to MD_ATOF()";
+ return _("Unrecognized or unsupported floating point constant");
}
if (float_value == 0.0)
}
md_number_to_chars (literalP, value, prec);
*sizeP = prec;
- return 0;
+ return NULL;
}
void
MAP (2, 1, BFD_RELOC_16_PCREL);
MAP (4, 0, BFD_RELOC_32);
default:
- as_bad ("Can not do %d byte %srelocation", fixP->fx_size,
- fixP->fx_pcrel ? "pc-relative " : "");
+ as_bad (_("Can not do %d byte %srelocation"), fixP->fx_size,
+ fixP->fx_pcrel ? _("pc-relative ") : "");
}
#undef MAP
#undef F
rel = xmalloc (sizeof (* rel));
- assert (rel != 0);
+ gas_assert (rel != 0);
rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
*rel->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
rel->address = fixP->fx_frag->fr_address + fixP->fx_where;
void
md_assemble (char *line)
{
- template *opcode;
+ insn_template *opcode;
char *current_posn;
char *token_start;
char save_char;
if (!is_opcode_char (*current_posn))
{
- as_bad ("Invalid character %s in opcode",
+ as_bad (_("Invalid character %s in opcode"),
output_invalid (*current_posn));
return;
}
/* Find instruction. */
save_char = *current_posn;
*current_posn = '\0';
- opcode = (template *) hash_find (op_hash, token_start);
+ opcode = (insn_template *) hash_find (op_hash, token_start);
if (opcode)
{
debug ("Found instruction %s\n", opcode->name);
else
{
debug ("Didn't find insn\n");
- as_bad ("Unknown TMS320C30 instruction: %s", token_start);
+ as_bad (_("Unknown TMS320C30 instruction: %s"), token_start);
return;
}
*current_posn = save_char;
{
if (!is_space_char (*current_posn))
{
- as_bad ("Invalid character %s before %s operand",
+ as_bad (_("Invalid character %s before %s operand"),
output_invalid (*current_posn),
ordinal_names[insn.operands]);
return;
{
if (paren_not_balanced)
{
- as_bad ("Unbalanced parenthesis in %s operand.",
+ as_bad (_("Unbalanced parenthesis in %s operand."),
ordinal_names[insn.operands]);
return;
}
else if (!is_operand_char (*current_posn)
&& !is_space_char (*current_posn))
{
- as_bad ("Invalid character %s in %s operand",
+ as_bad (_("Invalid character %s in %s operand"),
output_invalid (*current_posn),
ordinal_names[insn.operands]);
return;
this_operand = insn.operands++;
if (insn.operands > MAX_OPERANDS)
{
- as_bad ("Spurious operands; (%d operands/instruction max)",
+ as_bad (_("Spurious operands; (%d operands/instruction max)"),
MAX_OPERANDS);
return;
}
{
if (expecting_operand)
{
- as_bad ("Expecting operand after ','; got nothing");
+ as_bad (_("Expecting operand after ','; got nothing"));
return;
}
if (*current_posn == ',')
{
- as_bad ("Expecting operand before ','; got nothing");
+ as_bad (_("Expecting operand before ','; got nothing"));
return;
}
}
if (*++current_posn == END_OF_INSN)
{
/* Just skip it, if it's \n complain. */
- as_bad ("Expecting operand after ','; got nothing");
+ as_bad (_("Expecting operand after ','; got nothing"));
return;
}
expecting_operand = 1;
numops--;
if (insn.operands != numops)
{
- as_bad ("Incorrect number of operands given");
+ as_bad (_("Incorrect number of operands given"));
return;
}
}
}
else
{
- as_bad ("The %s operand doesn't match", ordinal_names[count]);
+ as_bad (_("The %s operand doesn't match"), ordinal_names[count]);
return;
}
}
else
{
/* Shouldn't make it to this stage. */
- as_bad ("Incompatible first and second operands in instruction");
+ as_bad (_("Incompatible first and second operands in instruction"));
return;
}
break;
else
{
/* Shouldn't make it to this stage. */
- as_bad ("Incompatible first and second operands in instruction");
+ as_bad (_("Incompatible first and second operands in instruction"));
return;
}
break;
if (md_atof ('f', p + 2, & size) != 0)
{
- as_bad ("invalid short form floating point immediate operand");
+ as_bad (_("invalid short form floating point immediate operand"));
return;
}
case Imm_UInt:
debug ("Unsigned int first operand\n");
if (insn.operand_type[0]->immediate.decimal_found)
- as_warn ("rounding down first operand float to unsigned int");
+ as_warn (_("rounding down first operand float to unsigned int"));
if (insn.operand_type[0]->immediate.u_number > 0xFFFF)
- as_warn ("only lower 16-bits of first operand are used");
+ as_warn (_("only lower 16-bits of first operand are used"));
insn.opcode |=
(insn.operand_type[0]->immediate.u_number & 0x0000FFFFL);
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
debug ("Int first operand\n");
if (insn.operand_type[0]->immediate.decimal_found)
- as_warn ("rounding down first operand float to signed int");
+ as_warn (_("rounding down first operand float to signed int"));
if (insn.operand_type[0]->immediate.s_number < -32768 ||
insn.operand_type[0]->immediate.s_number > 32767)
{
- as_bad ("first operand is too large for 16-bit signed int");
+ as_bad (_("first operand is too large for 16-bit signed int"));
return;
}
insn.opcode |=
{
if (insn.operand_type[0]->immediate.decimal_found)
{
- as_bad ("first operand is floating point");
+ as_bad (_("first operand is floating point"));
return;
}
if (insn.operand_type[0]->immediate.s_number < -32768 ||
insn.operand_type[0]->immediate.s_number > 32767)
{
- as_bad ("first operand is too large for 16-bit signed int");
+ as_bad (_("first operand is too large for 16-bit signed int"));
return;
}
insn.opcode |= (insn.operand_type[1]->immediate.s_number);
else
{
/* Shouldn't get here. */
- as_bad ("interrupt vector for trap instruction out of range");
+ as_bad (_("interrupt vector for trap instruction out of range"));
return;
}
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
/* Immediate addressing uses upper 8 bits of address. */
if (insn.operand_type[0]->immediate.u_number > 0x00FFFFFF)
{
- as_bad ("LDP instruction needs a 24-bit operand");
+ as_bad (_("LDP instruction needs a 24-bit operand"));
return;
}
insn.opcode |=
if (insn.operand_type[0]->immediate.resolved == 1)
{
if (insn.operand_type[0]->immediate.u_number > 0x00FFFFFF)
- as_warn ("first operand is too large for a 24-bit displacement");
+ as_warn (_("first operand is too large for a 24-bit displacement"));
insn.opcode |=
(insn.operand_type[0]->immediate.u_number & 0x00FFFFFF);
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
debug ("Final opcode: %08X\n", insn.opcode);
debug ("\n");
}
-
projects / msp430-binutils.git / blobdiff