/* ELF support for BFD.
Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
Free Software Foundation, Inc.
Written by Fred Fish @ Cygnus Support, from information published
#define ELFOSABI_OPENBSD 12 /* OpenBSD */
#define ELFOSABI_OPENVMS 13 /* OpenVMS */
#define ELFOSABI_NSK 14 /* Hewlett-Packard Non-Stop Kernel */
-#define ELFOSABI_AROS 15 /* Amiga Research OS */
+#define ELFOSABI_AROS 15 /* AROS */
#define ELFOSABI_ARM 97 /* ARM */
#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
#define ET_HIPROC 0xFFFF /* Processor-specific */
/* Values for e_machine, which identifies the architecture. These numbers
- are officially assigned by registry@caldera.com. See below for a list of
+ are officially assigned by registry@sco.com. See below for a list of
ad-hoc numbers used during initial development. */
#define EM_NONE 0 /* No machine */
#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
#define EM_S370 9 /* IBM System/370 */
#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian (Oct 4 1999 Draft) Deprecated */
-
+#define EM_res011 11 /* Reserved */
+#define EM_res012 12 /* Reserved */
+#define EM_res013 13 /* Reserved */
+#define EM_res014 14 /* Reserved */
#define EM_PARISC 15 /* HPPA */
-
+#define EM_res016 16 /* Reserved */
#define EM_VPP550 17 /* Fujitsu VPP500 */
#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
#define EM_960 19 /* Intel 80960 */
#define EM_PPC64 21 /* 64-bit PowerPC */
#define EM_S390 22 /* IBM S/390 */
#define EM_SPU 23 /* Sony/Toshiba/IBM SPU */
-
+#define EM_res024 24 /* Reserved */
+#define EM_res025 25 /* Reserved */
+#define EM_res026 26 /* Reserved */
+#define EM_res027 27 /* Reserved */
+#define EM_res028 28 /* Reserved */
+#define EM_res029 29 /* Reserved */
+#define EM_res030 30 /* Reserved */
+#define EM_res031 31 /* Reserved */
+#define EM_res032 32 /* Reserved */
+#define EM_res033 33 /* Reserved */
+#define EM_res034 34 /* Reserved */
+#define EM_res035 35 /* Reserved */
#define EM_V800 36 /* NEC V800 series */
#define EM_FR20 37 /* Fujitsu FR20 */
#define EM_RH32 38 /* TRW RH32 */
#define EM_ST100 60 /* STMicroelectronics ST100 processor */
#define EM_TINYJ 61 /* Advanced Logic Corp. TinyJ embedded processor */
#define EM_X86_64 62 /* Advanced Micro Devices X86-64 processor */
-
+#define EM_PDSP 63 /* Sony DSP Processor */
#define EM_PDP10 64 /* Digital Equipment Corp. PDP-10 */
#define EM_PDP11 65 /* Digital Equipment Corp. PDP-11 */
#define EM_FX66 66 /* Siemens FX66 microcontroller */
#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
+#define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */
+#define EM_TMM_GPP 96 /* Thompson Multimedia General Purpose Processor */
+#define EM_NS32K 97 /* National Semiconductor 32000 series */
+#define EM_TPC 98 /* Tenor Network TPC processor */
+#define EM_SNP1K 99 /* Trebia SNP 1000 processor */
+#define EM_ST200 100 /* STMicroelectronics ST200 microcontroller */
#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
+#define EM_MAX 102 /* MAX Processor */
#define EM_CR 103 /* National Semiconductor CompactRISC */
+#define EM_F2MC16 104 /* Fujitsu F2MC16 */
#define EM_MSP430 105 /* TI msp430 micro controller */
#define EM_BLACKFIN 106 /* ADI Blackfin */
+#define EM_SE_C33 107 /* S1C33 Family of Seiko Epson processors */
+#define EM_SEP 108 /* Sharp embedded microprocessor */
+#define EM_ARCA 109 /* Arca RISC Microprocessor */
+#define EM_UNICORE 110 /* Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University */
+#define EM_EXCESS 111 /* eXcess: 16/32/64-bit configurable embedded CPU */
+#define EM_DXP 112 /* Icera Semiconductor Inc. Deep Execution Processor */
#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
#define EM_CRX 114 /* National Semiconductor CRX */
-#define EM_CR16 115 /* National Semiconductor CompactRISC - CR16 */
-#define EM_SCORE 135 /* Sunplus Score */
+#define EM_XGATE 115 /* Motorola XGATE embedded processor */
+#define EM_C166 116 /* Infineon C16x/XC16x processor */
+#define EM_M16C 117 /* Renesas M16C series microprocessors */
+#define EM_DSPIC30F 118 /* Microchip Technology dsPIC30F Digital Signal Controller */
+#define EM_CE 119 /* Freescale Communication Engine RISC core */
+#define EM_M32C 120 /* Renesas M32C series microprocessors */
+#define EM_res121 121 /* Reserved */
+#define EM_res122 122 /* Reserved */
+#define EM_res123 123 /* Reserved */
+#define EM_res124 124 /* Reserved */
+#define EM_res125 125 /* Reserved */
+#define EM_res126 126 /* Reserved */
+#define EM_res127 127 /* Reserved */
+#define EM_res128 128 /* Reserved */
+#define EM_res129 129 /* Reserved */
+#define EM_res130 130 /* Reserved */
+#define EM_TSK3000 131 /* Altium TSK3000 core */
+#define EM_RS08 132 /* Freescale RS08 embedded processor */
+#define EM_res133 133 /* Reserved */
+#define EM_ECOG2 134 /* Cyan Technology eCOG2 microprocessor */
+#define EM_SCORE 135 /* Sunplus Score */
+#define EM_SCORE7 135 /* Sunplus S+core7 RISC processor */
+#define EM_DSP24 136 /* New Japan Radio (NJR) 24-bit DSP Processor */
+#define EM_VIDEOCORE3 137 /* Broadcom VideoCore III processor */
+#define EM_LATTICEMICO32 138 /* RISC processor for Lattice FPGA architecture */
+#define EM_SE_C17 139 /* Seiko Epson C17 family */
+#define EM_res140 140 /* Reserved */
+#define EM_res141 141 /* Reserved */
+#define EM_res142 142 /* Reserved */
+#define EM_res143 143 /* Reserved */
+#define EM_res144 144 /* Reserved */
+#define EM_res145 145 /* Reserved */
+#define EM_res146 146 /* Reserved */
+#define EM_res147 147 /* Reserved */
+#define EM_res148 148 /* Reserved */
+#define EM_res149 149 /* Reserved */
+#define EM_res150 150 /* Reserved */
+#define EM_res151 151 /* Reserved */
+#define EM_res152 152 /* Reserved */
+#define EM_res153 153 /* Reserved */
+#define EM_res154 154 /* Reserved */
+#define EM_res155 155 /* Reserved */
+#define EM_res156 156 /* Reserved */
+#define EM_res157 157 /* Reserved */
+#define EM_res158 158 /* Reserved */
+#define EM_res159 159 /* Reserved */
+#define EM_MMDSP_PLUS 160 /* STMicroelectronics 64bit VLIW Data Signal Processor */
+#define EM_CYPRESS_M8C 161 /* Cypress M8C microprocessor */
+#define EM_R32C 162 /* Renesas R32C series microprocessors */
+#define EM_TRIMEDIA 163 /* NXP Semiconductors TriMedia architecture family */
+#define EM_QDSP6 164 /* QUALCOMM DSP6 Processor */
+#define EM_8051 165 /* Intel 8051 and variants */
+#define EM_STXP7X 166 /* STMicroelectronics STxP7x family */
+#define EM_NDS32 167 /* Andes Technology compact code size embedded RISC processor family */
+#define EM_ECOG1 168 /* Cyan Technology eCOG1X family */
+#define EM_ECOG1X 168 /* Cyan Technology eCOG1X family */
+#define EM_MAXQ30 169 /* Dallas Semiconductor MAXQ30 Core Micro-controllers */
+#define EM_XIMO16 170 /* New Japan Radio (NJR) 16-bit DSP Processor */
+#define EM_MANIK 171 /* M2000 Reconfigurable RISC Microprocessor */
+#define EM_CRAYNV2 172 /* Cray Inc. NV2 vector architecture */
+#define EM_RX 173 /* Renesas RX family */
+#define EM_METAG 174 /* Imagination Technologies META processor architecture */
+#define EM_MCST_ELBRUS 175 /* MCST Elbrus general purpose hardware architecture */
+#define EM_ECOG16 176 /* Cyan Technology eCOG16 family */
+#define EM_CR16 177 /* National Semiconductor CompactRISC 16-bit processor */
+#define EM_ETPU 178 /* Freescale Extended Time Processing Unit */
+#define EM_SLE9X 179 /* Infineon Technologies SLE9X core */
+#define EM_L1OM 180 /* Intel L1OM */
+#define EM_INTEL181 181 /* Reserved by Intel */
+#define EM_INTEL182 182 /* Reserved by Intel */
+#define EM_res183 183 /* Reserved by ARM */
+#define EM_res184 184 /* Reserved by ARM */
+#define EM_AVR32 185 /* Atmel Corporation 32-bit microprocessor family */
+#define EM_STM8 186 /* STMicroeletronics STM8 8-bit microcontroller */
+#define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */
+#define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */
+#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
will have a collision. Instead, pick a random number.
Normally, each entity or maintainer responsible for a machine with an
- unofficial e_machine number should eventually ask registry@caldera.com for
+ unofficial e_machine number should eventually ask registry@sco.com for
an officially blessed number to be added to the list above. */
/* Old version of Sparc v9, from before the ABI;
#define EM_PPC_OLD 17
/* picoJava */
-#define EM_PJ_OLD 99
+#define EM_PJ_OLD 99
+
+/* Old, unofficial value for National Semiconductor CompactRISC - CR16 */
+#define EM_CR16_OLD 115
/* AVR magic number. Written in the absense of an ABI. */
#define EM_AVR_OLD 0x1057
#define EM_MSP430_OLD 0x1059
/* Morpho MT. Written in the absense of an ABI. */
-#define EM_MT 0x2530
+#define EM_MT 0x2530
/* FR30 magic number - no EABI available. */
#define EM_CYGNUS_FR30 0x3330
#define EM_CYGNUS_FRV 0x5441
/* Infineon Technologies 16-bit microcontroller with C166-V2 core. */
-#define EM_XC16X 0x4688
+#define EM_XC16X 0x4688
/* D10V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D10V 0x7650
#define EM_OR32 0x8472
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
-#define EM_CYGNUS_POWERPC 0x9025
+#define EM_CYGNUS_POWERPC 0x9025
/* Alpha backend magic number. Written in the absence of an ABI. */
#define EM_ALPHA 0x9026
#define EM_CYGNUS_MN10200 0xdead
/* Renesas M32C and M16C. */
-#define EM_M32C 0xFEB0
+#define EM_M32C_OLD 0xFEB0
/* Vitesse IQ2000. */
#define EM_IQ2000 0xFEBA
#define EM_CYGNUS_MEP 0xF00D /* Toshiba MeP */
+#define EM_MOXIE 0xFEED /* Moxie */
+
+/* Old Sunplus S+core7 backend magic number. Written in the absence of an ABI. */
+#define EM_SCORE_OLD 95
+
+#define EM_MICROBLAZE_OLD 0xbaab /* Old MicroBlaze */
+
/* See the above comment before you add a new EM_* value here. */
/* Values for e_version. */
#define SHT_LOOS 0x60000000 /* First of OS specific semantics */
#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */
+#define SHT_GNU_INCREMENTAL_INPUTS 0x6fff4700 /* incremental build data */
#define SHT_GNU_ATTRIBUTES 0x6ffffff5 /* Object attributes */
#define SHT_GNU_HASH 0x6ffffff6 /* GNU style symbol hash table */
#define SHT_GNU_LIBLIST 0x6ffffff7 /* List of prelink dependencies */
#define NT_AUXV 6 /* Contains copy of Elfxx_auxv_t */
#define NT_PRXFPREG 0x46e62b7f /* Contains a user_xfpregs_struct; */
/* note name must be "LINUX". */
+#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
+ /* note name must be "LINUX". */
+#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
+ /* note name must be "LINUX". */
/* Note segments for core files on dir-style procfs systems. */
#define NT_NETBSDCORE_PROCINFO 1 /* Has a struct procinfo */
#define NT_NETBSDCORE_FIRSTMACH 32 /* start of machdep note types */
+
+/* Note segments for core files on OpenBSD systems. Note name is
+ "OpenBSD". */
+
+#define NT_OPENBSD_PROCINFO 10
+#define NT_OPENBSD_AUXV 11
+#define NT_OPENBSD_REGS 20
+#define NT_OPENBSD_FPREGS 21
+#define NT_OPENBSD_XFPREGS 22
+#define NT_OPENBSD_WCOOKIE 23
+
+
/* Note segments for core files on SPU systems. Note name
must start with "SPU/". */
#define NT_GNU_ABI_TAG 1
#define NT_GNU_HWCAP 2 /* Used by ld.so and kernel vDSO. */
#define NT_GNU_BUILD_ID 3 /* Generated by ld --build-id. */
+#define NT_GNU_GOLD_VERSION 4 /* Generated by gold. */
/* Values used in GNU .note.ABI-tag notes (NT_GNU_ABI_TAG). */
#define GNU_ABI_TAG_LINUX 0
#define STB_GLOBAL 1 /* Symbol visible outside obj */
#define STB_WEAK 2 /* Like globals, lower precedence */
#define STB_LOOS 10 /* OS-specific semantics */
+#define STB_GNU_UNIQUE 10 /* Symbol is unique in namespace */
#define STB_HIOS 12 /* OS-specific semantics */
-#define STB_LOPROC 13 /* Application-specific semantics */
-#define STB_HIPROC 15 /* Application-specific semantics */
+#define STB_LOPROC 13 /* Processor-specific semantics */
+#define STB_HIPROC 15 /* Processor-specific semantics */
#define STT_NOTYPE 0 /* Symbol type is unspecified */
#define STT_OBJECT 1 /* Symbol is a data object */
#define STT_FILE 4 /* Symbol gives a file name */
#define STT_COMMON 5 /* An uninitialised common block */
#define STT_TLS 6 /* Thread local data object */
-#define STT_RELC 8 /* Complex relocation expression */
-#define STT_SRELC 9 /* Signed Complex relocation expression */
+#define STT_RELC 8 /* Complex relocation expression */
+#define STT_SRELC 9 /* Signed Complex relocation expression */
#define STT_LOOS 10 /* OS-specific semantics */
+#define STT_GNU_IFUNC 10 /* Symbol is an indirect code object */
#define STT_HIOS 12 /* OS-specific semantics */
-#define STT_LOPROC 13 /* Application-specific semantics */
-#define STT_HIPROC 15 /* Application-specific semantics */
-
-/* Special section indices, which may show up in st_shndx fields, among
- other places. */
-
-#define SHN_UNDEF 0 /* Undefined section reference */
-#define SHN_LORESERVE 0xFF00 /* Begin range of reserved indices */
-#define SHN_LOPROC 0xFF00 /* Begin range of appl-specific */
-#define SHN_HIPROC 0xFF1F /* End range of appl-specific */
-#define SHN_LOOS 0xFF20 /* OS specific semantics, lo */
-#define SHN_HIOS 0xFF3F /* OS specific semantics, hi */
-#define SHN_ABS 0xFFF1 /* Associated symbol is absolute */
-#define SHN_COMMON 0xFFF2 /* Associated symbol is in common */
-#define SHN_XINDEX 0xFFFF /* Section index is held elsewhere */
-#define SHN_HIRESERVE 0xFFFF /* End range of reserved indices */
-#define SHN_BAD ((unsigned) -1) /* Used internally by bfd */
+#define STT_LOPROC 13 /* Processor-specific semantics */
+#define STT_HIPROC 15 /* Processor-specific semantics */
/* The following constants control how a symbol may be accessed once it has
become part of an executable or shared library. */
#define DT_LOPROC 0x70000000
#define DT_HIPROC 0x7fffffff
-/* The next four dynamic tags are used on Solaris. We support them
- everywhere. Note these values lie outside of the (new) range for
- OS specific values. This is a deliberate special case and we
- maintain it for backwards compatability. */
+/* The next 2 dynamic tag ranges, integer value range (DT_VALRNGLO to
+ DT_VALRNGHI) and virtual address range (DT_ADDRRNGLO to DT_ADDRRNGHI),
+ are used on Solaris. We support them everywhere. Note these values
+ lie outside of the (new) range for OS specific values. This is a
+ deliberate special case and we maintain it for backwards compatability.
+ */
#define DT_VALRNGLO 0x6ffffd00
#define DT_GNU_PRELINKED 0x6ffffdf5
#define DT_GNU_CONFLICTSZ 0x6ffffdf6
#define AT_UCACHEBSIZE 21 /* Unified cache block size. */
#define AT_IGNOREPPC 22 /* Entry should be ignored */
#define AT_SECURE 23 /* Boolean, was exec setuid-like? */
+#define AT_BASE_PLATFORM 24 /* String identifying real platform,
+ may differ from AT_PLATFORM. */
+#define AT_RANDOM 25 /* Address of 16 random bytes. */
+#define AT_EXECFN 31 /* Filename of executable. */
/* Pointer to the global system page used for system calls and other
nice things. */
#define AT_SYSINFO 32
#define AT_SUN_EXECNAME 2014 /* Canonicalized file name given to execve. */
#define AT_SUN_MMU 2015 /* String for name of MMU module. */
#define AT_SUN_LDDATA 2016 /* Dynamic linker's data segment address. */
+#define AT_SUN_AUXFLAGS 2017 /* AF_SUN_ flags passed from the kernel. */
#endif /* _ELF_COMMON_H */
projects / msp430-binutils.git / blobdiff