Merge commit 'upstream/2.20'

[msp430-binutils.git] / ld / testsuite / ld-arm / arm-call.d

diff --git a/ld/testsuite/ld-arm/arm-call.d b/ld/testsuite/ld-arm/arm-call.d
index 34c31d9a396a4654b9116d531acfd1692e11a70e..891208d074c6ab0fbb531a02bdb43a4f5bd2a429 100644 (file)
--- a/ld/testsuite/ld-arm/arm-call.d
+++ b/ld/testsuite/ld-arm/arm-call.d
@@ -10,10 +10,10 @@ Disassembly of section .text:
     800c:      fb00000d        blx     804a <t5>
     8010:      fa00000a        blx     8040 <t1>
     8014:      fb000009        blx     8042 <t2>
-    8018:      ea00000f        b       805c <__t1_from_arm>
-    801c:      ea000010        b       8064 <__t2_from_arm>
-    8020:      1b00000d        blne    805c <__t1_from_arm>
-    8024:      1b00000e        blne    8064 <__t2_from_arm>
+    8018:      ea000012        b       8068 <__t1_from_arm>
+    801c:      ea00000f        b       8060 <__t2_from_arm>
+    8020:      1b000010        blne    8068 <__t1_from_arm>
+    8024:      1b00000d        blne    8060 <__t2_from_arm>
     8028:      1b000003        blne    803c <arm>
     802c:      eb000002        bl      803c <arm>
     8030:      faffffff        blx     8034 <thumblocal>
@@ -26,7 +26,7 @@ Disassembly of section .text:
 
 00008038 <t4>:
     8038:      4770            bx      lr
-    803a:      46c0            nop                     \(mov r8, r8\)
+    803a:      46c0            nop                     ; \(mov r8, r8\)
 
 0000803c <arm>:
     803c:      e12fff1e        bx      lr
@@ -40,17 +40,19 @@ Disassembly of section .text:
 
 0000804a <t5>:
     804a:      f000 f801       bl      8050 <local_thumb>
-    804e:      46c0            nop                     \(mov r8, r8\)
+    804e:      46c0            nop                     ; \(mov r8, r8\)
 
 00008050 <local_thumb>:
     8050:      f7ff fff1       bl      8036 <t3>
     8054:      f7ff efd4       blx     8000 <_start>
     8058:      f7ff efd2       blx     8000 <_start>
+    805c:      0000            lsls    r0, r0, #0
+       ...
 
-0000805c <__t1_from_arm>:
-    805c:      e51ff004        ldr     pc, \[pc, #-4\] ; 8060 <__t1_from_arm\+0x4>
-    8060:      00008041        .word   0x00008041
+00008060 <__t2_from_arm>:
+    8060:      e51ff004        ldr     pc, \[pc, #-4\] ; 8064 <__t2_from_arm\+0x4>
+    8064:      00008043        .word   0x00008043
 
-00008064 <__t2_from_arm>:
-    8064:      e51ff004        ldr     pc, \[pc, #-4\] ; 8068 <__t2_from_arm\+0x4>
-    8068:      00008043        .word   0x00008043
+00008068 <__t1_from_arm>:
+    8068:      e51ff004        ldr     pc, \[pc, #-4\] ; 806c <__t1_from_arm\+0x4>
+    806c:      00008041        .word   0x00008041