Merge commit 'upstream/2.20'

[msp430-binutils.git] / ld / testsuite / ld-powerpc / aix-glink-2-64.dd

diff --git a/ld/testsuite/ld-powerpc/aix-glink-2-64.dd b/ld/testsuite/ld-powerpc/aix-glink-2-64.dd
new file mode 100644 (file)
index 0000000..5a34f0a
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/aix-glink-2-64.dd
@@ -0,0 +1,73 @@
+
+tmpdir/aix64-glink-2:     file format aix5coff64-rs6000
+
+
+Disassembly of section \.text:
+
+0000000010000000 <\.b1>:
+    10000000:  60 00 00 00     nop
+
+0000000010000004 <\.b2>:
+    10000004:  60 00 00 00     nop
+
+0000000010000008 <\.b3>:
+    10000008:  60 00 00 00     nop
+
+000000001000000c <\.main>:
+    1000000c:  48 00 f1 03     bla     f100 <.*>
+    10000010:  48 00 00 21     bl      10000030 <\.a2>
+    10000014:  48 00 00 45     bl      10000058 <\.a3>
+    10000018:  4b ff ff e9     bl      10000000 <\.b1>
+    1000001c:  4b ff ff e9     bl      10000004 <\.b2>
+    10000020:  4b ff ff e9     bl      10000008 <\.b3>
+    10000024:  48 00 f5 03     bla     f500 <.*>
+    10000028:  48 00 00 59     bl      10000080 <\.c2>
+    1000002c:  48 00 00 7d     bl      100000a8 <\.c3>
+
+0000000010000030 <\.a2>:
+    10000030:  e9 82 00 00     ld      r12,0\(r2\)
+    10000034:  f8 41 00 28     std     r2,40\(r1\)
+    10000038:  e8 0c 00 00     ld      r0,0\(r12\)
+    1000003c:  e8 4c 00 08     ld      r2,8\(r12\)
+    10000040:  7c 09 03 a6     mtctr   r0
+    10000044:  4e 80 04 20     bctr
+    10000048:  00 00 00 00     \.long 0x0
+    1000004c:  00 0c a0 00     \.long 0xca000
+    10000050:  00 00 00 00     \.long 0x0
+    10000054:  00 00 00 18     \.long 0x18
+
+0000000010000058 <\.a3>:
+    10000058:  e9 82 00 08     ld      r12,8\(r2\)
+    1000005c:  f8 41 00 28     std     r2,40\(r1\)
+    10000060:  e8 0c 00 00     ld      r0,0\(r12\)
+    10000064:  e8 4c 00 08     ld      r2,8\(r12\)
+    10000068:  7c 09 03 a6     mtctr   r0
+    1000006c:  4e 80 04 20     bctr
+    10000070:  00 00 00 00     \.long 0x0
+    10000074:  00 0c a0 00     \.long 0xca000
+    10000078:  00 00 00 00     \.long 0x0
+    1000007c:  00 00 00 18     \.long 0x18
+
+0000000010000080 <\.c2>:
+    10000080:  e9 82 00 10     ld      r12,16\(r2\)
+    10000084:  f8 41 00 28     std     r2,40\(r1\)
+    10000088:  e8 0c 00 00     ld      r0,0\(r12\)
+    1000008c:  e8 4c 00 08     ld      r2,8\(r12\)
+    10000090:  7c 09 03 a6     mtctr   r0
+    10000094:  4e 80 04 20     bctr
+    10000098:  00 00 00 00     \.long 0x0
+    1000009c:  00 0c a0 00     \.long 0xca000
+    100000a0:  00 00 00 00     \.long 0x0
+    100000a4:  00 00 00 18     \.long 0x18
+
+00000000100000a8 <\.c3>:
+    100000a8:  e9 82 00 18     ld      r12,24\(r2\)
+    100000ac:  f8 41 00 28     std     r2,40\(r1\)
+    100000b0:  e8 0c 00 00     ld      r0,0\(r12\)
+    100000b4:  e8 4c 00 08     ld      r2,8\(r12\)
+    100000b8:  7c 09 03 a6     mtctr   r0
+    100000bc:  4e 80 04 20     bctr
+    100000c0:  00 00 00 00     \.long 0x0
+    100000c4:  00 0c a0 00     \.long 0xca000
+    100000c8:  00 00 00 00     \.long 0x0
+    100000cc:  00 00 00 18     \.long 0x18