Merge commit 'upstream/2.20'

[msp430-binutils.git] / ld / testsuite / ld-powerpc / tlsexetoc.d

diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d
index d6a0388813e698fbe9bf793639eb5e4d01e20542..8354e2de2096df33d617e65c4bc5ef72e9a29f2b 100644 (file)
--- a/ld/testsuite/ld-powerpc/tlsexetoc.d
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.d
@@ -8,21 +8,34 @@
 
 Disassembly of section \.text:
 
-.* <_start-0x18>:
+.* <00000010\.plt_call\.__tls_get_addr(|_opt)\+0>:
+.*     e9 63 00 00     ld      r11,0\(r3\)
+.*     e9 83 00 08     ld      r12,8\(r3\)
+.*     7c 60 1b 78     mr      r0,r3
+.*     2c 2b 00 00     cmpdi   r11,0
+.*     7c 6c 6a 14     add     r3,r12,r13
+.*     4d 82 00 20     beqlr   
+.*     7c 03 03 78     mr      r3,r0
+.*     7d 68 02 a6     mflr    r11
+.*     f9 61 00 20     std     r11,32\(r1\)
 .*     f8 41 00 28     std     r2,40\(r1\)
 .*     e9 62 80 70     ld      r11,-32656\(r2\)
 .*     7d 69 03 a6     mtctr   r11
 .*     e9 62 80 80     ld      r11,-32640\(r2\)
 .*     e8 42 80 78     ld      r2,-32648\(r2\)
-.*     4e 80 04 20     bctr
+.*     4e 80 04 21     bctrl
+.*     e9 61 00 20     ld      r11,32\(r1\)
+.*     e8 41 00 28     ld      r2,40\(r1\)
+.*     7d 68 03 a6     mtlr    r11
+.*     4e 80 00 20     blr
 
 .* <_start>:
 .*     38 62 80 08     addi    r3,r2,-32760
-.*     4b ff ff e5     bl      .*
-.*     e8 41 00 28     ld      r2,40\(r1\)
+.*     4b ff ff b1     bl      .*
+.*     60 00 00 00     nop
 .*     38 62 80 18     addi    r3,r2,-32744
-.*     4b ff ff d9     bl      .*
-.*     e8 41 00 28     ld      r2,40\(r1\)
+.*     4b ff ff a5     bl      .*
+.*     60 00 00 00     nop
 .*     3c 6d 00 00     addis   r3,r13,0
 .*     60 00 00 00     nop
 .*     38 63 90 38     addi    r3,r3,-28616
@@ -39,8 +52,10 @@ Disassembly of section \.text:
 .*     89 4d 90 60     lbz     r10,-28576\(r13\)
 .*     3d 2d 00 00     addis   r9,r13,0
 .*     99 49 90 68     stb     r10,-28568\(r9\)
+.*     60 00 00 00     nop
 .*     00 00 00 00 .*
-.*     00 01 02 18 .*
+.*     00 01 02 28 .*
+.* <__glink_PLTresolve>:
 .*     7d 88 02 a6     mflr    r12
 .*     42 9f 00 05     bcl-    20,4\*cr7\+so,.*
 .*     7d 68 02 a6     mflr    r11