-2007-08-28 Daniel Jacobowitz <dan@codesourcery.com>
+2009-10-06 Nick Clifton <nickc@redhat.com>
- * po/nl.po: Updated translation.
+ * po/fi.po: Updated Finnish translation.
-2007-08-17 Alan Modra <amodra@bigpond.net.au>
+2009-10-03 Paul Reed <paulreed@paddedcell.com>
- * po/Make-in: Add --msgid-bugs-address to xgettext invocation.
+ * arm-dis.c (print_insn): Check symtab_size not *symtab.
-2007-08-10 Nick Clifton <nickc@redhat.com>
+2009-10-02 Peter Bergner <bergner@vnet.ibm.com>
- * po/fi.po: Updated Finish translation.
- * po/ga.po: Updated Irish translation.
- * po/vi.po: Updated Vietnamese translation.
+ * ppc-dis.c (ppc_opts): Add "476" entry.
+ * ppc-opc.c (PPC476): Define.
+ (powerpc_opcodes): Update mnemonics where required for 476.
-2007-08-9 H.J. Lu <hongjiu.lu@intel.com>
+2009-10-02 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
- * i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
- pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
- * i386-tbl.h: Regenerated.
+ * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
-2007-08-03 James E. Wilson <wilson@specifix.com>
+2009-10-01 Peter Bergner <bergner@vnet.ibm.com>
- * ia64-gen.c: (main): Add missing newline to copyright message.
- * ia64-ic.tbl (fp-non-arith): Add xmpy.
- * ia64-asmtab.c: Regenerate.
-
-2007-08-01 Michael Snyder <msnyder@access-company.com>
+ * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
+ * ppc-dis.c (ppc_opts): Likewise.
+ Rename "ppca2" to "a2".
- * i386-dis.c (print_insn): Guard against NULL.
+2009-09-29 Peter Bergner <bergner@vnet.ibm.com>
-2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
+ * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
+ "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
- PR binutils/4834
- * i386-dis.c (EXw): New.
- (prefix_user_table): Updated to use EXw, EXd and EXq for SSE4
- instructions when appropriated.
+2009-09-23 Nick Clifton <nickc@redhat.com>
-2007-07-28 H.J. Lu <hongjiu.lu@intel.com>
+ * po/fr.po: Updated French translation.
- PR binutils/4834
- * i386-dis.c (Eq): New.
- (EMC): Renamed to ...
- (EMCq): This. Use q_mode instead of v_mode.
- (prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq
- when appropriated.
+2009-09-21 Ben Elliston <bje@au.ibm.com>
+ Peter Bergner <bergner@vnet.ibm.com>
-2007-07-28 H.J. Lu <hongjiu.lu@intel.com>
+ * ppc-dis.c (ppc_opts): Add "ppca2" entry.
+ * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
+ eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
+ icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
+ ici mnemonics.
+ (ERAT_T): New operand.
+ (XWC_MASK): New mask.
+ (XOPL2): New macro.
+ (PPCA2): Define.
- * i386-dis.c (dis386_twobyte): Change "movd" to "movK".
- (prefix_user_table): Likewise. Use EXq instead of EXx on
- "movq".
+2009-09-18 Nick Clifton <nickc@redhat.com>
-2007-07-27 Nathan Sidwell <nathan@codesourcery.com>
+ * po/es.po: Updated Spanish translation.
+ * po/vi.po: Updated Vietnamese translation.
+
+2009-09-14 Nick Clifton <nickc@redhat.com>
- * ppc-opc (PPC7450): New.
- (powerpc_opcodes): Use it in dcba.
+ * po/nl.po: Updated Dutch translation.
-2007-07-24 H.J. Lu <hongjiu.lu@intel.com>
+2009-09-11 Nick Clifton <nickc@redhat.com>
- * i386-gen.c (main): Print a newline after copyright notice.
+ * po/opcodes.pot: Updated by the Translation project.
-2007-07-19 Nick Clifton <nickc@redhat.com>
+2009-09-08 Alan Modra <amodra@bigpond.net.au>
- PR binutils/4801
- * maxq-dis.c (get_reg_name): Fix the scan of the
- mem_access_syntax_table.
+ * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
-2007-07-16 H.J. Lu <hongjiu.lu@intel.com>
+2009-09-07 Alan Modra <amodra@bigpond.net.au>
- * i386-dis.c (EMq): Removed.
- (EMx): New.
- (prefix_user_table): Replace EMq with EMx.
+ * z8kgen.c (func): Fix thinko last patch.
-2007-07-16 Nick Clifton <nickc@redhat.com>
+2009-09-07 Tristan Gingold <gingold@adacore.com>
- * po/nl.po: Updated translation.
+ * po/opcodes.pot: Regenerate
-2007-07-12 Nick Clifton <nickc@redhat.com>
+2009-09-07 Alan Modra <amodra@bigpond.net.au>
- * po/vi.po: Updated translation.
- * po/nl.po: Updated translation.
+ * z8kgen.c (func): Stabilize qsort of identically named entries.
+ * z8k-opc.h: Regenerate.
-2007-07-06 Mark Kettenis <kettenis@gnu.org>
- H.J. Lu <hongjiu.lu@intel.com>
+2009-09-07 Alan Modra <amodra@bigpond.net.au>
- * Makefile.am (i386-tbl.h): Add $(srcdir)/ to target.
- (ia64-asmtab.c): Likewise.
+ * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
+ * configure: Regenerate.
+ * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
+ (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
+ (i386-gen, ia64-gen, z8kgen): ..here.
* Makefile.in: Regenerate.
-2007-07-05 H.J. Lu <hongjiu.lu@intel.com>
-
- * aclocal.m4: Regenerated.
-
-2007-07-04 Nick Clifton <nickc@redhat.com>
-
- * alpha-dis.c: Update copyright notice to refer to GPLv3.
- * alpha-opc.c, arc-dis.c, arc-dis.h, arc-ext.c, arc-ext.h,
- arc-opc.c, arm-dis.c, avr-dis.c, bfin-dis.c, cgen-asm.c,
- cgen-asm.in, cgen-bitset.c, cgen-dis.c, cgen-dis.in, cgen-ibld.in,
- cgen-opc.c, cgen-ops.h, cgen.sh, cgen-types.h, cr16-dis.c,
- cr16-opc.c, cris-dis.c, cris-opc.c, crx-dis.c, crx-opc.c,
- d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c, disassemble.c,
- dis-buf.c, dis-init.c, dlx-dis.c, h8300-dis.c, h8500-dis.c,
- h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c, i386-dis.c,
- i386-gen.c, i386-opc.c, i386-opc.h, i860-dis.c, i960-dis.c,
- ia64-asmtab.h, ia64-dis.c, ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c,
- ia64-opc.c, ia64-opc-d.c, ia64-opc-f.c, ia64-opc.h, ia64-opc-i.c,
- ia64-opc-m.c, ia64-opc-x.c, m10200-dis.c, m10200-opc.c,
- m10300-dis.c, m10300-opc.c, m68hc11-dis.c, m68hc11-opc.c,
- m68k-dis.c, m68k-opc.c, m88k-dis.c, maxq-dis.c, mcore-dis.c,
- mcore-opc.h, mips16-opc.c, mips-dis.c, mips-opc.c, mmix-dis.c,
- mmix-opc.c, msp430-dis.c, ns32k-dis.c, opintl.h, or32-dis.c,
- or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c, pj-opc.c,
- ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c, s390-opc.c,
- score-dis.c, score-opc.h, sh64-dis.c, sh64-opc.c, sh64-opc.h,
- sh-dis.c, sh-opc.h, sparc-dis.c, sparc-opc.c, spu-dis.c,
- spu-opc.c, sysdep.h, tic30-dis.c, tic4x-dis.c, tic54x-dis.c,
- tic54x-opc.c, tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c,
- vax-dis.c, w65-dis.c, w65-opc.h, xtensa-dis.c, z80-dis.c,
- z8k-dis.c, z8kgen.c: Likewise.
- * i386-opc.tbl, i386-reg.tbl: Add copyright notice.
- * aclocal.m4, configure, fr30-asm.c, fr30-desc.c, fr30-desc.h,
- fr30-dis.c, fr30-ibld.c, fr30-opc.c, fr30-opc.h, frv-asm.c,
- frv-desc.c, frv-desc.h, frv-dis.c, frv-ibld.c, frv-opc.c,
- frv-opc.h, i386-tbl.h, ia64-asmtab.c, ip2k-asm.c, ip2k-desc.c,
- ip2k-desc.h, ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h,
- iq2000-asm.c, iq2000-desc.c, iq2000-desc.h, iq2000-dis.c,
- iq2000-ibld.c, iq2000-opc.c, iq2000-opc.h, m32c-asm.c,
- m32c-desc.c, m32c-desc.h, m32c-dis.c, m32c-ibld.c, m32c-opc.c,
- m32c-opc.h, m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
- m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c, mep-asm.c,
- mep-desc.c, mep-desc.h, mep-dis.c, mep-ibld.c, mep-opc.c,
- mep-opc.h, mt-asm.c, mt-desc.c, mt-desc.h, mt-dis.c, mt-ibld.c,
- mt-opc.c, mt-opc.h, openrisc-asm.c, openrisc-desc.c,
- openrisc-desc.h, openrisc-dis.c, openrisc-ibld.c, openrisc-opc.c,
- openrisc-opc.h, xc16x-asm.c, xc16x-desc.c, xc16x-desc.h,
- xc16x-dis.c, xc16x-ibld.c, xc16x-opc.c, xc16x-opc.h,
- xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
- xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
- xstormy16-opc.h, z8k-opc.h: Regenerated
-
-2007-07-04 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
-
- * cr16-dis.c (getcinvstring): Add const qualifier to char *
- parameter.
- (print_insn_cr16): Remove cast to char *.
-
-2007-07-03 Nathan Sidwell <nathan@codesourcery.com>
-
- * m68k-dis.c (fetch_arg): Add E. Replace length switch with
- direct masking.
- (print_ins_arg): Add j & K operand types.
- (match_insn_m68k): Check and skip initial '.' arg character.
- (m68k_scan_mask): Likewise.
- * m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
-
-2007-07-02 Alan Modra <amodra@bigpond.net.au>
+2009-09-07 Tristan Gingold <gingold@adacore.com>
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * aclocal.m4: Regenerate.
- * config.in: Regenerate.
- * po/POTFILES.in: Regenerate.
- * po/opcodes.pot: Regenerate.
+ * z8k-opc.h: Regenerate.
+
+2009-09-05 Martin Thuresson <martin@mtme.org>
+
+ * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
+ * m88k-dis.c (m88kdis): Rename variable class to in_class.
+ * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
+ Rename argument class to symbol_class.
-2007-06-30 H.J. Lu <hongjiu.lu@intel.com>
+2009-09-04 Jie Zhang <jie.zhang@analog.com>
- * aclocal.m4: Regenerated.
- * Makefile.in: Likewise.
+ * bfin-dis.c (decode_pseudodbg_assert_0): Change according
+ to the new encoding of DBGA, DBGAH, and DBGAL.
+ (_print_insn_bfin): Likewise.
-2007-06-29 H.J. Lu <hongjiu.lu@intel.com>
+2009-09-03 Jie Zhang <jie.zhang@analog.com>
- * i386-reg.tbl: Remove spaces before comments.
+ * bfin-dis.c (_print_insn_bfin): Don't declare.
+ (print_insn_bfin): Don't declare.
+ (dregs_pair): Remove.
+ (ignore_bits): Remove.
+ (ccstat): Remove.
-2007-06-29 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
+2009-09-03 Jie Zhang <jie.zhang@analog.com>
- * cr16-opc.c: New file.
- * cr16-dis.c: New file.
- * Makefile.am: Entries for cr16.
+ * bfin-dis.c (IS_DREG): Define.
+ (IS_PREG): Define.
+ (IS_AREG): Define.
+ (IS_GENREG): Define.
+ (IS_DAGREG): Define.
+ (IS_SYSREG): Define.
+ (decode_REGMV_0): Check illegal register move instructions.
+
+2009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
+
+ * Makefile.am (BUILD_LIBINTL): New variable.
+ (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
+ (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
+ (z8kgen$(EXEEXT_FOR_BUILD)): And here.
* Makefile.in: Regenerate.
- * cofigure.in: Add cr16 target information.
- * configure : Regenerate.
- * disassemble.c: Add cr16 target information.
-
-2007-06-28 H.J. Lu <hongjiu.lu@intel.com>
-
- * Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h.
- (CFILES): Add i386-gen.c.
- (i386-gen): New rule.
- (i386-gen.o): Likewise.
- (i386-tbl.h): Likewise.
- Run "make dep-am".
+
+2009-09-01 DJ Delorie <dj@redhat.com>
+
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-opc.c: Regenerate.
+
+2009-09-01 Tristan Gingold <gingold@adacore.com>
+
+ * makefile.vms: Ported to Itanium VMS. Remove useless targets and
+ dependencies. Remove unused FORMAT variable.
+ * configure.com: New file to create build.com DCL script for
+ Itanium VMS or Alpha VMS.
+
+2009-08-29 Martin Thuresson <martin@mtme.org>
+
+ * cris-dis.c (bytes_to_skip): Update code to use new name.
+ * i386-dis.c (putop): Update code to use new name.
+ * i386-gen.c (process_i386_opcodes): Update code to use
+ new name.
+ * i386-opc.h (struct template): Rename struct template to
+ insn_template. Update code accordingly.
+ * i386-tbl.h (i386_optab): Update type to use new name.
+ * ia64-dis.c (print_insn_ia64): Rename variable template
+ to template_val.
+ * tic30-dis.c (struct instruction, get_tic30_instruction):
+ Update code to use new name.
+ * tic54x-dis.c (has_lkaddr, get_insn_size)
+ (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
+ Update code to use new name.
+ * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
+ Update type to new name.
+ * z8kgen.c (internal, gas): Rename variable new to new_op.
+
+2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
+ Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
+ (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
+ CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
* Makefile.in: Regenerated.
- * i386-gen.c: New file.
- * i386-opc.tbl: Likewise.
- * i386-reg.tbl: Likewise.
- * i386-tbl.h: Likewise.
+2009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
- * i386-opc.c: Include "i386-tbl.h".
- (i386_optab): Removed.
- (i386_regtab): Likewise.
- (i386_regtab_size): Likewise.
+ * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
+ [INSTALL_LIBBFD]: ... here, ...
+ [INSTALL_LIBBFD]: ... and empty overrides here.
+ [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
+ [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
-2007-06-26 Paul Brook <paul@codesourcery.com>
+2009-08-26 Philippe De Muyter <phdm@macqel.be>
+
+ * m68k-dis.c (print_insn_arg): Add movecr register names for
+ coldfire v4e families.
+
+2009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.am (SUBDIRS): Build '.' before 'po'.
+ (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
+ (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
+ (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
+ using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
+ (i386-gen.o): New rule.
+ ($(srcdir)/i386-init.h): Adjust.
+ (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
+ (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
+ (ia64-gen.o): New rule.
+ (ia64_asmtab_deps): New variable.
+ ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
+ (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
+ (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
+ likewise.
+ (s390-opc.tab): Adjust.
+ (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
+ rules.
+ (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
+ * Makefile.in: Regenerate.
+ * z8kgen.c (gas): Avoid '/*' in comment.
+ * z8k-opc.h (func): Regenerate.
+
+2009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
+ from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
+ i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
+ ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
+ msp430-dis.c added.
+ (LIBOPCODES_CFILES): New variable, adding to
+ TARGET_LIBOPCODES_CFILES also non-target library sources.
+ (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
+ files.
+ (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
+ (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
- * arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
+2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
+ [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
+ [INSTALL_LIBBFD] (bfdinclude_DATA): New.
+ [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
+ [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
+ is built shared even if it is not to be installed.
+ (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
+ (install_libopcodes, uninstall_libopcodes): Remove.
+ (AM_CPPFLAGS): Renamed from ...
+ (INCLUDES): ... this.
+ * Makefile.in: Regenerate.
-2007-06-25 H.J. Lu <hongjiu.lu@intel.com>
+ * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
+ 1.11, foreign, no-dist.
+ (MKDEP, m32c_opc_h): Remove variables.
+ (disassemble.lo): Rewrite using automake-style dependency
+ tracking rules; only list the dependency upon the primary source
+ file, but no included headers.
+ (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
+ (i386-gen.o, ia64-gen.o): Remove dependency statements.
+ (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
+ ensure all dependency fragments are included in the Makefile.
+ (s390-opc.lo): Depend on s390-opc.tab.
+ (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
+ (mkdep section): Remove.
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
- * i386-opc.h (regKludge): Renamed to ...
- (RegKludge): This.
+ * Makefile.am (install-pdf, install-html): Remove.
+ * Makefile.in: Regenerate.
- * i386-opc.c (i386_optab): Replace regKludge with RegKludge.
+ * Makefile.in: Regenerate.
+ * aclocal.m4: Likewise.
+ * config.in: Likewise.
+ * configure: Likewise.
-2007-06-23 H.J. Lu <hongjiu.lu@intel.com>
+2009-08-06 Michael Eager <eager@eagercon.com>
- PR binutils/4667
- * i386-dis.c (EX): Removed.
- (EMd): New.
- (EMq): Likewise.
- (EXd): Likewise.
- (EXq): Likewise.
- (EXx): Likewise.
- (PREGRP93...PREGRP97): Likewise.
- (dis386_twobyte): Updated.
- (prefix_user_table): Updated. Add PREGRP93...PREGRP97.
- (OP_EX): Remove Intel syntax handling.
+ * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
+ CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
+ * Makefile.in: Regenerate.
+ * configure.in: Add bfd_microblaze_arch target.
+ * configure: Regenerate.
+ * disassemble.c: Define ARCH_microblaze, return
+ print_insn_microblaze().
+ * microblaze-dis.c: New MicroBlaze disassembler.
+ * microblaze-opc.h: New MicroBlaze opcode definitions.
+ * microblaze-opcm.h: New MicroBlaze opcode types.
-2007-06-18 Nathan Sidwell <nathan@codesourcery.com>
+2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
- * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
+ * configure.in: Handle bfd_l1om_arch.
+ * disassemble.c (disassembler): Likewise.
-2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
+ * configure: Regenerated.
- * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
+ * i386-dis.c (print_insn): Handle bfd_mach_l1om and
+ bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
+
+ * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
+ Add CPU_L1OM_FLAGS.
+ (cpu_flags): Add CpuL1OM.
+ (set_bitfield): Take an argument to set the value field.
+ (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
+ (process_i386_opcode_modifier): Updated.
+ (process_i386_operand_type): Likewise.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * acinclude.m4: Removed.
+ * i386-opc.h (CpuL1OM): New.
+ (CpuXsave): Updated.
+ (i386_cpu_flags): Add cpul1om.
+
+2009-07-24 Jan Beulich <jbeulich@novell.com>
+
+ * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
+ frstpm.
+ * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
+ (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
+ (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
+ * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
+ Define.
+ (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
+ and cpufisttp.
+ * i386-opc.tbl: Qualify floating point instructions by their
+ respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
+ and fsincos to be avilable only on 387. Fix fstsw ax to be
+ available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
+ and frstpm.
+ * i386-init.h, i386-tbl.h: Regenerate.
+
+2009-07-20 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
+ offset or indexed based addressing mode 3.
+
+2009-07-14 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
+ patterns.
+ (arm_decode_shift): Catch illegal register based shifts.
+ (print_insn_arm): Properly handle negative register r0
+ post-indexed addressing.
+
+2009-07-10 Doug Kwan <dougkwan@google.com>
+
+ * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
+ lower 32 bits of long types to make hexadecimal output consistent
+ on both 32-bit and 64-bit hosts.
+
+2009-07-10 Alan Modra <amodra@bigpond.net.au>
+
+ * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
+ * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
+ * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
+ * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
+ * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
+ * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
+ * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
+ * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
+ * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
+ * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
+ * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
+ * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
+
+2009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
+
+ * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
+
+2009-07-07 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
+ addressing modes.
+
+2009-07-06 DJ Delorie <dj@redhat.com>
+
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
+
+2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+
+ * i386-opc.h (CpuFMA4): Add CpuFMA4.
+ (i386_cpu_flags): New.
+ * i386-gen.c: Add CPU_FMA4_FLAGS.
+ * i386-opc.tbl: Add FMA4 instructions.
+ * i386-tbl.h: Regenerate.
+ * i386-init.h: Regenerate.
+ * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
+ (OP_XMM_VexW): Ditto.
+ (OP_EX_VexW): Ditto.
+ (VEXI4_Fixup): Ditto.
+ (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
+ (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
+ (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
+ (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
+ (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
+ (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
+ (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
+ (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
+ (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
+ (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
+ (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
+ (get_vex_imm8): New. handle FMA4.
+ (OP_EX_VexReg): Ditto.
+
+2009-06-30 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (coprocessor): Print the LDC and STC versions of the
+ LFM and SFM instructions as comments,.
+ Improve consistency of formatting for instructions displayed as
+ comments and decimal values displayed with their hexadecimal
+ equivalents.
+ Formatting tidy ups.
+
+2009-06-29 Nick Clifton <nickc@redhat.com>
+
+ PR 10288
+ * arm-dis.c (enum opcode_sentinels): New: Used to mark the
+ boundary between variaant and generic coprocessor instuctions.
+ (coprocessor): Use it.
+ Fix architecture version of MCRR and MRRC instructions.
+ (arm_opcdes): Fix patterns for STRB and STRH instructions.
+ (print_insn_coprocessor): Check architecture and extension masks.
+ Print a hexadecimal version of any decimal constant that is
+ outside of the range of -16 to +32.
+ (print_arm_address): Add a return value of the offset used in the
+ adress, if it is worth printing a hexadecimal version of it.
+ (print_insn_neon): Print a hexadecimal version of any decimal
+ constant that is outside of the range of -16 to +32.
+ (print_insn_arm): Likewise.
+ (print_insn_thumb16): Likewise.
+ (print_insn_thumb32): Likewise.
+
+ PR 10297
+ * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
+ of an undefined instruction.
+ (arm_opcodes): Use it.
+ (thumb_opcod): Use it.
+ (thumb32_opc): Use it.
+
+2009-06-23 DJ Delorie <dj@redhat.com>
+
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+
+ * mep-asm.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
+
+2009-06-22 Nick Clifton <nickc@redhat.com>
- * Makefile.in: Regenerated.
- * doc/Makefile.in: Likewise.
- * aclocal.m4: Likewise.
- * configure: Likewise.
+ * po/fi.po: Updated Finish translation.
-2007-06-05 Paul Brook <paul@codesourcery.com>
+2009-06-22 Alan Modra <amodra@bigpond.net.au>
- * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
+ * m32c-asm.c: Regenerate.
-2007-05-24 Steve Ellcey <sje@cup.hp.com>
+2009-06-22 Alan Modra <amodra@bigpond.net.au>
- * Makefile.in: Regnerate.
- * configure: Regenerate.
- * aclocal.m4: Regenerate.
+ * score-dis.c (print_insn_score48, print_insn_score32): Move default
+ case label to proper lexical block.
+ * score7-dis.c (print_insn_score32): Likewise.
-2007-05-18 Alan Modra <amodra@bigpond.net.au>
+2009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
- * ppc-dis.c (print_insn_powerpc): Don't skip all operands
- after setting skip_optional.
+ * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
+ MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
+ * s390-opc.txt (nopr, nop): Use new instruction format.
-2007-05-16 Peter Bergner <bergner@vnet.ibm.com>
+2009-06-18 Nick Clifton <nickc@redhat.com>
- * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
- (print_insn_powerpc): Use the new operand_value_powerpc and
- skip_optional_operands functions to omit or print all optional
- operands as a group.
- * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
- (XFL_MASK): Delete L and W bits from the mask.
- (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
- with XWRA_MASK. Use W.
- (mtfsf, mtfsf.): Use XFL_L and W.
+ PR 10288
+ * arm-dis.c (print_insn_coprocessor): Check that a user specified
+ ARM architecture supports the matched instruction.
+ (print_insn_arm): Likewise.
+ (select_arm_features): New function. Fills in the fields of an
+ arm_feature_set structure based on a given arm machine number.
+ (print_insn): Initialise an arm_feature_set structure.
-2007-05-14 H.J. Lu <hongjiu.lu@intel.com>
+2009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
- PR binutils/4502
- * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
+ * vax-dis.c (is_function_entry): Return success for synthetic
+ symbols too.
+ (is_plt_tail): New function.
+ (print_insn_vax): Decode PLT entry offset longword.
-2007-05-10 H.J. Lu <hongjiu.lu@intel.com>
+2009-06-15 Nick Clifton <nickc@redhat.com>
- * i386-opc.h (ShortForm): Redefined.
- (Jump): Likewise.
- (JumpDword): Likewise.
- (JumpByte): Likewise.
- (JumpInterSegment): Likewise.
- (FloatMF): Likewise.
- (FloatR): Likewise.
- (FloatD): Likewise.
- (Size16): Likewise.
- (Size32): Likewise.
- (Size64): Likewise.
- (IgnoreSize): Likewise.
- (DefaultSize): Likewise.
- (No_bSuf): Likewise.
- (No_wSuf): Likewise.
- (No_lSuf): Likewise.
- (No_sSuf): Likewise.
- (No_qSuf): Likewise.
- (No_xSuf): Likewise.
- (FWait): Likewise.
- (IsString): Likewise.
- (regKludge): Likewise.
- (IsPrefix): Likewise.
- (ImmExt): Likewise.
- (NoRex64): Likewise.
- (Rex64): Likewise.
- (Ugh): Likewise.
+ PR 10186
+ * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
+ instruction.
-2007-05-07 H.J. Lu <hongjiu.lu@intel.com>
+ PR 10173
+ * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
- * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
- for some SSE4 instructions.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
+2009-06-15 Nick Clifton <nickc@redhat.com>
-2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
+ PR 10263
+ * arm-dis.c (print_insn): Ignore is_data if the user has requested
+ the disassembly of data as well as instructions.
- * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
+2009-06-11 Doug Evans <dje@sebabeach.org>
- * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
- type for crc32.
+ * cgen.sh: Handle multiple simultaneous runs for parallel makes.
-2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
+2009-06-11 Anthony Green <green@moxielogic.com>
- * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
- check data size prefix in 16bit mode.
+ * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
+ (moxie_form3_opc_info): Add branch instructions.
+ * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
+ encoded instructions.
- * i386-opc.c (i386_optab): Default crc32 to non-8bit and
- support Intel mode.
+2009-06-06 Anthony Green <green@moxielogic.com>
-2007-04-30 Mark Salter <msalter@redhat.com>
+ * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
+ * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
- * frv-desc.c: Regenerate.
- * frv-desc.h: Regenerate.
+2009-06-04 Alan Modra <amodra@bigpond.net.au>
-2007-04-30 Alan Modra <amodra@bigpond.net.au>
+ * dep-in.sed: Don't use \n in replacement part of s command.
+ * Makefile.am (DEP1): LC_ALL for uniq.
+ * Makefile.in: Regenerate.
- PR 4436
- * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
+2009-06-02 Nick Clifton <nickc@redhat.com>
-2007-04-27 H.J. Lu <hongjiu.lu@intel.com>
+ * po/nl.po: Updated Dutch translation.
- * i386-dis.c (modrm): Put reg before rm.
+2009-06-02 Tristan Gingold <gingold@adacore.com>
-2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
+ * ia64-gen.c (parse_resource_users, print_dependency_table,
+ add_dis_table_ent, finish_distable, insert_bit_table_ent,
+ add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
+ get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
+ insert_completer_entry, print_completer_entry, print_completer_table,
+ opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
- PR binutils/4430
- * i386-dis.c (print_displacement): New.
- (OP_E): Call print_displacement instead of print_operand_value
- to output displacement when either base or index exist. Print
- the explicit zero displacement in 16bit mode.
+2009-05-28 DJ Delorie <dj@redhat.com>
-2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
- PR binutils/4429
- * i386-dis.c (print_insn): Also swap the order of op_riprel
- when swapping op_index. Break when the RIP relative address
- is printed.
- (OP_E): Properly handle RIP relative addressing and print the
- explicit zero displacement for Intel mode.
+2009-05-26 DJ Delorie <dj@redhat.com>
-2007-04-27 Alan Modra <amodra@bigpond.net.au>
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * ns32k-dis.c: Include sysdep.h first.
+2009-05-26 Nick Clifton <nickc@redhat.com>
-2007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
+ * po/id.po: Updated Indonesian translation.
+ * po/opcodes.pot: Updated template file.
- * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
- opcode.
- * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
+2009-05-26 Alan Modra <amodra@bigpond.net.au>
-2007-04-24 Nick Clifton <nickc@redhat.com>
+ * dep-in.sed: Don't modify .o to .lo here. Output one filename
+ per line with all lines having continuation backslash. Prefix
+ first line with "A", following lines with "B".
+ * Makefile.am (DEP): Don't use dep.sed here.
+ (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
+ dep.sed here on dependencies, sort and uniq.
+ * Makefile.in: Regenerate.
- * arm-dis.c (print_insn): Initialise type.
+2009-05-25 Tristan Gingold <gingold@adacore.com>
-2007-04-24 Alan Modra <amodra@bigpond.net.au>
+ * makefile.vms (OPT): New variable.
+ (CFLAGS): Update compilation flags.
- * cgen-types.h: Include bfd_stdint.h, not stdint.h.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
+2009-05-22 DJ Delorie <dj@redhat.com>
-2007-04-23 Nathan Sidwell <nathan@codesourcery.com>
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
- * m68k-opc.c: Mark mcfisa_c instructions.
+2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
-2007-04-21 Richard Earnshaw <rearnsha@arm.com>
+ * i386-opc.h (Cpusse5): Delete.
+ (i386_cpu_flags): Delete.
+ * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
+ * i386-opc.tbl: Remove SSE5 instructions.
+ * i386-tbl.h: Regenerate.
+ * i386-init.h: Regenerate.
+ * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
+ (print_drex_arg): Delete.
+ (OP_DREX4): Delete.
+ (OP_DREX3): Delete.
+ (OP_DREX_ICMP): Delete.
+ (OP_DREX_FCMP): Delete.
+ (DREX_*): Delete.
+ (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
- * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
- (thumb_opcodes): Add missing white space in adr.
- (arm_decode_shift): New parameter, print_shift. Only decode the
- shift parameter if set. Adjust callers.
- (print_insn_arm): Support for operand type q with no shift decode.
+2009-05-22 Alan Modra <amodra@bigpond.net.au>
-2007-04-21 Alan Modra <amodra@bigpond.net.au>
+ * Makefile.am: Run "make dep-am".
+ * Makefile.in: Regenerate.
+ * po/POTFILES.in: Regenerate.
- * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
- Move contents to..
- (i386_regtab): ..here.
- * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
+2009-05-19 DJ Delorie <dj@redhat.com>
- * ppc-opc.c (powerpc_operands): Delete duplicate entries.
- (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
- (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
- (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
+ * mep-asm.c: Regenerate.
+ * mep-opc.c: Regenerate.
-2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
+2009-04-30 DJ Delorie <dj@redhat.com>
- * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
- rambar1.
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
-2007-04-20 Alan Modra <amodra@bigpond.net.au>
+2009-04-17 DJ Delorie <dj@redhat.com
- * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
- change.
- * ppc-opc.c (powerpc_operands): Replace bit count with bit mask
- in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
- references to following deleted functions.
- (insert_bd, extract_bd, insert_dq, extract_dq): Delete.
- (insert_ds, extract_ds, insert_de, extract_de): Delete.
- (insert_des, extract_des, insert_li, extract_li): Delete.
- (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
- (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
- (num_powerpc_operands): New constant.
- (XSPRG_MASK): Remove entire SPRG field.
- (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
+ * mep-desc.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
-2007-04-20 Alan Modra <amodra@bigpond.net.au>
+2009-04-15 Anthony Green <green@moxielogic.com>
- * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
- (Z2_MASK): Define.
- (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
+ * moxie-opc.c, moxie-dis.c: Created.
+ * Makefile.am: Build the moxie source files.
+ * configure.in: Add moxie support.
+ * Makefile.in, configure: Rebuilt.
+ * disassemble.c (disassembler): Add moxie support.
+ (ARCH_moxie): Define.
-2007-04-20 Richard Earnshaw <rearnsha@arm.com>
+2009-04-15 Jan Beulich <jbeulich@novell.com>
- * arm-dis.c (print_insn): Only look for a mapping symbol in the section
- being disassembled.
+ * i386-opc.tbl (protb, protw, protd, protq): Set opcode
+ extension to None.
+ (pshab, pshaw, pshad, pshaq): Likewise.
+ * i386-tbl.h: Re-generate.
-2007-04-19 Alan Modra <amodra@bigpond.net.au>
+2009-04-08 DJ Delorie <dj@redhat.com
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
- * po/POTFILES.in: Regenerate.
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
-2007-04-19 Alan Modra <amodra@bigpond.net.au>
+2009-04-07 Peter Bergner <bergner@vnet.ibm.com>
- * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
- db10cyc, db12cyc, db16cyc.
+ * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
+ "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
+ Reorder entries so the extended mnemonics are listed before tlbilx.
-2007-04-19 Nathan Froyd <froydnj@codesourcery.com>
+2009-04-02 Peter Bergner <bergner@vnet.ibm.com>
- * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
+ * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
+ due to -many/-Many.
+ (print_insn_powerpc): Make sure we only deprecate instructions using
+ the original dialect and not a modified dialect due to -Many handling.
+ Move the handling of the condition register and default operands to
+ the end of the if/else if/else chain.
+ * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
+ instructions from newer processors are listed before older ones.
+ <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
+ that have instructions with conflicting opcodes.
-2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+2009-04-01 Peter Bergner <bergner@vnet.ibm.com>
- * i386-dis.c (CRC32_Fixup): New.
- (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
- PREGRP91): New.
- (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
- (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
- PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
- (three_byte_table): Likewise.
+ * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
+ E500MC entries.
- * i386-opc.c (i386_optab): Add SSE4.2 opcodes.
+2009-04-01 Christophe Lyon <christophe.lyon@st.com>
- * i386-opc.h (CpuSSE4_2): New.
- (CpuSSE4): Likewise.
- (CpuUnknownFlags): Add CpuSSE4_2.
+ * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
-2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
+2009-03-30 Joseph Myers <joseph@codesourcery.com>
- * i386-dis.c (XMM_Fixup): New.
- (Edqb): New.
- (Edqd): New.
- (XMM0): New.
- (dqb_mode): New.
- (dqd_mode): New.
- (PREGRP39 ... PREGRP85): New.
- (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
- (threebyte_0x3a_uses_DATA_prefix): Likewise.
- (prefix_user_table): Add PREGRP39 ... PREGRP85.
- (three_byte_table): Likewise.
- (putop): Handle 'K'.
- (intel_operand_size): Handle dqb_mode, dqd_mode):
- (OP_E): Likewise.
- (OP_G): Likewise.
+ * arm-dis.c (print_insn): Also check section matches in backwards
+ search for mapping symbol.
- * i386-opc.c (i386_optab): Add SSE4.1 opcodes.
+2009-03-26 H.J. Lu <hongjiu.lu@intel.com>
- * i386-opc.h (CpuSSE4_1): New.
- (CpuUnknownFlags): Add CpuSSE4_1.
- (regKludge): Update comment.
+ * i386-dis.c (get_valid_dis386): Abort on unhandled table.
-2007-04-18 Matthias Klose <doko@ubuntu.com>
+2009-03-18 Alan Modra <amodra@bigpond.net.au>
- * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
+ * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
+ * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
+ * openrisc-opc.c: Regenerate.
-2007-04-14 Steve Ellcey <sje@cup.hp.com>
+2009-03-10 Nick Clifton <nickc@redhat.com>
- * Makefile.am: Add ACLOCAL_AMFLAGS.
- * Makefile.in: Regenerate.
+ * po/id.po: Updated Indonesian translation.
-2007-04-13 H.J. Lu <hongjiu.lu@intel.com>
+2009-03-10 Alan Modra <amodra@bigpond.net.au>
- * i386-dis.c: Remove trailing white spaces.
- * i386-opc.c: Likewise.
- * i386-opc.h: Likewise.
+ * ppc-dis.c: Include "opintl.h".
+ (struct ppc_mopt, ppc_opts): New.
+ (ppc_parse_cpu): New function.
+ (powerpc_init_dialect): Use it.
+ (print_ppc_disassembler_options): Dump options from ppc_opts.
+ Internationalize message.
-2007-04-11 H.J. Lu <hongjiu.lu@intel.com>
+2009-03-06 Nick Clifton <nickc@redhat.com>
- PR binutils/4333
- * i386-dis.c (GRP1a): New.
- (GRP1b ... GRPPADLCK2): Update index.
- (dis386): Use GRP1a for entry 0x8f.
- (mod, rm, reg): Removed. Replaced by ...
- (modrm): This.
- (grps): Add GRP1a.
+ * po/es.po: Updated Spanish translation.
-2007-04-09 Kazu Hirata <kazu@codesourcery.com>
+2009-03-04 Alan Modra <amodra@bigpond.net.au>
- * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
- info->print_address_func if longjmp is called.
+ PR 6768
+ * configure.in: Test for ld --as-needed support. Link shared
+ libopcodes against libm.
+ * configure: Regenerate.
-2007-03-29 DJ Delorie <dj@redhat.com>
+2009-03-03 Peter Bergner <bergner@vnet.ibm.com>
- * m32c-desc.c: Regenerate.
- * m32c-dis.c: Regenerate.
- * m32c-opc.c: Regenerate.
+ * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
+ instructions from newer processors are listed before older ones.
-2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
+2009-03-03 Alan Modra <amodra@bigpond.net.au>
- * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
- movq. Remove InvMem from sldt, smsw and str.
+ * Makefile.am: Run "make dep-am".
+ (HFILES): Move lm32-desc.h and lm32-opc.h from..
+ (CFILES): ..here.
+ * Makefile.in: Regenerate.
- * i386-opc.h (InvMem): Renamed to ...
- (RegMem): Update comments.
- (AnyMem): Remove InvMem.
+2009-03-02 Qinwei <qinwei@sunnorth.com.cn>
-2007-03-27 Paul Brook <paul@codesourcery.com>
+ * score7-dis.c: New file.
+ * Makefile.am: Add dependencies for score7-dis.c.
+ * Makefile.in: Regenerate.
+ * configure.in: Add score7-dis to score files.
+ * configure: Regenerate.
+ * score-dis.c: Add support for score7 architecture.
+ * score-opc.h: Likewise.
- * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
+2009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure: Regenerate.
-2007-03-24 Paul Brook <paul@codesourcery.com>
+2009-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
+
+2009-02-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
+ the power7 and the isel instructions.
+ * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
+ (insert_dm, extract_dm): Likewise.
+ (XB6): Update comment to include XX2 form.
+ (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
+ XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
+ (RemoveXX3DM): Delete.
+ (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
+ "mftgpr">: Deprecate for POWER7.
+ <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
+ "frsqrte.">: Deprecate the three operand form and enable the two
+ operand form for POWER7 and later.
+ <"wait">: Extend to accept optional parameter. Enable for POWER7.
+ <"waitsrv", "waitimpl">: Add extended opcodes.
+ <"ldbrx", "stdbrx">: Enable for POWER7.
+ <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
+ <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
+ "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
+ "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
+ "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
+ "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
+ "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
+ "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
+ <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
+ "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
+ "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
+ "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
+ "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
+ "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
+ "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
+ "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
+ "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
+ "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
+ "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
+ "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
+ "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
+ "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
+ "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
+ "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
+ "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
+ "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
+ "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
+ "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
+ "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
+ "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
+ "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
+ "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
+ "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
+ "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
+ "xxspltw", "xxswapd">: Add VSX opcodes.
+
+2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
+ (operand_types): Remove Vex_Imm4.
+
+ * i386-opc.h (Vex_Imm4): Removed.
+ (OTMax): Updated.
+ (i386_operand_type): Remove vex_imm4.
+
+ * i386-opc.tbl: Remove Vex_Imm4 comments.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
- (print_insn_coprocessor): Handle %<bitfield>x.
+2009-02-23 Richard Earnshaw <rearnsha@arm.com>
-2007-03-24 Paul Brook <paul@codesourcery.com>
- Mark Shinwell <shinwell@codesourcery.com>
+ * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
+ vq{r}shr{u}n.s64 insnstructions.
- * arm-dis.c (arm_opcodes): Print SRS base register.
+2009-02-19 Peter Bergner <bergner@vnet.ibm.com>
-2007-03-23 H.J. Lu <hongjiu.lu@intel.com>
+ * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
+ operand to be a float point register (FRT/FRS).
- * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
+2009-02-18 Adam Nemet <anemet@caviumnetworks.com>
- * i386-opc.c (i386_optab): Add rex.wrxb.
+ * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
+ dmfc2 and dmtc2 before the architecture-level variants.
-2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+2009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
- * i386-dis.c (REX_MODE64): Remove definition.
- (REX_EXTX): Likewise.
- (REX_EXTY): Likewise.
- (REX_EXTZ): Likewise.
- (USED_REX): Use REX_OPCODE instead of 0x40.
- Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
- REX_R, REX_X and REX_B respectively.
+ * fr30-opc.c: Regenerate.
+ * frv-opc.c: Regenerate.
+ * ip2k-opc.c: Regenerate.
+ * iq2000-opc.c: Regenerate.
+ * lm32-opc.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mt-opc.c: Regenerate.
+ * xc16x-opc.c: Regenerate.
+ * xstormy16-opc.c: Regenerate.
+ * tic54x-dis.c (print_instruction): Avoid compiler warning on
+ sprintf call.
-2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
+2009-02-12 Nathan Sidwell <nathan@codesourcery.com>
- PR binutils/4218
- * i386-dis.c (PREGRP38): New.
- (dis386): Use PREGRP38 for 0x90.
- (prefix_user_table): Add PREGRP38.
- (print_insn): Set uses_REPZ_prefix to 1 for pause.
- (NOP_Fixup1): Properly handle REX bits.
- (NOP_Fixup2): Likewise.
+ * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
- * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
- Allow register with nop.
+2009-02-05 Peter Bergner <bergner@vnet.ibm.com>
-2007-03-20 DJ Delorie <dj@redhat.com>
+ * ppc-opc.c: Update copyright year.
+ (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
+ ordering for POWER4 and later and use the correct Server ordering.
- * m32c-asm.c: Regenerate.
- * m32c-desc.c: Regenerate.
- * m32c-desc.h: Regenerate.
- * m32c-dis.h: Regenerate.
- * m32c-ibld.c: Regenerate.
- * m32c-opc.c: Regenerate.
- * m32c-opc.h: Regenerate.
+2009-02-04 H.J. Lu <hongjiu.lu@intel.com>
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
+ AVX Programming Reference (January, 2009)
+ * i386-dis.c (PREFIX_VEX_3A44): New.
+ (VEX_LEN_3A44_P_2): Likewise.
+ (PREFIX_VEX_3A48): Updated.
+ (VEX_LEN_3A4C_P_2): Likewise.
+ (prefix_table): Add PREFIX_VEX_3A44.
+ (vex_table): Likewise.
+ (vex_len_table): Add VEX_LEN_3A44_P_2.
- * i386-opc.c: Include "libiberty.h".
- (i386_regtab): Remove the last entry.
- (i386_regtab_size): New.
- (i386_float_regtab_size): Likewise.
+ * i386-opc.tbl: Add PCLMUL + AVX instructions.
+ * i386-tbl.h: Regenerated.
- * i386-opc.h (i386_regtab_size): New.
- (i386_float_regtab_size): Likewise.
+2009-02-03 Sandip Matte <sandip@rmicorp.com>
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
+ * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
+ (mips_arch_choices): Add XLR entry.
+ * mips-opc.c (XLR): Define.
+ (mips_builtin_opcodes): Add XLR instructions.
- * Makefile.am (CFILES): Add i386-opc.c.
- (ALL_MACHINES): Add i386-opc.lo.
- Run "make dep-am".
- * Makefile.in: Regenerated.
+2009-02-03 Carlos O'Donell <carlos@codesourcery.com>
- * configure.in: Add i386-opc.lo for bfd_i386_arch.
- * configure: Regenerated.
+ * Makefile.am: Add install-pdf target.
+ * po/Make-in: Add install-pdf target.
+ * Makefile.in: Regenerate.
- * i386-dis.c: Include "opcode/i386.h".
- (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
- (FWAIT_OPCODE): Remove definition.
- (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
- (MAX_OPERANDS): Remove definition.
+2009-02-02 DJ Delorie <dj@redhat.com>
- * i386-opc.c: New file.
- * i386-opc.h: Likewise.
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
-2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-29 Mark Mitchell <mark@codesourcery.com>
- * Makefile.in: Regenerated.
+ * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
+ qsub, and qdsub.
-2007-03-09 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-28 Chao-ying Fu <fu@mips.com>
- * i386-dis.c (OP_Rd): Renamed to ...
- (OP_R): This.
- (Rd): Updated.
- (Rm): Likewise.
+ * mips-opc.c (suxc1): Add the flag of FP_D.
-200
7-03-08 Alan Modra <amodra@bigpond.net.au>
+200
9-01-20 Alan Modra <amodra@bigpond.net.au>
- * fr30-asm.c: Regenerate.
- * frv-asm.c: Regenerate.
- * ip2k-asm.c: Regenerate.
- * iq2000-asm.c: Regenerate.
- * m32c-asm.c: Regenerate.
- * m32r-asm.c: Regenerate.
- * m32r-dis.c: Regenerate.
- * mt-asm.c: Regenerate.
- * mt-ibld.c: Regenerate.
- * mt-opc.c: Regenerate.
- * openrisc-asm.c: Regenerate.
- * xc16x-asm.c: Regenerate.
- * xstormy16-asm.c: Regenerate.
+ * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
+ * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
+ * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
+ * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
+ * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
+ * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
+ * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
+ * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
- * Makefile.am: Run "make dep-am".
- * Makefile.in: Regenerate.
+2009-01-16 Alan Modra <amodra@bigpond.net.au>
+
+ * configure.in (commonbfdlib): Delete.
+ (SHARED_LIBADD): Add pic libiberty if such is available.
+ * configure: Regenerate.
* po/POTFILES.in: Regenerate.
-2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
- INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
- instruction formats added.
- (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
- MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
- masks added.
- * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
- instructions added.
- * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
- (main): z9-ec cpu type option added.
- * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
-
-2007-02-22 DJ Delorie <dj@redhat.com>
-
- * s390-opc.c (INSTR_SS_L2RDRD): New.
- (MASK_SS_L2RDRD): New.
- * s390-opc.txt (pka): Use it.
-
-2007-02-20 Thiemo Seufer <ths@mips.com>
- Chao-Ying Fu <fu@mips.com>
-
- * mips-dis.c (mips_arch_choices): Add DSP R2 support.
- (print_insn_args): Add support for balign instruction.
- * mips-opc.c (D33): New shortcut for DSP R2 instructions.
- (mips_builtin_opcodes): Add DSP R2 instructions.
-
-2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
- (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
- * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
- cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
-
-2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>
-
- * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
- * s390-opc.c (s390_operands): Add RO_28 as optional gpr.
- (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
- and sfpc.
-
-2007-02-16 Nick Clifton <nickc@redhat.com>
-
- PR binutils/4045
- * avr-dis.c (comment_start): New variable, contains the prefix to
- use when printing addresses in comments.
- (print_insn_avr): Set comment_start to an empty space if there is
- no symbol table available as the generic address printing code
- will prefix the numeric value of the address with 0x.
-
-2007-02-13 H.J. Lu <hongjiu.lu@intel.com>
-
- * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
- in struct dis386.
-
-2007-02-05 Dave Brolley <brolley@redhat.com>
- Richard Sandiford <rsandifo@redhat.com>
- DJ Delorie <dj@redhat.com>
- Graydon Hoare <graydon@redhat.com>
- Frank Ch. Eigler <fche@redhat.com>
- Ben Elliston <bje@redhat.com>
-
- * Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
- (CFILES): Add mep-*.c
- (ALL_MACHINES): Add mep-*.lo.
- (CLEANFILES): Add stamp-mep.
- (CGEN_CPUS): Add mep.
- (MEP_DEPS): New variable.
- (mep-*): New targets.
- * configure.in: Handle bfd_mep_arch.
- * disassemble.c (ARCH_mep): New macro.
- (disassembler): Handle bfd_arch_mep.
- (disassemble_init_for_target): Likewise.
- * mep-*: New files for Toshiba Media Processor (MeP).
- * Makefile.in: Regenerated.
- * configure: Regenerated.
+2009-01-14 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
+ * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
+ operand form and enable the four operand form for POWER6 and later.
+ <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
+ three operand form for POWER6 and later.
-2007-02-05 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-14 Mike Frysinger <vapier@gentoo.org>
- * i386-dis.c (OP_J): Undo the last change. Properly handle 64K
- wrap around within the same segment in 16bit mode.
+ * bfin-dis.c (OUTS): Use "%s" as format string.
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-13 H.J. Lu <hongjiu.lu@intel.com>
- * i386-dis.c (OP_J): Mask to 16bit only if there is a data16
- prefix.
+ * i386-gen.c (cpu_flag_init): Remove a white space.
+ (operand_type_init): Likewise.
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
+ * i386-tbl.h: Regenerated.
- * avr-dis.c (avr_operand): Correct PR number in comment.
+2009-01-12 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
+ subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
+ subS, xorS and cmpS.
+
+2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
+ CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
+ CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
+ (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
+ and CpuSYSCALL.
+ (lineno): Removed.
+ (set_bitfield): Take an argument, lineno. Don't report lineno
+ on error if it is -1.
+ (process_i386_cpu_flag): Take an argument, lineno.
+ (process_i386_opcode_modifier): Likewise.
+ (process_i386_operand_type): Likewise.
+ (output_i386_opcode): Likewise.
+ (opcode_hash_entry): Add lineno.
+ (process_i386_opcodes): Updated.
+ (process_i386_registers): Likewise.
+ (process_i386_initializers): Likewise.
+
+ * i386-opc.h (CpuP4): Removed.
+ (CpuK6): Likewise.
+ (CpuK8): Likewise.
+ (CpuClflush): New.
+ (CpuSYSCALL): Likewise.
+ (CpuMMX): Updated.
+ (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
+ cpuclflush and cpusyscall.
+
+ * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
+ syscall and sysret.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
-2007-02-02 H.J. Lu <hongjiu.lu@intel.com>
+2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
- * disassemble.c (disassembler_usage): Call
- print_i386_disassembler_options for i386 disassembler.
+ * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
+ and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
+ (cpu_flags): Add CpuRdtscp.
+ (set_bitfield): Remove CpuSledgehammer check.
- * i386-dis.c (print_i386_disassembler_options): New.
- (print_insn): Support the new addr64 option.
+ * i386-opc.h (CpuRdtscp): New.
+ (CpuLM): Updated.
+ (i386_cpu_flags): Add cpurdtscp.
-2007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
+ * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * ppc-dis.c (powerpc_dialect): Handle ppc440.
- * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
- be used.
+2009-01-09 Peter Bergner <bergner@vnet.ibm.com>
-2007-02-02 Alan Modra <amodra@bigpond.net.au>
+ * ppc-opc.c (PPCNONE): Define.
+ (NOPOWER4): Delete.
+ (powerpc_opcodes): Initialize the new "deprecated" field.
- * ppc-opc.c (insert_bdm): -Many comment.
- (valid_bo): Add "extract" param. Accept both powerpc and power4
- BO fields when disassembling with -Many.
- (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
+2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
-2007-01-08 Kazu Hirata <kazu@codesourcery.com>
+ AVX Programming Reference (December, 2008)
+ * i386-dis.c (VEX_LEN_2B_M_0): Removed.
+ (VEX_LEN_E7_P_2_M_0): Likewise.
+ (VEX_LEN_2C_P_1): Updated.
+ (VEX_LEN_E8_P_2): Likewise.
+ (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
+ (mod_table): Likewise.
- * m68k-opc.c (m68k_opcodes): Replace cpu32 with
- cpu32 | fido_a except on tbl instructions.
+ * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
+ * i386-tbl.h: Regenerated.
-2007-01-04 Paul Brook <paul@codesourcery.com>
+2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
- * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
+ * i386-gen.c (process_copyright): Update for 2009.
-2007-01-04 Andreas Schwab <schwab@suse.de>
+ * i386-init.h: Regenerated.
+ * i386-tbl.h: Likewise.
- * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
+2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ AVX Programming Reference (December, 2008)
+ * i386-dis.c (OP_VEX_FMA): Removed.
+ (OP_EX_VexW): Likewise.
+ (OP_EX_VexImmW): Likewise.
+ (OP_XMM_VexW): Likewise.
+ (VEXI4_Fixup): Likewise.
+ (VPERMIL2_Fixup): Likewise.
+ (VexI4): Likewise.
+ (VexFMA): Likewise.
+ (Vex128FMA): Likewise.
+ (EXVexW): Likewise.
+ (EXdVexW): Likewise.
+ (EXqVexW): Likewise.
+ (EXVexImmW): Likewise.
+ (XMVexW): Likewise.
+ (VPERMIL2): Likewise.
+ (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
+ (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
+ (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
+ (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
+ (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
+ (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
+ (get_vex_imm8): Likewise.
+ (OP_EX_VexReg): Likewise.
+ vpermil2_op): Likewise.
+ (EXVexWdq): New.
+ (vex_w_dq_mode): Likewise.
+ (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
+ (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
+ (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
+ (es_reg): Updated.
+ (PREFIX_VEX_38DB): Likewise.
+ (PREFIX_VEX_3A4A): Likewise.
+ (PREFIX_VEX_3A60): Likewise.
+ (PREFIX_VEX_3ADF): Likewise.
+ (VEX_LEN_3ADF_P_2): Likewise.
+ (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
+ PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
+ PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
+ PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
+ PREFIX_VEX_3896...PREFIX_VEX_389F,
+ PREFIX_VEX_38A6...PREFIX_VEX_38AF and
+ PREFIX_VEX_38B6...PREFIX_VEX_38BF.
+ (vex_table): Likewise.
+ (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
+ and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
+ (putop): Support "%XW".
+ (intel_operand_size): Handle vex_w_dq_mode.
+
+ * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
+
+ * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
+ instructions. Add new FMA instructions.
+ * i386-tbl.h: Regenerated.
-2007-01-04 Julian Brown <julian@codesourcery.com>
+2009-01-02 Matthias Klose <doko@ubuntu.com>
- * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
- vqrshl instructions.
+ * or32-opc.c (or32_print_register, or32_print_immediate,
+ disassemble_insn): Don't rely on undefined sprintf behaviour.
-For older changes see ChangeLog-2006
+For older changes see ChangeLog-2008
\f
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projects / msp430-binutils.git / blobdiff