--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Header definitions for the USCI peripheral in newer msp430 processors.
+ * A USCI peripheral provides two communications devices, denoted A and B.
+ * Many parts have 2 USCI peripherals, denoted by 0 and 1. Therefore, a
+ * part with 2 USCI peripherals has 4 communications devices:
+ *
+ * USCI_A0 and USCI_B0, from the first USCI peripheral; and
+ * USCI_A1 and USCI_B1, from the second USCI peripheral.
+ *
+ * A devices offer UART, LIN, IrDA and SPI modes of operation. B parts are
+ * limited to SPI and I2C modes.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+#ifndef MSP430USCI_h
+#define MSP430USCI_h
+
+#define MSP430_HPLUSCIA0_RESOURCE "Msp430UsciA0.Resource"
+#define MSP430_HPLUSCIB0_RESOURCE "Msp430UsciB0.Resource"
+#define MSP430_HPLUSCIA1_RESOURCE "Msp430UsciA0.Resource"
+#define MSP430_HPLUSCIB1_RESOURCE "Msp430UsciB0.Resource"
+
+/* Values of UCAxCTL0 only looking at the UCMODEx bits */
+typedef enum
+{
+ USCI_UART = 0,
+ USCI_SPI,
+ USCI_I2C
+} msp430_usci_mode_t;
+
+/* FIXME
+ * There are different meanings to these fields based upon the mode
+ * (uart/spi/etc) and the device (USCI_x0 or USCI_x1).
+ */
+
+/* Packed bitfields are lsb first */
+
+typedef struct {
+ unsigned int ucsync: 1; /* Synchronous mode enable. 0=async, 1=sync */
+ unsigned int ucmodex: 2; /* USCI mode. 00=uart, 01=idle-line, 10=addr-bit, 11=autobaud */
+ unsigned int ucspb: 1; /* Stop bit select. 0=one bit, 1=two bits */
+ unsigned int uc7bit: 1; /* Character length. 0=8 bits, 1=7 bits */
+ unsigned int ucmsb: 1; /* MSB first select. 0=LSB(it) first, 1=MSB(it) first */
+ unsigned int ucpar: 1; /* Parity select. 0=odd parity, 1=even parity */
+ unsigned int ucpen: 1; /* Parity enable. 0=parity disabled, 1=parity enabled */
+} __attribute__ ((packed)) msp430_ucaxctl0_t ;
+
+typedef struct {
+ unsigned int ucswrst: 1; // Software resent enable. 0=disabled (operational), 1=enabled (reset) */
+ unsigned int uctxbrk:1; // Next frame is a break or break/sync: 0=no, 1=yes */
+ unsigned int uctxaddr:1; // Next transmit frame is an address. 0=no, 1=yes */
+ unsigned int ucdorm: 1; // Dormant; USCI in sleep. 0=!dormant, 1=dormant */
+ unsigned int ucbrkie: 1; // Receive break sets UCAxRXIFG interrupt. 0=no, 1=yes */
+ unsigned int ucrxeie: 1; // Receive erroneous char sets UCAxRXIFG interrupt. 0=no, 1=yes */
+ unsigned int ucucsselx: 2; // USCI clock source (BRCLK). 00=UCLK, 01=ACLK, 10=SMCLK, 11=SMCLK */
+} __attribute__ ((packed)) msp430_ucaxctl1_t;
+
+typedef struct {
+ unsigned int ucbusy:1; /* USCI busy; tx or rx in process. 0=no, 1=yes */
+ unsigned int ucidleaddr:1; /* In idle-line mode: Idle line detected. 0=no, 1=yes */
+ /* In addr-bit mode: Last char rx is addr. 0=no, 1=yes */
+ unsigned int ucrxerr:1; /* Receive error flag. 0=none, 1=(ucfe|ucpe|ucoe) */
+ unsigned int ucbrk:1; /* Break detection flag. 0=no, 1=yes */
+ unsigned int ucpe:1; /* Parity error flag. 0=no or ucaxctl0.ucpen=0, 1=yes */
+ unsigned int ucoe:1; /* Overrun error flag. 0=no, 1=yes */
+ unsigned int ucfe:1; /* Framing error flag. 0=no, 1=yes */
+ unsigned int uclisten:1; /* Listen enable (loopback). 0=disabled, 1=enabled */
+} __attribute__ ((packed)) msp430_ucaxstat_t;
+
+typdef struct {
+ unsigned int uciren:1; /* IrDA decoder. 0=disabled, 1=enabled */
+ unsigned int unirtxclk:1; /* IrDA transmit pulse clock select. 0=BRCLK, 1=BRCLK16 if ucos16=1 else BRCLK */
+ unsigned ucirtxplx:6; /* Pulse length. t(pulse) = (ucirtxplx + 1)/(2 * f(irtxclk)) */
+} __attribute__ ((packed)) msp430_ucaxirtctl_t;
+
+typedef struct {
+ unsigned int ucirrxfe:1; /* IrDA recv filter. 0=disabled, 1=enabled */
+ unsigned int ucirrxpl:1; /* IrDA recv input ucaxrxd polarity. 0=high w/light pulse, 1=low */
+ unsigned int ucirrxflx:6; /* IrDA recv filter len. t(min) = (ucirrxflx + 4)/(2 * f(irtxclk)) */
+} __attribute__ ((packed)) msp430_ucaxirtctl_t;
+
+typdef struct {
+ unsigned int ucabden:1; /* Auto baud rate detect enable. 0=no, 1=yes (baud calc from break/sync) */
+ unsigned int reserved:1; /* Reserved */
+ unsigned int ucbtoe:1; /* Break time out error. 0=no, 1=yes: break len > 22 bit times */
+ unsigned int ucstoe:1; /* Synch field timeout error. 0=no, 1=yes: sync len > measurable time */
+ unsigned int ucdelimx:1; /* Break/synch delimiter length in bit times. 00=1, 01=2, 10=3, 11=4 */
+ unsigned int reserved2:2; /* Reserved */
+} __attribute__ ((packed)) msp430_ucaxabctl_t;
+
+/* FIXME: provide baud rate and configuration stuff */
+
+#endif
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