Commit interim usci work. Not even close to complete yet, but don't want to lose it.

[tinyos-2.x.git] / tos / chips / msp430 / usci / Msp430UsciA0C.nc

diff --git a/tos/chips/msp430/usci/Msp430UsciA0C.nc b/tos/chips/msp430/usci/Msp430UsciA0C.nc
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+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Defines the USCI_A0 peripheral.
+ * 
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+ 
+configuration Msp430UsciA0C {
+  provides {
+    interface HplMsp430UsciReg as Registers;
+    interface HplMsp430UsciIntA as Interrupts[uint8_t];
+    interface Resource as Resource[uint8_t];
+    interface ResourceRequested as ResourceRequested[uint8_t];
+    interface ArbiterInfo;
+  }
+  uses interface ResourceConfig as ResourceConfig[uint8_t];
+}
+implementation {
+  components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
+    UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
+    UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_)
+    as RegP;
+  Registers = RegP;
+
+  components new FcfsArbiterC(MSP430_USCIA0_RESOURCE) as ArbiterC;
+  Resource = ArbiterC;
+  ResourceRequested = ArbiterC;
+  ResourceConfigure = ArbiterC;
+  ArbiterInfo = ArbiterC;
+
+  components new Msp430UsciIntDispatchAP() as IntDispatchA0P;
+  Interrupts = IntDispatchA0P.IntAx;
+  IntDispatchA0P.ArbiterInfo -> ArbiterC;
+
+  components HplMsp430UsciInt0C as Int0C;
+  IntDispatchA0P.RawIntAx -> Int0C.IntA;
+}