-/* tab:4\r
- * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By\r
- * downloading, copying, installing or using the software you agree to\r
- * this license. If you do not agree to this license, do not download,\r
- * install, copy or use the software.\r
- *\r
- * Intel Open Source License \r
- *\r
- * Copyright (c) 2002 Intel Corporation \r
- * All rights reserved. \r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions are\r
- * met:\r
- * \r
- * Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * Neither the name of the Intel Corporation nor the names of its\r
- * contributors may be used to endorse or promote products derived from\r
- * this software without specific prior written permission.\r
- * \r
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A\r
- * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS\r
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\r
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR\r
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\r
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- * \r
- * \r
- */\r
-/*\r
- *\r
- * Authors: Philip Buonadonna\r
- *\r
- *\r
- */\r
-\r
-#ifndef _ARM_DEFS_H\r
-#define _ARM_DEFS_H\r
-\r
-#define ARM_CPSR_MODE_MASK (0x0000001F)\r
-#define ARM_CPSR_INT_MASK (0x000000C0)\r
-#define ARM_CPSR_COND_MASK (0xF8000000)\r
-\r
-#define ARM_CPSR_MODE_USR (0x10)\r
-#define ARM_CPSR_MODE_FIQ (0x11)\r
-#define ARM_CPSR_MODE_IRQ (0x12)\r
-#define ARM_CPSR_MODE_SVC (0x13)\r
-#define ARM_CPSR_MODE_ABT (0x17)\r
-#define ARM_CPSR_MODE_UND (0x1B)\r
-#define ARM_CPSR_MODE_SYS (0x1F)\r
-\r
-#define ARM_CPSR_BIT_N (1 << 31)\r
-#define ARM_CPSR_BIT_Z (1 << 30)\r
-#define ARM_CPSR_BIT_C (1 << 29)\r
-#define ARM_CPSR_BIT_V (1 << 28)\r
-#define ARM_CPSR_BIT_Q (1 << 27)\r
-\r
-#define ARM_CPSR_BIT_I (1 << 7)\r
-#define ARM_CPSR_BIT_F (1 << 6)\r
-#define ARM_CPRS_BIT_T (1 << 5)\r
-\r
-#endif /*_ARM_DEFS_H */\r
+/* tab:4
+ * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
+ * downloading, copying, installing or using the software you agree to
+ * this license. If you do not agree to this license, do not download,
+ * install, copy or use the software.
+ *
+ * Intel Open Source License
+ *
+ * Copyright (c) 2002 Intel Corporation
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * Neither the name of the Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ */
+/*
+ *
+ * Authors: Philip Buonadonna
+ *
+ *
+ */
+
+#ifndef _ARM_DEFS_H
+#define _ARM_DEFS_H
+
+#define ARM_CPSR_MODE_MASK (0x0000001F)
+#define ARM_CPSR_INT_MASK (0x000000C0)
+#define ARM_CPSR_COND_MASK (0xF8000000)
+
+#define ARM_CPSR_MODE_USR (0x10)
+#define ARM_CPSR_MODE_FIQ (0x11)
+#define ARM_CPSR_MODE_IRQ (0x12)
+#define ARM_CPSR_MODE_SVC (0x13)
+#define ARM_CPSR_MODE_ABT (0x17)
+#define ARM_CPSR_MODE_UND (0x1B)
+#define ARM_CPSR_MODE_SYS (0x1F)
+
+#define ARM_CPSR_BIT_N (1 << 31)
+#define ARM_CPSR_BIT_Z (1 << 30)
+#define ARM_CPSR_BIT_C (1 << 29)
+#define ARM_CPSR_BIT_V (1 << 28)
+#define ARM_CPSR_BIT_Q (1 << 27)
+
+#define ARM_CPSR_BIT_I (1 << 7)
+#define ARM_CPSR_BIT_F (1 << 6)
+#define ARM_CPRS_BIT_T (1 << 5)
+
+#endif /*_ARM_DEFS_H */
projects / tinyos-2.x.git / blobdiff