Interrupts.tx() signal is only relevant when UartStream.send() pending.

diff --git a/tos/chips/msp430/usci/Msp430UartP.nc b/tos/chips/msp430/usci/Msp430UartP.nc
index 72df1df0c1827f63ef14f7836a5927aaa43b3828..cdc08089793142d70ef6892dfe40ece057697dce 100644 (file)
--- a/tos/chips/msp430/usci/Msp430UartP.nc
+++ b/tos/chips/msp430/usci/Msp430UartP.nc
@@ -158,16 +158,18 @@ implementation {
     /* FIXME: this can cause an arbitrarily long ISR, if m_slen is large.
      * But depending on timing, we may always only write 1 byte.
      */
-    while (!call Registers.getIfgTx()); /* in case interleaved UB.send */
-    while (m_slen && call Registers.getIfgTx()) {
-      call Registers.setTxbuf(*m_sbuf);
-      if (--m_slen)
-       m_sbuf++;
-    }
-    if (m_slen == 0) {
-      call Registers.clrIeTx();
-      m_sobuf = 0;
-      signal UartStream.sendDone(m_sobuf, m_solen, SUCCESS);
+    if (m_sobuf) {
+      while (!call Registers.getIfgTx()); /* in case interleaved UB.send */
+      while (m_slen && call Registers.getIfgTx()) {
+       call Registers.setTxbuf(*m_sbuf);
+       if (--m_slen)
+         m_sbuf++;
+      }
+      if (m_slen == 0) {
+       call Registers.clrIeTx();
+       m_sobuf = 0;
+       signal UartStream.sendDone(m_sobuf, m_solen, SUCCESS);
+      }
     }
   }