]> oss.titaniummirror.com Git - tinyos-2.x.git/commitdiff
Propagate changes from msp430/clock/Msp430ClockP.nc to is sibling in
authorsmckown <smckown@4bc1554a-c7f2-4f65-a403-e0be01f0239c>
Tue, 9 Sep 2008 13:51:35 +0000 (13:51 +0000)
committerR. Steve McKown <rsmckown@gmail.com>
Tue, 1 Dec 2009 03:00:52 +0000 (20:00 -0700)
msp430/clock2.

tos/chips/msp430/clock2/Msp430ClockP.nc

index 6649b01da64b7bd7377cc7f1eeb390e162f7e592..c8681f345f76497d36dae9efd74a40edc66737b9 100644 (file)
@@ -56,6 +56,13 @@ implementation
   MSP430REG_NORACE(TBIV);
 #endif
 
+  #if defined(__MSP430_HAS_BC2__)      /* basic clock module+ */
+  #define FIRST_STEP 0x1000
+  #else                                        /* orig basic clock module */
+  #define RSEL3 0
+  #define FIRST_STEP 0x800
+  #endif
+
   enum
   {
     DCOX = DCO2 + DCO1 + DCO0,
@@ -185,7 +192,7 @@ implementation
     uint16_t calib;
     uint16_t step;
 
-    for (calib = 0, step = 0x1000; step != 0; step >>= 1) {
+    for (calib = 0, step = FIRST_STEP; step != 0; step >>= 1) {
       // if the step is not past the target, commit it
       if (test_calib_busywait_delta(calib | step) <= TARGET_DCO_DELTA )
         calib |= step;