Remove the NO_REN_ON_SPI define.

Per the TI datasheet, PxREN bits shouldn't be set at the same time as the
corresponding PxSEL (module function) bits as unintended current consumption
could be triggered.

diff --git a/tos/chips/msp430/usci/Msp430SpiP.nc b/tos/chips/msp430/usci/Msp430SpiP.nc
index dad8e824bd420bf37f8f2c511e83ae57d603714a..9f3fd177fabddc6079ed4374425502d34de5a476 100644 (file)
--- a/tos/chips/msp430/usci/Msp430SpiP.nc
+++ b/tos/chips/msp430/usci/Msp430SpiP.nc
@@ -32,8 +32,6 @@
  *
  * TODO: Implement error checking via UCxxSTAT
  *
- * NOTE: Define NO_REN_ON_SPI to disable PxREN bits when SPI is acquired.
- *
  * @author R. Steve McKown <rsmckown@gmail.com>
  */
  
@@ -63,9 +61,7 @@ implementation {
     PINS_SOMI,
     PINS_SIMO,
     PINS_CLK,
-#ifdef NO_REN_ON_SPI
     PINS_RENADDR,      /* This gets added to store the PxREN bit */
-#endif
   };
 
   uint8_t m_pins;
@@ -112,7 +108,6 @@ implementation {
 
       /* Configure pins for SPI, saving prior pin states */
       m_pins = 0;
-#ifdef NO_REN_ON_SPI
       /* - First save off and disable PxREN bits */
       if (is4pin() && call STE.isRen()) {
        m_pins |= (1 << (PINS_STE + PINS_RENADDR));
@@ -130,7 +125,6 @@ implementation {
        m_pins |= (1 << (PINS_CLK + PINS_RENADDR));
        call CLK.disableRen();
       }
-#endif
       /* - Then save off IOFunc state and enable ModuleFunc */
       if (is4pin() && call STE.isIOFunc()) {
        m_pins |= (1 << PINS_STE);
@@ -179,7 +173,6 @@ implementation {
       if (m_pins & (1 << PINS_CLK))
        call CLK.selectIOFunc();
       /* - Then restore PxREN bits */
-#ifdef NO_REN_ON_SPI
       if (is4pin() && (m_pins & (1 << (PINS_STE + PINS_RENADDR))))
        call STE.enableRen();
       if (m_pins & (1 << (PINS_SIMO + PINS_RENADDR)))
@@ -188,7 +181,6 @@ implementation {
        call SOMI.enableRen();
       if (m_pins & (1 << (PINS_CLK + PINS_RENADDR)))
        call CLK.enableRen();
-#endif
     }
   }