provides {
#if defined(__MSP430_HAS_USCIAB0__) || defined(__MSP430_HAS_USCI__)
interface HplMsp430UsciReg as RegA0;
- interface HplMsp430UsciIntA as IntA0;
+ interface HplMsp430UsciInt as IntA0;
interface HplMsp430UsciReg as RegB0;
- interface HplMsp430UsciIntB as IntB0;
+ interface HplMsp430UsciInt as IntB0;
#endif
#if defined(__MSP430_HAS_USCIAB1__)
interface HplMsp430UsciReg as RegA1;
- interface HplMsp430UsciIntA as IntA1;
+ interface HplMsp430UsciInt as IntA1;
interface HplMsp430UsciReg as RegB1;
- interface HplMsp430UsciIntB as IntB1;
+ interface HplMsp430UsciInt as IntB1;
#endif
}
}
implementation {
#if defined(__MSP430_HAS_USCI__)
- /* FIXME: some of these names may be wrong */
components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
- UCA0MCTL_, 0/*i2cie*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
- UCA0IRTCTL, UCA0IRRCTL_, 0/*i2coa*/, 0/*i2csa*/, IE2_, IFG2_) as RegA0P;
+ UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
+ UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_,
+ UCA0RXIFG, UCA0TXIFG) as RegA0P;
RegA0 = RegA0P.Reg;
- components new HplMsp430UsciRegP(UCB0CTL1_, UCB0BR0_, UCB0BR1_, 0/*mctl*/,
- UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_, 0/*abctl*/, 0/*irtctl*/, 0/*irrctl*/,
- UCB0I2COA, UCB0I2CSA, IE2_, IFG2_) as RegB0P;
+ components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
+ 0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
+ 0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
+ UCB0I2CSA_, IE2_, IFG2_, UCB0RXIFG, UCB0TXIFG) as RegB0P;
RegB0 = RegB0P.Reg;
- components new HplMsp430UsciIntP(USCIARX_VECTOR, USCITX_VECTOR, UCA0RXIFG,
- UCA0TXIFG, UCA0CTL0_, UCA0CTL1_, UCA0RXBUF_, UCB0CTL0_, UCB0CTL1_,
- UCB0RXBUF_, IFG2_) as Int0P;
+ components new HplMsp430UsciIntP(USCIRX_VECTOR, USCITX_VECTOR, UCA0RXIFG,
+ UCA0TXIFG, UCB0RXIFG, UCB0TXIFG, UCA0CTL0_, UCA0CTL1_, UCA0RXBUF_,
+ UCB0CTL0_, UCB0CTL1_, UCB0RXBUF_, IFG2_) as Int0P;
IntA0 = Int0P.IntA;
IntB0 = Int0P.IntB;
#elif defined(__MSP430_HAS_USCIAB0__)
components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
- UCA0MCTL_, 0/*i2cie*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
- UCA0IRTCTL, UCA0IRRCTL_, 0/*i2coa*/, 0/*i2csa*/, IE2_, IFG2_) as RegA0P;
+ UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
+ UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_,
+ UCA0RXIFG, UCA0TXIFG)
+ as RegA0P;
RegA0 = RegA0P.Reg;
- components new HplMsp430UsciRegP(UCB0CTL1_, UCB0BR0_, UCB0BR1_, 0/*mctl*/,
- UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_, 0/*abctl*/, 0/*irtctl*/, 0/*irrctl*/,
- UCB0I2COA, UCB0I2CSA, IE2_, IFG2_) as RegB0P;
+ components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
+ 0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
+ 0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
+ UCB0I2CSA_, IE2_, IFG2_, UCB0RXIFG, UCB0TXIFG) as RegB0P;
RegB0 = RegB0P.Reg;
components new HplMsp430UsciIntP(USCIAB0RX_VECTOR, USCIAB0TX_VECTOR,
- UCA0RXIFG, UCA0TXIFG, UCA0CTL0_, UCA0CTL1_, UCA0RXBUF_, UCB0CTL0_,
- UCB0CTL1_, UCB0RXBUF_, IFG2_,) as Int0P;
+ UCA0RXIFG, UCA0TXIFG, UCB0RXIFG, UCB0TXIFG, UCA0CTL0_, UCA0CTL1_,
+ UCA0RXBUF_, UCB0CTL0_, UCB0CTL1_, UCB0RXBUF_, IFG2_) as Int0P;
IntA0 = Int0P.IntA;
- IntB0 = Int0P.IntB; #endif
+ IntB0 = Int0P.IntB;
+#endif
#if defined(__MSP430_HAS_USCIAB1__)
components new HplMsp430UsciRegP(UCA1CTL0_, UCA1CTL1_, UCA1BR0_, UCA1BR1_,
- UCA1MCTL_, 0/*i2cie*/, UCA1STAT_, UCA1RXBUF_, UCA1TXBUF_, UCA1ABCTL_,
- UCA1IRTCTL, UCA1IRRCTL_, 0/*i2coa*/, 0/*i2csa*/, IE2_, IFG2_) as RegA1P;
+ UCA1MCTL_, 0/*UCA1I2CIE_*/, UCA1STAT_, UCA1RXBUF_, UCA1TXBUF_, UCA1ABCTL_,
+ UCA1IRTCTL_, UCA1IRRCTL_, 0/*UCA1I2COA_*/, 0/*UCA1I2CSA_*/, IE2_, IFG2_,
+ UCA1RXIFG, UCA1TXIFG) as RegA1P;
RegA1 = RegA1P.Reg;
- components new HplMsp430UsciRegP(UCB1CTL1_, UCB1BR0_, UCB1BR1_, 0/*mctl*/,
- UCB1STAT_, UCB1RXBUF_, UCB1TXBUF_, 0/*abctl*/, 0/*irtctl*/, 0/*irrctl*/,
- UCB1I2COA, UCB1I2CSA) as RegB1P;
+ components new HplMsp430UsciRegP(UCB1CTL0_, UCB1CTL1_, UCB1BR0_, UCB1BR1_,
+ 0/*UCB1MCTL_*/, UCB1I2CIE_, UCB1STAT_, UCB1RXBUF_, UCB1TXBUF_,
+ 0/*UCB1ABCTL_*/, 0/*UCB1IRTCTL_*/, 0/*UCB1IRRCTL_*/, UCB1I2COA_,
+ UCB1I2CSA_, IE2_, IFG2_, UCB1RXIFG, UCB1TXIFG) as RegB1P;
RegB1 = RegB1P.Reg;
components new HplMsp430UsciIntP(USCIAB1RX_VECTOR, USCIAB1TX_VECTOR,
- UCA1RXIFG, UCA1TXIFG, UCA1CTL0_, UCA1CTL1_, UCA1RXBUF_, UCB1CTL0_,
- UCB1CTL1_, UCB1RXBUF_, UC1IFG_) as Int1P;
+ UCA1RXIFG, UCA1TXIFG, UCB1RXIFG, UCB1TXIFG, UCA1CTL0_, UCA1CTL1_,
+ UCA1RXBUF_, UCB1CTL0_, UCB1CTL1_, UCB1RXBUF_, UC1IFG_) as Int1P;
IntA1 = Int1P.IntA;
IntB1 = Int1P.IntB;
#endif
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt interface for USCI peripherals. Although A and B devices have
+ * different interrupt sets since B only support I2C, we use a single set for
+ * both so that upper layers need not deal with the different sets. This is
+ * critical in the case of SPI communications, which is supported by both A
+ * and B devices.
+ *
+ * @author R. Steve McKown <rsmckown@gmail.com>
+ */
+
+#include "msp430usci.h"
+
+interface HplMsp430UsciInt {
+ /**
+ * Signals a break received in UART modes if UCBRKIE is enabled. The
+ * provider must reset the UCxIFG.UCxxRXIFG and UCxSTAT.UCBRK bits prior to
+ * signalling the event to the user.
+ */
+ async event void brk();
+
+ /**
+ * Signals a character received for any USCI mode. The provider must reset
+ * UCxIFG.UCxxRXIFG before signalling the event to the user.
+ *
+ * @params c The character received.
+ */
+ async event void rx(char c);
+
+ /**
+ * Signals that the device's transmit buffer is empty and can accept
+ * another character. Note that the USCI device may still be in the
+ * process of transmitting the last character when this event is signalled.
+ * The UCxxTXIFG bit will automatically reset when the interface user writes
+ * a value to the related UCxxTXBUF register after receipt of this event.
+ */
+ async event void tx();
+
+ /**
+ * I2C mode only. Indicates the device has lost arbitration. Valid only in
+ * multi-master contexts.
+ */
+ async event void i2cCal();
+
+ /**
+ * I2C mode only. Indicates the device was expecting an ACK and it was not
+ * received.
+ */
+ async event void i2cNak();
+
+ /**
+ * I2C mode only. Indicates the device has detected a start condition
+ * together with its own address while in slave mode.
+ */
+ async event void i2cStart();
+
+ /**
+ * I2C mode only. Indicates the device has detected a stop condition while
+ * in slave mode.
+ */
+ async event void i2cStop();
+}
+++ /dev/null
-/*
- * Copyright (c) 2008, Titanium Mirror, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universität Berlin nor the names
- * of its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * HPL interrupt interface for USCI_A0/B0.
- *
- * @author R. Steve McKown <rsmckown@gmail.com>
- */
-
-#include "msp430usci.h"
-
-configuration HplMsp430UsciInt0C {
- provides interface HplMsp430UsciIntA as IntA;
- provides interface HplMsp430UsciIntA as IntB;
-}
-implementation {
- components new HplMsp430UsciIntP(USCIAB0RX_VECTOR, USCIAB0TX_VECTOR,
- UCA0RXIFG, UCA0TXIFG, UCA0CTL0_, UCA0CTL1_, UCA0RXBUF_, UCB0CTL0_,
- UCB0CTL1_, UCB0RXBUF_, IFG2_) as IntP;
- IntA = IntP.HplMsp430UsciInt;
- IntB = IntP.HplMsp430UsciInt;
-}
+++ /dev/null
-/*
- * Copyright (c) 2008, Titanium Mirror, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universität Berlin nor the names
- * of its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * HPL interrupt interface for USCI_A1/B1.
- *
- * @author R. Steve McKown <rsmckown@gmail.com>
- */
-
-#include "msp430usci.h"
-
-configuration HplMsp430UsciInt1C {
- provides interface HplMsp430UsciIntA as IntA;
- provides interface HplMsp430UsciIntA as IntB;
-}
-implementation {
- components new HplMsp430UsciIntP(USCIAB1RX_VECTOR, USCIAB1TX_VECTOR,
- UCA1RXIFG, UCA1TXIFG, UCA1CTL0_, UCA1CTL1_, UCA1RXBUF_, UCB1CTL0_,
- UCB1CTL1_, UCB1RXBUF_, UC1IFG_) as IntP;
- IntA = IntP.HplMsp430UsciInt;
- IntB = IntP.HplMsp430UsciInt;
-}
+++ /dev/null
-/*
- * Copyright (c) 2008, Titanium Mirror, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universität Berlin nor the names
- * of its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * Interrupt interface for USCI_Ax devices.
- *
- * @author R. Steve McKown <rsmckown@gmail.com>
- */
-
-#include "msp430usci.h"
-
-interface HplMsp430UsciIntA {
- /**
- * Signals a break received in UART modes if UCBRKIE is enabled. The
- * provider must reset the UCxIFG.UCAxRXIFG and UCxSTAT.UCBRK bits prior to
- * signalling the event to the user.
- */
- async event void brk();
-
- /**
- * Signals a character received for any USCI mode. The provider must reset
- * UCxIFG.UCAxRXIFG before signalling the event to the user.
- *
- * @params c The character received.
- */
- async event void rx(char c);
-
- /**
- * Signals that the device's transmit buffer is empty and can accept
- * another character. Note that the USCI device may still be in the
- * process of transmitting the last character when this event is signalled.
- * The UCAxTXIFG bit will automatically reset when the interface user writes
- * a value to the related UCAxTXBUF register after receipt of this event.
- */
- async event void tx();
-}
+++ /dev/null
-/*
- * Copyright (c) 2008, Titanium Mirror, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universität Berlin nor the names
- * of its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * Interrupt interface for USCI_Bx devices.
- *
- * @author R. Steve McKown <rsmckown@gmail.com>
- */
-
-#include "msp430usci.h"
-
-interface HplMsp430UsciIntB {
- /**
- * Signals a break received in UART modes if UCBRKIE is enabled. The
- * provider must reset the UCxIFG.UCBxRXIFG and UCxSTAT.UCBRK bits prior to
- * signalling the event to the user.
- */
- async event void brk();
-
- /**
- * Signals a character received for any USCI mode. The provider must reset
- * UCxIFG.UCBxRXIFG before signalling the event to the user.
- *
- * @params c The character received.
- */
- async event void rx(char c);
-
- /**
- * Signals that the device's transmit buffer is empty and can accept
- * another character. Note that the USCI device may still be in the
- * process of transmitting the last character when this event is signalled.
- * The UCBxTXIFG bit will automatically reset when the interface user writes
- * a value to the related UCBxTXBUF register after receipt of this event.
- */
- async event void tx();
-
- /**
- * I2C mode only. Indicates the device has lost arbitration. Valid only in
- * multi-master contexts.
- */
- async event void i2cCal();
-
- /**
- * I2C mode only. Indicates the device was expecting an ACK and it was not
- * received.
- */
- async event void i2cNak();
-
- /**
- * I2C mode only. Indicates the device has detected a start condition
- * together with its own address while in slave mode.
- */
- async event void i2cStart();
-
- /**
- * I2C mode only. Indicates the device has detected a stop condition while
- * in slave mode.
- */
- async event void i2cStop();
-}
uint8_t USCIABxTX_VECTOR,
uint8_t UCAxRXIFG,
uint8_t UCAxTXIFG,
+ uint8_t UCBxRXIFG,
+ uint8_t UCBxTXIFG,
uint8_t Ucaxctl0_addr,
uint8_t Ucaxctl1_addr,
uint8_t Ucaxrxbuf_addr,
uint8_t Ucxifg_addr
) @safe() {
provides {
- interface HplMsp430UsciIntA as IntA; /* Interrupts for USCI_Ax */
- interface HplMsp430UsciIntB as IntB; /* Interrupts for USCI_Bx */
+ interface HplMsp430UsciInt as IntA; /* Interrupts for USCI_Ax */
+ interface HplMsp430UsciInt as IntB; /* Interrupts for USCI_Bx */
}
}
default async event void IntA.brk() {}
default async event void IntA.rx(char c) {}
default async event void IntA.tx() {}
+ /* i2c is not available for A devices, so the below are never signalled */
+ default async event void IntA.i2cCal() {}
+ default async event void IntA.i2cNak() {}
+ default async event void IntA.i2cStart() {}
+ default async event void IntA.i2cStop() {}
default async event void IntB.brk() {}
default async event void IntB.rx(char c) {}
/**
* Prepare to set the mode. If the device supports the requested mode, its
- * UCxxCTL1.UCSWRST bit is set and true is returned. If the device does not
- * support the requested mode, no operations are performed and false is
+ * UCxxCTL1.UCSWRST bit is set and TRUE is returned. If the device does not
+ * support the requested mode, no operations are performed and FALSE is
* returned.
*
* @param msp430usci_mode_t The desired USCI mode.
- * @return bool true if the device supports the requested mode, else false.
+ * @return bool TRUE if the device supports the requested mode, else FALSE.
*/
command bool setMode(msp430_usci_mode_t mode);
uint8_t I2Coa_addr, /* B devices only */
uint8_t I2Csa_addr, /* B devices only */
uint8_t Ie_addr,
- uint8_t Ifg_addr
+ uint8_t Ifg_addr,
+ uint8_t UCAxRXIFG, /* We rely on xIE and xIFG at same bit positions */
+ uint8_t UCAxTXIFG,
) @safe() {
provides interface HplMsp430UsciReg as Registers;
}
command bool Registers.setMode(msp430_usci_mode_t mode)
{
if (mode == UCSYNC_UART && IS_USCI_Bx)
- return false;
+ return FALSE;
if (mode == UCI2C && IS_USCI_Ax)
- return false;
+ return FALSE;
SET_FLAG(UCxxCtl0, UCSYNC)
}
RENDER_B(I2Cie);
RENDER(Stat);
+ /* RENDER(Rxbuf); */
command uint8_t* Registers.ptrRxbuf()
{
return UCxxRXBuf;
return UCxxRXBuf;
}
+ /* RENDER(Txbuf); */
command uint8_t* Registers.ptrTxbuf()
{
return UCxxTXBuf;
RENDER_A(Irrctl);
RENDER_B(I2Coa);
RENDER_B(I2Csa);
- RENDER(Ie);
- RENDER(Ifg);
+
+ /* RENDER(Ie); */
+ command bool getIeRx()
+ {
+ return READ_FLAG(UCxxIe, UCAxRXIFG);
+ }
+
+ command void setIeRx()
+ {
+ return SET_FLAG(UCxxIe, UCAxRXIFG);
+ }
+
+ command void clrIeRx()
+ {
+ return CLR_FLAG(UCxxIe, UCAxRXIFG);
+ }
+
+ command bool getIeTx()
+ {
+ return READ_FLAG(UCxxIe, UCAxTXIFG);
+ }
+
+ command void setIeTx()
+ {
+ return SET_FLAG(UCxxIe, UCAxTXIFG);
+ }
+
+ command void clrIeTx()
+ {
+ return CLR_FLAG(UCxxIe, UCAxTXIFG);
+ }
+
+ /* RENDER(Ifg); */
+ command bool getIeRx()
+ {
+ return READ_FLAG(UCxxIfg, UCAxRXIFG);
+ }
+
+ command void setIfgRx()
+ {
+ return SET_FLAG(UCxxIfg, UCAxRXIFG);
+ }
+
+ command void clrIfgRx()
+ {
+ return CLR_FLAG(UCxxIfg, UCAxRXIFG);
+ }
+
+ command bool getIfgTx()
+ {
+ return READ_FLAG(UCxxIfg, UCAxTXIFG);
+ }
+
+ command void setIfgTx()
+ {
+ return SET_FLAG(UCxxIfg, UCAxTXIFG);
+ }
+
+ command void clrIfgTx()
+ {
+ return CLR_FLAG(UCxxIfg, UCAxTXIFG);
+ }
+
}
provides {
interface UartStream;
interface UartByte;
+ interface ResourceConfigure;
}
uses {
interface HplMsp430UsciReg as Registers;
interface HplMsp430UsciInt as Interrupts;
+ interface HplMsp430GeneralIO as RXD; /* Msp430Gpio no access to PxREN */
+ interface HplMsp430GeneralIO as TXD;
interface Msp430UsciUartConfigure; /* maybe just Msp430UsciConfigure */
interface Counter<T32khz,uint16_6>
interface ArbiterInfo;
}
}
implementation {
- enum {
- CLIENT_ID = unique(MSP430_USCIA0_RESOURCE)
- };
+ #define saveBits(pin, pos, dir, out, ren) { \
+ if (call pin.isOutput()) \
+ dir |= (1 << pos); \
+ if (call pin.getOut()) \
+ out |= (1 << pos); \
+ if (call pin.isRen()) \
+ ren |= (1 << pos); \
+ }
- components Msp430UartP as UartP;
- UartStream = UartP;
- UartByte = UartP;
- Msp430UsciUartConfigure = UartP;
+ #define restoreBits(pin, pos, dir, out, ren) { \
+ if (ren & (1 << pos)) \
+ call pin.enableRen(); \
+ else \
+ call pin.disableRen(); \
+ if (out & (1 << pos)) \
+ call pin.set(); \
+ else \
+ call pin.clr(); \
+ if (dir & (1 << pos)) \
+ call pin.makeOutput(); \
+ else \
+ call pin.makeInput(); \
+ }
- components new Msp430UsciA0C() as UsciC;
- Resource = UsciC.Resource[CLIENT_ID];
- ResourceRequested = UsciC.ResourceRequested[CLIENT_ID];
- ArbiterInfo = UsciC.ArbiterInfo;
- UartP -> UsciC.Registers;
- UartP -> UsciC.Interrupts[CLIENT_ID];
- UartP -> UsciC.ArbiterInfo;
- UsciC.ResourceConfigure[CLIENT_ID] -> UartP;
+ uint8_t dir; /* Pin state storage to allow for proper unconfiguration */
+ uint8_t out;
+ uint8_t ren;
+ uint8_t* sobuf; /* Original buffer ptr from UartStream.send() */
+ uint8_t solen; /* Original buffer len from UartStream.send() */
+ uint8_t* sbuf; /* Position of next char to send */
+ uint8_t slen; /* Len of chars in sbuf to send */
+ bool rxie; /* Set if rxie has been enabled to UartStream.receive() */
+ uint8_t* robuf; /* Original receive buffer */
+ uint8_t rolen; /* Original (maximum) receive len */
+ uint8_t* rbuf; /* Position of next byte in which to receive a char */
+ uint8_t rlen; /* Remaining length in receive buffer */
+
+ async command void ResourceConfigure.configure();
+ {
+ call Registers.setCtl0(UCSYNC);
+ /* Save pin states */
+ dir = out = ren = 0;
+ saveBits(RXD, 0, dir, out, ren);
+ saveBits(TXD, 1, dir, out, ren);
+ /* FIXME: use Msp430UsciConfig to configure ports */
+ /* FIXME: we may need to have REN/DIR stuff in the configuration... */
+ call RXD.selectModuleFunc();
+ call TXD.selectModuleFunc();
+ /* Clear interrupts; we'll add them as needed */
+ call Registers.clrCtl1(UCRXEIE|UCBRKIE);
+ call Registers.clrIeRx();
+ call Registers.clrIeTx();
+ /* Enable the device */
+ call Registers.clrCtl0(UCSYNC);
+ }
+
+ async command void ResourceConfigure.unconfigure();
+ {
+ /* Disable the device */
+ call Registers.setCtl0(UCSYNC);
+ /* Clear interrupts and interrupt flags */
+ call Registers.clrIeRx();
+ call Registers.clrIeTx();
+ call Registers.clrIfgRx();
+ call Registers.clrIfgTx();
+ /* Restore pins to state just before configure() */
+ restoreBits(RXD, 0, dir, out, ren);
+ restoreBits(TXD, 0, dir, out, ren);
+ call RXD.selectIOFunc();
+ call TXD.selectIOFunc();
+ }
+
+
+ async command error_t UartStream.send( uint8_t* buf, uint16_t len )
+ {
+ if (sobuf || !buf || !len)
+ return FAIL;
+ sobuf = buf;
+ solen = len;
+ call Registers.setIeTx();
+ call Registers.setTxbuf(*sobuf);
+ slen = solen - 1;
+ if (slen)
+ sbuf = sobuf + 1;
+ return SUCCESS;
+ }
+
+ async event void Interrupts.tx()
+ {
+ while (slen && call Registers.getIfgTx()) {
+ call Registers.setTxbuf(*sbuf);
+ if (--slen)
+ sbuf++;
+ }
+ if (slen == 0 && sobuf) {
+ call Registers.clrIeTx();
+ call Registers.clrIfgTx();
+ sobuf = 0;
+ signal UartStream.sendDone(sobuf, solen, SUCCESS);
+ }
+ }
+
+ async command error_t enableReceiveInterrupt()
+ {
+ if (!robuf)
+ call Registers.clrIfgRx();
+ call Registers.setIeRx();
+ rxie = FALSE;
+ return SUCCESS;
+ }
+
+ async command error_t disableReceiveInterrupt()
+ {
+ if (!robuf) {
+ call Registers.clrIeRx();
+ call Registers.clrIfgRx();
+ } else
+ rxie = TRUE;
+ return SUCCESS;
+ }
+
+ async command error_t receive(uint8_t* buf, uint16_t len)
+ {
+ if (robuf || !buf || !len)
+ return FAIL;
+ robuf = rbuf = buf;
+ rolen = rlen = len;
+ if (!call Registers.getIeRx) {
+ call Registers.clrIfgRx();
+ call Registers.setIeRx();
+ rxie = TRUE;
+ } else
+ rxie = FALSE;
+ }
+
+ async event void Interrupts.rx(uint8_t byte)
+ {
+ if (robuf) {
+ /* receive() takes precedence if active */
+ while (rlen && call Registers.getIfgRx()) {
+ *rbuf = byte;
+ if (--rlen)
+ rbuf++;
+ }
+ if (rlen == 0 && robuf) {
+ if (rxie) {
+ call Registers.clrIeRx();
+ call Registers.clrIfgRx();
+ }
+ robuf = 0;
+ signal UartStream.receiveDone(robuf, rolen, SUCCESS);
+ }
+ } else
+ signal UartStream.receivedByte(byte);
+ }
}
configuration Msp430UsciA0C {
provides {
interface HplMsp430UsciReg as Registers;
- interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
interface Resource as Resource[uint8_t];
interface ResourceRequested as ResourceRequested[uint8_t];
interface ArbiterInfo;
uses interface ResourceConfig as ResourceConfig[uint8_t];
}
implementation {
- components new HplMsp430UsciRegP(UCA0CTL0_, UCA0CTL1_, UCA0BR0_, UCA0BR1_,
- UCA0MCTL_, 0/*UCA0I2CIE_*/, UCA0STAT_, UCA0RXBUF_, UCA0TXBUF_, UCA0ABCTL_,
- UCA0IRTCTL_, UCA0IRRCTL_, 0/*UCA0I2COA_*/, 0/*UCA0I2CSA_*/, IE2_, IFG2_)
- as RegP;
- Registers = RegP;
-
components new FcfsArbiterC(MSP430_USCIA0_RESOURCE) as ArbiterC;
Resource = ArbiterC;
ResourceRequested = ArbiterC;
ResourceConfigure = ArbiterC;
ArbiterInfo = ArbiterC;
- components new Msp430UsciIntDispatchAP() as IntDispatchA0P;
- Interrupts = IntDispatchA0P.IntAx;
+ components new Msp430UsciIntDispatchP() as IntDispatchA0P;
+ Interrupts = IntDispatchA0P;
IntDispatchA0P.ArbiterInfo -> ArbiterC;
- components HplMsp430UsciInt0C as Int0C;
- IntDispatchA0P.RawIntAx -> Int0C.IntA;
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegA0;
+ IntDispatchA0P.RawInt -> UsciC.IntA0;
}
configuration Msp430UsciA1C {
provides {
interface HplMsp430UsciReg as Registers;
- interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
interface Resource as Resource[uint8_t];
interface ResourceRequested as ResourceRequested[uint8_t];
interface ArbiterInfo;
uses interface ResourceConfig as ResourceConfig[uint8_t];
}
implementation {
- components new HplMsp430UsciRegP(UCA1CTL0_, UCA1CTL1_, UCA1BR0_, UCA1BR1_,
- UCA1MCTL_, 0/*UCA1I2CIE_*/, UCA1STAT_, UCA1RXBUF_, UCA1TXBUF_, UCA1ABCTL_,
- UCA1IRTCTL_, UCA1IRRCTL_, 0/*UCA1I2COA_*/, 0/*UCA1I2CSA_*/, IE2_, IFG2_)
- as RegP;
- Registers = RegP;
-
components new FcfsArbiterC(MSP430_USCIA1_RESOURCE) as ArbiterC;
Resource = ArbiterC;
ResourceRequested = ArbiterC;
ResourceConfigure = ArbiterC;
ArbiterInfo = ArbiterC;
- components new Msp430UsciIntDispatchAP() as IntDispatchA1P;
- Interrupts = IntDispatchA1P.IntAx;
+ components new Msp430UsciIntDispatchP() as IntDispatchA1P;
+ Interrupts = IntDispatchA1P;
IntDispatchA1P.ArbiterInfo -> ArbiterC;
- components HplMsp430UsciInt0C as Int0C;
- IntDispatchA1P.RawIntAx -> Int0C.IntA;
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegA1;
+ IntDispatchA1P.RawInt -> UsciC.IntA1;
}
configuration Msp430UsciB0C {
provides {
interface HplMsp430UsciReg as Registers;
- interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
interface Resource as Resource[uint8_t];
interface ResourceRequested as ResourceRequested[uint8_t];
interface ArbiterInfo;
uses interface ResourceConfig as ResourceConfig[uint8_t];
}
implementation {
- components new HplMsp430UsciRegP(UCB0CTL0_, UCB0CTL1_, UCB0BR0_, UCB0BR1_,
- 0/*UCB0MCTL_*/, UCB0I2CIE_, UCB0STAT_, UCB0RXBUF_, UCB0TXBUF_,
- 0/*UCB0ABCTL_*/, 0/*UCB0IRTCTL_*/, 0/*UCB0IRRCTL_*/, UCB0I2COA_,
- UCB0I2CSA_, IE2_, IFG2_) as RegP;
- Registers = RegP;
-
components new FcfsArbiterC(MSP430_USCIB0_RESOURCE) as ArbiterC;
Resource = ArbiterC;
ResourceRequested = ArbiterC;
ResourceConfigure = ArbiterC;
ArbiterInfo = ArbiterC;
- components new Msp430UsciIntDispatchAP() as IntDispatchB0P;
- Interrupts = IntDispatchB0P.IntAx;
+ components new Msp430UsciIntDispatchP() as IntDispatchB0P;
+ Interrupts = IntDispatchB0P;
IntDispatchB0P.ArbiterInfo -> ArbiterC;
- components HplMsp430UsciInt0C as Int0C;
- IntDispatchB0P.RawIntAx -> Int0C.IntA;
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegB0;
+ IntDispatchB0P.RawInt -> UsciC.IntB0;
}
configuration Msp430UsciB1C {
provides {
interface HplMsp430UsciReg as Registers;
- interface HplMsp430UsciIntA as Interrupts[uint8_t];
+ interface HplMsp430UsciInt as Interrupts[uint8_t];
interface Resource as Resource[uint8_t];
interface ResourceRequested as ResourceRequested[uint8_t];
interface ArbiterInfo;
uses interface ResourceConfig as ResourceConfig[uint8_t];
}
implementation {
- components new HplMsp430UsciRegP(UCB1CTL0_, UCB1CTL1_, UCB1BR0_, UCB1BR1_,
- 0/*UCB1MCTL_*/, UCB1I2CIE_, UCB1STAT_, UCB1RXBUF_, UCB1TXBUF_,
- 0/*UCB1ABCTL_*/, 0/*UCB1IRTCTL_*/, 0/*UCB1IRRCTL_*/, UCB1I2COA_,
- UCB1I2CSA_, IE2_, IFG2_) as RegP;
- Registers = RegP;
-
components new FcfsArbiterC(MSP430_USCIB1_RESOURCE) as ArbiterC;
Resource = ArbiterC;
ResourceRequested = ArbiterC;
ResourceConfigure = ArbiterC;
ArbiterInfo = ArbiterC;
- components new Msp430UsciIntDispatchAP() as IntDispatchB1P;
- Interrupts = IntDispatchB1P.IntAx;
+ components new Msp430UsciIntDispatchP() as IntDispatchB1P;
+ Interrupts = IntDispatchB1P;
IntDispatchB1P.ArbiterInfo -> ArbiterC;
- components HplMsp430UsciInt0C as Int0C;
- IntDispatchB1P.RawIntAx -> Int0C.IntA;
+ components HplMsp430UsciC as UsciC;
+ Registers = UsciC.RegB1;
+ IntDispatchB1P.RawInt -> UsciC.IntB1;
}
+++ /dev/null
-/*
- * Copyright (c) 2008, Titanium Mirror, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universität Berlin nor the names
- * of its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * Interrupt dispatch for USCI_Ax devices.
- *
- * @author R. Steve McKown <smckown@gmail.com>
- */
-
-generic module Msp430UsciIntDispatchAP() @safe() {
- provides interface HplMsp430UsciIntA as IntAx[uint8_t id];
- uses {
- interface HplMsp430UsciIntA as RawIntAx;
- interface ArbiterInfo;
- }
-}
-
-implementation {
- async event void RawIntAx.brk()
- {
- if (call ArbiterInfo.inUse())
- signal IntAx.brk[call ArbiterInfo.userId()]();
- }
-
- async event void RawIntAx.rx(char c)
- {
- if (call ArbiterInfo.inUse())
- signal IntAx.rx[call ArbiterInfo.userId()]();
- }
-
- async event void RawIntAx.tx()
- {
- if (call ArbiterInfo.inUse())
- signal IntAx.tx[call ArbiterInfo.userId()]();
- }
-
- default async event void IntAx.brk[uint8_t id]() {}
- default async event void IntAx.rx[uint8_t id]() {}
- default async event void IntAx.tx[uint8_t id]() {}
-}
+++ /dev/null
-/*
- * Copyright (c) 2008, Titanium Mirror, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universität Berlin nor the names
- * of its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * Interrupt dispatch for USCI_Bx devices.
- *
- * @author R. Steve McKown <smckown@gmail.com>
- */
-
-generic module Msp430UsciIntDispatchBP() @safe() {
- provides interface HplMsp430UsciIntB as IntBx[uint8_t id];
- uses {
- interface HplMsp430UsciIntB as RawIntBx;
- interface ArbiterInfo;
- }
-}
-
-implementation {
- async event void RawIntBx.brk()
- {
- if (call ArbiterInfo.inUse())
- signal IntBx.brk[call ArbiterInfo.userId()]();
- }
-
- async event void RawIntBx.rx(char c)
- {
- if (call ArbiterInfo.inUse())
- signal IntBx.rx[call ArbiterInfo.userId()]();
- }
-
- async event void RawIntBx.tx()
- {
- if (call ArbiterInfo.inUse())
- signal IntBx.tx[call ArbiterInfo.userId()]();
- }
-
- async event void RawIntBx.i2cCal()
- {
- if (call ArbiterInfo.inUse())
- signal IntBx.i2cCal[call ArbiterInfo.userId()]();
- }
-
- async event void RawIntBx.i2cNak()
- {
- if (call ArbiterInfo.inUse())
- signal IntBx.i2cNak[call ArbiterInfo.userId()]();
- }
-
- async event void RawIntBx.i2cStart()
- {
- if (call ArbiterInfo.inUse())
- signal IntBx.i2cStart[call ArbiterInfo.userId()]();
- }
-
- async event void RawIntBx.i2cStop()
- {
- if (call ArbiterInfo.inUse())
- signal IntBx.i2cStop[call ArbiterInfo.userId()]();
- }
-
- default async event void IntBx.brk[uint8_t id]() {}
- default async event void IntBx.rx[uint8_t id]() {}
- default async event void IntBx.tx[uint8_t id]() {}
- default async event void IntBx.i2cCal[uint8_t id]() {}
- default async event void IntBx.i2cNak[uint8_t id]() {}
- default async event void IntBx.i2cStart[uint8_t id]() {}
- default async event void IntBx.i2cStop[uint8_t id]() {}
-}
--- /dev/null
+/*
+ * Copyright (c) 2008, Titanium Mirror, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ * of its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt dispatch for USCI_Ax and USCI_Bx devices.
+ *
+ * @author R. Steve McKown <smckown@gmail.com>
+ */
+
+generic module Msp430UsciIntDispatchP() @safe() {
+ provides interface HplMsp430UsciIntB as Interrupts[uint8_t id];
+ uses {
+ interface HplMsp430UsciInt as RawInt;
+ interface ArbiterInfo;
+ }
+}
+
+implementation {
+ async event void RawInt.brk()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.brk[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.rx(char c)
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.rx[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.tx()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.tx[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.i2cCal()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.i2cCal[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.i2cNak()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.i2cNak[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.i2cStart()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.i2cStart[call ArbiterInfo.userId()]();
+ }
+
+ async event void RawInt.i2cStop()
+ {
+ if (call ArbiterInfo.inUse())
+ signal Interrupts.i2cStop[call ArbiterInfo.userId()]();
+ }
+
+ default async event void Interrupts.brk[uint8_t id]() {}
+ default async event void Interrupts.rx[uint8_t id]() {}
+ default async event void Interrupts.tx[uint8_t id]() {}
+ default async event void Interrupts.i2cCal[uint8_t id]() {}
+ default async event void Interrupts.i2cNak[uint8_t id]() {}
+ default async event void Interrupts.i2cStart[uint8_t id]() {}
+ default async event void Interrupts.i2cStop[uint8_t id]() {}
+}
projects / tinyos-2.x.git / commitdiff