+#if defined(__MSP430_HAS_T0A5__)
+#define TA0CTL_ __MSP430_T0A_BASE__ + 0x00 // Timer A 0 Control
+sfrw (TA0CTL,TA0CTL_);
+#define TA0CTL_L_ __MSP430_T0A_BASE__ + 0x00
+sfrb (TA0CTL_L,TA0CTL_L_);
+#define TA0CTL_H_ __MSP430_T0A_BASE__ + 0x01
+sfrb (TA0CTL_H,TA0CTL_H_);
+#define TA0CCTL0_ __MSP430_T0A_BASE__ + 0x02 // Timer A 0 Capture/Compare Control 0
+sfrw (TA0CCTL0,TA0CCTL0_);
+#define TA0CCTL0_L_ __MSP430_T0A_BASE__ + 0x02
+sfrb (TA0CCTL0_L,TA0CCTL0_L_);
+#define TA0CCTL0_H_ __MSP430_T0A_BASE__ + 0x03
+sfrb (TA0CCTL0_H,TA0CCTL0_H_);
+#define TA0CCTL1_ __MSP430_T0A_BASE__ + 0x04 // Timer A 0 Capture/Compare Control 1
+sfrw (TA0CCTL1,TA0CCTL1_);
+#define TA0CCTL1_L_ __MSP430_T0A_BASE__ + 0x04
+sfrb (TA0CCTL1_L,TA0CCTL1_L_);
+#define TA0CCTL1_H_ __MSP430_T0A_BASE__ + 0x05
+sfrb (TA0CCTL1_H,TA0CCTL1_H_);
+#define TA0CCTL2_ __MSP430_T0A_BASE__ + 0x06 // Timer A 0 Capture/Compare Control 2
+sfrw (TA0CCTL2,TA0CCTL2_);
+#define TA0CCTL2_L_ __MSP430_T0A_BASE__ + 0x06
+sfrb (TA0CCTL2_L,TA0CCTL2_L_);
+#define TA0CCTL2_H_ __MSP430_T0A_BASE__ + 0x07
+sfrb (TA0CCTL2_H,TA0CCTL2_H_);
+#define TA0CCTL3_ __MSP430_T0A_BASE__ + 0x08 // Timer A 0 Capture/Compare Control 3
+sfrw (TA0CCTL3,TA0CCTL3_);
+#define TA0CCTL3_L_ __MSP430_T0A_BASE__ + 0x08
+sfrb (TA0CCTL3_L,TA0CCTL3_L_);
+#define TA0CCTL3_H_ __MSP430_T0A_BASE__ + 0x09
+sfrb (TA0CCTL3_H,TA0CCTL3_H_);
+#define TA0CCTL4_ __MSP430_T0A_BASE__ + 0x0A // Timer A 0 Capture/Compare Control 4
+sfrw (TA0CCTL4,TA0CCTL4_);
+#define TA0CCTL4_L_ __MSP430_T0A_BASE__ + 0x0A
+sfrb (TA0CCTL4_L,TA0CCTL4_L_);
+#define TA0CCTL4_H_ __MSP430_T0A_BASE__ + 0x0B
+sfrb (TA0CCTL4_H,TA0CCTL4_H_);
+#define TA0R_ __MSP430_T0A_BASE__ + 0x10 // Timer A 0
+sfrw (TA0R,TA0R_);
+#define TA0R_L_ __MSP430_T0A_BASE__ + 0x10
+sfrb (TA0R_L,TA0R_L_);
+#define TA0R_H_ __MSP430_T0A_BASE__ + 0x11
+sfrb (TA0R_H,TA0R_H_);
+#define TA0CCR0_ __MSP430_T0A_BASE__ + 0x12 // Timer A 0 Capture/Compare 0
+sfrw (TA0CCR0,TA0CCR0_);
+#define TA0CCR0_L_ __MSP430_T0A_BASE__ + 0x12
+sfrb (TA0CCR0_L,TA0CCR0_L_);
+#define TA0CCR0_H_ __MSP430_T0A_BASE__ + 0x13
+sfrb (TA0CCR0_H,TA0CCR0_H_);
+#define TA0CCR1_ __MSP430_T0A_BASE__ + 0x14 // Timer A 0 Capture/Compare 1
+sfrw (TA0CCR1,TA0CCR1_);
+#define TA0CCR1_L_ __MSP430_T0A_BASE__ + 0x14
+sfrb (TA0CCR1_L,TA0CCR1_L_);
+#define TA0CCR1_H_ __MSP430_T0A_BASE__ + 0x15
+sfrb (TA0CCR1_H,TA0CCR1_H_);
+#define TA0CCR2_ __MSP430_T0A_BASE__ + 0x16 // Timer A 0 Capture/Compare 2
+sfrw (TA0CCR2,TA0CCR2_);
+#define TA0CCR2_L_ __MSP430_T0A_BASE__ + 0x16
+sfrb (TA0CCR2_L,TA0CCR2_L_);
+#define TA0CCR2_H_ __MSP430_T0A_BASE__ + 0x17
+sfrb (TA0CCR2_H,TA0CCR2_H_);
+#define TA0CCR3_ __MSP430_T0A_BASE__ + 0x18 // Timer A 0 Capture/Compare 3
+sfrw (TA0CCR3,TA0CCR3_);
+#define TA0CCR3_L_ __MSP430_T0A_BASE__ + 0x18
+sfrb (TA0CCR3_L,TA0CCR3_L_);
+#define TA0CCR3_H_ __MSP430_T0A_BASE__ + 0x19
+sfrb (TA0CCR3_H,TA0CCR3_H_);
+#define TA0CCR4_ __MSP430_T0A_BASE__ + 0x1A // Timer A 0 Capture/Compare 4
+sfrw (TA0CCR4,TA0CCR4_);
+#define TA0CCR4_L_ __MSP430_T0A_BASE__ + 0x1A
+sfrb (TA0CCR4_L,TA0CCR4_L_);
+#define TA0CCR4_H_ __MSP430_T0A_BASE__ + 0x1B
+sfrb (TA0CCR4_H,TA0CCR4_H_);
+#define TA0EX0_ __MSP430_T0A_BASE__ + 0x20 // Timer A 0 Expansion Register 0
+sfrw (TA0EX0,TA0EX0_);
+#define TA0EX0_L_ __MSP430_T0A_BASE__ + 0x20
+sfrb (TA0EX0_L,TA0EX0_L_);
+#define TA0EX0_H_ __MSP430_T0A_BASE__ + 0x21
+sfrb (TA0EX0_H,TA0EX0_H_);
+#define TA0IV_ __MSP430_T0A_BASE__ + 0x2E // Timer A 0 Interrupt Vector Word
+sfrw (TA0IV,TA0IV_);
+#define TA0IV_L_ __MSP430_T0A_BASE__ + 0x2E
+sfrb (TA0IV_L,TA0IV_L_);
+#define TA0IV_H_ __MSP430_T0A_BASE__ + 0x2F
+sfrb (TA0IV_H,TA0IV_H_);
+#endif /* __MSP430_HAS_T0A5__ */
+
+#if defined(__MSP430_HAS_T1A3__)
+#define TA1CTL_ __MSP430_T1A_BASE__ + 0x00 // Timer A 1 Control
+sfrw (TA1CTL,TA1CTL_);
+#define TA1CTL_L_ __MSP430_T1A_BASE__ + 0x00
+sfrb (TA1CTL_L,TA1CTL_L_);
+#define TA1CTL_H_ __MSP430_T1A_BASE__ + 0x01
+sfrb (TA1CTL_H,TA1CTL_H_);
+#define TA1CCTL0_ __MSP430_T1A_BASE__ + 0x02 // Timer A 1 Capture/Compare Control 0
+sfrw (TA1CCTL0,TA1CCTL0_);
+#define TA1CCTL0_L_ __MSP430_T1A_BASE__ + 0x02
+sfrb (TA1CCTL0_L,TA1CCTL0_L_);
+#define TA1CCTL0_H_ __MSP430_T1A_BASE__ + 0x03
+sfrb (TA1CCTL0_H,TA1CCTL0_H_);
+#define TA1CCTL1_ __MSP430_T1A_BASE__ + 0x04 // Timer A 1 Capture/Compare Control 1
+sfrw (TA1CCTL1,TA1CCTL1_);
+#define TA1CCTL1_L_ __MSP430_T1A_BASE__ + 0x04
+sfrb (TA1CCTL1_L,TA1CCTL1_L_);
+#define TA1CCTL1_H_ __MSP430_T1A_BASE__ + 0x05
+sfrb (TA1CCTL1_H,TA1CCTL1_H_);
+#define TA1CCTL2_ __MSP430_T1A_BASE__ + 0x06 // Timer A 1 Capture/Compare Control 2
+sfrw (TA1CCTL2,TA1CCTL2_);
+#define TA1CCTL2_L_ __MSP430_T1A_BASE__ + 0x06
+sfrb (TA1CCTL2_L,TA1CCTL2_L_);
+#define TA1CCTL2_H_ __MSP430_T1A_BASE__ + 0x07
+sfrb (TA1CCTL2_H,TA1CCTL2_H_);
+#define TA1R_ __MSP430_T1A_BASE__ + 0x10 // Timer A 1
+sfrw (TA1R,TA1R_);
+#define TA1R_L_ __MSP430_T1A_BASE__ + 0x10
+sfrb (TA1R_L,TA1R_L_);
+#define TA1R_H_ __MSP430_T1A_BASE__ + 0x11
+sfrb (TA1R_H,TA1R_H_);
+#define TA1CCR0_ __MSP430_T1A_BASE__ + 0x12 // Timer A 1 Capture/Compare 0
+sfrw (TA1CCR0,TA1CCR0_);
+#define TA1CCR0_L_ __MSP430_T1A_BASE__ + 0x12
+sfrb (TA1CCR0_L,TA1CCR0_L_);
+#define TA1CCR0_H_ __MSP430_T1A_BASE__ + 0x13
+sfrb (TA1CCR0_H,TA1CCR0_H_);
+#define TA1CCR1_ __MSP430_T1A_BASE__ + 0x14 // Timer A 1 Capture/Compare 1
+sfrw (TA1CCR1,TA1CCR1_);
+#define TA1CCR1_L_ __MSP430_T1A_BASE__ + 0x14
+sfrb (TA1CCR1_L,TA1CCR1_L_);
+#define TA1CCR1_H_ __MSP430_T1A_BASE__ + 0x15
+sfrb (TA1CCR1_H,TA1CCR1_H_);
+#define TA1CCR2_ __MSP430_T1A_BASE__ + 0x16 // Timer A 1 Capture/Compare 2
+sfrw (TA1CCR2,TA1CCR2_);
+#define TA1CCR2_L_ __MSP430_T1A_BASE__ + 0x16
+sfrb (TA1CCR2_L,TA1CCR2_L_);
+#define TA1CCR2_H_ __MSP430_T1A_BASE__ + 0x17
+sfrb (TA1CCR2_H,TA1CCR2_H_);
+#define TA1EX0_ __MSP430_T1A_BASE__ + 0x20 // Timer A 1 Expansion Register 0
+sfrw (TA1EX0,TA1EX0_);
+#define TA1EX0_L_ __MSP430_T1A_BASE__ + 0x20
+sfrb (TA1EX0_L,TA1EX0_L_);
+#define TA1EX0_H_ __MSP430_T1A_BASE__ + 0x21
+sfrb (TA1EX0_H,TA1EX0_H_);
+#define TA1IV_ __MSP430_T1A_BASE__ + 0x2E // Timer A 1 Interrupt Vector Word
+sfrw (TA1IV,TA1IV_);
+#define TA1IV_L_ __MSP430_T1A_BASE__ + 0x2E
+sfrb (TA1IV_L,TA1IV_L_);
+#define TA1IV_H_ __MSP430_T1A_BASE__ + 0x2F
+sfrb (TA1IV_H,TA1IV_H_);
+#endif /* __MSP430_HAS_T1A3__ */
+