+++ /dev/null
-#!/bin/sh -e
-## 001_ld_makefile_patch.dpatch
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Description: correct where ld scripts are installed
-## DP: Author: Chris Chimelis <chris@debian.org>
-## DP: Upstream status: N/A
-## DP: Date: ??
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
-diff -urNad --exclude=CVS --exclude=.svn ./ld/Makefile.am /tmp/dpep-work.eKU2vW/binutils-2.16.1cvs20050902/ld/Makefile.am
---- ./ld/Makefile.am 2005-08-31 03:27:36.000000000 +0000
-+++ /tmp/dpep-work.eKU2vW/binutils-2.16.1cvs20050902/ld/Makefile.am 2005-09-02 21:42:18.000000000 +0000
-@@ -20,7 +20,7 @@
- # We put the scripts in the directory $(scriptdir)/ldscripts.
- # We can't put the scripts in $(datadir) because the SEARCH_DIR
- # directives need to be different for native and cross linkers.
--scriptdir = $(tooldir)/lib
-+scriptdir = $(libdir)
-
- EMUL = @EMUL@
- EMULATION_OFILES = @EMULATION_OFILES@
-diff -urNad --exclude=CVS --exclude=.svn ./ld/Makefile.in /tmp/dpep-work.eKU2vW/binutils-2.16.1cvs20050902/ld/Makefile.in
---- ./ld/Makefile.in 2005-08-31 03:27:36.000000000 +0000
-+++ /tmp/dpep-work.eKU2vW/binutils-2.16.1cvs20050902/ld/Makefile.in 2005-09-02 21:43:37.259127535 +0000
-@@ -268,7 +268,7 @@
- # We put the scripts in the directory $(scriptdir)/ldscripts.
- # We can't put the scripts in $(datadir) because the SEARCH_DIR
- # directives need to be different for native and cross linkers.
--scriptdir = $(tooldir)/lib
-+scriptdir = $(libdir)
- BASEDIR = $(srcdir)/..
- BFDDIR = $(BASEDIR)/bfd
- INCDIR = $(BASEDIR)/include
+++ /dev/null
-#!/bin/sh -e
-## 003_gmon_manpage_fix.dpatch by Chris Chimelis <chris@debian.org>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Add more documentation about profiling and -fprofile-arcs.
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
-diff -urNad binutils-2.16/gprof/gprof.texi /tmp/dpep.NHuhql/binutils-2.16/gprof/gprof.texi
---- binutils-2.16/gprof/gprof.texi 2005-03-03 13:05:12.000000000 +0100
-+++ /tmp/dpep.NHuhql/binutils-2.16/gprof/gprof.texi 2005-05-06 19:14:10.038173569 +0200
-@@ -138,6 +138,10 @@
- If more than one profile file is specified, the @code{gprof}
- output shows the sum of the profile information in the given profile files.
-
-+If you use gcc 2.95.x or 3.0 to compile your binaries, you may need
-+to add the @samp{-fprofile-arcs} to the compile command line in order
-+for the call graphs to be properly stored in gmon.out.
-+
- @code{Gprof} calculates the amount of time spent in each routine.
- Next, these times are propagated along the edges of the call graph.
- Cycles are discovered, and calls into a cycle are made to share the time
-@@ -268,6 +272,11 @@
- options. The same option, @samp{-pg}, alters either compilation or linking
- to do what is necessary for profiling. Here are examples:
-
-+If you use gcc 2.95.x or 3.0.x, you may need to add the
-+@samp{-fprofile-arcs} option to the compile line along with @samp{-pg}
-+in order to allow the call-graphs to be properly included in the gmon.out
-+file.
-+
- @example
- cc -g -c myprog.c utils.c -pg
- cc -o myprog myprog.o utils.o -pg
+++ /dev/null
-#!/bin/sh -e
-## 014_gprof_manpage_fix.dpatch by Chris Chimelis <chris@debian.org>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Don't mention monitor(3) which doesn't exist in Debian. (#160654)
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
-diff -urNad /home/james/debian/packages/binutils/binutils-2.14.90.0.6/gprof/gprof.texi binutils-2.14.90.0.6/gprof/gprof.texi
---- /home/james/debian/packages/binutils/binutils-2.14.90.0.6/gprof/gprof.texi 2002-08-02 01:49:32.000000000 +0100
-+++ binutils-2.14.90.0.6/gprof/gprof.texi 2003-09-10 22:42:37.000000000 +0100
-@@ -181,7 +181,7 @@
- @c man end
-
- @c man begin SEEALSO
--monitor(3), profil(2), cc(1), prof(1), and the Info entry for @file{gprof}.
-+profil(2), cc(1), prof(1), and the Info entry for @file{gprof}.
-
- ``An Execution Profiler for Modular Programs'',
- by S. Graham, P. Kessler, M. McKusick;
+++ /dev/null
-#!/bin/sh -e
-## 006_better_file_error.dpatch by David Kimdon <dwhedon@gordian.com>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Specify which filename is causing an error if the filename is a
-## DP: directory. (#45832)
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
-diff -urNad /home/james/debian/packages/binutils/binutils-2.14.90.0.6/bfd/opncls.c binutils-2.14.90.0.6/bfd/opncls.c
---- /home/james/debian/packages/binutils/binutils-2.14.90.0.6/bfd/opncls.c 2003-07-23 16:08:09.000000000 +0100
-+++ binutils-2.14.90.0.6/bfd/opncls.c 2003-09-10 22:35:00.000000000 +0100
-@@ -150,6 +150,13 @@
- {
- bfd *nbfd;
- const bfd_target *target_vec;
-+ struct stat s;
-+
-+ if (stat (filename, &s) == 0)
-+ if (S_ISDIR(s.st_mode)) {
-+ bfd_set_error (bfd_error_file_not_recognized);
-+ return NULL;
-+ }
-
- nbfd = _bfd_new_bfd ();
- if (nbfd == NULL)
-# not for the msp430 cross:
-#001_ld_makefile_patch
-
-002_gprof_profile_arcs
-003_gprof_see_also_monitor
-006_better_file_error
-012_check_ldrunpath_length
-013_bash_in_ld_testsuite
-127_x86_64_i386_biarch
-128_powerpc64_biarch
-
-# not applied for Ubuntu:
-#200-hjl-ld-env
-
-201-hjl-bfd-ref_addr
-203-hjl-binutils-indirect
-204-hjl-binutils-tls-relro
-
-# not applied for Ubuntu:
-#206-hjl-binutils-shr
-
-209-hjl-binutils-error
-210-hjl-binutils-signed
-211-hjl-binutils-weakdef
-
-# needs an update:
-#212-hjl-binutils-pe-align
-
-304_pr4476
-305_arm-dis
-
-311_pr5006
-312_pr5011
-313_pr5025
-
-# msp430 only, taken from mspgcc CVS 20080818
-500-binutils-msp-new-cpus1.dpatch
-501-binutils-msp-new-cpus2.dpatch
-502-binutils-msp-ldscripts.dpatch
-503-binutils-msp-undef-LEX_DOLLAR.dpatch
+binutils-2.20
+++ /dev/null
-#!/bin/sh -e
-## 012_check_ldrunpath_length.dpatch by Chris Chimelis <chris@debian.org>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Only generate an RPATH entry if LD_RUN_PATH is not empty, for
-## DP: cases where -rpath isn't specified. (#151024)
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
-diff -urNad binutils-2.16/ld/emultempl/elf32.em /tmp/dpep.u3SQkH/binutils-2.16/ld/emultempl/elf32.em
---- binutils-2.16/ld/emultempl/elf32.em 2005-04-13 19:59:07.000000000 +0200
-+++ /tmp/dpep.u3SQkH/binutils-2.16/ld/emultempl/elf32.em 2005-05-06 19:18:08.236669718 +0200
-@@ -885,6 +885,8 @@
- && command_line.rpath == NULL)
- {
- lib_path = (const char *) getenv ("LD_RUN_PATH");
-+ if ((lib_path) && (strlen (lib_path) == 0))
-+ lib_path = NULL;
- if (gld${EMULATION_NAME}_search_needed (lib_path, &n,
- force))
- break;
-@@ -1059,6 +1061,8 @@
- rpath = command_line.rpath;
- if (rpath == NULL)
- rpath = (const char *) getenv ("LD_RUN_PATH");
-+ if ((rpath) && (strlen (rpath) == 0))
-+ rpath = NULL;
- if (! (bfd_elf_size_dynamic_sections
- (output_bfd, command_line.soname, rpath,
- command_line.filter_shlib,
+++ /dev/null
-#!/bin/sh -e
-## 007_bash_in_ld_testsuite.dpatch.dpatch by Matthias Klose <doko@ubuntu.com>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Explicitely use bash for the ld testsuite.
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
---- ./ld/testsuite/config/default.exp~ 2007-07-07 19:55:47.000000000 +0200
-+++ ./ld/testsuite/config/default.exp 2007-07-07 20:20:45.000000000 +0200
-@@ -117,7 +117,7 @@
- global srcdir
- global CC
- if ![info exists $varname] {
-- set status [catch "exec sh -c \"host='$target_triplet' && CC='$CC' && . $srcdir/../configure.host && eval echo \\$$varname\"" result]
-+ set status [catch "exec bash -c \"host='$target_triplet' && CC='$CC' && . $srcdir/../configure.host && eval echo \\$$varname\"" result]
- if $status { error "Error getting native link files: $result" }
- set $varname $result
- }
-@@ -126,7 +126,7 @@
- proc get_target_emul {} {
- global target_triplet
- global srcdir
-- set status [catch "exec sh -c \"targ='$target_triplet' && . $srcdir/../configure.tgt && echo \\\$targ_emul\"" result]
-+ set status [catch "exec bash -c \"targ='$target_triplet' && . $srcdir/../configure.tgt && echo \\\$targ_emul\"" result]
- if $status { error "Error getting emulation name: $result" }
- return $result
- }
+++ /dev/null
-#!/bin/sh -e
-## 127_x86_64_i386_biarch.dpatch
-##
-## DP: Description: Add (/usr)/lib32 to the search paths on x86_64.
-## DP: Author: Aurelien Jarno <aurel32.debian.org>
-## DP: Upstream status: Debian specific
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
---- binutils/ld/emulparams/elf_i386.sh
-+++ binutils/ld/emulparams/elf_i386.sh
-@@ -12,3 +12,13 @@
- GENERATE_PIE_SCRIPT=yes
- NO_SMALL_DATA=yes
- SEPARATE_GOTPLT=12
-+
-+# Linux modify the default library search path to first include
-+# a 32-bit specific directory.
-+case "$target" in
-+ x86_64*-linux* | i[3-7]86*-linux*)
-+ case "$EMULATION_NAME" in
-+ *i386*) LIBPATH_SUFFIX=32 ;;
-+ esac
-+ ;;
-+esac
+++ /dev/null
-#!/bin/sh -e
-## 128_powerpc64_biarch.dpatch
-##
-## DP: Description: Add (/usr)/lib32 to the search paths on powerpc64.
-## DP: Author: Andreas Jochens <aj@andaco.de>
-## DP: Upstream status: Debian specific
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
-+++ binutils/ld/emulparams/elf32ppccommon.sh 2006-03-02 08:50:04.000000000 +0000
---- binutils/ld/emulparams/elf32ppccommon.sh 2006-09-13 06:59:26.000000000 +0000
-@@ -45,5 +45,6 @@
-
- # Look for 64 bit target libraries in /lib64, /usr/lib64 etc., first.
- case "$EMULATION_NAME" in
-+ *32*) LIBPATH_SUFFIX=32 ;;
- *64*) LIBPATH_SUFFIX=64 ;;
- esac
+++ /dev/null
-#!/bin/sh -e
-## 200-hjl-ld-env.dpatch
-##
-## DP: Description: Handle LD_SYMBOLIC and LD_SYMBOLIC_FUNCTIONS env vars
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl 2.17.50.0.18
-## DP: Original patch: ld-env-6.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-2007-01-24 H.J. Lu <hongjiu.lu@intel.com>
-
- * NEWS: Mention LD_SYMBOLIC and LD_SYMBOLIC_FUNCTIONS.
-
- * ld.texinfo: Document LD_SYMBOLIC and LD_SYMBOLIC_FUNCTIONS.
-
- * ldmain.c (main): Handle LD_SYMBOLIC and
- LD_SYMBOLIC_FUNCTIONS.
-
-@DPATCH@
-diff -urNad binutils-2.18~cvs20070812~/ld/NEWS binutils-2.18~cvs20070812/ld/NEWS
---- binutils-2.18~cvs20070812~/ld/NEWS 2007-08-12 10:00:32.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/NEWS 2007-08-12 13:09:23.000000000 +0200
-@@ -1,6 +1,9 @@
- -*- text -*-
- Changes in 2.18:
-
-+* ELF: Support environment variables, LD_SYMBOLIC for -Bsymbolic and
-+ LD_SYMBOLIC_FUNCTIONS for -Bsymbolic-functions.
-+
- * Linker sources now released under version 3 of the GNU General Public
- License.
-
-diff -urNad binutils-2.18~cvs20070812~/ld/ld.texinfo binutils-2.18~cvs20070812/ld/ld.texinfo
---- binutils-2.18~cvs20070812~/ld/ld.texinfo 2007-07-25 16:56:22.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/ld.texinfo 2007-08-12 13:08:46.000000000 +0200
-@@ -1142,14 +1142,21 @@
- definition within the shared library, if any. Normally, it is possible
- for a program linked against a shared library to override the definition
- within the shared library. This option is only meaningful on ELF
--platforms which support shared libraries.
-+platforms which support shared libraries. If @option{-Bsymbolic} is not
-+used when linking a shared library, the linker will also turn on this
-+option if the environment variable @code{LD_SYMBOLIC} is set.
-
- @kindex -Bsymbolic-functions
- @item -Bsymbolic-functions
- When creating a shared library, bind references to global function
- symbols to the definition within the shared library, if any.
- This option is only meaningful on ELF platforms which support shared
--libraries.
-+libraries. If @option{-Bsymbolic-functions} is not used when linking a
-+shared library, the linker will also turn on this option if the
-+environment variable @code{LD_SYMBOLIC_FUNCTIONS} is set. When
-+both environment variables @code{LD_SYMBOLIC} and
-+@code{LD_SYMBOLIC_FUNCTIONS} are set, @code{LD_SYMBOLIC} will take
-+precedent.
-
- @kindex --dynamic-list=@var{dynamic-list-file}
- @item --dynamic-list=@var{dynamic-list-file}
-diff -urNad binutils-2.18~cvs20070812~/ld/ldmain.c binutils-2.18~cvs20070812/ld/ldmain.c
---- binutils-2.18~cvs20070812~/ld/ldmain.c 2007-07-06 16:09:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/ldmain.c 2007-08-12 13:08:46.000000000 +0200
-@@ -254,6 +254,11 @@
- command_line.warn_search_mismatch = TRUE;
- command_line.check_section_addresses = TRUE;
-
-+ if (getenv ("LD_SYMBOLIC") != NULL)
-+ command_line.symbolic = symbolic;
-+ else if (getenv ("LD_SYMBOLIC_FUNCTIONS") != NULL)
-+ command_line.symbolic = symbolic_functions;
-+
- /* We initialize DEMANGLING based on the environment variable
- COLLECT_NO_DEMANGLE. The gcc collect2 program will demangle the
- output of the linker, unless COLLECT_NO_DEMANGLE is set in the
+++ /dev/null
-#!/bin/sh -e
-## 201-hjl-bfd-ref-addr.dpatch
-##
-## DP: Description: Support DW_FORM_ref_addr in Dwarf 2 reader in linker.
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl post 2.17.50.0.18, PR ld/3191
-## DP: Original patch: bfd-ref_addr-6.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-2006-09-29 H.J. Lu <hongjiu.lu@intel.com>
-
- PR ld/3191
- * dwarf2.c (find_abstract_instance_name): Pass a pointer to
- attribute instead of offset. For DW_FORM_ref_addr, get the
- entry at the offset from the .debug_info section.
- (scan_unit_for_symbols): Updated.
- (_bfd_dwarf2_find_nearest_line): Adjust debug_info
- section vma when needed.
-
-@DPATCH@
-diff -urNad binutils-2.18~cvs20070812~/bfd/dwarf2.c binutils-2.18~cvs20070812/bfd/dwarf2.c
---- binutils-2.18~cvs20070812~/bfd/dwarf2.c 2007-07-26 10:31:03.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/dwarf2.c 2007-08-12 13:15:54.000000000 +0200
-@@ -1710,16 +1710,30 @@
- }
-
- static char *
--find_abstract_instance_name (struct comp_unit *unit, bfd_uint64_t die_ref)
-+find_abstract_instance_name (struct comp_unit *unit,
-+ struct attribute *attr_ptr)
- {
- bfd *abfd = unit->abfd;
- bfd_byte *info_ptr;
- unsigned int abbrev_number, bytes_read, i;
- struct abbrev_info *abbrev;
-+ bfd_uint64_t die_ref = attr_ptr->u.val;
- struct attribute attr;
- char *name = 0;
-
-- info_ptr = unit->info_ptr_unit + die_ref;
-+ /* DW_FORM_ref_addr can reference an entry in a different CU. It
-+ is an offset from the .debug_info section, not the current CU. */
-+ if (attr_ptr->form == DW_FORM_ref_addr)
-+ {
-+ /* FIXME: How to handle DW_FORM_ref_addr references an entry in
-+ a different file? */
-+ if (!die_ref)
-+ abort ();
-+
-+ info_ptr = unit->stash->sec_info_ptr + die_ref;
-+ }
-+ else
-+ info_ptr = unit->info_ptr_unit + die_ref;
- abbrev_number = read_unsigned_leb128 (abfd, info_ptr, &bytes_read);
- info_ptr += bytes_read;
-
-@@ -1745,7 +1759,7 @@
- name = attr.u.str;
- break;
- case DW_AT_specification:
-- name = find_abstract_instance_name (unit, attr.u.val);
-+ name = find_abstract_instance_name (unit, &attr);
- break;
- case DW_AT_MIPS_linkage_name:
- name = attr.u.str;
-@@ -1907,7 +1921,7 @@
- break;
-
- case DW_AT_abstract_origin:
-- func->name = find_abstract_instance_name (unit, attr.u.val);
-+ func->name = find_abstract_instance_name (unit, &attr);
- break;
-
- case DW_AT_name:
-@@ -2876,6 +2890,11 @@
- bfd *debug_bfd;
- bfd_size_type total_size;
- asection *msec;
-+ bfd_vma last_vma;
-+ bfd_size_type size;
-+ asection *first_msec;
-+ asection **msecs = NULL;
-+ unsigned int i, count;
-
- *pinfo = stash;
-
-@@ -2909,9 +2928,28 @@
- Read them all in and produce one large stash. We do this in two
- passes - in the first pass we just accumulate the section sizes.
- In the second pass we read in the section's contents. The allows
-- us to avoid reallocing the data as we add sections to the stash. */
-+ us to avoid reallocing the data as we add sections to the stash.
-+
-+ We may need to adjust debug_info section vmas since we will
-+ concatenate them together. Otherwise relocations may be
-+ incorrect. */
-+ first_msec = msec;
-+ last_vma = 0;
-+ count = 0;
- for (total_size = 0; msec; msec = find_debug_info (debug_bfd, msec))
-- total_size += msec->size;
-+ {
-+ size = msec->size;
-+ if (size == 0)
-+ continue;
-+
-+ total_size += size;
-+
-+ BFD_ASSERT (msec->vma == 0 && msec->alignment_power == 0);
-+
-+ msec->vma = last_vma;
-+ last_vma += size;
-+ count++;
-+ }
-
- stash->info_ptr = bfd_alloc (debug_bfd, total_size);
- if (stash->info_ptr == NULL)
-@@ -2919,17 +2957,27 @@
-
- stash->info_ptr_end = stash->info_ptr;
-
-- for (msec = find_debug_info (debug_bfd, NULL);
-+ if (count > 1)
-+ {
-+ count--;
-+ msecs = (asection **) bfd_malloc2 (count, sizeof (*msecs));
-+ }
-+
-+ for (i = 0, msec = first_msec;
- msec;
- msec = find_debug_info (debug_bfd, msec))
- {
-- bfd_size_type size;
- bfd_size_type start;
-
- size = msec->size;
- if (size == 0)
- continue;
-
-+ if (i && msecs)
-+ msecs [i - 1] = msec;
-+
-+ i++;
-+
- start = stash->info_ptr_end - stash->info_ptr;
-
- if ((bfd_simple_get_relocated_section_contents
-@@ -2939,9 +2987,27 @@
- stash->info_ptr_end = stash->info_ptr + start + size;
- }
-
-+ /* Restore section vma. */
-+ if (count)
-+ {
-+ if (msecs)
-+ {
-+ for (i = 0; i < count; i++)
-+ msecs [i]->vma = 0;
-+ free (msecs);
-+ }
-+ else
-+ {
-+ for (msec = find_debug_info (debug_bfd, first_msec);
-+ msec;
-+ msec = find_debug_info (debug_bfd, msec))
-+ msec->vma = 0;
-+ }
-+ }
-+
- BFD_ASSERT (stash->info_ptr_end == stash->info_ptr + total_size);
-
-- stash->sec = find_debug_info (debug_bfd, NULL);
-+ stash->sec = first_msec;
- stash->sec_info_ptr = stash->info_ptr;
- stash->syms = symbols;
- stash->bfd = debug_bfd;
+++ /dev/null
-#!/bin/sh -e
-## 203-hjl-binutils-indirect.dpatch
-##
-## DP: Description: PR ld/3351; avoid linker crash on ia64
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl 2.17.50.0.18
-## DP: Original patch: binutils-indirect-1.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-bfd/
-
-2006-10-17 H.J. Lu <hongjiu.lu@intel.com>
-
- PR ld/3351
- * elflink.c (_bfd_elf_update_dynamic_flags): New.
- (_bfd_elf_merge_symbol): Update both real and indirect symbol
- dynamic flags.
- (_bfd_elf_add_default_symbol): Make the real symbol dynamic if
- the indirect symbol is defined in a shared library.
- (elf_link_add_object_symbols): Likewise. If the indirect
- symbol has been forced local, don't make the real symbol
- dynamic.
- (elf_link_check_versioned_symbol): Check indirect symbol.
- (elf_link_output_extsym): Use real symbol definition when
- reporting indirect symbol error. Check version info for
- dynamic versioned symbol.
-
-ld/testsuite/
-
-2006-10-17 H.J. Lu <hongjiu.lu@intel.com>
-
- PR ld/3351
- * ld-elf/indirect.exp: New file.
- * ld-elf/indirect1a.c: Likewise.
- * ld-elf/indirect1b.c: Likewise.
- * ld-elf/indirect1c.c: Likewise.
- * ld-elf/indirect2.c: Likewise.
- * ld-elf/indirect3.out: Likewise.
- * ld-elf/indirect3a.c: Likewise.
- * ld-elf/indirect3b.c: Likewise.
- * ld-elf/indirect3c.c: Likewise.
- * ld-elf/indirect4.out: Likewise.
- * ld-elf/indirect4a.c: Likewise.
- * ld-elf/indirect4b.c: Likewise.
- * ld-elf/indirect4c.c: Likewise.
-
-@DPATCH@
-diff -urNad binutils-2.18~cvs20070812~/bfd/elflink.c binutils-2.18~cvs20070812/bfd/elflink.c
---- binutils-2.18~cvs20070812~/bfd/elflink.c 2007-07-27 03:04:29.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elflink.c 2007-08-12 13:27:51.000000000 +0200
-@@ -823,6 +823,33 @@
- return dynsymcount;
- }
-
-+/* Mark if a symbol has a definition in a dynamic object or is
-+ weak in all dynamic objects. */
-+
-+static void
-+_bfd_elf_mark_dynamic_def_weak (struct elf_link_hash_entry *h,
-+ asection *sec, int bind)
-+{
-+ if (!h->dynamic_def)
-+ {
-+ if (!bfd_is_und_section (sec))
-+ h->dynamic_def = 1;
-+ else
-+ {
-+ /* Check if this symbol is weak in all dynamic objects. If it
-+ is the first time we see it in a dynamic object, we mark
-+ if it is weak. Otherwise, we clear it. */
-+ if (!h->ref_dynamic)
-+ {
-+ if (bind == STB_WEAK)
-+ h->dynamic_weak = 1;
-+ }
-+ else if (bind != STB_WEAK)
-+ h->dynamic_weak = 0;
-+ }
-+ }
-+}
-+
- /* This function is called when we want to define a new symbol. It
- handles the various cases which arise when we find a definition in
- a dynamic object, or when there is already a definition in a
-@@ -851,6 +878,7 @@
- {
- asection *sec, *oldsec;
- struct elf_link_hash_entry *h;
-+ struct elf_link_hash_entry *hi;
- struct elf_link_hash_entry *flip;
- int bind;
- bfd *oldbfd;
-@@ -887,8 +915,9 @@
- if (info->hash->creator != abfd->xvec)
- return TRUE;
-
-- /* For merging, we only care about real symbols. */
--
-+ /* For merging, we only care about real symbols. But we need to make
-+ sure that indirect symbol dynamic flags are updated. */
-+ hi = h;
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
-@@ -1047,23 +1076,11 @@
- /* We need to remember if a symbol has a definition in a dynamic
- object or is weak in all dynamic objects. Internal and hidden
- visibility will make it unavailable to dynamic objects. */
-- if (newdyn && !h->dynamic_def)
-+ if (newdyn)
- {
-- if (!bfd_is_und_section (sec))
-- h->dynamic_def = 1;
-- else
-- {
-- /* Check if this symbol is weak in all dynamic objects. If it
-- is the first time we see it in a dynamic object, we mark
-- if it is weak. Otherwise, we clear it. */
-- if (!h->ref_dynamic)
-- {
-- if (bind == STB_WEAK)
-- h->dynamic_weak = 1;
-- }
-- else if (bind != STB_WEAK)
-- h->dynamic_weak = 0;
-- }
-+ _bfd_elf_mark_dynamic_def_weak (h, sec, bind);
-+ if (h != hi)
-+ _bfd_elf_mark_dynamic_def_weak (hi, sec, bind);
- }
-
- /* If the old symbol has non-default visibility, we ignore the new
-@@ -1075,6 +1092,7 @@
- *skip = TRUE;
- /* Make sure this symbol is dynamic. */
- h->ref_dynamic = 1;
-+ hi->ref_dynamic = 1;
- /* A protected symbol has external availability. Make sure it is
- recorded as dynamic.
-
-@@ -1609,6 +1627,7 @@
- if (! dynamic)
- {
- if (info->shared
-+ || hi->def_dynamic
- || hi->ref_dynamic)
- *dynsym = TRUE;
- }
-@@ -3737,6 +3756,7 @@
- flagword flags;
- const char *name;
- struct elf_link_hash_entry *h;
-+ struct elf_link_hash_entry *hi;
- bfd_boolean definition;
- bfd_boolean size_change_ok;
- bfd_boolean type_change_ok;
-@@ -4026,6 +4046,9 @@
- goto error_free_vers;
-
- h = *sym_hash;
-+ /* We need to make sure that indirect symbol dynamic flags are
-+ updated. */
-+ hi = h;
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
-@@ -4232,22 +4255,36 @@
- }
- else
- h->def_regular = 1;
-- if (! info->executable
-- || h->def_dynamic
-- || h->ref_dynamic)
-+
-+ /* If the indirect symbol has been forced local, don't
-+ make the real symbol dynamic. */
-+ if ((h == hi || !hi->forced_local)
-+ && (! info->executable
-+ || h->def_dynamic
-+ || h->ref_dynamic))
- dynsym = TRUE;
- }
- else
- {
- if (! definition)
-- h->ref_dynamic = 1;
-+ {
-+ h->ref_dynamic = 1;
-+ hi->ref_dynamic = 1;
-+ }
- else
-- h->def_dynamic = 1;
-- if (h->def_regular
-- || h->ref_regular
-- || (h->u.weakdef != NULL
-- && ! new_weakdef
-- && h->u.weakdef->dynindx != -1))
-+ {
-+ h->def_dynamic = 1;
-+ hi->def_dynamic = 1;
-+ }
-+
-+ /* If the indirect symbol has been forced local, don't
-+ make the real symbol dynamic. */
-+ if ((h == hi || !hi->forced_local)
-+ && (h->def_regular
-+ || h->ref_regular
-+ || (h->u.weakdef != NULL
-+ && ! new_weakdef
-+ && h->u.weakdef->dynindx != -1)))
- dynsym = TRUE;
- }
-
-@@ -8396,6 +8433,10 @@
- if (!is_elf_hash_table (info->hash))
- return FALSE;
-
-+ /* Check indirect symbol. */
-+ while (h->root.type == bfd_link_hash_indirect)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+
- switch (h->root.type)
- {
- default:
-@@ -8604,11 +8645,17 @@
- && !h->dynamic_weak
- && ! elf_link_check_versioned_symbol (finfo->info, bed, h))
- {
-+ struct elf_link_hash_entry *hi = h;
-+
-+ /* Check indirect symbol. */
-+ while (hi->root.type == bfd_link_hash_indirect)
-+ hi = (struct elf_link_hash_entry *) hi->root.u.i.link;
-+
- (*_bfd_error_handler)
- (_("%B: %s symbol `%s' in %B is referenced by DSO"),
- finfo->output_bfd,
-- h->root.u.def.section == bfd_abs_section_ptr
-- ? finfo->output_bfd : h->root.u.def.section->owner,
-+ hi->root.u.def.section == bfd_abs_section_ptr
-+ ? finfo->output_bfd : hi->root.u.def.section->owner,
- ELF_ST_VISIBILITY (h->other) == STV_INTERNAL
- ? "internal"
- : ELF_ST_VISIBILITY (h->other) == STV_HIDDEN
-@@ -8804,6 +8851,23 @@
- {
- bfd_byte *esym;
-
-+ /* Since there is no version information in the dynamic string,
-+ if there is no version info in symbol version section, we will
-+ have a run-time problem. */
-+ if (h->verinfo.verdef == NULL)
-+ {
-+ char *p = strrchr (h->root.root.string, ELF_VER_CHR);
-+
-+ if (p && p [1] != '\0')
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: No symbol version section for versioned symbol `%s'"),
-+ finfo->output_bfd, h->root.root.string);
-+ eoinfo->failed = TRUE;
-+ return FALSE;
-+ }
-+ }
-+
- sym.st_name = h->dynstr_index;
- esym = finfo->dynsym_sec->contents + h->dynindx * bed->s->sizeof_sym;
- if (! check_dynsym (finfo->output_bfd, &sym))
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect.exp binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect.exp
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect.exp 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect.exp 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,126 @@
-+# Expect script for various indirect symbol tests.
-+# Copyright 2006 Free Software Foundation, Inc.
-+#
-+# This file is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 2 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+#
-+
-+#
-+# Written by H.J. Lu (hongjiu.lu@intel.com)
-+#
-+
-+# Exclude non-ELF targets.
-+
-+if ![is_elf_format] {
-+ return
-+}
-+
-+# Check if compiler works
-+if { [which $CC] == 0 } {
-+ return
-+}
-+
-+proc check_link_message { cmd string testname } {
-+ send_log "$cmd\n"
-+ verbose "$cmd"
-+ catch "exec $cmd" exec_output
-+ send_log "$exec_output\n"
-+ verbose "$exec_output"
-+
-+ foreach str $string {
-+ if [string match "*$str*" $exec_output] {
-+ pass "$testname: $str"
-+ } else {
-+ fail "$testname: $str"
-+ }
-+ }
-+}
-+
-+if { ![ld_compile $CC $srcdir/$subdir/indirect1a.c tmpdir/indirect1a.o]
-+ || ![ld_compile $CC $srcdir/$subdir/indirect1b.c tmpdir/indirect1b.o]
-+ || ![ld_compile "$CC -fPIC" $srcdir/$subdir/indirect2.c tmpdir/indirect2.o]
-+ || ![ld_compile $CC $srcdir/$subdir/indirect3a.c tmpdir/indirect3a.o]
-+ || ![ld_compile $CC $srcdir/$subdir/indirect3b.c tmpdir/indirect3b.o]
-+ || ![ld_compile $CC $srcdir/$subdir/indirect4a.c tmpdir/indirect4a.o]
-+ || ![ld_compile $CC $srcdir/$subdir/indirect4b.c tmpdir/indirect4b.o] } {
-+ unresolved "Indirect symbol tests"
-+ return
-+}
-+
-+set build_tests {
-+ {"Build libindirect1c.so"
-+ "-shared" "-fPIC"
-+ {indirect1c.c} {} "libindirect1c.so"}
-+ {"Build libindirect3c.so"
-+ "-shared" "-fPIC"
-+ {indirect3c.c} {} "libindirect3c.so"}
-+ {"Build libindirect4c.so"
-+ "-shared" "-fPIC"
-+ {indirect4c.c} {} "libindirect4c.so"}
-+}
-+
-+run_cc_link_tests $build_tests
-+
-+global ld
-+
-+set string ": final link failed: Nonrepresentable section on output"
-+
-+set string1 ": local symbol \`foo\' in tmpdir/indirect1b.o is referenced by DSO"
-+
-+set testname "Indirect symbol 1a"
-+set cmd "$ld -e start -o tmpdir/indirect1 tmpdir/indirect1a.o tmpdir/indirect1b.o tmpdir/libindirect1c.so"
-+check_link_message "$cmd" [list $string1 $string] "$testname"
-+
-+set testname "Indirect symbol 1b"
-+set cmd "$ld -e start -o tmpdir/indirect1 tmpdir/indirect1a.o tmpdir/libindirect1c.so tmpdir/indirect1b.o"
-+check_link_message "$cmd" [list $string1 $string] "$testname"
-+
-+set string2 ": No symbol version section for versioned symbol \`foo@FOO\'"
-+set testname "Indirect symbol 2"
-+set cmd "$ld -shared -o tmpdir/indirect2.so tmpdir/indirect2.o"
-+check_link_message "$cmd" [list $string2 $string] "$testname"
-+
-+# The following tests require running the executable generated by ld.
-+if ![isnative] {
-+ return
-+}
-+
-+set run_tests {
-+ {"Run with libindirect3c.so 1"
-+ "tmpdir/indirect3a.o tmpdir/indirect3b.o tmpdir/libindirect3c.so" ""
-+ {dummy.c} "indirect3a" "indirect3.out"}
-+ {"Run with libindirect3c.so 2"
-+ "tmpdir/indirect3a.o tmpdir/libindirect3c.so tmpdir/indirect3b.o" ""
-+ {dummy.c} "indirect3b" "indirect3.out"}
-+ {"Run with libindirect3c.so 3"
-+ "tmpdir/indirect3b.o tmpdir/libindirect3c.so tmpdir/indirect3a.o" ""
-+ {dummy.c} "indirect3c" "indirect3.out"}
-+ {"Run with libindirect3c.so 4"
-+ "tmpdir/libindirect3c.so tmpdir/indirect3b.o tmpdir/indirect3a.o" ""
-+ {dummy.c} "indirect3d" "indirect3.out"}
-+ {"Run with libindirect4c.so 1"
-+ "tmpdir/indirect4a.o tmpdir/indirect4b.o tmpdir/libindirect4c.so" ""
-+ {dummy.c} "indirect4a" "indirect4.out"}
-+ {"Run with libindirect4c.so 2"
-+ "tmpdir/indirect4a.o tmpdir/libindirect4c.so tmpdir/indirect4b.o" ""
-+ {dummy.c} "indirect4b" "indirect4.out"}
-+ {"Run with libindirect4c.so 3"
-+ "tmpdir/indirect4b.o tmpdir/libindirect4c.so tmpdir/indirect4a.o" ""
-+ {dummy.c} "indirect4c" "indirect4.out"}
-+ {"Run with libindirect4c.so 4"
-+ "tmpdir/libindirect4c.so tmpdir/indirect4b.o tmpdir/indirect4a.o" ""
-+ {dummy.c} "indirect4d" "indirect4.out"}
-+}
-+
-+run_ld_link_exec_tests [] $run_tests
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect1a.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect1a.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect1a.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect1a.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,8 @@
-+extern void bar (void);
-+
-+int
-+start (void)
-+{
-+ bar ();
-+ return 0;
-+}
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect1b.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect1b.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect1b.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect1b.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,6 @@
-+void
-+foo (void)
-+{
-+}
-+
-+asm (".symver foo,foo@FOO");
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect1c.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect1c.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect1c.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect1c.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,7 @@
-+extern void foo (void);
-+
-+void
-+bar (void)
-+{
-+ foo ();
-+}
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect2.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect2.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect2.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect2.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,9 @@
-+extern void foo (void);
-+
-+asm (".symver foo,foo@@@FOO");
-+
-+void
-+bar (void)
-+{
-+ foo ();
-+}
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect3.out binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect3.out
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect3.out 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect3.out 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,2 @@
-+MAIN
-+DSO
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect3a.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect3a.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect3a.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect3a.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,10 @@
-+extern void bar (void);
-+extern void foo (void);
-+
-+int
-+main (void)
-+{
-+ foo ();
-+ bar ();
-+ return 0;
-+}
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect3b.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect3b.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect3b.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect3b.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,9 @@
-+#include <stdio.h>
-+
-+void
-+foo (void)
-+{
-+ printf ("MAIN\n");
-+}
-+
-+asm (".symver foo,foo@FOO");
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect3c.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect3c.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect3c.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect3c.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,15 @@
-+#include <stdio.h>
-+
-+extern void foo (void);
-+
-+void
-+foo (void)
-+{
-+ printf ("DSO\n");
-+}
-+
-+void
-+bar (void)
-+{
-+ foo ();
-+}
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect4.out binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect4.out
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect4.out 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect4.out 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,2 @@
-+MAIN2
-+MAIN2
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect4a.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect4a.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect4a.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect4a.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,10 @@
-+extern void bar (void);
-+extern void foo (void);
-+
-+int
-+main (void)
-+{
-+ foo ();
-+ bar ();
-+ return 0;
-+}
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect4b.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect4b.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect4b.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect4b.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,17 @@
-+#include <stdio.h>
-+
-+void
-+foo2 (void)
-+{
-+ printf ("MAIN2\n");
-+}
-+
-+asm (".symver foo2,foo@@FOO2");
-+
-+void
-+foo1 (void)
-+{
-+ printf ("MAIN1\n");
-+}
-+
-+asm (".symver foo1,foo@FOO1");
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect4c.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect4c.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/indirect4c.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/indirect4c.c 2007-08-12 13:27:51.000000000 +0200
-@@ -0,0 +1,15 @@
-+#include <stdio.h>
-+
-+extern void foo (void);
-+
-+void
-+foo (void)
-+{
-+ printf ("DSO\n");
-+}
-+
-+void
-+bar (void)
-+{
-+ foo ();
-+}
+++ /dev/null
-#!/bin/sh -e
-## 204-hjl-binutils-tls-relro.dpatch
-##
-## DP: Description: PR binutils/3281; objcopy changes PT_GNU_RELRO when there is PT_TLS
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl 2.17.50.0.18
-## DP: Original patch: binutils-tls-relro-14.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-bfd/
-
-2007-01-23 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/3281
- * elf-bfd.h (elf_obj_tdata): Remove relro.
-
- * elf.c (get_program_header_size): Check info->relro instead
- of elf_tdata (abfd)->relro.
- (_bfd_elf_map_sections_to_segments): Likewise.
- (assign_file_positions_for_load_sections): Don't set
- PT_GNU_RELRO segment alignment here.
- (assign_file_positions_for_non_load_sections): Properly set up
- PT_GNU_RELRO segment for copying executable/shared library.
- (elf_section_status): New enum.
- (rewrite_elf_program_header): Add elf_section_status. Remove
- PT_GNU_RELRO segment if a section is modified.
- (copy_private_bfd_data): Updated rewrite_elf_program_header
- call.
-
-include/elf/
-
-2006-10-20 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/3281
- * internal.h (ELF_IS_SECTION_IN_SEGMENT): Allow SHF_TLS
- sections in PT_GNU_RELRO segments.
-
-ld/
-
-2006-10-20 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/3281
- * ldexp.h (ldexp_control): Add relro, relro_start_stat and
- relro_end_stat.
-
- * ldexp.c (fold_binary): Set expld.dataseg.relro to
- exp_dataseg_relro_start or exp_dataseg_relro_end when
- seeing DATA_SEGMENT_ALIGN or DATA_SEGMENT_RELRO_END,
- respectively.
-
- * ldlang.c (lang_size_sections_1): Properly set
- expld.dataseg.relro_start_stat and
- expld.dataseg.relro_end_stat.
- (find_relro_section_callback): New function.
- (lang_find_relro_sections_1): Likewise.
- (lang_find_relro_sections): Likewise.
- (lang_process): Call lang_find_relro_sections for
- non-relocatable link.
-
-ld/testsuite/
-
-2006-10-20 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/3281
- * ld-elf/binutils.exp: Update "-z relro" tests to use relro.s.
- Add "-z relro" tests with TLS for objcopy.
-
- * ld-elf/relro.s: New file.
-
-@DPATCH@
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf-bfd.h binutils-2.18~cvs20070812/bfd/elf-bfd.h
---- binutils-2.18~cvs20070812~/bfd/elf-bfd.h 2007-08-04 18:31:00.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf-bfd.h 2007-08-12 13:31:23.000000000 +0200
-@@ -1428,9 +1428,6 @@
- /* Segment flags for the PT_GNU_STACK segment. */
- unsigned int stack_flags;
-
-- /* Should the PT_GNU_RELRO segment be emitted? */
-- bfd_boolean relro;
--
- /* Symbol version definitions in external objects. */
- Elf_Internal_Verdef *verdef;
-
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf.c binutils-2.18~cvs20070812/bfd/elf.c
---- binutils-2.18~cvs20070812~/bfd/elf.c 2007-08-07 02:06:14.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf.c 2007-08-12 13:31:23.000000000 +0200
-@@ -3321,7 +3321,7 @@
- /* We need a PT_DYNAMIC segment. */
- ++segs;
-
-- if (elf_tdata (abfd)->relro)
-+ if (info->relro)
- {
- /* We need a PT_GNU_RELRO segment only when there is a
- PT_DYNAMIC segment. */
-@@ -3848,7 +3848,7 @@
- pm = &m->next;
- }
-
-- if (dynsec != NULL && elf_tdata (abfd)->relro)
-+ if (dynsec != NULL && info->relro)
- {
- /* We make a PT_GNU_RELRO segment only when there is a
- PT_DYNAMIC segment. */
-@@ -4323,12 +4323,10 @@
- p->p_memsz += this_hdr->sh_size;
- }
-
-- if (p->p_type == PT_GNU_RELRO)
-- p->p_align = 1;
-- else if (align > p->p_align
-- && !m->p_align_valid
-- && (p->p_type != PT_LOAD
-- || (abfd->flags & D_PAGED) == 0))
-+ if (align > p->p_align
-+ && !m->p_align_valid
-+ && (p->p_type != PT_LOAD
-+ || (abfd->flags & D_PAGED) == 0))
- p->p_align = align;
- }
-
-@@ -4477,18 +4475,53 @@
- if (m->count != 0)
- {
- if (p->p_type != PT_LOAD
-- && (p->p_type != PT_NOTE || bfd_get_format (abfd) != bfd_core))
-+ && (p->p_type != PT_NOTE
-+ || bfd_get_format (abfd) != bfd_core))
- {
- Elf_Internal_Shdr *hdr;
-+ asection *sect;
-+
- BFD_ASSERT (!m->includes_filehdr && !m->includes_phdrs);
-
-- hdr = &elf_section_data (m->sections[m->count - 1])->this_hdr;
-- p->p_filesz = (m->sections[m->count - 1]->filepos
-- - m->sections[0]->filepos);
-+ sect = m->sections[m->count - 1];
-+ hdr = &elf_section_data (sect)->this_hdr;
-+ p->p_filesz = sect->filepos - m->sections[0]->filepos;
- if (hdr->sh_type != SHT_NOBITS)
- p->p_filesz += hdr->sh_size;
-
-- p->p_offset = m->sections[0]->filepos;
-+ if (p->p_type == PT_GNU_RELRO)
-+ {
-+ /* When we get here, we are copying executable
-+ or shared library. But we need to use the same
-+ linker logic. */
-+ Elf_Internal_Phdr *lp;
-+
-+ for (lp = phdrs; lp < phdrs + count; ++lp)
-+ {
-+ if (lp->p_type == PT_LOAD
-+ && lp->p_paddr == p->p_paddr)
-+ break;
-+ }
-+
-+ if (lp < phdrs + count)
-+ {
-+ /* The end of PT_GNU_RELRO segment is the next
-+ SEC_ALLOC section after it if it exists. */
-+ if (sect->next != NULL
-+ && (sect->next->flags & SEC_ALLOC) != 0)
-+ p->p_filesz = sect->next->lma - lp->p_vaddr;
-+ else
-+ p->p_filesz += p->p_vaddr - lp->p_vaddr;
-+ p->p_vaddr = lp->p_vaddr;
-+ p->p_offset = lp->p_offset;
-+ p->p_memsz = p->p_filesz;
-+ p->p_align = 1;
-+ }
-+ else
-+ abort ();
-+ }
-+ else
-+ p->p_offset = m->sections[0]->filepos;
- }
- }
- else
-@@ -4923,8 +4956,17 @@
-
- /* Rewrite program header information. */
-
-+enum elf_section_status
-+{
-+ unknown,
-+ added,
-+ removed,
-+ modified
-+};
-+
- static bfd_boolean
--rewrite_elf_program_header (bfd *ibfd, bfd *obfd)
-+rewrite_elf_program_header (bfd *ibfd, bfd *obfd,
-+ enum elf_section_status status)
- {
- Elf_Internal_Ehdr *iehdr;
- struct elf_segment_map *map;
-@@ -5077,7 +5119,14 @@
- }
-
- if (segment->p_type != PT_LOAD)
-- continue;
-+ {
-+ /* If a section is added or mofied, remove PT_GNU_RELRO
-+ segment. */
-+ if (status != removed &&
-+ segment->p_type == PT_GNU_RELRO)
-+ segment->p_type = PT_NULL;
-+ continue;
-+ }
-
- /* Determine if this segment overlaps any previous segments. */
- for (j = 0, segment2 = elf_tdata (ibfd)->phdr; j < i; j++, segment2 ++)
-@@ -5657,6 +5706,12 @@
- static bfd_boolean
- copy_private_bfd_data (bfd *ibfd, bfd *obfd)
- {
-+ enum elf_section_status status;
-+ Elf_Internal_Phdr *segment;
-+ asection *section, *osec;
-+ unsigned int i, num_segments;
-+ Elf_Internal_Shdr *this_hdr;
-+
- if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
- || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
- return TRUE;
-@@ -5664,16 +5719,13 @@
- if (elf_tdata (ibfd)->phdr == NULL)
- return TRUE;
-
-+ status = unknown;
- if (ibfd->xvec == obfd->xvec)
- {
-- /* Check to see if any sections in the input BFD
-- covered by ELF program header have changed. */
-- Elf_Internal_Phdr *segment;
-- asection *section, *osec;
-- unsigned int i, num_segments;
-- Elf_Internal_Shdr *this_hdr;
-+ /* Check to see if any sections in the input BFD covered by ELF
-+ program header have changed.
-
-- /* Initialize the segment mark field. */
-+ Initialize the segment mark field. */
- for (section = obfd->sections; section != NULL;
- section = section->next)
- section->segment_mark = FALSE;
-@@ -5725,7 +5777,10 @@
- section = section->next)
- {
- if (section->segment_mark == FALSE)
-- goto rewrite;
-+ {
-+ status = added;
-+ goto rewrite;
-+ }
- else
- section->segment_mark = FALSE;
- }
-@@ -5734,7 +5789,42 @@
- }
-
- rewrite:
-- return rewrite_elf_program_header (ibfd, obfd);
-+ if (status == unknown)
-+ {
-+ /* We need to find out how we are changed. */
-+ num_segments = elf_elfheader (ibfd)->e_phnum;
-+ for (i = 0, segment = elf_tdata (ibfd)->phdr;
-+ i < num_segments;
-+ i++, segment++)
-+ {
-+ for (section = ibfd->sections;
-+ section != NULL; section = section->next)
-+ {
-+ osec = section->output_section;
-+
-+ /* Check if this section is covered by the segment. */
-+ this_hdr = &(elf_section_data(section)->this_hdr);
-+ if (ELF_IS_SECTION_IN_SEGMENT_FILE (this_hdr, segment))
-+ {
-+ if (osec == NULL)
-+ status = removed;
-+ else if (section->flags != osec->flags
-+ || section->lma != osec->lma
-+ || section->vma != osec->vma
-+ || section->size != osec->size
-+ || section->rawsize != osec->rawsize
-+ || section->alignment_power != osec->alignment_power)
-+ {
-+ /* Stop if a section is modified. */
-+ status = modified;
-+ break;
-+ }
-+ }
-+ }
-+ }
-+ }
-+ BFD_ASSERT (status != unknown);
-+ return rewrite_elf_program_header (ibfd, obfd, status);
- }
-
- /* Initialize private output section information from input section. */
-diff -urNad binutils-2.18~cvs20070812~/bfd/elflink.c binutils-2.18~cvs20070812/bfd/elflink.c
---- binutils-2.18~cvs20070812~/bfd/elflink.c 2007-08-12 13:30:46.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elflink.c 2007-08-12 13:31:23.000000000 +0200
-@@ -5364,7 +5364,6 @@
- return TRUE;
-
- bed = get_elf_backend_data (output_bfd);
-- elf_tdata (output_bfd)->relro = info->relro;
- if (info->execstack)
- elf_tdata (output_bfd)->stack_flags = PF_R | PF_W | PF_X;
- else if (info->noexecstack)
-diff -urNad binutils-2.18~cvs20070812~/include/elf/internal.h binutils-2.18~cvs20070812/include/elf/internal.h
---- binutils-2.18~cvs20070812~/include/elf/internal.h 2007-05-02 15:44:36.000000000 +0200
-+++ binutils-2.18~cvs20070812/include/elf/internal.h 2007-08-12 13:31:23.000000000 +0200
-@@ -266,11 +266,12 @@
- || segment->p_type == PT_TLS) ? sec_hdr->sh_size : 0)
-
- /* Decide if the given sec_hdr is in the given segment. PT_TLS segment
-- contains only SHF_TLS sections. Only PT_LOAD and PT_TLS segments
-- can contain SHF_TLS sections. */
-+ contains only SHF_TLS sections. Only PT_LOAD, PT_GNU_RELRO and
-+ and PT_TLS segments can contain SHF_TLS sections. */
- #define ELF_IS_SECTION_IN_SEGMENT(sec_hdr, segment) \
- (((((sec_hdr->sh_flags & SHF_TLS) != 0) \
- && (segment->p_type == PT_TLS \
-+ || segment->p_type == PT_GNU_RELRO \
- || segment->p_type == PT_LOAD)) \
- || ((sec_hdr->sh_flags & SHF_TLS) == 0 \
- && segment->p_type != PT_TLS)) \
-diff -urNad binutils-2.18~cvs20070812~/ld/ldexp.c binutils-2.18~cvs20070812/ld/ldexp.c
---- binutils-2.18~cvs20070812~/ld/ldexp.c 2007-07-06 16:09:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/ldexp.c 2007-08-12 13:31:23.000000000 +0200
-@@ -390,6 +390,7 @@
- break;
-
- case DATA_SEGMENT_ALIGN:
-+ expld.dataseg.relro = exp_dataseg_relro_start;
- if (expld.phase != lang_first_phase_enum
- && expld.section == bfd_abs_section_ptr
- && (expld.dataseg.phase == exp_dataseg_none
-@@ -425,6 +426,7 @@
- break;
-
- case DATA_SEGMENT_RELRO_END:
-+ expld.dataseg.relro = exp_dataseg_relro_end;
- if (expld.phase != lang_first_phase_enum
- && (expld.dataseg.phase == exp_dataseg_align_seen
- || expld.dataseg.phase == exp_dataseg_adjust
-diff -urNad binutils-2.18~cvs20070812~/ld/ldexp.h binutils-2.18~cvs20070812/ld/ldexp.h
---- binutils-2.18~cvs20070812~/ld/ldexp.h 2007-07-06 16:09:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/ldexp.h 2007-08-12 13:31:23.000000000 +0200
-@@ -98,6 +98,8 @@
- lang_final_phase_enum
- } lang_phase_type;
-
-+union lang_statement_union;
-+
- struct ldexp_control {
- /* Modify expression evaluation depending on this. */
- lang_phase_type phase;
-@@ -125,6 +127,15 @@
- } phase;
-
- bfd_vma base, min_base, relro_end, end, pagesize, maxpagesize;
-+
-+ enum {
-+ exp_dataseg_relro_none,
-+ exp_dataseg_relro_start,
-+ exp_dataseg_relro_end,
-+ } relro;
-+
-+ union lang_statement_union *relro_start_stat;
-+ union lang_statement_union *relro_end_stat;
- } dataseg;
- };
-
-diff -urNad binutils-2.18~cvs20070812~/ld/ldlang.c binutils-2.18~cvs20070812/ld/ldlang.c
---- binutils-2.18~cvs20070812~/ld/ldlang.c 2007-07-29 14:33:37.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/ldlang.c 2007-08-12 13:31:23.000000000 +0200
-@@ -4631,10 +4631,32 @@
- bfd_vma newdot = dot;
- etree_type *tree = s->assignment_statement.exp;
-
-+ expld.dataseg.relro = exp_dataseg_relro_none;
-+
- exp_fold_tree (tree,
- output_section_statement->bfd_section,
- &newdot);
-
-+ if (expld.dataseg.relro == exp_dataseg_relro_start)
-+ {
-+ if (!expld.dataseg.relro_start_stat)
-+ expld.dataseg.relro_start_stat = s;
-+ else
-+ {
-+ ASSERT (expld.dataseg.relro_start_stat == s);
-+ }
-+ }
-+ else if (expld.dataseg.relro == exp_dataseg_relro_end)
-+ {
-+ if (!expld.dataseg.relro_end_stat)
-+ expld.dataseg.relro_end_stat = s;
-+ else
-+ {
-+ ASSERT (expld.dataseg.relro_end_stat == s);
-+ }
-+ }
-+ expld.dataseg.relro = exp_dataseg_relro_none;
-+
- /* This symbol is relative to this section. */
- if ((tree->type.node_class == etree_provided
- || tree->type.node_class == etree_assign)
-@@ -5660,6 +5682,81 @@
- bfd_gc_sections (output_bfd, &link_info);
- }
-
-+/* Worker for lang_find_relro_sections_1. */
-+
-+static void
-+find_relro_section_callback (lang_wild_statement_type *ptr ATTRIBUTE_UNUSED,
-+ struct wildcard_list *sec ATTRIBUTE_UNUSED,
-+ asection *section,
-+ lang_input_statement_type *file ATTRIBUTE_UNUSED,
-+ void *data)
-+{
-+ /* Discarded, excluded and ignored sections effectively have zero
-+ size. */
-+ if (section->output_section != NULL
-+ && section->output_section->owner == output_bfd
-+ && (section->output_section->flags & SEC_EXCLUDE) == 0
-+ && !IGNORE_SECTION (section)
-+ && section->size != 0)
-+ {
-+ bfd_boolean *has_relro_section = (bfd_boolean *) data;
-+ *has_relro_section = TRUE;
-+ }
-+}
-+
-+/* Iterate over sections for relro sections. */
-+
-+static void
-+lang_find_relro_sections_1 (lang_statement_union_type *s,
-+ bfd_boolean *has_relro_section)
-+{
-+ if (*has_relro_section)
-+ return;
-+
-+ for (; s != NULL; s = s->header.next)
-+ {
-+ if (s == expld.dataseg.relro_end_stat)
-+ break;
-+
-+ switch (s->header.type)
-+ {
-+ case lang_wild_statement_enum:
-+ walk_wild (&s->wild_statement,
-+ find_relro_section_callback,
-+ has_relro_section);
-+ break;
-+ case lang_constructors_statement_enum:
-+ lang_find_relro_sections_1 (constructor_list.head,
-+ has_relro_section);
-+ break;
-+ case lang_output_section_statement_enum:
-+ lang_find_relro_sections_1 (s->output_section_statement.children.head,
-+ has_relro_section);
-+ break;
-+ case lang_group_statement_enum:
-+ lang_find_relro_sections_1 (s->group_statement.children.head,
-+ has_relro_section);
-+ break;
-+ default:
-+ break;
-+ }
-+ }
-+}
-+
-+static void
-+lang_find_relro_sections (void)
-+{
-+ bfd_boolean has_relro_section = FALSE;
-+
-+ /* Check all sections in the link script. */
-+
-+ lang_find_relro_sections_1 (expld.dataseg.relro_start_stat,
-+ &has_relro_section);
-+
-+ if (!has_relro_section)
-+ link_info.relro = FALSE;
-+}
-+
- /* Relax all sections until bfd_relax_section gives up. */
-
- static void
-@@ -5787,6 +5884,10 @@
- section positions, since they will affect SIZEOF_HEADERS. */
- lang_record_phdrs ();
-
-+ /* Check relro sections. */
-+ if (link_info.relro && ! link_info.relocatable)
-+ lang_find_relro_sections ();
-+
- /* Size up the sections. */
- lang_size_sections (NULL, !command_line.relax);
-
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/binutils.exp binutils-2.18~cvs20070812/ld/testsuite/ld-elf/binutils.exp
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/binutils.exp 2007-07-06 16:09:43.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/binutils.exp 2007-08-12 13:31:23.000000000 +0200
-@@ -104,24 +104,33 @@
- binutils_test objcopy "" maxpage1
- binutils_test objcopy "-shared" maxpage1
-
--binutils_test strip "-z relro" maxpage1
--binutils_test strip "-z relro -shared" maxpage1
--binutils_test objcopy "-z relro" maxpage1
--binutils_test objcopy "-z relro -shared" maxpage1
-+binutils_test strip "-z relro" relro
-+binutils_test strip "-z relro -shared" relro
-+binutils_test objcopy "-z relro" relro
-+binutils_test objcopy "-z relro -shared" relro
-
- binutils_test objcopy "" tbss1
-+binutils_test objcopy "-z relro" tbss1
- binutils_test objcopy "-shared" tbss1
-+binutils_test objcopy "-shared -z relro" tbss1
- binutils_test objcopy "-z max-page-size=0x100000" tbss1
- binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tbss1
- binutils_test objcopy "" tdata1
-+binutils_test objcopy "-z relro" tdata1
- binutils_test objcopy "-shared" tdata1
-+binutils_test objcopy "-shared -z relro" tdata1
- binutils_test objcopy "-z max-page-size=0x100000" tdata1
- binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tdata1
- binutils_test objcopy "" tbss2
-+binutils_test objcopy "-z relro" tbss2
- binutils_test objcopy "-shared" tbss2
-+binutils_test objcopy "-shared -z relro" tbss2
- binutils_test objcopy "-z max-page-size=0x100000" tbss2
- binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tbss2
--binutils_test objcopy "-z max-page-size=0x100000" tdata2
-+
- binutils_test objcopy "" tdata2
-+binutils_test objcopy "-z relro" tdata2
- binutils_test objcopy "-shared" tdata2
-+binutils_test objcopy "-shared -z relro" tdata2
-+binutils_test objcopy "-z max-page-size=0x100000" tdata2
- binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tdata2
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/relro.s binutils-2.18~cvs20070812/ld/testsuite/ld-elf/relro.s
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/relro.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/relro.s 2007-08-12 13:31:23.000000000 +0200
-@@ -0,0 +1,14 @@
-+ .globl main
-+ .globl start
-+ .globl _start
-+ .globl __start
-+ .text
-+main:
-+start:
-+_start:
-+__start:
-+ .long 0
-+ .data
-+ .long 0
-+ .section .data.rel.ro,"aw",%progbits
-+ .long 0
+++ /dev/null
-#!/bin/sh -e
-## 206-hjl-binutils-shr.dpatch
-##
-## DP: Description: implementation of ELF sharable section proposal
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl 2.17.50.0.18
-## DP: Original patch: binutils-shr-82.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-http://groups.google.com/group/generic-abi/browse_thread/thread/f7b3e06417ead85a
-http://groups.google.com/group/generic-abi/browse_thread/thread/bca08f6560f61b0d
-
-bfd/
-
-2007-01-23 H.J. Lu <hongjiu.lu@intel.com>
-
- * elf-bfd.h (_bfd_elf_sharable_com_section): New.
- (_bfd_elf_add_sharable_symbol): Likewise.
- (_bfd_elf_sharable_section_from_bfd_section): Likewise.
- (_bfd_elf_sharable_symbol_processing): Likewise.
- (_bfd_elf_sharable_common_definition): Likewise.
- (_bfd_elf_sharable_common_section_index): Likewise.
- (_bfd_elf_sharable_common_section): Likewise.
- (_bfd_elf_sharable_merge_symbol): Likewise.
-
- * elf.c (special_sections_g): Add ".gnu.linkonce.shrb" and
- ".gnu.linkonce.shrd".
- (special_sections_s): Add ".sharable_bss" and ".sharable_data".
- (get_program_header_size): Handle PT_GNU_SHR segment.
- (_bfd_elf_map_sections_to_segments): Likewise.
- (assign_file_positions_for_load_sections): Likewise.
-
- * elf32-i386.c (elf_i386_link_hash_table): Add sdynsharablebss
- and srelsharablebss fields.
- (elf_i386_link_hash_table_create): Initialize sdynsharablebss
- and srelsharablebss.
- (elf_i386_create_dynamic_sections): Handle sdynsharablebss and
- srelsharablebss.
- (elf_i386_adjust_dynamic_symbol): Likewise.
- (elf_i386_size_dynamic_sections): Likewise.
- (elf_i386_finish_dynamic_symbol): Likewise.
- (elf_backend_add_symbol_hook): Defined.
- (elf_backend_section_from_bfd_section): Likewise.
- (elf_backend_symbol_processing): Likewise.
- (elf_backend_common_section_index): Likewise.
- (elf_backend_common_section): Likewise.
- (elf_backend_common_definition): Likewise.
- (elf_backend_merge_symbol): Likewise.
-
- * elf64-x86-64.c (elf64_x86_64_link_hash_table): Add
- sdynsharablebss and srelsharablebss fields.
- (elf64_x86_64_link_hash_table_create): Initialize sdynsharablebss
- and srelsharablebss.
- (elf64_x86_64_create_dynamic_sections): Handle sdynsharablebss
- and srelsharablebss.
- (elf64_x86_64_adjust_dynamic_symbol): Likewise.
- (elf64_x86_64_size_dynamic_sections): Likewise.
- (elf64_x86_64_finish_dynamic_symbol): Likewise.
- (elf64_x86_64_add_symbol_hook): Handle sharable symbols.
- (elf64_x86_64_elf_section_from_bfd_section): Likewise.
- (elf64_x86_64_symbol_processing): Likewise.
- (elf64_x86_64_merge_symbol): Likewise.
- (elf64_x86_64_common_definition): Handle sharable sections.
- (elf64_x86_64_common_section_index): Likewise.
- (elf64_x86_64_common_section): Likewise.
-
- * elflink.c (_bfd_elf_create_dynamic_sections): Handle
- .dynsharablebss section.
- (_bfd_elf_sharable_com_section): New.
- (get_sharable_common_section): Likewise.
- (_bfd_elf_add_sharable_symbol): Likewise.
- (_bfd_elf_sharable_section_from_bfd_section): Likewise.
- (_bfd_elf_sharable_symbol_processing): Likewise.
- (_bfd_elf_sharable_common_definition): Likewise.
- (_bfd_elf_sharable_common_section_index): Likewise.
- (_bfd_elf_sharable_common_section): Likewise.
- (_bfd_elf_sharable_merge_symbol): Likewise.
-
- * elfxx-ia64.c (elfNN_ia64_add_symbol_hook): Handle sharable
- symbols.
- (elf_backend_add_symbol_hook): Defined.
- (elf_backend_section_from_bfd_section): Likewise.
- (elf_backend_symbol_processing): Likewise.
- (elf_backend_common_section_index): Likewise.
- (elf_backend_common_section): Likewise.
- (elf_backend_common_definition): Likewise.
- (elf_backend_merge_symbol): Likewise.
-
-binutils/
-
-2007-01-04 H.J. Lu <hongjiu.lu@intel.com>
-
- * readelf.c (dump_relocations): Handle sharable sections.
- (get_segment_type): Handle sharable segment.
- (get_symbol_index_type): Handle sharable sections.
-
-gas/
-
-2007-01-04 H.J. Lu <hongjiu.lu@intel.com>
-
- * config/obj-elf.c (obj_elf_sharable_common): New.
- (elf_pseudo_table): Add "sharable_common".
- (obj_elf_change_section): Handle sharable sections.
-
-include/
-
-2007-01-23 H.J. Lu <hongjiu.lu@intel.com>
-
- * bfdlink.h (bfd_link_info): Add sharable_sections.
-
-include/elf/
-
-2007-01-04 H.J. Lu <hongjiu.lu@intel.com>
-
- * common.h (PT_GNU_SHR): New.
- (SHF_GNU_SHARABLE): Likewise.
- (SHN_GNU_SHARABLE_COMMON): Likewise.
-
-ld/
-
-2007-01-04 H.J. Lu <hongjiu.lu@intel.com>
-
- * emulparams/elf64_ia64.sh (SHARABLE_SECTIONS): Set to yes.
- * emulparams/elf_i386.sh (SHARABLE_SECTIONS): Likewise.
- * emulparams/elf_x86_64.sh (SHARABLE_SECTIONS): Likewise.
-
- * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set
- link_info.sharable_sections based on $SHARABLE_SECTIONS.
- (gld${EMULATION_NAME}_place_orphan): Don't allow orphaned
- sharable sections.
-
- * ldmain.c (main): Initialize link_info.sharable_sections.
- * scripttempl/elf.sc: Support sharable sections.
-
-@DPATCH@
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf-bfd.h binutils-2.18~cvs20070812/bfd/elf-bfd.h
---- binutils-2.18~cvs20070812~/bfd/elf-bfd.h 2007-08-12 13:32:34.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf-bfd.h 2007-08-12 13:32:59.000000000 +0200
-@@ -1929,6 +1929,28 @@
- (bfd *, struct bfd_link_info *);
- extern bfd_boolean _bfd_elf_add_dynamic_entry
- (struct bfd_link_info *, bfd_vma, bfd_vma);
-+extern asection _bfd_elf_sharable_com_section;
-+extern bfd_boolean _bfd_elf_add_sharable_symbol
-+ (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
-+ flagword *, asection **, bfd_vma *);
-+extern bfd_boolean _bfd_elf_sharable_section_from_bfd_section
-+ (bfd *, asection *, int *);
-+extern void _bfd_elf_sharable_symbol_processing
-+ (bfd *, asymbol *);
-+extern bfd_boolean _bfd_elf_sharable_common_definition
-+ (Elf_Internal_Sym *);
-+extern unsigned int _bfd_elf_sharable_common_section_index
-+ (asection *);
-+extern asection *_bfd_elf_sharable_common_section
-+ (asection *);
-+extern bfd_boolean _bfd_elf_sharable_merge_symbol
-+ (struct bfd_link_info *, struct elf_link_hash_entry **,
-+ struct elf_link_hash_entry *, Elf_Internal_Sym *, asection **,
-+ bfd_vma *, unsigned int *, bfd_boolean *, bfd_boolean *,
-+ bfd_boolean *, bfd_boolean *, bfd_boolean *, bfd_boolean *,
-+ bfd_boolean *, bfd_boolean *, bfd *, asection **,
-+ bfd_boolean *, bfd_boolean *, bfd_boolean *, bfd_boolean *,
-+ bfd *, asection **);
-
- extern bfd_boolean bfd_elf_link_record_dynamic_symbol
- (struct bfd_link_info *, struct elf_link_hash_entry *);
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf.c binutils-2.18~cvs20070812/bfd/elf.c
---- binutils-2.18~cvs20070812~/bfd/elf.c 2007-08-12 13:32:34.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf.c 2007-08-12 13:32:59.000000000 +0200
-@@ -1992,6 +1992,8 @@
- { STRING_COMMA_LEN (".gnu.liblist"), 0, SHT_GNU_LIBLIST, SHF_ALLOC },
- { STRING_COMMA_LEN (".gnu.conflict"), 0, SHT_RELA, SHF_ALLOC },
- { STRING_COMMA_LEN (".gnu.hash"), 0, SHT_GNU_HASH, SHF_ALLOC },
-+ { STRING_COMMA_LEN (".gnu.linkonce.shrb"), -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_GNU_SHARABLE},
-+ { STRING_COMMA_LEN (".gnu.linkonce.shrd"), -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_GNU_SHARABLE},
- { NULL, 0, 0, 0, 0 }
- };
-
-@@ -2046,6 +2048,8 @@
- /* See struct bfd_elf_special_section declaration for the semantics of
- this special case where .prefix_length != strlen (.prefix). */
- { ".stabstr", 5, 3, SHT_STRTAB, 0 },
-+ { STRING_COMMA_LEN (".sharable_bss"), -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_GNU_SHARABLE},
-+ { STRING_COMMA_LEN (".sharable_data"), -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_GNU_SHARABLE},
- { NULL, 0, 0, 0, 0 }
- };
-
-@@ -3374,6 +3378,32 @@
- }
- }
-
-+ /* Check to see if we need a PT_GNU_SHR segment for sharable data
-+ sections. */
-+ for (s = abfd->sections; s != NULL; s = s->next)
-+ {
-+ if ((elf_section_flags (s) & SHF_GNU_SHARABLE) != 0
-+ && elf_section_type (s) == SHT_PROGBITS)
-+ {
-+ /* We need a PT_GNU_SHR segment. */
-+ ++segs;
-+ break;
-+ }
-+ }
-+
-+ /* Check to see if we need a PT_GNU_SHR segment for sharable bss
-+ sections. */
-+ for (s = abfd->sections; s != NULL; s = s->next)
-+ {
-+ if ((elf_section_flags (s) & SHF_GNU_SHARABLE) != 0
-+ && elf_section_type (s) == SHT_NOBITS)
-+ {
-+ /* We need a PT_GNU_SHR segment. */
-+ ++segs;
-+ break;
-+ }
-+ }
-+
- /* Let the backend count up any program headers it might need. */
- bed = get_elf_backend_data (abfd);
- if (bed->elf_backend_additional_program_headers)
-@@ -3514,6 +3544,8 @@
- bfd_boolean phdr_in_segment = TRUE;
- bfd_boolean writable;
- int tls_count = 0;
-+ int sharable_data_count = 0, sharable_bss_count = 0;
-+ asection *first_sharable_data = NULL, *first_sharable_bss = NULL;
- asection *first_tls = NULL;
- asection *dynsec, *eh_frame_hdr;
- bfd_size_type amt;
-@@ -3785,6 +3817,22 @@
- first_tls = s;
- tls_count++;
- }
-+ if (elf_section_flags (s) & SHF_GNU_SHARABLE)
-+ {
-+ if (elf_section_type (s) == SHT_PROGBITS)
-+ {
-+ if (! sharable_data_count)
-+ first_sharable_data = s;
-+ sharable_data_count++;
-+ }
-+ else
-+ {
-+ BFD_ASSERT (elf_section_type (s) == SHT_NOBITS);
-+ if (! sharable_bss_count)
-+ first_sharable_bss = s;
-+ sharable_bss_count++;
-+ }
-+ }
- }
-
- /* If there are any SHF_TLS output sections, add PT_TLS segment. */
-@@ -3814,6 +3862,60 @@
- pm = &m->next;
- }
-
-+ /* If there are any output SHF_GNU_SHARABLE data sections, add a
-+ PT_GNU_SHR segment. */
-+ if (sharable_data_count > 0)
-+ {
-+ int i;
-+
-+ amt = sizeof (struct elf_segment_map);
-+ amt += (sharable_data_count - 1) * sizeof (asection *);
-+ m = bfd_zalloc (abfd, amt);
-+ if (m == NULL)
-+ goto error_return;
-+ m->next = NULL;
-+ m->p_type = PT_GNU_SHR;
-+ m->count = sharable_data_count;
-+ /* Mandated PF_R. */
-+ m->p_flags = PF_R;
-+ m->p_flags_valid = 1;
-+ for (i = 0; i < sharable_data_count; ++i)
-+ {
-+ m->sections[i] = first_sharable_data;
-+ first_sharable_data = first_sharable_data->next;
-+ }
-+
-+ *pm = m;
-+ pm = &m->next;
-+ }
-+
-+ /* If there are any output SHF_GNU_SHARABLE bss sections, add a
-+ PT_GNU_SHR segment. */
-+ if (sharable_bss_count > 0)
-+ {
-+ int i;
-+
-+ amt = sizeof (struct elf_segment_map);
-+ amt += (sharable_bss_count - 1) * sizeof (asection *);
-+ m = bfd_zalloc (abfd, amt);
-+ if (m == NULL)
-+ goto error_return;
-+ m->next = NULL;
-+ m->p_type = PT_GNU_SHR;
-+ m->count = sharable_bss_count;
-+ /* Mandated PF_R. */
-+ m->p_flags = PF_R;
-+ m->p_flags_valid = 1;
-+ for (i = 0; i < sharable_bss_count; ++i)
-+ {
-+ m->sections[i] = first_sharable_bss;
-+ first_sharable_bss = first_sharable_bss->next;
-+ }
-+
-+ *pm = m;
-+ pm = &m->next;
-+ }
-+
- /* If there is a .eh_frame_hdr section, throw in a PT_GNU_EH_FRAME
- segment. */
- eh_frame_hdr = elf_tdata (abfd)->eh_frame_hdr;
-@@ -4247,6 +4349,7 @@
- align = (bfd_size_type) 1 << bfd_get_section_alignment (abfd, sec);
-
- if (p->p_type == PT_LOAD
-+ || p->p_type == PT_GNU_SHR
- || p->p_type == PT_TLS)
- {
- bfd_signed_vma adjust = sec->lma - (p->p_paddr + p->p_memsz);
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-i386.c binutils-2.18~cvs20070812/bfd/elf32-i386.c
---- binutils-2.18~cvs20070812~/bfd/elf32-i386.c 2007-07-27 20:50:18.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-i386.c 2007-08-12 13:32:59.000000000 +0200
-@@ -661,6 +661,8 @@
- asection *srelplt;
- asection *sdynbss;
- asection *srelbss;
-+ asection *sdynsharablebss;
-+ asection *srelsharablebss;
-
- /* The (unloaded but important) .rel.plt.unloaded section on VxWorks. */
- asection *srelplt2;
-@@ -753,6 +755,8 @@
- ret->srelplt = NULL;
- ret->sdynbss = NULL;
- ret->srelbss = NULL;
-+ ret->sdynsharablebss = NULL;
-+ ret->srelsharablebss = NULL;
- ret->tls_ldm_got.refcount = 0;
- ret->next_tls_desc_index = 0;
- ret->sgotplt_jump_table_size = 0;
-@@ -813,10 +817,19 @@
- htab->srelplt = bfd_get_section_by_name (dynobj, ".rel.plt");
- htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
- if (!info->shared)
-- htab->srelbss = bfd_get_section_by_name (dynobj, ".rel.bss");
-+ {
-+ htab->srelbss = bfd_get_section_by_name (dynobj, ".rel.bss");
-+ htab->sdynsharablebss
-+ = bfd_get_section_by_name (dynobj, ".dynsharablebss");
-+ htab->srelsharablebss
-+ = bfd_get_section_by_name (dynobj, ".rel.sharable_bss");
-+ }
-
- if (!htab->splt || !htab->srelplt || !htab->sdynbss
-- || (!info->shared && !htab->srelbss))
-+ || (!info->shared
-+ && (!htab->srelbss
-+ || !htab->sdynsharablebss
-+ || !htab->srelsharablebss)))
- abort ();
-
- if (htab->is_vxworks
-@@ -1534,17 +1547,23 @@
- both the dynamic object and the regular object will refer to the
- same memory location for the variable. */
-
-+ s = htab->sdynbss;
-+
- /* We must generate a R_386_COPY reloc to tell the dynamic linker to
- copy the initial value out of the dynamic object and into the
- runtime process image. */
- if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
- {
-- htab->srelbss->size += sizeof (Elf32_External_Rel);
-+ if (elf_section_flags (h->root.u.def.section) & SHF_GNU_SHARABLE)
-+ {
-+ htab->srelsharablebss->size += sizeof (Elf32_External_Rel);
-+ s = htab->sdynsharablebss;
-+ }
-+ else
-+ htab->srelbss->size += sizeof (Elf32_External_Rel);
- h->needs_copy = 1;
- }
-
-- s = htab->sdynbss;
--
- return _bfd_elf_adjust_dynamic_copy (h, s);
- }
-
-@@ -1998,7 +2017,8 @@
- if (s == htab->splt
- || s == htab->sgot
- || s == htab->sgotplt
-- || s == htab->sdynbss)
-+ || s == htab->sdynbss
-+ || s == htab->sdynsharablebss)
- {
- /* Strip this section if we don't need it; see the
- comment below. */
-@@ -3536,21 +3556,27 @@
- {
- Elf_Internal_Rela rel;
- bfd_byte *loc;
-+ asection *s;
-+
-+ if (h->root.u.def.section == htab->sdynsharablebss)
-+ s = htab->srelsharablebss;
-+ else
-+ s = htab->srelbss;
-
- /* This symbol needs a copy reloc. Set it up. */
-
- if (h->dynindx == -1
- || (h->root.type != bfd_link_hash_defined
- && h->root.type != bfd_link_hash_defweak)
-- || htab->srelbss == NULL)
-+ || s == NULL)
- abort ();
-
- rel.r_offset = (h->root.u.def.value
- + h->root.u.def.section->output_section->vma
- + h->root.u.def.section->output_offset);
- rel.r_info = ELF32_R_INFO (h->dynindx, R_386_COPY);
-- loc = htab->srelbss->contents;
-- loc += htab->srelbss->reloc_count++ * sizeof (Elf32_External_Rel);
-+ loc = s->contents;
-+ loc += s->reloc_count++ * sizeof (Elf32_External_Rel);
- bfd_elf32_swap_reloc_out (output_bfd, &rel, loc);
- }
-
-@@ -3838,6 +3864,21 @@
- #define elf_backend_plt_sym_val elf_i386_plt_sym_val
- #define elf_backend_hash_symbol elf_i386_hash_symbol
-
-+#define elf_backend_add_symbol_hook \
-+ _bfd_elf_add_sharable_symbol
-+#define elf_backend_section_from_bfd_section \
-+ _bfd_elf_sharable_section_from_bfd_section
-+#define elf_backend_symbol_processing \
-+ _bfd_elf_sharable_symbol_processing
-+#define elf_backend_common_section_index \
-+ _bfd_elf_sharable_common_section_index
-+#define elf_backend_common_section \
-+ _bfd_elf_sharable_common_section
-+#define elf_backend_common_definition \
-+ _bfd_elf_sharable_common_definition
-+#define elf_backend_merge_symbol \
-+ _bfd_elf_sharable_merge_symbol
-+
- #include "elf32-target.h"
-
- /* FreeBSD support. */
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf64-x86-64.c binutils-2.18~cvs20070812/bfd/elf64-x86-64.c
---- binutils-2.18~cvs20070812~/bfd/elf64-x86-64.c 2007-07-03 16:26:42.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf64-x86-64.c 2007-08-12 13:32:59.000000000 +0200
-@@ -470,6 +470,8 @@
- asection *srelplt;
- asection *sdynbss;
- asection *srelbss;
-+ asection *sdynsharablebss;
-+ asection *srelsharablebss;
-
- /* The offset into splt of the PLT entry for the TLS descriptor
- resolver. Special values are 0, if not necessary (or not found
-@@ -557,6 +559,8 @@
- ret->srelplt = NULL;
- ret->sdynbss = NULL;
- ret->srelbss = NULL;
-+ ret->sdynsharablebss = NULL;
-+ ret->srelsharablebss = NULL;
- ret->sym_sec.abfd = NULL;
- ret->tlsdesc_plt = 0;
- ret->tlsdesc_got = 0;
-@@ -615,10 +619,19 @@
- htab->srelplt = bfd_get_section_by_name (dynobj, ".rela.plt");
- htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
- if (!info->shared)
-- htab->srelbss = bfd_get_section_by_name (dynobj, ".rela.bss");
-+ {
-+ htab->srelbss = bfd_get_section_by_name (dynobj, ".rela.bss");
-+ htab->sdynsharablebss
-+ = bfd_get_section_by_name (dynobj, ".dynsharablebss");
-+ htab->srelsharablebss
-+ = bfd_get_section_by_name (dynobj, ".rela.sharable_bss");
-+ }
-
- if (!htab->splt || !htab->srelplt || !htab->sdynbss
-- || (!info->shared && !htab->srelbss))
-+ || (!info->shared
-+ && (!htab->srelbss
-+ || !htab->sdynsharablebss
-+ || !htab->srelsharablebss)))
- abort ();
-
- return TRUE;
-@@ -1396,17 +1409,23 @@
-
- htab = elf64_x86_64_hash_table (info);
-
-+ s = htab->sdynbss;
-+
- /* We must generate a R_X86_64_COPY reloc to tell the dynamic linker
- to copy the initial value out of the dynamic object and into the
- runtime process image. */
- if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
- {
-- htab->srelbss->size += sizeof (Elf64_External_Rela);
-+ if (elf_section_flags (h->root.u.def.section) & SHF_GNU_SHARABLE)
-+ {
-+ htab->srelsharablebss->size += sizeof (Elf64_External_Rela);
-+ s = htab->sdynsharablebss;
-+ }
-+ else
-+ htab->srelbss->size += sizeof (Elf64_External_Rela);
- h->needs_copy = 1;
- }
-
-- s = htab->sdynbss;
--
- return _bfd_elf_adjust_dynamic_copy (h, s);
- }
-
-@@ -1854,7 +1873,8 @@
- if (s == htab->splt
- || s == htab->sgot
- || s == htab->sgotplt
-- || s == htab->sdynbss)
-+ || s == htab->sdynbss
-+ || s == htab->sdynsharablebss)
- {
- /* Strip this section if we don't need it; see the
- comment below. */
-@@ -3193,13 +3213,19 @@
- {
- Elf_Internal_Rela rela;
- bfd_byte *loc;
-+ asection *s;
-+
-+ if (h->root.u.def.section == htab->sdynsharablebss)
-+ s = htab->srelsharablebss;
-+ else
-+ s = htab->srelbss;
-
- /* This symbol needs a copy reloc. Set it up. */
-
- if (h->dynindx == -1
- || (h->root.type != bfd_link_hash_defined
- && h->root.type != bfd_link_hash_defweak)
-- || htab->srelbss == NULL)
-+ || s == NULL)
- abort ();
-
- rela.r_offset = (h->root.u.def.value
-@@ -3207,8 +3233,8 @@
- + h->root.u.def.section->output_offset);
- rela.r_info = ELF64_R_INFO (h->dynindx, R_X86_64_COPY);
- rela.r_addend = 0;
-- loc = htab->srelbss->contents;
-- loc += htab->srelbss->reloc_count++ * sizeof (Elf64_External_Rela);
-+ loc = s->contents;
-+ loc += s->reloc_count++ * sizeof (Elf64_External_Rela);
- bfd_elf64_swap_reloca_out (output_bfd, &rela, loc);
- }
-
-@@ -3472,9 +3498,12 @@
- }
- *secp = lcomm;
- *valp = sym->st_size;
-+ return TRUE;
- break;
- }
-- return TRUE;
-+
-+ return _bfd_elf_add_sharable_symbol (abfd, info, sym, namep, flagsp,
-+ secp, valp);
- }
-
-
-@@ -3490,7 +3519,7 @@
- *index = SHN_X86_64_LCOMMON;
- return TRUE;
- }
-- return FALSE;
-+ return _bfd_elf_sharable_section_from_bfd_section (abfd, sec, index);
- }
-
- /* Process a symbol. */
-@@ -3508,22 +3537,26 @@
- asym->value = elfsym->internal_elf_sym.st_size;
- /* Common symbol doesn't set BSF_GLOBAL. */
- asym->flags &= ~BSF_GLOBAL;
-+ return;
- break;
- }
-+
-+ _bfd_elf_sharable_symbol_processing (abfd, asym);
- }
-
- static bfd_boolean
- elf64_x86_64_common_definition (Elf_Internal_Sym *sym)
- {
- return (sym->st_shndx == SHN_COMMON
-- || sym->st_shndx == SHN_X86_64_LCOMMON);
-+ || sym->st_shndx == SHN_X86_64_LCOMMON
-+ || _bfd_elf_sharable_common_definition (sym));
- }
-
- static unsigned int
- elf64_x86_64_common_section_index (asection *sec)
- {
- if ((elf_section_flags (sec) & SHF_X86_64_LARGE) == 0)
-- return SHN_COMMON;
-+ return _bfd_elf_sharable_common_section_index (sec);
- else
- return SHN_X86_64_LCOMMON;
- }
-@@ -3532,7 +3565,7 @@
- elf64_x86_64_common_section (asection *sec)
- {
- if ((elf_section_flags (sec) & SHF_X86_64_LARGE) == 0)
-- return bfd_com_section_ptr;
-+ return _bfd_elf_sharable_common_section (sec);
- else
- return &_bfd_elf_large_com_section;
- }
-@@ -3569,7 +3602,8 @@
- && h->root.type == bfd_link_hash_common
- && !*newdyn
- && bfd_is_com_section (*sec)
-- && *oldsec != *sec)
-+ && *oldsec != *sec
-+ && _bfd_elf_sharable_common_section_index (*oldsec) == SHN_COMMON)
- {
- if (sym->st_shndx == SHN_COMMON
- && (elf_section_flags (*oldsec) & SHF_X86_64_LARGE) != 0)
-@@ -3577,13 +3611,26 @@
- h->root.u.c.p->section
- = bfd_make_section_old_way (oldbfd, "COMMON");
- h->root.u.c.p->section->flags = SEC_ALLOC;
-+ return TRUE;
- }
- else if (sym->st_shndx == SHN_X86_64_LCOMMON
- && (elf_section_flags (*oldsec) & SHF_X86_64_LARGE) == 0)
-- *psec = *sec = bfd_com_section_ptr;
-+ {
-+ *psec = *sec = bfd_com_section_ptr;
-+ return TRUE;
-+ }
- }
-
-- return TRUE;
-+ return _bfd_elf_sharable_merge_symbol (info, sym_hash, h, sym,
-+ psec, pvalue, pold_alignment,
-+ skip, override,
-+ type_change_ok, size_change_ok,
-+ newdyn, newdef,
-+ newdyncommon, newweak,
-+ abfd, sec,
-+ olddyn, olddef,
-+ olddyncommon, oldweak,
-+ oldbfd, oldsec);
- }
-
- static int
-diff -urNad binutils-2.18~cvs20070812~/bfd/elflink.c binutils-2.18~cvs20070812/bfd/elflink.c
---- binutils-2.18~cvs20070812~/bfd/elflink.c 2007-08-12 13:32:34.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elflink.c 2007-08-12 13:32:59.000000000 +0200
-@@ -353,6 +353,27 @@
- if (s == NULL
- || ! bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
- return FALSE;
-+
-+ if (info->sharable_sections)
-+ {
-+ s = bfd_make_section (abfd, ".dynsharablebss");
-+ if (s == NULL
-+ || ! bfd_set_section_flags (abfd, s,
-+ (SEC_ALLOC
-+ | SEC_LINKER_CREATED)))
-+ return FALSE;
-+
-+ s = bfd_make_section (abfd,
-+ (bed->default_use_rela_p
-+ ? ".rela.sharable_bss"
-+ : ".rel.sharable_bss"));
-+ if (s == NULL
-+ || ! bfd_set_section_flags (abfd, s,
-+ flags | SEC_READONLY)
-+ || ! bfd_set_section_alignment (abfd, s,
-+ bed->s->log_file_align))
-+ return FALSE;
-+ }
- }
- }
-
-@@ -12319,3 +12340,219 @@
- {
- return bfd_com_section_ptr;
- }
-+
-+asection _bfd_elf_sharable_com_section
-+ = BFD_FAKE_SECTION (_bfd_elf_sharable_com_section, SEC_IS_COMMON,
-+ NULL, "SHARABLE_COMMON", 0);
-+
-+static asection *
-+get_sharable_common_section (bfd *abfd)
-+{
-+ asection *scomm = bfd_get_section_by_name (abfd, "SHARABLE_COMMON");
-+
-+ if (scomm == NULL)
-+ {
-+ scomm = bfd_make_section_with_flags (abfd,
-+ "SHARABLE_COMMON",
-+ (SEC_ALLOC
-+ | SEC_IS_COMMON
-+ | SEC_LINKER_CREATED));
-+ if (scomm == NULL)
-+ return scomm;
-+ elf_section_flags (scomm) |= SHF_GNU_SHARABLE;
-+ }
-+
-+ return scomm;
-+}
-+
-+bfd_boolean
-+_bfd_elf_add_sharable_symbol (bfd *abfd ATTRIBUTE_UNUSED,
-+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
-+ Elf_Internal_Sym *sym,
-+ const char **namep ATTRIBUTE_UNUSED,
-+ flagword *flagsp ATTRIBUTE_UNUSED,
-+ asection **secp,
-+ bfd_vma *valp)
-+{
-+ asection *scomm;
-+
-+ switch (sym->st_shndx)
-+ {
-+ case SHN_GNU_SHARABLE_COMMON:
-+ scomm = get_sharable_common_section (abfd);
-+ if (scomm == NULL)
-+ return FALSE;
-+ *secp = scomm;
-+ *valp = sym->st_size;
-+ break;
-+ }
-+ return TRUE;
-+}
-+
-+bfd_boolean
-+_bfd_elf_sharable_section_from_bfd_section
-+ (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, int *index)
-+{
-+ if (sec == &_bfd_elf_sharable_com_section)
-+ {
-+ *index = SHN_GNU_SHARABLE_COMMON;
-+ return TRUE;
-+ }
-+ return FALSE;
-+}
-+
-+void
-+_bfd_elf_sharable_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
-+ asymbol *asym)
-+{
-+ elf_symbol_type *elfsym = (elf_symbol_type *) asym;
-+
-+ switch (elfsym->internal_elf_sym.st_shndx)
-+ {
-+ case SHN_GNU_SHARABLE_COMMON:
-+ asym->section = &_bfd_elf_sharable_com_section;
-+ asym->value = elfsym->internal_elf_sym.st_size;
-+ asym->flags &= ~BSF_GLOBAL;
-+ break;
-+ }
-+}
-+
-+bfd_boolean
-+_bfd_elf_sharable_common_definition (Elf_Internal_Sym *sym)
-+{
-+ return (sym->st_shndx == SHN_COMMON
-+ || sym->st_shndx == SHN_GNU_SHARABLE_COMMON);
-+}
-+
-+unsigned int
-+_bfd_elf_sharable_common_section_index (asection *sec)
-+{
-+ if ((elf_section_flags (sec) & SHF_GNU_SHARABLE) == 0)
-+ return SHN_COMMON;
-+ else
-+ return SHN_GNU_SHARABLE_COMMON;
-+}
-+
-+asection *
-+_bfd_elf_sharable_common_section (asection *sec)
-+{
-+ if ((elf_section_flags (sec) & SHF_GNU_SHARABLE) == 0)
-+ return bfd_com_section_ptr;
-+ else
-+ return &_bfd_elf_sharable_com_section;
-+}
-+
-+bfd_boolean
-+_bfd_elf_sharable_merge_symbol
-+ (struct bfd_link_info *info ATTRIBUTE_UNUSED,
-+ struct elf_link_hash_entry **sym_hash ATTRIBUTE_UNUSED,
-+ struct elf_link_hash_entry *h,
-+ Elf_Internal_Sym *sym ATTRIBUTE_UNUSED,
-+ asection **psec,
-+ bfd_vma *pvalue ATTRIBUTE_UNUSED,
-+ unsigned int *pold_alignment ATTRIBUTE_UNUSED,
-+ bfd_boolean *skip ATTRIBUTE_UNUSED,
-+ bfd_boolean *override ATTRIBUTE_UNUSED,
-+ bfd_boolean *type_change_ok ATTRIBUTE_UNUSED,
-+ bfd_boolean *size_change_ok ATTRIBUTE_UNUSED,
-+ bfd_boolean *newdef ATTRIBUTE_UNUSED,
-+ bfd_boolean *newdyn,
-+ bfd_boolean *newdyncommon ATTRIBUTE_UNUSED,
-+ bfd_boolean *newweak ATTRIBUTE_UNUSED,
-+ bfd *abfd,
-+ asection **sec,
-+ bfd_boolean *olddef ATTRIBUTE_UNUSED,
-+ bfd_boolean *olddyn,
-+ bfd_boolean *olddyncommon ATTRIBUTE_UNUSED,
-+ bfd_boolean *oldweak ATTRIBUTE_UNUSED,
-+ bfd *oldbfd,
-+ asection **oldsec)
-+{
-+ /* Check sharable symbol. If one is undefined, it is OK. */
-+ if (*oldsec && !bfd_is_und_section (*sec))
-+ {
-+ bfd_boolean sharable, oldsharable;
-+
-+ sharable = (elf_section_data (*sec)
-+ && (elf_section_flags (*sec) & SHF_GNU_SHARABLE));
-+ oldsharable = (elf_section_data (*oldsec)
-+ && (elf_section_flags (*oldsec)
-+ & SHF_GNU_SHARABLE));
-+
-+ if (sharable != oldsharable)
-+ {
-+ bfd *nsbfd, *sbfd;
-+ asection *nssec, *ssec;
-+ bfd_boolean nsdyn, sdyn, nsdef, sdef;
-+
-+ if (oldsharable)
-+ {
-+ sbfd = oldbfd;
-+ nsbfd = abfd;
-+ ssec = *oldsec;
-+ nssec = *sec;
-+ sdyn = *olddyn;
-+ nsdyn = *newdyn;
-+ sdef = *olddef;
-+ nsdef = *newdef;
-+ }
-+ else
-+ {
-+ sbfd = abfd;
-+ nsbfd = oldbfd;
-+ ssec = *sec;
-+ nssec = *oldsec;
-+ sdyn = *newdyn;
-+ nsdyn = *olddyn;
-+ sdef = *newdef;
-+ nsdef = *olddef;
-+ }
-+
-+ if (sdef && !sdyn)
-+ {
-+ /* If the sharable definition comes from a relocatable
-+ file, it will override the non-sharable one in DSO. */
-+ return TRUE;
-+ }
-+ else if (!nsdef
-+ && !nsdyn
-+ && (h->root.type == bfd_link_hash_common
-+ || bfd_is_com_section (nssec)))
-+ {
-+ asection *scomm;
-+
-+ /* When the non-sharable common symbol in a relocatable
-+ file, we can turn it into sharable. If the sharable
-+ symbol isn't common, the non-sharable common symbol
-+ will be overidden. We only need to handle the
-+ sharable common symbol and the non-sharable common
-+ symbol. We just turn the non-sharable common symbol
-+ into the sharable one. */
-+ if (sym->st_shndx == SHN_GNU_SHARABLE_COMMON)
-+ {
-+ scomm = get_sharable_common_section (oldbfd);
-+ if (scomm == NULL)
-+ return FALSE;
-+ h->root.u.c.p->section = scomm;
-+ }
-+ else
-+ {
-+ scomm = get_sharable_common_section (abfd);
-+ if (scomm == NULL)
-+ return FALSE;
-+ *psec = *sec = scomm;
-+ }
-+
-+ return TRUE;
-+ }
-+
-+ (*_bfd_error_handler)
-+ (_("%s: sharable symbol in %B section %A mismatches non-shrable symbol in %B section %A"),
-+ sbfd, ssec, nsbfd, nssec, h->root.root.string);
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+ }
-+
-+ return TRUE;
-+}
-diff -urNad binutils-2.18~cvs20070812~/bfd/elfxx-ia64.c binutils-2.18~cvs20070812/bfd/elfxx-ia64.c
---- binutils-2.18~cvs20070812~/bfd/elfxx-ia64.c 2007-07-03 16:26:42.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elfxx-ia64.c 2007-08-12 13:32:59.000000000 +0200
-@@ -1637,7 +1637,8 @@
- *valp = sym->st_size;
- }
-
-- return TRUE;
-+ return _bfd_elf_add_sharable_symbol (abfd, info, sym, namep, flagsp,
-+ secp, valp);
- }
-
- /* Return the number of additional phdrs we will need. */
-@@ -5901,6 +5902,19 @@
- #define elf_backend_special_sections elfNN_ia64_special_sections
- #define elf_backend_default_execstack 0
-
-+#define elf_backend_section_from_bfd_section \
-+ _bfd_elf_sharable_section_from_bfd_section
-+#define elf_backend_symbol_processing \
-+ _bfd_elf_sharable_symbol_processing
-+#define elf_backend_common_section_index \
-+ _bfd_elf_sharable_common_section_index
-+#define elf_backend_common_section \
-+ _bfd_elf_sharable_common_section
-+#define elf_backend_common_definition \
-+ _bfd_elf_sharable_common_definition
-+#define elf_backend_merge_symbol \
-+ _bfd_elf_sharable_merge_symbol
-+
- /* FIXME: PR 290: The Intel C compiler generates SHT_IA_64_UNWIND with
- SHF_LINK_ORDER. But it doesn't set the sh_link or sh_info fields.
- We don't want to flood users with so many error messages. We turn
-diff -urNad binutils-2.18~cvs20070812~/binutils/readelf.c binutils-2.18~cvs20070812/binutils/readelf.c
---- binutils-2.18~cvs20070812~/binutils/readelf.c 2007-07-27 02:48:30.000000000 +0200
-+++ binutils-2.18~cvs20070812/binutils/readelf.c 2007-08-12 13:32:59.000000000 +0200
-@@ -1266,6 +1266,8 @@
- sec_name = "ABS";
- else if (psym->st_shndx == SHN_COMMON)
- sec_name = "COMMON";
-+ else if (psym->st_shndx == SHN_GNU_SHARABLE_COMMON)
-+ sec_name = "GNU_SHARABLE_COMMON";
- else if (elf_header.e_machine == EM_MIPS
- && psym->st_shndx == SHN_MIPS_SCOMMON)
- sec_name = "SCOMMON";
-@@ -2464,6 +2466,7 @@
- case PT_SHLIB: return "SHLIB";
- case PT_PHDR: return "PHDR";
- case PT_TLS: return "TLS";
-+ case PT_GNU_SHR: return "GNU_SHR";
-
- case PT_GNU_EH_FRAME:
- return "GNU_EH_FRAME";
-@@ -6971,6 +6974,8 @@
- case SHN_UNDEF: return "UND";
- case SHN_ABS: return "ABS";
- case SHN_COMMON: return "COM";
-+ case SHN_GNU_SHARABLE_COMMON:
-+ return "GNU_SHARABLE_COM";
- default:
- if (type == SHN_IA_64_ANSI_COMMON
- && elf_header.e_machine == EM_IA_64
-diff -urNad binutils-2.18~cvs20070812~/gas/config/obj-elf.c binutils-2.18~cvs20070812/gas/config/obj-elf.c
---- binutils-2.18~cvs20070812~/gas/config/obj-elf.c 2007-07-03 13:01:04.000000000 +0200
-+++ binutils-2.18~cvs20070812/gas/config/obj-elf.c 2007-08-12 13:32:59.000000000 +0200
-@@ -73,6 +73,7 @@
- static void obj_elf_subsection (int);
- static void obj_elf_popsection (int);
- static void obj_elf_tls_common (int);
-+static void obj_elf_sharable_common (int);
- static void obj_elf_lcomm (int);
- static void obj_elf_struct (int);
-
-@@ -130,6 +131,8 @@
-
- {"tls_common", obj_elf_tls_common, 0},
-
-+ {"sharable_common", obj_elf_sharable_common, 0},
-+
- /* End sentinel. */
- {NULL, NULL, 0},
- };
-@@ -374,6 +377,39 @@
- }
-
- static void
-+obj_elf_sharable_common (int ignore ATTRIBUTE_UNUSED)
-+{
-+ static segT sharable_bss_section;
-+ asection *saved_com_section_ptr = elf_com_section_ptr;
-+ asection *saved_bss_section = bss_section;
-+
-+ if (sharable_bss_section == NULL)
-+ {
-+ flagword applicable;
-+ segT seg = now_seg;
-+ subsegT subseg = now_subseg;
-+
-+ /* The .sharable_bss section is for local .sharable_common
-+ symbols. */
-+ sharable_bss_section = subseg_new (".sharable_bss", 0);
-+ applicable = bfd_applicable_section_flags (stdoutput);
-+ bfd_set_section_flags (stdoutput, sharable_bss_section,
-+ applicable & SEC_ALLOC);
-+ seg_info (sharable_bss_section)->bss = 1;
-+
-+ subseg_set (seg, subseg);
-+ }
-+
-+ elf_com_section_ptr = &_bfd_elf_sharable_com_section;
-+ bss_section = sharable_bss_section;
-+
-+ s_comm_internal (0, elf_common_parse);
-+
-+ elf_com_section_ptr = saved_com_section_ptr;
-+ bss_section = saved_bss_section;
-+}
-+
-+static void
- obj_elf_lcomm (int ignore ATTRIBUTE_UNUSED)
- {
- symbolS *symbolP = s_comm_internal (0, s_lcomm_internal);
-@@ -587,11 +623,17 @@
-
- .section .lbss,"aw",@progbits
-
-+ "@progbits" is incorrect. Also for sharable bss
-+ sections, gcc, as of 2005-07-06, will emit
-+
-+ .section .sharable_bss,"aw",@progbits
-+
- "@progbits" is incorrect. */
- #ifdef TC_I386
- && (bed->s->arch_size != 64
- || !(ssect->attr & SHF_X86_64_LARGE))
- #endif
-+ && !(ssect->attr & SHF_GNU_SHARABLE)
- && ssect->type != SHT_INIT_ARRAY
- && ssect->type != SHT_FINI_ARRAY
- && ssect->type != SHT_PREINIT_ARRAY)
-diff -urNad binutils-2.18~cvs20070812~/include/bfdlink.h binutils-2.18~cvs20070812/include/bfdlink.h
---- binutils-2.18~cvs20070812~/include/bfdlink.h 2007-07-09 23:21:42.000000000 +0200
-+++ binutils-2.18~cvs20070812/include/bfdlink.h 2007-08-12 13:32:59.000000000 +0200
-@@ -351,6 +351,9 @@
- /* Non-NULL if .note.gnu.build-id section should be created. */
- char *emit_note_gnu_build_id;
-
-+ /* TRUE if sharables sections may be created. */
-+ unsigned int sharable_sections: 1;
-+
- /* What to do with unresolved symbols in an object file.
- When producing executables the default is GENERATE_ERROR.
- When producing shared libraries the default is IGNORE. The
-diff -urNad binutils-2.18~cvs20070812~/include/elf/common.h binutils-2.18~cvs20070812/include/elf/common.h
---- binutils-2.18~cvs20070812~/include/elf/common.h 2007-07-09 23:17:42.000000000 +0200
-+++ binutils-2.18~cvs20070812/include/elf/common.h 2007-08-12 13:32:59.000000000 +0200
-@@ -309,6 +309,7 @@
- #define PT_SUNW_EH_FRAME PT_GNU_EH_FRAME /* Solaris uses the same value */
- #define PT_GNU_STACK (PT_LOOS + 0x474e551) /* Stack flags */
- #define PT_GNU_RELRO (PT_LOOS + 0x474e552) /* Read-only after relocation */
-+#define PT_GNU_SHR (PT_LOOS + 0x474e554) /* Sharable segment */
-
- /* Program segment permissions, in program header p_flags field. */
-
-@@ -381,6 +382,8 @@
- #define SHF_MASKOS 0x0FF00000 /* New value, Oct 4, 1999 Draft */
- #define SHF_MASKPROC 0xF0000000 /* Processor-specific semantics */
-
-+#define SHF_GNU_SHARABLE 0x01000000 /* sharable section */
-+
- /* Values of note segment descriptor types for core files. */
-
- #define NT_PRSTATUS 1 /* Contains copy of prstatus struct */
-@@ -505,6 +508,9 @@
- #define SHN_HIRESERVE 0xFFFF /* End range of reserved indices */
- #define SHN_BAD ((unsigned) -1) /* Used internally by bfd */
-
-+/* Associated symbol is in common sharable */
-+#define SHN_GNU_SHARABLE_COMMON (SHN_LOOS + 10)
-+
- /* The following constants control how a symbol may be accessed once it has
- become part of an executable or shared library. */
-
-diff -urNad binutils-2.18~cvs20070812~/ld/emulparams/elf64_ia64.sh binutils-2.18~cvs20070812/ld/emulparams/elf64_ia64.sh
---- binutils-2.18~cvs20070812~/ld/emulparams/elf64_ia64.sh 2006-05-30 18:45:32.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/emulparams/elf64_ia64.sh 2007-08-12 13:32:59.000000000 +0200
-@@ -37,3 +37,4 @@
- # .dtors. They have to be next to .sbss/.sbss2/.sdata/.sdata2.
- SMALL_DATA_CTOR=" "
- SMALL_DATA_DTOR=" "
-+SHARABLE_SECTIONS=yes
-diff -urNad binutils-2.18~cvs20070812~/ld/emulparams/elf_i386.sh binutils-2.18~cvs20070812/ld/emulparams/elf_i386.sh
---- binutils-2.18~cvs20070812~/ld/emulparams/elf_i386.sh 2007-08-12 13:32:34.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/emulparams/elf_i386.sh 2007-08-12 13:33:45.000000000 +0200
-@@ -11,6 +11,7 @@
- GENERATE_PIE_SCRIPT=yes
- NO_SMALL_DATA=yes
- SEPARATE_GOTPLT=12
-+SHARABLE_SECTIONS=yes
-
- # Linux modify the default library search path to first include
- # a 32-bit specific directory.
-diff -urNad binutils-2.18~cvs20070812~/ld/emulparams/elf_x86_64.sh binutils-2.18~cvs20070812/ld/emulparams/elf_x86_64.sh
---- binutils-2.18~cvs20070812~/ld/emulparams/elf_x86_64.sh 2007-08-12 10:00:33.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/emulparams/elf_x86_64.sh 2007-08-12 13:32:59.000000000 +0200
-@@ -13,6 +13,7 @@
- NO_SMALL_DATA=yes
- LARGE_SECTIONS=yes
- SEPARATE_GOTPLT=24
-+SHARABLE_SECTIONS=yes
-
- if [ "x${host}" = "x${target}" ]; then
- case " $EMULATION_LIBPATH " in
-diff -urNad binutils-2.18~cvs20070812~/ld/emultempl/elf32.em binutils-2.18~cvs20070812/ld/emultempl/elf32.em
---- binutils-2.18~cvs20070812~/ld/emultempl/elf32.em 2007-08-12 13:32:34.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/emultempl/elf32.em 2007-08-12 13:32:59.000000000 +0200
-@@ -101,6 +101,7 @@
- ldfile_set_output_arch ("${OUTPUT_ARCH}", bfd_arch_`echo ${ARCH} | sed -e 's/:.*//'`);
- config.dynamic_link = ${DYNAMIC_LINK-TRUE};
- config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
-+ link_info.sharable_sections = `if test "$SHARABLE_SECTIONS" = "yes" ; then echo TRUE ; else echo FALSE ; fi`;
- }
-
- EOF
-@@ -1679,6 +1680,12 @@
-
- secname = bfd_get_section_name (s->owner, s);
-
-+ /* Orphaned sharable sections won't have correct page
-+ requirements. */
-+ if (elf_section_flags (s) & SHF_GNU_SHARABLE)
-+ einfo ("%F%P: unable to place orphaned sharable section %A (%B)\n",
-+ s, s->owner);
-+
- if (! link_info.relocatable
- && link_info.combreloc
- && (s->flags & SEC_ALLOC))
-diff -urNad binutils-2.18~cvs20070812~/ld/ldmain.c binutils-2.18~cvs20070812/ld/ldmain.c
---- binutils-2.18~cvs20070812~/ld/ldmain.c 2007-07-06 16:09:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/ldmain.c 2007-08-12 13:32:59.000000000 +0200
-@@ -275,6 +275,7 @@
- link_info.relax_pass = 1;
- link_info.pei386_auto_import = -1;
- link_info.spare_dynamic_tags = 5;
-+ link_info.sharable_sections = FALSE;
-
- ldfile_add_arch ("");
- emulation = get_emulation (argc, argv);
-diff -urNad binutils-2.18~cvs20070812~/ld/scripttempl/elf.sc binutils-2.18~cvs20070812/ld/scripttempl/elf.sc
---- binutils-2.18~cvs20070812~/ld/scripttempl/elf.sc 2007-07-28 00:33:24.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/scripttempl/elf.sc 2007-08-12 13:32:59.000000000 +0200
-@@ -238,6 +238,40 @@
- ${RELOCATING+_stack = .;}
- *(.stack)
- }"
-+test "${SHARABLE_SECTIONS}" = "yes" && OTHER_READWRITE_SECTIONS="
-+ ${OTHER_READWRITE_SECTIONS}
-+ /* Sharable data sections. */
-+ .sharable_data ${RELOCATING-0} : ${RELOCATING+ALIGN(${MAXPAGESIZE})}
-+ {
-+ ${RELOCATING+PROVIDE_HIDDEN (__sharable_data_start = .);}
-+ *(.sharable_data${RELOCATING+ .sharable_data.* .gnu.linkonce.shrd.*})
-+ /* Align here to ensure that the sharable data section ends at the
-+ page boundary. */
-+ ${RELOCATING+. = ALIGN(. != 0 ? ${MAXPAGESIZE} : 1);}
-+ ${RELOCATING+PROVIDE_HIDDEN (__sharable_data_end = .);}
-+ }
-+"
-+test "${SHARABLE_SECTIONS}" = "yes" && OTHER_BSS_SECTIONS="
-+ ${OTHER_BSS_SECTIONS}
-+ /* Sharable bss sections */
-+ .sharable_bss ${RELOCATING-0} : ${RELOCATING+ALIGN(${MAXPAGESIZE})}
-+ {
-+ ${RELOCATING+PROVIDE_HIDDEN (__sharable_bss_start = .);}
-+ *(.dynsharablebss)
-+ *(.sharable_bss${RELOCATING+ .sharable_bss.* .gnu.linkonce.shrb.*})
-+ *(SHARABLE_COMMON)
-+ /* Align here to ensure that the sharable bss section ends at the
-+ page boundary. */
-+ ${RELOCATING+. = ALIGN(. != 0 ? ${MAXPAGESIZE} : 1);}
-+ ${RELOCATING+PROVIDE_HIDDEN (__sharable_bss_end = .);}
-+ }
-+"
-+test "${SHARABLE_SECTIONS}" = "yes" && REL_SHARABLE="
-+ .rel.sharable_data ${RELOCATING-0} : { *(.rel.sharable_data${RELOCATING+ .rel.sharable_data.* .rel.gnu.linkonce.shrd.*}) }
-+ .rela.sharable_data ${RELOCATING-0} : { *(.rela.sharable_data${RELOCATING+ .rela.sharable_data.* .rela.gnu.linkonce.shrd.*}) }
-+ .rel.sharable_bss ${RELOCATING-0} : { *(.rel.sharable_bss${RELOCATING+ .rel.sharable_bss.* .rel.gnu.linkonce.shrb.*}) }
-+ .rela.sharable_bss ${RELOCATING-0} : { *(.rela.sharable_bss${RELOCATING+ .rela.sharable_bss.* .rela.gnu.linkonce.shrb.*}) }
-+"
-
- # if this is for an embedded system, don't add SIZEOF_HEADERS.
- if [ -z "$EMBEDDED" ]; then
-@@ -308,6 +342,7 @@
- .rel.got ${RELOCATING-0} : { *(.rel.got) }
- .rela.got ${RELOCATING-0} : { *(.rela.got) }
- ${OTHER_GOT_RELOC_SECTIONS}
-+ ${REL_SHARABLE}
- ${REL_SDATA}
- ${REL_SBSS}
- ${REL_SDATA2}
+++ /dev/null
-#!/bin/sh -e
-## 208-hjl-libtool-relink.dpatch
-##
-## DP: Description: Avoid unnecessary linker messages when running "make check"
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl 2.17.50.0.13
-## DP: Original patch: libtool-relink-1.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-2006-09-18 H.J. Lu <hjl@gnu.org>
-
- * ltmain.sh (relink_command): Redirect all messages to
- /dev/null to avoid unecessary linker messages for "make check".
-
-@DPATCH@
---- ./ltmain.sh.patch 2006-09-18 10:07:59.000000000 -0700
-+++ ./ltmain.sh 2006-09-18 10:49:50.000000000 -0700
-@@ -3990,7 +3997,7 @@ sed_quote_subst='$sed_quote_subst'
- # if CDPATH is set.
- if test \"\${CDPATH+set}\" = set; then CDPATH=:; export CDPATH; fi
-
--relink_command=\"$relink_command\"
-+relink_command=\"$relink_command > /dev/null 2>&1\"
-
- # This environment variable determines our operation mode.
- if test \"\$libtool_install_magic\" = \"$magic\"; then
+++ /dev/null
-#!/bin/sh -e
-## 209-hjl-binutils-error.dpatch
-##
-## DP: Description: Avoid unnecessary linker messages when running "make check"
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl 2.17.50.0.18
-## DP: Original patch: binutils-error-3.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-bfd/
-
-2007-05-09 H.J. Lu <hongjiu.lu@intel.com>
-
- PR ld/4409
- * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add an argument for
- error ignored.
- * elf-m10200.c (mn10200_elf_relocate_section): Updated.
- * elf-m10300.c (mn10300_elf_relocate_section): Likewise.
- * elf32-arm.c (elf32_arm_relocate_section): Likewise.
- * elf32-avr.c (elf32_avr_relocate_section): Likewise.
- * elf32-bfin.c (bfinfdpic_relocate_section): Likewise.
- (bfin_relocate_section): Likewise.
- * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise.
- * elf32-cris.c (cris_elf_relocate_section): Likewise.
- * elf32-crx.c (elf32_crx_relocate_section): Likewise.
- * elf32-d10v.c (elf32_d10v_relocate_section): Likewise.
- * elf32-fr30.c (fr30_elf_relocate_section): Likewise.
- * elf32-frv.c (elf32_frv_relocate_section): Likewise.
- * elf32-h8300.c (elf32_h8_relocate_section): Likewise.
- * elf32-hppa.c (elf32_hppa_relocate_section): Likewise.
- * elf32-i386.c (elf_i386_relocate_section): Likewise.
- * elf32-i860.c (elf32_i860_relocate_section): Likewise.
- * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise.
- * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise.
- * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise.
- * elf32-m68k.c (elf_m68k_relocate_section): Likewise.
- * elf32-mcore.c (mcore_elf_relocate_section): Likewise.
- * elf32-msp430.c (elf32_msp430_relocate_section): Likewise.
- * elf32-mt.c (mt_elf_relocate_section): Likewise.
- * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise.
- * elf32-ppc.c (ppc_elf_relocate_section): Likewise.
- * elf32-s390.c (elf_s390_relocate_section): Likewise.
- * elf32-spu.c (spu_elf_relocate_section): Likewise.
- * elf32-v850.c (v850_elf_relocate_section): Likewise.
- * elf32-vax.c (elf_vax_relocate_section): Likewise.
- * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise.
- * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise.
- * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise.
- * elf64-alpha.c (elf64_alpha_relocate_section): Likewise.
- * elf64-mmix.c (mmix_elf_relocate_section): Likewise.
- * elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
- * elf64-s390.c (elf_s390_relocate_section): Likewise.
- * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.
- * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise.
-
- * elfxx-ia64.c (elfNN_ia64_relocate_section): Skip if error
- from RELOC_FOR_GLOBAL_SYMBOL in executable is ignored.
-
-ld/testsuite/
-
-2007-05-09 H.J. Lu <hongjiu.lu@intel.com>
-
- PR ld/4409
- * ld-ia64/error1.d: New file.
- * ld-ia64/error1.s: Likewise.
-
-@DPATCH@
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf-bfd.h binutils-2.18~cvs20070812/bfd/elf-bfd.h
---- binutils-2.18~cvs20070812~/bfd/elf-bfd.h 2007-08-12 13:36:50.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf-bfd.h 2007-08-12 13:37:05.000000000 +0200
-@@ -2064,7 +2064,7 @@
- #define RELOC_FOR_GLOBAL_SYMBOL(info, input_bfd, input_section, rel, \
- r_symndx, symtab_hdr, sym_hashes, \
- h, sec, relocation, \
-- unresolved_reloc, warned) \
-+ unresolved_reloc, warned, ignored) \
- do \
- { \
- /* It seems this can happen with erroneous or unsupported \
-@@ -2079,6 +2079,7 @@
- h = (struct elf_link_hash_entry *) h->root.u.i.link; \
- \
- warned = FALSE; \
-+ ignored = FALSE; \
- unresolved_reloc = FALSE; \
- relocation = 0; \
- if (h->root.type == bfd_link_hash_defined \
-@@ -2101,7 +2102,7 @@
- ; \
- else if (info->unresolved_syms_in_objects == RM_IGNORE \
- && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) \
-- ; \
-+ ignored = TRUE; \
- else if (!info->relocatable) \
- { \
- bfd_boolean err; \
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf-m10200.c binutils-2.18~cvs20070812/bfd/elf-m10200.c
---- binutils-2.18~cvs20070812~/bfd/elf-m10200.c 2007-07-03 16:26:40.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf-m10200.c 2007-08-12 13:37:05.000000000 +0200
-@@ -392,12 +392,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf-m10300.c binutils-2.18~cvs20070812/bfd/elf-m10300.c
---- binutils-2.18~cvs20070812~/bfd/elf-m10300.c 2007-07-03 16:26:40.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf-m10300.c 2007-08-12 13:37:05.000000000 +0200
-@@ -1417,13 +1417,13 @@
- else
- {
- bfd_boolean unresolved_reloc;
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
- struct elf_link_hash_entry *hh;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- hh, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- h = (struct elf32_mn10300_link_hash_entry *) hh;
-
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-arm.c binutils-2.18~cvs20070812/bfd/elf32-arm.c
---- binutils-2.18~cvs20070812~/bfd/elf32-arm.c 2007-08-06 20:47:21.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-arm.c 2007-08-12 13:37:05.000000000 +0200
-@@ -6398,12 +6398,12 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- sym_type = h->type;
- }
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-avr.c binutils-2.18~cvs20070812/bfd/elf32-avr.c
---- binutils-2.18~cvs20070812~/bfd/elf32-avr.c 2007-07-03 16:26:40.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-avr.c 2007-08-12 13:37:05.000000000 +0200
-@@ -1204,12 +1204,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- name = h->root.root.string;
- }
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-bfin.c binutils-2.18~cvs20070812/bfd/elf32-bfin.c
---- binutils-2.18~cvs20070812~/bfd/elf32-bfin.c 2007-07-03 16:26:40.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-bfin.c 2007-08-12 13:37:05.000000000 +0200
-@@ -2197,13 +2197,13 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
- bfd_boolean unresolved_reloc;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- osec = sec;
- }
-
-@@ -2895,12 +2895,12 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-cr16.c binutils-2.18~cvs20070812/bfd/elf32-cr16.c
---- binutils-2.18~cvs20070812~/bfd/elf32-cr16.c 2007-07-03 16:26:40.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-cr16.c 2007-08-12 13:37:05.000000000 +0200
-@@ -837,12 +837,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- r = cr16_elf_final_link_relocate (howto, input_bfd, output_bfd,
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-cr16c.c binutils-2.18~cvs20070812/bfd/elf32-cr16c.c
---- binutils-2.18~cvs20070812~/bfd/elf32-cr16c.c 2007-07-03 16:26:40.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-cr16c.c 2007-08-12 13:37:05.000000000 +0200
-@@ -718,12 +718,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-cris.c binutils-2.18~cvs20070812/bfd/elf32-cris.c
---- binutils-2.18~cvs20070812~/bfd/elf32-cris.c 2007-07-03 16:26:40.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-cris.c 2007-08-12 13:37:05.000000000 +0200
-@@ -996,13 +996,13 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
- bfd_boolean unresolved_reloc;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- if (unresolved_reloc
- /* Perhaps we should detect the cases that
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-crx.c binutils-2.18~cvs20070812/bfd/elf32-crx.c
---- binutils-2.18~cvs20070812~/bfd/elf32-crx.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-crx.c 2007-08-12 13:37:05.000000000 +0200
-@@ -869,12 +869,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-d10v.c binutils-2.18~cvs20070812/bfd/elf32-d10v.c
---- binutils-2.18~cvs20070812~/bfd/elf32-d10v.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-d10v.c 2007-08-12 13:37:05.000000000 +0200
-@@ -456,12 +456,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-fr30.c binutils-2.18~cvs20070812/bfd/elf32-fr30.c
---- binutils-2.18~cvs20070812~/bfd/elf32-fr30.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-fr30.c 2007-08-12 13:37:05.000000000 +0200
-@@ -567,12 +567,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- name = h->root.root.string;
- }
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-frv.c binutils-2.18~cvs20070812/bfd/elf32-frv.c
---- binutils-2.18~cvs20070812~/bfd/elf32-frv.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-frv.c 2007-08-12 13:37:05.000000000 +0200
-@@ -2813,13 +2813,13 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
- bfd_boolean unresolved_reloc;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- osec = sec;
- }
-
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-h8300.c binutils-2.18~cvs20070812/bfd/elf32-h8300.c
---- binutils-2.18~cvs20070812~/bfd/elf32-h8300.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-h8300.c 2007-08-12 13:37:05.000000000 +0200
-@@ -452,12 +452,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-hppa.c binutils-2.18~cvs20070812/bfd/elf32-hppa.c
---- binutils-2.18~cvs20070812~/bfd/elf32-hppa.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-hppa.c 2007-08-12 13:37:05.000000000 +0200
-@@ -3676,13 +3676,14 @@
- else
- {
- struct elf_link_hash_entry *eh;
-- bfd_boolean unresolved_reloc;
-+ bfd_boolean unresolved_reloc, ignored;
- struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rela,
- r_symndx, symtab_hdr, sym_hashes,
- eh, sym_sec, relocation,
-- unresolved_reloc, warned_undef);
-+ unresolved_reloc, warned_undef,
-+ ignored);
-
- if (!info->relocatable
- && relocation == 0
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-i386.c binutils-2.18~cvs20070812/bfd/elf32-i386.c
---- binutils-2.18~cvs20070812~/bfd/elf32-i386.c 2007-07-27 20:50:18.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-i386.c 2007-08-12 13:37:06.000000000 +0200
-@@ -2346,12 +2346,12 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-i860.c binutils-2.18~cvs20070812/bfd/elf32-i860.c
---- binutils-2.18~cvs20070812~/bfd/elf32-i860.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-i860.c 2007-08-12 13:37:06.000000000 +0200
-@@ -1120,12 +1120,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-ip2k.c binutils-2.18~cvs20070812/bfd/elf32-ip2k.c
---- binutils-2.18~cvs20070812~/bfd/elf32-ip2k.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-ip2k.c 2007-08-12 13:37:06.000000000 +0200
-@@ -1449,13 +1449,13 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
- bfd_boolean unresolved_reloc;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- name = h->root.root.string;
- }
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-iq2000.c binutils-2.18~cvs20070812/bfd/elf32-iq2000.c
---- binutils-2.18~cvs20070812~/bfd/elf32-iq2000.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-iq2000.c 2007-08-12 13:37:06.000000000 +0200
-@@ -586,12 +586,12 @@
- else
- {
- bfd_boolean unresolved_reloc;
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- name = h->root.root.string;
- }
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-m68hc1x.c binutils-2.18~cvs20070812/bfd/elf32-m68hc1x.c
---- binutils-2.18~cvs20070812~/bfd/elf32-m68hc1x.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-m68hc1x.c 2007-08-12 13:37:06.000000000 +0200
-@@ -945,12 +945,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation, unresolved_reloc,
-- warned);
-+ warned, ignored);
-
- is_far = (h && (h->other & STO_M68HC12_FAR));
- stub_name = h->root.root.string;
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-m68k.c binutils-2.18~cvs20070812/bfd/elf32-m68k.c
---- binutils-2.18~cvs20070812~/bfd/elf32-m68k.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-m68k.c 2007-08-12 13:37:06.000000000 +0200
-@@ -1646,12 +1646,12 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-mcore.c binutils-2.18~cvs20070812/bfd/elf32-mcore.c
---- binutils-2.18~cvs20070812~/bfd/elf32-mcore.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-mcore.c 2007-08-12 13:37:06.000000000 +0200
-@@ -458,12 +458,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-msp430.c binutils-2.18~cvs20070812/bfd/elf32-msp430.c
---- binutils-2.18~cvs20070812~/bfd/elf32-msp430.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-msp430.c 2007-08-12 13:37:06.000000000 +0200
-@@ -450,12 +450,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-mt.c binutils-2.18~cvs20070812/bfd/elf32-mt.c
---- binutils-2.18~cvs20070812~/bfd/elf32-mt.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-mt.c 2007-08-12 13:37:06.000000000 +0200
-@@ -344,12 +344,12 @@
- else
- {
- bfd_boolean unresolved_reloc;
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- name = h->root.root.string;
- }
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-openrisc.c binutils-2.18~cvs20070812/bfd/elf32-openrisc.c
---- binutils-2.18~cvs20070812~/bfd/elf32-openrisc.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-openrisc.c 2007-08-12 13:37:06.000000000 +0200
-@@ -365,12 +365,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-ppc.c binutils-2.18~cvs20070812/bfd/elf32-ppc.c
---- binutils-2.18~cvs20070812~/bfd/elf32-ppc.c 2007-07-10 09:42:30.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-ppc.c 2007-08-12 13:37:06.000000000 +0200
-@@ -5718,10 +5718,12 @@
- }
- else
- {
-+ bfd_boolean ignored;
-+
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- sym_name = h->root.root.string;
- }
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-s390.c binutils-2.18~cvs20070812/bfd/elf32-s390.c
---- binutils-2.18~cvs20070812~/bfd/elf32-s390.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-s390.c 2007-08-12 13:37:06.000000000 +0200
-@@ -2311,11 +2311,12 @@
- else
- {
- bfd_boolean warned ATTRIBUTE_UNUSED;
-+ bfd_boolean ignored ATTRIBUTE_UNUSED;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-spu.c binutils-2.18~cvs20070812/bfd/elf32-spu.c
---- binutils-2.18~cvs20070812~/bfd/elf32-spu.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-spu.c 2007-08-12 13:37:06.000000000 +0200
-@@ -2724,10 +2724,12 @@
- }
- else
- {
-+ bfd_boolean ignored;
-+
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- sym_name = h->root.root.string;
- }
-
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-v850.c binutils-2.18~cvs20070812/bfd/elf32-v850.c
---- binutils-2.18~cvs20070812~/bfd/elf32-v850.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-v850.c 2007-08-12 13:37:06.000000000 +0200
-@@ -1624,7 +1624,7 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- /* Note - this check is delayed until now as it is possible and
- valid to have a file without any symbols but with relocs that
-@@ -1641,7 +1641,7 @@
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-vax.c binutils-2.18~cvs20070812/bfd/elf32-vax.c
---- binutils-2.18~cvs20070812~/bfd/elf32-vax.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-vax.c 2007-08-12 13:37:06.000000000 +0200
-@@ -1415,12 +1415,12 @@
- else
- {
- bfd_boolean unresolved_reloc;
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- if ((h->root.type == bfd_link_hash_defined
- || h->root.type == bfd_link_hash_defweak)
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-xc16x.c binutils-2.18~cvs20070812/bfd/elf32-xc16x.c
---- binutils-2.18~cvs20070812~/bfd/elf32-xc16x.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-xc16x.c 2007-08-12 13:37:06.000000000 +0200
-@@ -374,12 +374,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-xstormy16.c binutils-2.18~cvs20070812/bfd/elf32-xstormy16.c
---- binutils-2.18~cvs20070812~/bfd/elf32-xstormy16.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-xstormy16.c 2007-08-12 13:37:06.000000000 +0200
-@@ -821,12 +821,12 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc, warned;
-+ bfd_boolean unresolved_reloc, warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf32-xtensa.c binutils-2.18~cvs20070812/bfd/elf32-xtensa.c
---- binutils-2.18~cvs20070812~/bfd/elf32-xtensa.c 2007-07-18 23:06:06.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf32-xtensa.c 2007-08-12 13:37:06.000000000 +0200
-@@ -2055,10 +2055,12 @@
- }
- else
- {
-+ bfd_boolean ignored;
-+
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- if (relocation == 0
- && !unresolved_reloc
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf64-alpha.c binutils-2.18~cvs20070812/bfd/elf64-alpha.c
---- binutils-2.18~cvs20070812~/bfd/elf64-alpha.c 2007-07-10 06:08:11.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf64-alpha.c 2007-08-12 13:37:06.000000000 +0200
-@@ -4176,7 +4176,7 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
- bfd_boolean unresolved_reloc;
- struct elf_link_hash_entry *hh;
- struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
-@@ -4184,7 +4184,7 @@
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- hh, sec, value,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- if (warned)
- continue;
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf64-mmix.c binutils-2.18~cvs20070812/bfd/elf64-mmix.c
---- binutils-2.18~cvs20070812~/bfd/elf64-mmix.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf64-mmix.c 2007-08-12 13:37:06.000000000 +0200
-@@ -1402,12 +1402,13 @@
- }
- else
- {
-- bfd_boolean unresolved_reloc;
-+ bfd_boolean unresolved_reloc, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, undefined_signalled);
-+ unresolved_reloc, undefined_signalled,
-+ ignored);
- name = h->root.root.string;
- }
-
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf64-ppc.c binutils-2.18~cvs20070812/bfd/elf64-ppc.c
---- binutils-2.18~cvs20070812~/bfd/elf64-ppc.c 2007-07-03 16:26:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf64-ppc.c 2007-08-12 13:37:06.000000000 +0200
-@@ -9900,10 +9900,12 @@
- }
- else
- {
-+ bfd_boolean ignored;
-+
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h_elf, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- sym_name = h_elf->root.root.string;
- sym_type = h_elf->type;
- }
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf64-s390.c binutils-2.18~cvs20070812/bfd/elf64-s390.c
---- binutils-2.18~cvs20070812~/bfd/elf64-s390.c 2007-07-10 06:08:11.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf64-s390.c 2007-08-12 13:37:06.000000000 +0200
-@@ -2285,11 +2285,12 @@
- else
- {
- bfd_boolean warned ATTRIBUTE_UNUSED;
-+ bfd_boolean ignored ATTRIBUTE_UNUSED;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elf64-x86-64.c binutils-2.18~cvs20070812/bfd/elf64-x86-64.c
---- binutils-2.18~cvs20070812~/bfd/elf64-x86-64.c 2007-07-03 16:26:42.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elf64-x86-64.c 2007-08-12 13:37:06.000000000 +0200
-@@ -2104,12 +2104,12 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- }
-
- if (sec != NULL && elf_discarded_section (sec))
-diff -urNad binutils-2.18~cvs20070812~/bfd/elfxx-ia64.c binutils-2.18~cvs20070812/bfd/elfxx-ia64.c
---- binutils-2.18~cvs20070812~/bfd/elfxx-ia64.c 2007-07-03 16:26:42.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elfxx-ia64.c 2007-08-12 13:37:06.000000000 +0200
-@@ -4741,17 +4741,17 @@
- else
- {
- bfd_boolean unresolved_reloc;
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
- struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sym_sec, value,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
-
- if (h->root.type == bfd_link_hash_undefweak)
- undef_weak_ref = TRUE;
-- else if (warned)
-+ else if (warned || (ignored && info->executable))
- continue;
- }
-
-diff -urNad binutils-2.18~cvs20070812~/bfd/elfxx-sparc.c binutils-2.18~cvs20070812/bfd/elfxx-sparc.c
---- binutils-2.18~cvs20070812~/bfd/elfxx-sparc.c 2007-07-03 16:26:42.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elfxx-sparc.c 2007-08-12 13:37:06.000000000 +0200
-@@ -2533,12 +2533,12 @@
- }
- else
- {
-- bfd_boolean warned;
-+ bfd_boolean warned, ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- r_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
-- unresolved_reloc, warned);
-+ unresolved_reloc, warned, ignored);
- if (warned)
- {
- /* To avoid generating warning messages about truncated
-diff -urNad binutils-2.18~cvs20070812~/ld/ldmain.c binutils-2.18~cvs20070812/ld/ldmain.c
---- binutils-2.18~cvs20070812~/ld/ldmain.c 2007-07-06 16:09:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/ldmain.c 2007-08-12 13:37:06.000000000 +0200
-@@ -103,6 +103,9 @@
- /* TRUE if we should demangle symbol names. */
- bfd_boolean demangling;
-
-+/* How to report unresolved symbols. */
-+enum report_method how_to_report_unresolved_symbols = RM_GENERATE_ERROR;
-+
- args_type command_line;
-
- ld_config_type config;
-@@ -348,6 +351,27 @@
- if (! link_info.shared || link_info.pie)
- link_info.executable = TRUE;
-
-+ /* When creating a shared library, the default behaviour is to
-+ ignore any unresolved references. */
-+
-+ if (link_info.unresolved_syms_in_objects == RM_NOT_YET_SET)
-+ {
-+ if (link_info.shared && !link_info.pie)
-+ link_info.unresolved_syms_in_objects = RM_IGNORE;
-+ else
-+ link_info.unresolved_syms_in_objects
-+ = how_to_report_unresolved_symbols;
-+ }
-+
-+ if (link_info.unresolved_syms_in_shared_libs == RM_NOT_YET_SET)
-+ {
-+ if (link_info.shared && !link_info.pie)
-+ link_info.unresolved_syms_in_shared_libs = RM_IGNORE;
-+ else
-+ link_info.unresolved_syms_in_shared_libs
-+ = how_to_report_unresolved_symbols;
-+ }
-+
- /* Treat ld -r -s as ld -r -S -x (i.e., strip all local symbols). I
- don't see how else this can be handled, since in this case we
- must preserve all externally visible symbols. */
-diff -urNad binutils-2.18~cvs20070812~/ld/ldmain.h binutils-2.18~cvs20070812/ld/ldmain.h
---- binutils-2.18~cvs20070812~/ld/ldmain.h 2007-07-06 16:09:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/ldmain.h 2007-08-12 13:37:06.000000000 +0200
-@@ -35,6 +35,7 @@
- extern bfd_boolean as_needed;
- extern bfd_boolean add_needed;
- extern bfd_boolean demangling;
-+extern enum report_method how_to_report_unresolved_symbols;
- extern int g_switch_value;
- extern const char *output_filename;
- extern struct bfd_link_info link_info;
-diff -urNad binutils-2.18~cvs20070812~/ld/lexsup.c binutils-2.18~cvs20070812/ld/lexsup.c
---- binutils-2.18~cvs20070812~/ld/lexsup.c 2007-07-06 16:09:41.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/lexsup.c 2007-08-12 13:37:06.000000000 +0200
-@@ -567,7 +567,6 @@
- struct option *longopts;
- struct option *really_longopts;
- int last_optind;
-- enum report_method how_to_report_unresolved_symbols = RM_GENERATE_ERROR;
-
- shortopts = xmalloc (OPTION_COUNT * 3 + 2);
- longopts = xmalloc (sizeof (*longopts) * (OPTION_COUNT + 1));
-@@ -1113,12 +1112,7 @@
- if (config.has_shared)
- {
- link_info.shared = TRUE;
-- /* When creating a shared library, the default
-- behaviour is to ignore any unresolved references. */
-- if (link_info.unresolved_syms_in_objects == RM_NOT_YET_SET)
-- link_info.unresolved_syms_in_objects = RM_IGNORE;
-- if (link_info.unresolved_syms_in_shared_libs == RM_NOT_YET_SET)
-- link_info.unresolved_syms_in_shared_libs = RM_IGNORE;
-+ link_info.pie = FALSE;
- }
- else
- einfo (_("%P%F: -shared not supported\n"));
-@@ -1444,14 +1438,6 @@
- set_default_dirlist (default_dirlist);
- free (default_dirlist);
- }
--
-- if (link_info.unresolved_syms_in_objects == RM_NOT_YET_SET)
-- /* FIXME: Should we allow emulations a chance to set this ? */
-- link_info.unresolved_syms_in_objects = how_to_report_unresolved_symbols;
--
-- if (link_info.unresolved_syms_in_shared_libs == RM_NOT_YET_SET)
-- /* FIXME: Should we allow emulations a chance to set this ? */
-- link_info.unresolved_syms_in_shared_libs = how_to_report_unresolved_symbols;
- }
-
- /* Add the (colon-separated) elements of DIRLIST_PTR to the
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error1.d binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error1.d
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error1.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error1.d 2007-08-12 13:37:06.000000000 +0200
-@@ -0,0 +1,7 @@
-+#source: error1.s
-+#ld: -unresolved-symbols=ignore-all
-+#readelf: -s
-+
-+#...
-+[ ]+[0-9]+:[ ]+[0]+[ ]+0[ ]+NOTYPE[ ]+GLOBAL DEFAULT[ ]+UND[ ]+foo
-+#pass
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error1.s binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error1.s
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error1.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error1.s 2007-08-12 13:37:06.000000000 +0200
-@@ -0,0 +1,30 @@
-+ .explicit
-+ .pred.safe_across_calls p1-p5,p16-p63
-+ .text
-+ .align 16
-+ .global _start#
-+ .proc _start#
-+_start:
-+ .prologue 12, 32
-+ .mii
-+ .save ar.pfs, r33
-+ alloc r33 = ar.pfs, 0, 3, 0, 0
-+ .save rp, r32
-+ mov r32 = b0
-+ mov r34 = r1
-+ .body
-+ ;;
-+ .bbb
-+ nop 0
-+ nop 0
-+ br.call.sptk.many b0 = foo#
-+ ;;
-+ .mmi
-+ nop 0
-+ mov r1 = r34
-+ mov b0 = r32
-+ .mib
-+ nop 0
-+ mov ar.pfs = r33
-+ br.ret.sptk.many b0
-+ .endp _start#
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error2.d binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error2.d
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error2.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error2.d 2007-08-12 13:37:06.000000000 +0200
-@@ -0,0 +1,7 @@
-+#source: error1.s
-+#ld: -pie -unresolved-symbols=ignore-all
-+#readelf: -s
-+
-+#...
-+[ ]+[0-9]+:[ ]+[0]+[ ]+0[ ]+NOTYPE[ ]+GLOBAL DEFAULT[ ]+UND[ ]+foo
-+#pass
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error3.d binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error3.d
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error3.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error3.d 2007-08-12 13:37:06.000000000 +0200
-@@ -0,0 +1,7 @@
-+#source: error1.s
-+#ld: -pie -shared
-+#readelf: -s
-+
-+#...
-+[ ]+[0-9]+:[ ]+[0]+[ ]+0[ ]+NOTYPE[ ]+GLOBAL DEFAULT[ ]+UND[ ]+foo
-+#pass
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error4.d binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error4.d
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-ia64/error4.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-ia64/error4.d 2007-08-12 13:37:06.000000000 +0200
-@@ -0,0 +1,3 @@
-+#source: error1.s
-+#ld: -shared -pie
-+#error: .*undefined reference to `foo'
+++ /dev/null
-#!/bin/sh -e
-## 210-hjl-binutils-signed.dpatch
-##
-## DP: Description: objdump.c (disassemble_bytes,dump_reloc_set): Print addend as signed.
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl 2.17.50.0.18
-## DP: Original patch: binutils-signed-2.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-binutils/
-
-2007-06-22 H.J. Lu <hongjiu.lu@intel.com>
-
- * objdump.c (disassemble_bytes): Print addend as signed.
- (dump_reloc_set): Likewise.
-
-gas/testsuite/
-
-2007-06-22 H.J. Lu <hongjiu.lu@intel.com>
-
- * gas/alpha/elf-reloc-1.d: Expect addend as signed.
- * gas/i386/mixed-mode-reloc64.d: Likewise.
- * gas/i386/reloc64.d: Likewise.
- * gas/ia64/pcrel.d: Likewise.
- * gas/mips/branch-misc-2-64.d: Likewise.
- * gas/mips/branch-misc-2pic-64.d: Likewise.
- * gas/mips/ldstla-n64-sym32.d: Likewise.
- * gas/mips/mips16-hilo-n32.d: Likewise.
- * gas/ppc/astest.d: Likewise.
- * gas/ppc/astest2.d: Likewise.
- * gas/ppc/astest2_64.d: Likewise.
- * gas/ppc/astest64.d: Likewise.
- * gas/ppc/test1elf32.d: Likewise.
- * gas/ppc/test1elf64.d: Likewise.
- * gas/sparc/reloc64.d: Likewise.
-
-@DPATCH@
-diff -urNad binutils-2.18~cvs20070812~/binutils/objdump.c binutils-2.18~cvs20070812/binutils/objdump.c
---- binutils-2.18~cvs20070812~/binutils/objdump.c 2007-07-10 15:52:39.000000000 +0200
-+++ binutils-2.18~cvs20070812/binutils/objdump.c 2007-08-12 13:45:01.000000000 +0200
-@@ -1650,8 +1650,15 @@
-
- if (q->addend)
- {
-- printf ("+0x");
-- objdump_print_value (q->addend, info, TRUE);
-+ bfd_signed_vma addend = q->addend;
-+ if (addend < 0)
-+ {
-+ printf ("-0x");
-+ addend = -addend;
-+ }
-+ else
-+ printf ("+0x");
-+ objdump_print_value (addend, info, TRUE);
- }
-
- printf ("\n");
-@@ -2710,8 +2717,15 @@
-
- if (q->addend)
- {
-- printf ("+0x");
-- bfd_printf_vma (abfd, q->addend);
-+ bfd_signed_vma addend = q->addend;
-+ if (addend < 0)
-+ {
-+ printf ("-0x");
-+ addend = -addend;
-+ }
-+ else
-+ printf ("+0x");
-+ bfd_printf_vma (abfd, addend);
- }
-
- printf ("\n");
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/alpha/elf-reloc-1.d binutils-2.18~cvs20070812/gas/testsuite/gas/alpha/elf-reloc-1.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/alpha/elf-reloc-1.d 2003-06-17 13:16:16.000000000 +0200
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/alpha/elf-reloc-1.d 2007-08-12 13:45:01.000000000 +0200
-@@ -16,6 +16,6 @@
- 0*000001c GPRELHIGH d
- 0*0000020 GPRELLOW e
- 0*0000024 GPDISP \.text\+0x0*0000008
--0*0000030 GPDISP \.text\+0xf*ffffff8
-+0*0000030 GPDISP \.text-0x0*0000008
-
-
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/i386/mixed-mode-reloc64.d binutils-2.18~cvs20070812/gas/testsuite/gas/i386/mixed-mode-reloc64.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/i386/mixed-mode-reloc64.d 2005-09-28 17:31:21.000000000 +0200
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/i386/mixed-mode-reloc64.d 2007-08-12 13:45:01.000000000 +0200
-@@ -7,8 +7,8 @@
- RELOCATION RECORDS FOR \[.text\]:
- OFFSET[ ]+TYPE[ ]+VALUE[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
- [0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
--[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]*
-+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/i386/reloc64.d binutils-2.18~cvs20070812/gas/testsuite/gas/i386/reloc64.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/i386/reloc64.d 2007-05-04 02:44:36.000000000 +0200
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/i386/reloc64.d 2007-08-12 13:45:01.000000000 +0200
-@@ -16,31 +16,31 @@
- .*[ ]+R_X86_64_PC32[ ]+xtrn\+0x0*2
- .*[ ]+R_X86_64_PC16[ ]+xtrn\+0x0*2
- .*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1
--.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
--.*[ ]+R_X86_64_PC32[ ]+xtrn\+0xf+c
--.*[ ]+R_X86_64_PC8[ ]+xtrn\+0xf+f
-+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-+.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
-+.*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1
- .*[ ]+R_X86_64_GOT64[ ]+xtrn
- .*[ ]+R_X86_64_GOT32[ ]+xtrn
- .*[ ]+R_X86_64_GOT32[ ]+xtrn
- .*[ ]+R_X86_64_GOTOFF64[ ]+xtrn
- .*[ ]+R_X86_64_GOTPCREL[ ]+xtrn
- .*[ ]+R_X86_64_GOTPCREL[ ]+xtrn
--.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_GOTPCREL[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
--.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0xf+c
-+.*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_-0x0*4
- .*[ ]+R_X86_64_GOTPC32[ ]+_GLOBAL_OFFSET_TABLE_\+0x0*2
- .*[ ]+R_X86_64_PLT32[ ]+xtrn
- .*[ ]+R_X86_64_PLT32[ ]+xtrn
--.*[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_TLSGD[ ]+xtrn
- .*[ ]+R_X86_64_TLSGD[ ]+xtrn
--.*[ ]+R_X86_64_TLSGD[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_TLSGD[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn
- .*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn
--.*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_GOTTPOFF[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_TLSLD[ ]+xtrn
- .*[ ]+R_X86_64_TLSLD[ ]+xtrn
--.*[ ]+R_X86_64_TLSLD[ ]+xtrn\+0xf+c
-+.*[ ]+R_X86_64_TLSLD[ ]+xtrn-0x0*4
- .*[ ]+R_X86_64_DTPOFF64[ ]+xtrn
- .*[ ]+R_X86_64_DTPOFF32[ ]+xtrn
- .*[ ]+R_X86_64_DTPOFF32[ ]+xtrn
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/ia64/pcrel.d binutils-2.18~cvs20070812/gas/testsuite/gas/ia64/pcrel.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/ia64/pcrel.d 2005-03-29 00:34:20.000000000 +0200
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/ia64/pcrel.d 2007-08-12 13:45:01.000000000 +0200
-@@ -9,28 +9,28 @@
- 0+10[[:space:]]+PCREL22[[:space:]]+esym
- 0+20[[:space:]]+PCREL22[[:space:]]+esym\+0x0+20
- 0+30[[:space:]]+PCREL22[[:space:]]+esym
--0+40[[:space:]]+PCREL22[[:space:]]+esym\+0xf+e0
-+0+40[[:space:]]+PCREL22[[:space:]]+esym-0x0+20
-
- RELOCATION RECORDS FOR \[\.movl\]:
- OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
- 0+12[[:space:]]+PCREL64I[[:space:]]+esym
- 0+22[[:space:]]+PCREL64I[[:space:]]+esym\+0x0+20
- 0+32[[:space:]]+PCREL64I[[:space:]]+esym
--0+42[[:space:]]+PCREL64I[[:space:]]+esym\+0xf+e0
-+0+42[[:space:]]+PCREL64I[[:space:]]+esym-0x0+20
-
- RELOCATION RECORDS FOR \[\.data8\]:
- OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
- 0+10[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
- 0+20[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0x0+20
- 0+30[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
--0+40[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0xf+e0
-+0+40[[:space:]]+PCREL64[LM]SB[[:space:]]+esym-0x0+20
-
- RELOCATION RECORDS FOR \[\.data4\]:
- OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
- 0+10[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
- 0+20[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0x0+20
- 0+30[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
--0+40[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0xf+e0
-+0+40[[:space:]]+PCREL32[LM]SB[[:space:]]+esym-0x0+20
-
-
- Contents of section \.mov:
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/mips/branch-misc-2-64.d binutils-2.18~cvs20070812/gas/testsuite/gas/mips/branch-misc-2-64.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/mips/branch-misc-2-64.d 2005-11-23 15:04:18.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/mips/branch-misc-2-64.d 2007-08-12 13:45:01.000000000 +0200
-@@ -12,51 +12,51 @@
- \.\.\.
- \.\.\.
- 0+003c <[^>]*> 04110000 bal 0000000000000040 <x\+0x4>
--[ ]*3c: R_MIPS_PC16 g1\+0xfffffffffffffffc
--[ ]*3c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*3c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*3c: R_MIPS_PC16 g1-0x4
-+[ ]*3c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*3c: R_MIPS_NONE \*ABS\*-0x4
- 0+0040 <[^>]*> 00000000 nop
- 0+0044 <[^>]*> 04110000 bal 0000000000000048 <x\+0xc>
--[ ]*44: R_MIPS_PC16 g2\+0xfffffffffffffffc
--[ ]*44: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*44: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*44: R_MIPS_PC16 g2-0x4
-+[ ]*44: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*44: R_MIPS_NONE \*ABS\*-0x4
- 0+0048 <[^>]*> 00000000 nop
- 0+004c <[^>]*> 04110000 bal 0000000000000050 <x\+0x14>
--[ ]*4c: R_MIPS_PC16 g3\+0xfffffffffffffffc
--[ ]*4c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*4c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*4c: R_MIPS_PC16 g3-0x4
-+[ ]*4c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*4c: R_MIPS_NONE \*ABS\*-0x4
- 0+0050 <[^>]*> 00000000 nop
- 0+0054 <[^>]*> 04110000 bal 0000000000000058 <x\+0x1c>
--[ ]*54: R_MIPS_PC16 g4\+0xfffffffffffffffc
--[ ]*54: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*54: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*54: R_MIPS_PC16 g4-0x4
-+[ ]*54: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*54: R_MIPS_NONE \*ABS\*-0x4
- 0+0058 <[^>]*> 00000000 nop
- 0+005c <[^>]*> 04110000 bal 0000000000000060 <x\+0x24>
--[ ]*5c: R_MIPS_PC16 g5\+0xfffffffffffffffc
--[ ]*5c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*5c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*5c: R_MIPS_PC16 g5-0x4
-+[ ]*5c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*5c: R_MIPS_NONE \*ABS\*-0x4
- 0+0060 <[^>]*> 00000000 nop
- 0+0064 <[^>]*> 04110000 bal 0000000000000068 <x\+0x2c>
--[ ]*64: R_MIPS_PC16 g6\+0xfffffffffffffffc
--[ ]*64: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*64: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*64: R_MIPS_PC16 g6-0x4
-+[ ]*64: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*64: R_MIPS_NONE \*ABS\*-0x4
- 0+0068 <[^>]*> 00000000 nop
- \.\.\.
- \.\.\.
- \.\.\.
- 0+00a8 <[^>]*> 10000000 b 00000000000000ac <g6\+0x4>
--[ ]*a8: R_MIPS_PC16 x1\+0xfffffffffffffffc
--[ ]*a8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*a8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*a8: R_MIPS_PC16 x1-0x4
-+[ ]*a8: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*a8: R_MIPS_NONE \*ABS\*-0x4
- 0+00ac <[^>]*> 00000000 nop
- 0+00b0 <[^>]*> 10000000 b 00000000000000b4 <g6\+0xc>
--[ ]*b0: R_MIPS_PC16 x2\+0xfffffffffffffffc
--[ ]*b0: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*b0: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*b0: R_MIPS_PC16 x2-0x4
-+[ ]*b0: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*b0: R_MIPS_NONE \*ABS\*-0x4
- 0+00b4 <[^>]*> 00000000 nop
- 0+00b8 <[^>]*> 10000000 b 00000000000000bc <g6\+0x14>
--[ ]*b8: R_MIPS_PC16 \.data\+0xfffffffffffffffc
--[ ]*b8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*b8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*b8: R_MIPS_PC16 \.data-0x4
-+[ ]*b8: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*b8: R_MIPS_NONE \*ABS\*-0x4
- 0+00bc <[^>]*> 00000000 nop
- \.\.\.
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/mips/branch-misc-2pic-64.d binutils-2.18~cvs20070812/gas/testsuite/gas/mips/branch-misc-2pic-64.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/mips/branch-misc-2pic-64.d 2005-11-23 15:04:18.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/mips/branch-misc-2pic-64.d 2007-08-12 13:45:01.000000000 +0200
-@@ -12,51 +12,51 @@
- \.\.\.
- \.\.\.
- 0+003c <[^>]*> 04110000 bal 0000000000000040 <x\+0x4>
--[ ]*3c: R_MIPS_PC16 g1\+0xfffffffffffffffc
--[ ]*3c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*3c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*3c: R_MIPS_PC16 g1-0x4
-+[ ]*3c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*3c: R_MIPS_NONE \*ABS\*-0x4
- 0+0040 <[^>]*> 00000000 nop
- 0+0044 <[^>]*> 04110000 bal 0000000000000048 <x\+0xc>
--[ ]*44: R_MIPS_PC16 g2\+0xfffffffffffffffc
--[ ]*44: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*44: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*44: R_MIPS_PC16 g2-0x4
-+[ ]*44: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*44: R_MIPS_NONE \*ABS\*-0x4
- 0+0048 <[^>]*> 00000000 nop
- 0+004c <[^>]*> 04110000 bal 0000000000000050 <x\+0x14>
--[ ]*4c: R_MIPS_PC16 g3\+0xfffffffffffffffc
--[ ]*4c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*4c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*4c: R_MIPS_PC16 g3-0x4
-+[ ]*4c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*4c: R_MIPS_NONE \*ABS\*-0x4
- 0+0050 <[^>]*> 00000000 nop
- 0+0054 <[^>]*> 04110000 bal 0000000000000058 <x\+0x1c>
--[ ]*54: R_MIPS_PC16 g4\+0xfffffffffffffffc
--[ ]*54: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*54: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*54: R_MIPS_PC16 g4-0x4
-+[ ]*54: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*54: R_MIPS_NONE \*ABS\*-0x4
- 0+0058 <[^>]*> 00000000 nop
- 0+005c <[^>]*> 04110000 bal 0000000000000060 <x\+0x24>
--[ ]*5c: R_MIPS_PC16 g5\+0xfffffffffffffffc
--[ ]*5c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*5c: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*5c: R_MIPS_PC16 g5-0x4
-+[ ]*5c: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*5c: R_MIPS_NONE \*ABS\*-0x4
- 0+0060 <[^>]*> 00000000 nop
- 0+0064 <[^>]*> 04110000 bal 0000000000000068 <x\+0x2c>
--[ ]*64: R_MIPS_PC16 g6\+0xfffffffffffffffc
--[ ]*64: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*64: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*64: R_MIPS_PC16 g6-0x4
-+[ ]*64: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*64: R_MIPS_NONE \*ABS\*-0x4
- 0+0068 <[^>]*> 00000000 nop
- \.\.\.
- \.\.\.
- \.\.\.
- 0+00a8 <[^>]*> 10000000 b 00000000000000ac <g6\+0x4>
--[ ]*a8: R_MIPS_PC16 x1\+0xfffffffffffffffc
--[ ]*a8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*a8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*a8: R_MIPS_PC16 x1-0x4
-+[ ]*a8: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*a8: R_MIPS_NONE \*ABS\*-0x4
- 0+00ac <[^>]*> 00000000 nop
- 0+00b0 <[^>]*> 10000000 b 00000000000000b4 <g6\+0xc>
--[ ]*b0: R_MIPS_PC16 x2\+0xfffffffffffffffc
--[ ]*b0: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*b0: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*b0: R_MIPS_PC16 x2-0x4
-+[ ]*b0: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*b0: R_MIPS_NONE \*ABS\*-0x4
- 0+00b4 <[^>]*> 00000000 nop
- 0+00b8 <[^>]*> 10000000 b 00000000000000bc <g6\+0x14>
--[ ]*b8: R_MIPS_PC16 \.data\+0xfffffffffffffffc
--[ ]*b8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
--[ ]*b8: R_MIPS_NONE \*ABS\*\+0xfffffffffffffffc
-+[ ]*b8: R_MIPS_PC16 \.data-0x4
-+[ ]*b8: R_MIPS_NONE \*ABS\*-0x4
-+[ ]*b8: R_MIPS_NONE \*ABS\*-0x4
- 0+00bc <[^>]*> 00000000 nop
- \.\.\.
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/mips/ldstla-n64-sym32.d binutils-2.18~cvs20070812/gas/testsuite/gas/mips/ldstla-n64-sym32.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/mips/ldstla-n64-sym32.d 2005-03-04 10:51:11.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/mips/ldstla-n64-sym32.d 2007-08-12 13:45:01.000000000 +0200
-@@ -196,19 +196,19 @@
- .*: R_MIPS_NONE .*
- .* daddu a0,a0,v1
- .* lui a0,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* d?addiu a0,a0,0
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui a0,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* d?addiu a0,a0,0
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* daddu a0,a0,v1
-@@ -406,20 +406,20 @@
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui a0,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lw a0,0\(a0\)
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui a0,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* daddu a0,a0,v1
- .* lw a0,0\(a0\)
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- #
-@@ -616,20 +616,20 @@
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui at,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* sw a0,0\(at\)
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* lui at,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* daddu at,at,v1
- .* sw a0,0\(at\)
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- #
-@@ -880,21 +880,21 @@
- .* swl a0,0\(at\)
- .* swr a0,3\(at\)
- .* lui at,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* d?addiu at,at,0
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* swl a0,0\(at\)
- .* swr a0,3\(at\)
- .* lui at,0x0
--.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_HI16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* d?addiu at,at,0
--.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
-+.*: R_MIPS_LO16 extern-0x34000
- .*: R_MIPS_NONE .*
- .*: R_MIPS_NONE .*
- .* daddu at,at,v1
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/mips/mips16-hilo-n32.d binutils-2.18~cvs20070812/gas/testsuite/gas/mips/mips16-hilo-n32.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/mips/mips16-hilo-n32.d 2005-02-15 20:57:53.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/mips/mips16-hilo-n32.d 2007-08-12 13:45:01.000000000 +0200
-@@ -141,45 +141,45 @@
- 13c: f400 3480 sll a0,16
- 140: f010 4c00 addiu a0,-32768
- 144: f000 6c00 li a0,0
-- 144: R_MIPS16_HI16 \.data\+0xffff8000
-+ 144: R_MIPS16_HI16 \.data-0x8000
- 148: f400 3480 sll a0,16
- 14c: f000 4c00 addiu a0,0
-- 14c: R_MIPS16_LO16 \.data\+0xffff8000
-+ 14c: R_MIPS16_LO16 \.data-0x8000
- 150: f000 6c00 li a0,0
-- 150: R_MIPS16_HI16 \.data\+0xffff8004
-+ 150: R_MIPS16_HI16 \.data-0x7ffc
- 154: f400 3480 sll a0,16
- 158: f000 4c00 addiu a0,0
-- 158: R_MIPS16_LO16 \.data\+0xffff8004
-+ 158: R_MIPS16_LO16 \.data-0x7ffc
- 15c: f000 6c00 li a0,0
-- 15c: R_MIPS16_HI16 big_external_data_label\+0xffff8000
-+ 15c: R_MIPS16_HI16 big_external_data_label-0x8000
- 160: f400 3480 sll a0,16
- 164: f000 4c00 addiu a0,0
-- 164: R_MIPS16_LO16 big_external_data_label\+0xffff8000
-+ 164: R_MIPS16_LO16 big_external_data_label-0x8000
- 168: f000 6c00 li a0,0
-- 168: R_MIPS16_HI16 small_external_data_label\+0xffff8000
-+ 168: R_MIPS16_HI16 small_external_data_label-0x8000
- 16c: f400 3480 sll a0,16
- 170: f000 4c00 addiu a0,0
-- 170: R_MIPS16_LO16 small_external_data_label\+0xffff8000
-+ 170: R_MIPS16_LO16 small_external_data_label-0x8000
- 174: f000 6c00 li a0,0
-- 174: R_MIPS16_HI16 big_external_common\+0xffff8000
-+ 174: R_MIPS16_HI16 big_external_common-0x8000
- 178: f400 3480 sll a0,16
- 17c: f000 4c00 addiu a0,0
-- 17c: R_MIPS16_LO16 big_external_common\+0xffff8000
-+ 17c: R_MIPS16_LO16 big_external_common-0x8000
- 180: f000 6c00 li a0,0
-- 180: R_MIPS16_HI16 small_external_common\+0xffff8000
-+ 180: R_MIPS16_HI16 small_external_common-0x8000
- 184: f400 3480 sll a0,16
- 188: f000 4c00 addiu a0,0
-- 188: R_MIPS16_LO16 small_external_common\+0xffff8000
-+ 188: R_MIPS16_LO16 small_external_common-0x8000
- 18c: f000 6c00 li a0,0
-- 18c: R_MIPS16_HI16 \.bss\+0xffff8000
-+ 18c: R_MIPS16_HI16 \.bss-0x8000
- 190: f400 3480 sll a0,16
- 194: f000 4c00 addiu a0,0
-- 194: R_MIPS16_LO16 \.bss\+0xffff8000
-+ 194: R_MIPS16_LO16 \.bss-0x8000
- 198: f000 6c00 li a0,0
-- 198: R_MIPS16_HI16 \.sbss\+0xffff8000
-+ 198: R_MIPS16_HI16 \.sbss-0x8000
- 19c: f400 3480 sll a0,16
- 1a0: f000 4c00 addiu a0,0
-- 1a0: R_MIPS16_LO16 \.sbss\+0xffff8000
-+ 1a0: R_MIPS16_LO16 \.sbss-0x8000
- 1a4: 6c01 li a0,1
- 1a6: f400 3480 sll a0,16
- 1aa: 4c00 addiu a0,0
-@@ -399,45 +399,45 @@
- 3b4: f400 35a0 sll a1,16
- 3b8: f010 9d80 lw a0,-32768\(a1\)
- 3bc: f000 6d00 li a1,0
-- 3bc: R_MIPS16_HI16 \.data\+0xffff8000
-+ 3bc: R_MIPS16_HI16 \.data-0x8000
- 3c0: f400 35a0 sll a1,16
- 3c4: f000 9d80 lw a0,0\(a1\)
-- 3c4: R_MIPS16_LO16 \.data\+0xffff8000
-+ 3c4: R_MIPS16_LO16 \.data-0x8000
- 3c8: f000 6d00 li a1,0
-- 3c8: R_MIPS16_HI16 \.data\+0xffff8004
-+ 3c8: R_MIPS16_HI16 \.data-0x7ffc
- 3cc: f400 35a0 sll a1,16
- 3d0: f000 9d80 lw a0,0\(a1\)
-- 3d0: R_MIPS16_LO16 \.data\+0xffff8004
-+ 3d0: R_MIPS16_LO16 \.data-0x7ffc
- 3d4: f000 6d00 li a1,0
-- 3d4: R_MIPS16_HI16 big_external_data_label\+0xffff8000
-+ 3d4: R_MIPS16_HI16 big_external_data_label-0x8000
- 3d8: f400 35a0 sll a1,16
- 3dc: f000 9d80 lw a0,0\(a1\)
-- 3dc: R_MIPS16_LO16 big_external_data_label\+0xffff8000
-+ 3dc: R_MIPS16_LO16 big_external_data_label-0x8000
- 3e0: f000 6d00 li a1,0
-- 3e0: R_MIPS16_HI16 small_external_data_label\+0xffff8000
-+ 3e0: R_MIPS16_HI16 small_external_data_label-0x8000
- 3e4: f400 35a0 sll a1,16
- 3e8: f000 9d80 lw a0,0\(a1\)
-- 3e8: R_MIPS16_LO16 small_external_data_label\+0xffff8000
-+ 3e8: R_MIPS16_LO16 small_external_data_label-0x8000
- 3ec: f000 6d00 li a1,0
-- 3ec: R_MIPS16_HI16 big_external_common\+0xffff8000
-+ 3ec: R_MIPS16_HI16 big_external_common-0x8000
- 3f0: f400 35a0 sll a1,16
- 3f4: f000 9d80 lw a0,0\(a1\)
-- 3f4: R_MIPS16_LO16 big_external_common\+0xffff8000
-+ 3f4: R_MIPS16_LO16 big_external_common-0x8000
- 3f8: f000 6d00 li a1,0
-- 3f8: R_MIPS16_HI16 small_external_common\+0xffff8000
-+ 3f8: R_MIPS16_HI16 small_external_common-0x8000
- 3fc: f400 35a0 sll a1,16
- 400: f000 9d80 lw a0,0\(a1\)
-- 400: R_MIPS16_LO16 small_external_common\+0xffff8000
-+ 400: R_MIPS16_LO16 small_external_common-0x8000
- 404: f000 6d00 li a1,0
-- 404: R_MIPS16_HI16 \.bss\+0xffff8000
-+ 404: R_MIPS16_HI16 \.bss-0x8000
- 408: f400 35a0 sll a1,16
- 40c: f000 9d80 lw a0,0\(a1\)
-- 40c: R_MIPS16_LO16 \.bss\+0xffff8000
-+ 40c: R_MIPS16_LO16 \.bss-0x8000
- 410: f000 6d00 li a1,0
-- 410: R_MIPS16_HI16 \.sbss\+0xffff8000
-+ 410: R_MIPS16_HI16 \.sbss-0x8000
- 414: f400 35a0 sll a1,16
- 418: f000 9d80 lw a0,0\(a1\)
-- 418: R_MIPS16_LO16 \.sbss\+0xffff8000
-+ 418: R_MIPS16_LO16 \.sbss-0x8000
- 41c: 6d01 li a1,1
- 41e: f400 35a0 sll a1,16
- 422: 9d80 lw a0,0\(a1\)
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/astest.d binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/astest.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/astest.d 2005-03-02 14:25:01.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/astest.d 2007-08-12 13:45:01.000000000 +0200
-@@ -52,11 +52,11 @@
- 60: 00 00 00 00 \.long 0x0
- 60: R_PPC_ADDR32 z
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
-- 64: R_PPC_ADDR32 x\+0xf+ffffffc
-+ 64: R_PPC_ADDR32 x-0x4
- 68: 00 00 00 00 \.long 0x0
- 68: R_PPC_ADDR32 \.data
- 6c: ff ff ff fc fnmsub f31,f31,f31,f31
-- 6c: R_PPC_ADDR32 z\+0xf+ffffffc
-+ 6c: R_PPC_ADDR32 z-0x4
- 70: ff ff ff 9c \.long 0xffffff9c
- 74: ff ff ff 9c \.long 0xffffff9c
- 78: 00 00 00 00 \.long 0x0
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/astest2.d binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/astest2.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/astest2.d 2005-03-02 14:25:01.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/astest2.d 2007-08-12 13:45:01.000000000 +0200
-@@ -48,11 +48,11 @@
- 60: 00 00 00 00 \.long 0x0
- 60: R_PPC_ADDR32 z
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
-- 64: R_PPC_ADDR32 x\+0xf+ffffffc
-+ 64: R_PPC_ADDR32 x-0x4
- 68: 00 00 00 00 \.long 0x0
- 68: R_PPC_ADDR32 \.data
- 6c: ff ff ff fc fnmsub f31,f31,f31,f31
-- 6c: R_PPC_ADDR32 z\+0xf+ffffffc
-+ 6c: R_PPC_ADDR32 z-0x4
- 70: 00 00 00 08 \.long 0x8
- 74: 00 00 00 08 \.long 0x8
-
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/astest2_64.d binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/astest2_64.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/astest2_64.d 2005-03-02 14:25:01.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/astest2_64.d 2007-08-12 13:45:01.000000000 +0200
-@@ -45,11 +45,11 @@
- 58: 00 00 00 00 \.long 0x0
- 58: R_PPC64_ADDR32 z
- 5c: ff ff ff fc fnmsub f31,f31,f31,f31
-- 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
-+ 5c: R_PPC64_ADDR32 x-0x4
- 60: 00 00 00 00 \.long 0x0
- 60: R_PPC64_ADDR32 \.data
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
-- 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
-+ 64: R_PPC64_ADDR32 z-0x4
- 68: 00 00 00 08 \.long 0x8
- 6c: 00 00 00 08 \.long 0x8
-
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/astest64.d binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/astest64.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/astest64.d 2005-03-02 14:25:01.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/astest64.d 2007-08-12 13:45:01.000000000 +0200
-@@ -49,11 +49,11 @@
- 58: 00 00 00 00 \.long 0x0
- 58: R_PPC64_ADDR32 z
- 5c: ff ff ff fc fnmsub f31,f31,f31,f31
-- 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
-+ 5c: R_PPC64_ADDR32 x-0x4
- 60: 00 00 00 00 \.long 0x0
- 60: R_PPC64_ADDR32 \.data
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
-- 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
-+ 64: R_PPC64_ADDR32 z-0x4
- 68: ff ff ff a4 \.long 0xffffffa4
- 6c: ff ff ff a4 \.long 0xffffffa4
- 70: 00 00 00 00 \.long 0x0
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/test1elf32.d binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/test1elf32.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/test1elf32.d 2005-03-02 14:25:01.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/test1elf32.d 2007-08-12 13:45:01.000000000 +0200
-@@ -79,7 +79,7 @@
-
- 0+000c <dat0>:
- c: ff ff ff fc fnmsub f31,f31,f31,f31
-- c: R_PPC_REL32 jk\+0xf+fffc
-+ c: R_PPC_REL32 jk-0x4
-
- 0+0010 <dat1>:
- 10: 00 00 00 00 \.long 0x0
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/test1elf64.d binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/test1elf64.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/ppc/test1elf64.d 2005-03-02 14:25:01.000000000 +0100
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/ppc/test1elf64.d 2007-08-12 13:45:01.000000000 +0200
-@@ -114,7 +114,7 @@
-
- 0000000000000014 <dat0>:
- 14: ff ff ff fc fnmsub f31,f31,f31,f31
-- 14: R_PPC64_REL32 jk\+0xfffffffffffffffc
-+ 14: R_PPC64_REL32 jk-0x4
-
- 0000000000000018 <dat1>:
- 18: 00 00 00 00 \.long 0x0
-diff -urNad binutils-2.18~cvs20070812~/gas/testsuite/gas/sparc/reloc64.d binutils-2.18~cvs20070812/gas/testsuite/gas/sparc/reloc64.d
---- binutils-2.18~cvs20070812~/gas/testsuite/gas/sparc/reloc64.d 1999-06-10 23:08:04.000000000 +0200
-+++ binutils-2.18~cvs20070812/gas/testsuite/gas/sparc/reloc64.d 2007-08-12 13:45:01.000000000 +0200
-@@ -35,13 +35,13 @@
- 44: R_SPARC_LO10 .text
- 48: 01 00 00 00 nop
- 4c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
-- 4c: R_SPARC_HH22 .text\+0xfedcba9876543210
-+ 4c: R_SPARC_HH22 .text\-0x123456789abcdf0
- 50: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
-- 50: R_SPARC_HM10 .text\+0xfedcba9876543210
-+ 50: R_SPARC_HM10 .text\-0x123456789abcdf0
- 54: 05 00 00 00 sethi %hi\((0x|)0\), %g2
-- 54: R_SPARC_LM22 .text\+0xfedcba9876543210
-+ 54: R_SPARC_LM22 .text\-0x123456789abcdf0
- 58: 84 10 60 00 mov %g1, %g2
-- 58: R_SPARC_LO10 .text\+0xfedcba9876543210
-+ 58: R_SPARC_LO10 .text\-0x123456789abcdf0
- 5c: 01 00 00 00 nop
- 60: 03 2a 61 d9 sethi %hi\(0xa9876400\), %g1
- 64: 82 10 61 43 or %g1, 0x143, %g1.*
-@@ -70,7 +70,7 @@
- a0: R_SPARC_LOX10 .text
- a4: 01 00 00 00 nop
- a8: 03 00 00 00 sethi %hi\((0x|)0\), %g1
-- a8: R_SPARC_HIX22 .text\+0xffffffff76543210
-+ a8: R_SPARC_HIX22 .text-0x89abcdf0
- ac: 82 18 60 00 xor %g1, 0, %g1
-- ac: R_SPARC_LOX10 .text\+0xffffffff76543210
-+ ac: R_SPARC_LOX10 .text-0x89abcdf0
- b0: 01 00 00 00 nop
+++ /dev/null
-#!/bin/sh -e
-## 211-hjl-binutils-weakdef.dpatch
-##
-## DP: Description: elflink.c (elf_link_add_object_symbols): Check symbol type
-## DP: Description: for symbol alias in a dynamic object.
-## DP: Author: H.J. Lu <hongjiu.lu@intel.com>
-## DP: Upstream status: hjl 2.17.50.0.18
-## DP: Original patch: binutils-weakdef-1.patch
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-bfd/
-
-2007-07-19 H.J. Lu <hongjiu.lu@intel.com>
-
- * elflink.c (elf_link_add_object_symbols): Check symbol type
- for symbol alias in a dynamic object.
-
-ld/testsuite/
-
-2007-07-19 H.J. Lu <hongjiu.lu@intel.com>
-
- * ld-elf/data2.c: New.
- * ld-elf/weakdef1.c: Likewise.
-
- * ld-elf/shared.exp: Add tests for libdata2 and weakdef1.
-
-@DPATCH@
-diff -urNad binutils-2.18~cvs20070812~/bfd/elflink.c binutils-2.18~cvs20070812/bfd/elflink.c
---- binutils-2.18~cvs20070812~/bfd/elflink.c 2007-08-12 13:48:32.000000000 +0200
-+++ binutils-2.18~cvs20070812/bfd/elflink.c 2007-08-12 13:48:41.000000000 +0200
-@@ -4558,6 +4558,7 @@
- asection *slook;
- bfd_vma vlook;
- long ilook;
-+ int tlook;
- size_t i, j, idx;
-
- hlook = weaks;
-@@ -4570,6 +4571,7 @@
- || hlook->root.type == bfd_link_hash_indirect);
- slook = hlook->root.u.def.section;
- vlook = hlook->root.u.def.value;
-+ tlook = hlook->type;
-
- ilook = -1;
- i = 0;
-@@ -4607,9 +4609,10 @@
- {
- h = sorted_sym_hash [i];
-
-- /* Stop if value or section doesn't match. */
-+ /* Stop if value, section or type doesn't match. */
- if (h->root.u.def.value != vlook
-- || h->root.u.def.section != slook)
-+ || h->root.u.def.section != slook
-+ || h->type != tlook)
- break;
- else if (h != hlook)
- {
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/data2.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/data2.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/data2.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/data2.c 2007-08-12 13:48:41.000000000 +0200
-@@ -0,0 +1,9 @@
-+int foo = 0;
-+extern int foo_alias __attribute__ ((weak, alias ("foo")));
-+
-+void
-+bar (void)
-+{
-+ foo = -1;
-+}
-+
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/shared.exp binutils-2.18~cvs20070812/ld/testsuite/ld-elf/shared.exp
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/shared.exp 2007-07-06 16:09:43.000000000 +0200
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/shared.exp 2007-08-12 13:48:41.000000000 +0200
-@@ -123,6 +123,9 @@
- {"Build libdata1.so"
- "-shared" "-fPIC"
- {data1.c} {} "libdata1.so"}
-+ {"Build libdata2.so"
-+ "-shared" "-fPIC"
-+ {data2.c} {} "libdata2.so"}
- }
-
- set run_tests {
-@@ -235,6 +238,9 @@
- {"Run with libdata1.so"
- "tmpdir/libdata1.so" ""
- {dynbss1.c} "dynbss1" "pass.out"}
-+ {"Run with libdata2.so"
-+ "tmpdir/libdata2.so" ""
-+ {weakdef1.c} "weakdef1" "pass.out"}
- }
-
- run_cc_link_tests $build_tests
-diff -urNad binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/weakdef1.c binutils-2.18~cvs20070812/ld/testsuite/ld-elf/weakdef1.c
---- binutils-2.18~cvs20070812~/ld/testsuite/ld-elf/weakdef1.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.18~cvs20070812/ld/testsuite/ld-elf/weakdef1.c 2007-08-12 13:48:41.000000000 +0200
-@@ -0,0 +1,15 @@
-+#include <stdio.h>
-+#include <stdlib.h>
-+
-+extern int foo_alias;
-+extern void bar (void);
-+
-+int
-+main (void)
-+{
-+ bar ();
-+ if (foo_alias != -1)
-+ abort ();
-+ printf ("PASS\n");
-+ return 0;
-+}
+++ /dev/null
-#!/bin/sh -e
-## 304_pr4476.dpatch
-##
-## DP: Description: Fix PR binutils/4476
-## DP: Upstream status: Not yet accepted in CVS head
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-binutils/
-
-2007-05-09 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/4476
- * readelf.c (print_dynamic_symbol): New.
- (process_symbol_table): Handle DT_GNU_HASH for dynamic symbols.
-
-ld/testsuite/
-
-2007-05-09 H.J. Lu <hongjiu.lu@intel.com>
-
- PR binutils/4476
- * ld-elf/hash.d: Check "-s -D" for readelf.
-
-@DPATCH@
---- binutils/binutils/readelf.c.hash 2007-05-09 10:54:22.000000000 -0700
-+++ binutils/binutils/readelf.c 2007-05-09 17:24:46.000000000 -0700
-@@ -7033,6 +7033,39 @@ get_dynamic_data (FILE *file, unsigned i
- return i_data;
- }
-
-+static void
-+print_dynamic_symbol (bfd_vma si, unsigned long hn)
-+{
-+ Elf_Internal_Sym *psym;
-+ int n;
-+
-+ psym = dynamic_symbols + si;
-+
-+ n = print_vma (si, DEC_5);
-+ if (n < 5)
-+ fputs (" " + n, stdout);
-+ printf (" %3lu: ", hn);
-+ print_vma (psym->st_value, LONG_HEX);
-+ putchar (' ');
-+ print_vma (psym->st_size, DEC_5);
-+
-+ printf (" %6s", get_symbol_type (ELF_ST_TYPE (psym->st_info)));
-+ printf (" %6s", get_symbol_binding (ELF_ST_BIND (psym->st_info)));
-+ printf (" %3s", get_symbol_visibility (ELF_ST_VISIBILITY (psym->st_other)));
-+ /* Check to see if any other bits in the st_other field are set.
-+ Note - displaying this information disrupts the layout of the
-+ table being generated, but for the moment this case is very
-+ rare. */
-+ if (psym->st_other ^ ELF_ST_VISIBILITY (psym->st_other))
-+ printf (" [%s] ", get_symbol_other (psym->st_other ^ ELF_ST_VISIBILITY (psym->st_other)));
-+ printf (" %3.3s ", get_symbol_index_type (psym->st_shndx));
-+ if (VALID_DYNAMIC_NAME (psym->st_name))
-+ print_symbol (25, GET_DYNAMIC_NAME (psym->st_name));
-+ else
-+ printf (" <corrupt: %14ld>", psym->st_name);
-+ putchar ('\n');
-+}
-+
- /* Dump the symbol table. */
- static int
- process_symbol_table (FILE *file)
-@@ -7045,12 +7078,14 @@ process_symbol_table (FILE *file)
- bfd_vma ngnubuckets = 0;
- bfd_vma *gnubuckets = NULL;
- bfd_vma *gnuchains = NULL;
-+ bfd_vma gnusymidx = 0;
-
- if (! do_syms && !do_histogram)
- return 1;
-
-- if (dynamic_info[DT_HASH] && ((do_using_dynamic && dynamic_strings != NULL)
-- || do_histogram))
-+ if (dynamic_info[DT_HASH]
-+ && (do_histogram
-+ || (do_using_dynamic && dynamic_strings != NULL)))
- {
- unsigned char nb[8];
- unsigned char nc[8];
-@@ -7094,54 +7129,157 @@ process_symbol_table (FILE *file)
- return 0;
- }
-
-- if (do_syms
-- && dynamic_info[DT_HASH] && do_using_dynamic && dynamic_strings != NULL)
-+ if (dynamic_info_DT_GNU_HASH
-+ && (do_histogram
-+ || (do_using_dynamic && dynamic_strings != NULL)))
- {
-- unsigned long hn;
-- bfd_vma si;
-+ unsigned char nb[16];
-+ bfd_vma i, maxchain = 0xffffffff, bitmaskwords;
-+ bfd_vma buckets_vma;
-+
-+ if (fseek (file,
-+ (archive_file_offset
-+ + offset_from_vma (file, dynamic_info_DT_GNU_HASH,
-+ sizeof nb)),
-+ SEEK_SET))
-+ {
-+ error (_("Unable to seek to start of dynamic information\n"));
-+ return 0;
-+ }
-+
-+ if (fread (nb, 16, 1, file) != 1)
-+ {
-+ error (_("Failed to read in number of buckets\n"));
-+ return 0;
-+ }
-
-- printf (_("\nSymbol table for image:\n"));
-+ ngnubuckets = byte_get (nb, 4);
-+ gnusymidx = byte_get (nb + 4, 4);
-+ bitmaskwords = byte_get (nb + 8, 4);
-+ buckets_vma = dynamic_info_DT_GNU_HASH + 16;
- if (is_32bit_elf)
-- printf (_(" Num Buc: Value Size Type Bind Vis Ndx Name\n"));
-+ buckets_vma += bitmaskwords * 4;
- else
-- printf (_(" Num Buc: Value Size Type Bind Vis Ndx Name\n"));
-+ buckets_vma += bitmaskwords * 8;
-
-- for (hn = 0; hn < nbuckets; hn++)
-+ if (fseek (file,
-+ (archive_file_offset
-+ + offset_from_vma (file, buckets_vma, 4)),
-+ SEEK_SET))
- {
-- if (! buckets[hn])
-- continue;
-+ error (_("Unable to seek to start of dynamic information\n"));
-+ return 0;
-+ }
-+
-+ gnubuckets = get_dynamic_data (file, ngnubuckets, 4);
-+
-+ if (gnubuckets == NULL)
-+ return 0;
-+
-+ for (i = 0; i < ngnubuckets; i++)
-+ if (gnubuckets[i] != 0)
-+ {
-+ if (gnubuckets[i] < gnusymidx)
-+ return 0;
-+
-+ if (maxchain == 0xffffffff || gnubuckets[i] > maxchain)
-+ maxchain = gnubuckets[i];
-+ }
-+
-+ if (maxchain == 0xffffffff)
-+ return 0;
-
-- for (si = buckets[hn]; si < nchains && si > 0; si = chains[si])
-+ maxchain -= gnusymidx;
-+
-+ if (fseek (file,
-+ (archive_file_offset
-+ + offset_from_vma (file, buckets_vma
-+ + 4 * (ngnubuckets + maxchain), 4)),
-+ SEEK_SET))
-+ {
-+ error (_("Unable to seek to start of dynamic information\n"));
-+ return 0;
-+ }
-+
-+ do
-+ {
-+ if (fread (nb, 4, 1, file) != 1)
- {
-- Elf_Internal_Sym *psym;
-- int n;
-+ error (_("Failed to determine last chain length\n"));
-+ return 0;
-+ }
-
-- psym = dynamic_symbols + si;
-+ if (maxchain + 1 == 0)
-+ return 0;
-
-- n = print_vma (si, DEC_5);
-- if (n < 5)
-- fputs (" " + n, stdout);
-- printf (" %3lu: ", hn);
-- print_vma (psym->st_value, LONG_HEX);
-- putchar (' ');
-- print_vma (psym->st_size, DEC_5);
-+ ++maxchain;
-+ }
-+ while ((byte_get (nb, 4) & 1) == 0);
-
-- printf (" %6s", get_symbol_type (ELF_ST_TYPE (psym->st_info)));
-- printf (" %6s", get_symbol_binding (ELF_ST_BIND (psym->st_info)));
-- printf (" %3s", get_symbol_visibility (ELF_ST_VISIBILITY (psym->st_other)));
-- /* Check to see if any other bits in the st_other field are set.
-- Note - displaying this information disrupts the layout of the
-- table being generated, but for the moment this case is very rare. */
-- if (psym->st_other ^ ELF_ST_VISIBILITY (psym->st_other))
-- printf (" [%s] ", get_symbol_other (psym->st_other ^ ELF_ST_VISIBILITY (psym->st_other)));
-- printf (" %3.3s ", get_symbol_index_type (psym->st_shndx));
-- if (VALID_DYNAMIC_NAME (psym->st_name))
-- print_symbol (25, GET_DYNAMIC_NAME (psym->st_name));
-- else
-- printf (" <corrupt: %14ld>", psym->st_name);
-- putchar ('\n');
-+ if (fseek (file,
-+ (archive_file_offset
-+ + offset_from_vma (file, buckets_vma + 4 * ngnubuckets, 4)),
-+ SEEK_SET))
-+ {
-+ error (_("Unable to seek to start of dynamic information\n"));
-+ return 0;
-+ }
-+
-+ gnuchains = get_dynamic_data (file, maxchain, 4);
-+
-+ if (gnuchains == NULL)
-+ return 0;
-+ }
-+
-+ if ((dynamic_info[DT_HASH] || dynamic_info_DT_GNU_HASH)
-+ && do_syms
-+ && do_using_dynamic
-+ && dynamic_strings != NULL)
-+ {
-+ unsigned long hn;
-+
-+ if (dynamic_info[DT_HASH])
-+ {
-+ bfd_vma si;
-+
-+ printf (_("\nSymbol table for image:\n"));
-+ if (is_32bit_elf)
-+ printf (_(" Num Buc: Value Size Type Bind Vis Ndx Name\n"));
-+ else
-+ printf (_(" Num Buc: Value Size Type Bind Vis Ndx Name\n"));
-+
-+ for (hn = 0; hn < nbuckets; hn++)
-+ {
-+ if (! buckets[hn])
-+ continue;
-+
-+ for (si = buckets[hn]; si < nchains && si > 0; si = chains[si])
-+ print_dynamic_symbol (si, hn);
- }
- }
-+
-+ if (dynamic_info_DT_GNU_HASH)
-+ {
-+ printf (_("\nSymbol table of `.gnu.hash' for image:\n"));
-+ if (is_32bit_elf)
-+ printf (_(" Num Buc: Value Size Type Bind Vis Ndx Name\n"));
-+ else
-+ printf (_(" Num Buc: Value Size Type Bind Vis Ndx Name\n"));
-+
-+ for (hn = 0; hn < ngnubuckets; ++hn)
-+ if (gnubuckets[hn] != 0)
-+ {
-+ bfd_vma si = gnubuckets[hn];
-+ bfd_vma off = si - gnusymidx;
-+
-+ do
-+ {
-+ print_dynamic_symbol (si, hn);
-+ si++;
-+ }
-+ while ((gnuchains[off++] & 1) == 0);
-+ }
-+ }
- }
- else if (do_syms && !do_using_dynamic)
- {
-@@ -7426,108 +7564,12 @@ process_symbol_table (FILE *file)
-
- if (do_histogram && dynamic_info_DT_GNU_HASH)
- {
-- unsigned char nb[16];
-- bfd_vma i, maxchain = 0xffffffff, symidx, bitmaskwords;
- unsigned long *lengths;
- unsigned long *counts;
- unsigned long hn;
- unsigned long maxlength = 0;
- unsigned long nzero_counts = 0;
- unsigned long nsyms = 0;
-- bfd_vma buckets_vma;
--
-- if (fseek (file,
-- (archive_file_offset
-- + offset_from_vma (file, dynamic_info_DT_GNU_HASH,
-- sizeof nb)),
-- SEEK_SET))
-- {
-- error (_("Unable to seek to start of dynamic information\n"));
-- return 0;
-- }
--
-- if (fread (nb, 16, 1, file) != 1)
-- {
-- error (_("Failed to read in number of buckets\n"));
-- return 0;
-- }
--
-- ngnubuckets = byte_get (nb, 4);
-- symidx = byte_get (nb + 4, 4);
-- bitmaskwords = byte_get (nb + 8, 4);
-- buckets_vma = dynamic_info_DT_GNU_HASH + 16;
-- if (is_32bit_elf)
-- buckets_vma += bitmaskwords * 4;
-- else
-- buckets_vma += bitmaskwords * 8;
--
-- if (fseek (file,
-- (archive_file_offset
-- + offset_from_vma (file, buckets_vma, 4)),
-- SEEK_SET))
-- {
-- error (_("Unable to seek to start of dynamic information\n"));
-- return 0;
-- }
--
-- gnubuckets = get_dynamic_data (file, ngnubuckets, 4);
--
-- if (gnubuckets == NULL)
-- return 0;
--
-- for (i = 0; i < ngnubuckets; i++)
-- if (gnubuckets[i] != 0)
-- {
-- if (gnubuckets[i] < symidx)
-- return 0;
--
-- if (maxchain == 0xffffffff || gnubuckets[i] > maxchain)
-- maxchain = gnubuckets[i];
-- }
--
-- if (maxchain == 0xffffffff)
-- return 0;
--
-- maxchain -= symidx;
--
-- if (fseek (file,
-- (archive_file_offset
-- + offset_from_vma (file, buckets_vma
-- + 4 * (ngnubuckets + maxchain), 4)),
-- SEEK_SET))
-- {
-- error (_("Unable to seek to start of dynamic information\n"));
-- return 0;
-- }
--
-- do
-- {
-- if (fread (nb, 4, 1, file) != 1)
-- {
-- error (_("Failed to determine last chain length\n"));
-- return 0;
-- }
--
-- if (maxchain + 1 == 0)
-- return 0;
--
-- ++maxchain;
-- }
-- while ((byte_get (nb, 4) & 1) == 0);
--
-- if (fseek (file,
-- (archive_file_offset
-- + offset_from_vma (file, buckets_vma + 4 * ngnubuckets, 4)),
-- SEEK_SET))
-- {
-- error (_("Unable to seek to start of dynamic information\n"));
-- return 0;
-- }
--
-- gnuchains = get_dynamic_data (file, maxchain, 4);
--
-- if (gnuchains == NULL)
-- return 0;
-
- lengths = calloc (ngnubuckets, sizeof (*lengths));
- if (lengths == NULL)
-@@ -7545,7 +7587,7 @@ process_symbol_table (FILE *file)
- {
- bfd_vma off, length = 1;
-
-- for (off = gnubuckets[hn] - symidx;
-+ for (off = gnubuckets[hn] - gnusymidx;
- (gnuchains[off] & 1) == 0; ++off)
- ++length;
- lengths[hn] = length;
---- binutils/ld/testsuite/ld-elf/hash.d.hash 2006-09-15 07:55:42.000000000 -0700
-+++ binutils/ld/testsuite/ld-elf/hash.d 2007-05-09 15:46:56.000000000 -0700
-@@ -1,5 +1,5 @@
- #source: start.s
--#readelf: -d
-+#readelf: -d -s -D
- #ld: -shared --hash-style=gnu
- #target: *-*-linux*
- #notarget: mips*-*-*
-@@ -7,3 +7,11 @@
- #...
- [ ]*0x[0-9a-z]+[ ]+\(GNU_HASH\)[ ]+0x[0-9a-z]+
- #...
-+[ ]+[0-9]+[ ]+[0-9]+:[ ]+[0-9a-f]+[ ]+[0-9]+[ ]+NOTYPE[ ]+GLOBAL DEFAULT[ ]+[1-9] _start
-+#...
-+[ ]+[0-9]+[ ]+[0-9]+:[ ]+[0-9a-f]+[ ]+[0-9]+[ ]+NOTYPE[ ]+GLOBAL DEFAULT[ ]+[1-9] main
-+#...
-+[ ]+[0-9]+[ ]+[0-9]+:[ ]+[0-9a-f]+[ ]+[0-9]+[ ]+NOTYPE[ ]+GLOBAL DEFAULT[ ]+[1-9] start
-+#...
-+[ ]+[0-9]+[ ]+[0-9]+:[ ]+[0-9a-f]+[ ]+[0-9]+[ ]+NOTYPE[ ]+GLOBAL DEFAULT[ ]+[1-9] __start
-+#...
+++ /dev/null
-#!/bin/sh -e
-## 305_arm-dis.dpatch
-##
-## DP: Description: Fix segfault when disassembling ARM code
-## DP: Upstream status: Fix in CVS head
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-@DPATCH@
-diff -u -r1.86 -r1.87
---- src/opcodes/arm-dis.c 2007/07/05 09:49:00 1.86
-+++ src/opcodes/arm-dis.c 2007/10/26 11:27:12 1.87
-@@ -3989,6 +3989,7 @@
- /* First check the full symtab for a mapping symbol, even if there
- are no usable non-mapping symbols for this address. */
- if (info->symtab != NULL
-+ && * info->symtab
- && bfd_asymbol_flavour (*info->symtab) == bfd_target_elf_flavour)
- {
- bfd_vma addr;
+++ /dev/null
-#!/bin/sh -e
-## 311_pr5006.dpatch
-##
-## DP: Description: Fix PR ld/5006
-## DP: Upstream status: CVS head 20070908
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-This one turns out to be nothing to do with --gc-sections, but a
-rather more serious bug. If an input section with contents is linked
-in to a bss output section, the ELF linker currently leaves the output
-section as NOBITS. File space is thus not allocated for the output
-section, but a number of places write to the file regardless,
-typically trashing the symbol table, string table, or debug sections.
-
-bfd/
- PR ld/2864, ld/5006
- * elf.c (special_sections): Comment typo.
- (elf_fake_sections): Force SHT_PROGBITS for sections that are
- SHT_NOBITS if BFD section flags say they have contents.
-ld/
- * ldwrite.c (build_link_order <lang_padding_statement_enum>): Correct
- condition under which we build a bfd_data_link_order.
-
-@DPATCH@
-Index: bfd/elf.c
-===================================================================
-RCS file: /cvs/src/src/bfd/elf.c,v
-retrieving revision 1.413
-diff -u -p -r1.413 elf.c
---- ./bfd/elf.c 25 Aug 2007 13:20:41 -0000 1.413
-+++ ./bfd/elf.c 8 Sep 2007 08:07:42 -0000
-@@ -2084,7 +2084,7 @@ static const struct bfd_elf_special_sect
- static const struct bfd_elf_special_section *special_sections[] =
- {
- special_sections_b, /* 'b' */
-- special_sections_c, /* 'b' */
-+ special_sections_c, /* 'c' */
- special_sections_d, /* 'd' */
- NULL, /* 'e' */
- special_sections_f, /* 'f' */
-@@ -2475,16 +2475,28 @@ elf_fake_sections (bfd *abfd, asection *
-
- /* If the section type is unspecified, we set it based on
- asect->flags. */
-+ if ((asect->flags & SEC_GROUP) != 0)
-+ sh_type = SHT_GROUP;
-+ else if ((asect->flags & SEC_ALLOC) != 0
-+ && (((asect->flags & (SEC_LOAD | SEC_HAS_CONTENTS)) == 0)
-+ || (asect->flags & SEC_NEVER_LOAD) != 0))
-+ sh_type = SHT_NOBITS;
-+ else
-+ sh_type = SHT_PROGBITS;
-+
- if (this_hdr->sh_type == SHT_NULL)
-- {
-- if ((asect->flags & SEC_GROUP) != 0)
-- this_hdr->sh_type = SHT_GROUP;
-- else if ((asect->flags & SEC_ALLOC) != 0
-- && (((asect->flags & (SEC_LOAD | SEC_HAS_CONTENTS)) == 0)
-- || (asect->flags & SEC_NEVER_LOAD) != 0))
-- this_hdr->sh_type = SHT_NOBITS;
-- else
-- this_hdr->sh_type = SHT_PROGBITS;
-+ this_hdr->sh_type = sh_type;
-+ else if (this_hdr->sh_type == SHT_NOBITS
-+ && sh_type == SHT_PROGBITS
-+ && (asect->flags & SEC_ALLOC) != 0)
-+ {
-+ /* Warn if we are changing a NOBITS section to PROGBITS, but
-+ allow the link to proceed. This can happen when users link
-+ non-bss input sections to bss output sections, or emit data
-+ to a bss output section via a linker script. */
-+ (*_bfd_error_handler)
-+ (_("section `%A' type changed to PROGBITS"), asect);
-+ this_hdr->sh_type = sh_type;
- }
-
- switch (this_hdr->sh_type)
-Index: ld/ldwrite.c
-===================================================================
-RCS file: /cvs/src/src/ld/ldwrite.c,v
-retrieving revision 1.26
-diff -u -p -r1.26 ldwrite.c
---- ./ld/ldwrite.c 6 Jul 2007 14:09:41 -0000 1.26
-+++ ./ld/ldwrite.c 8 Sep 2007 08:08:37 -0000
-@@ -270,7 +270,10 @@ build_link_order (lang_statement_union_t
- output_section = statement->padding_statement.output_section;
- ASSERT (statement->padding_statement.output_section->owner
- == output_bfd);
-- if ((output_section->flags & SEC_HAS_CONTENTS) != 0)
-+ if (((output_section->flags & SEC_HAS_CONTENTS) != 0
-+ || ((output_section->flags & SEC_LOAD) != 0
-+ && (output_section->flags & SEC_THREAD_LOCAL)))
-+ && (output_section->flags & SEC_NEVER_LOAD) == 0)
- {
- link_order = bfd_new_link_order (output_bfd, output_section);
- link_order->type = bfd_data_link_order;
-
+++ /dev/null
-#!/bin/sh -e
-## 312_pr5011.dpatch
-##
-## DP: Description: Fix PR binutils/5011
-## DP: Upstream status: CVS head 20070908
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
-
- PR binutils/5011
- * readelf.c (process_version_sections): Don't read past end of
- various section buffers.
-
-@DPATCH@
-Index: ./binutils/readelf.c
-===================================================================
-RCS file: /cvs/src/src/binutils/readelf.c,v
-retrieving revision 1.376
-diff -u -p -r1.376 readelf.c
---- ./binutils/readelf.c 30 Aug 2007 13:47:35 -0000 1.376
-+++ ./binutils/readelf.c 10 Sep 2007 08:59:40 -0000
-@@ -6454,6 +6454,7 @@ process_version_sections (FILE *file)
- Elf_External_Verdef *edefs;
- unsigned int idx;
- unsigned int cnt;
-+ char *endbuf;
-
- found = 1;
-
-@@ -6473,6 +6474,7 @@ process_version_sections (FILE *file)
- edefs = get_data (NULL, file, section->sh_offset, 1,
- section->sh_size,
- _("version definition section"));
-+ endbuf = (char *) edefs + section->sh_size;
- if (!edefs)
- break;
-
-@@ -6487,6 +6489,8 @@ process_version_sections (FILE *file)
- int isum;
-
- vstart = ((char *) edefs) + idx;
-+ if (vstart + sizeof (*edef) > endbuf)
-+ break;
-
- edef = (Elf_External_Verdef *) vstart;
-
-@@ -6524,6 +6528,8 @@ process_version_sections (FILE *file)
- vstart += aux.vda_next;
-
- eaux = (Elf_External_Verdaux *) vstart;
-+ if (vstart + sizeof (*eaux) > endbuf)
-+ break;
-
- aux.vda_name = BYTE_GET (eaux->vda_name);
- aux.vda_next = BYTE_GET (eaux->vda_next);
-@@ -6535,9 +6541,13 @@ process_version_sections (FILE *file)
- printf (_(" %#06x: Parent %d, name index: %ld\n"),
- isum, j, aux.vda_name);
- }
-+ if (j < ent.vd_cnt)
-+ printf (_(" Version def aux past end of section\n"));
-
- idx += ent.vd_next;
- }
-+ if (cnt < section->sh_info)
-+ printf (_(" Version definition past end of section\n"));
-
- free (edefs);
- }
-@@ -6548,6 +6558,7 @@ process_version_sections (FILE *file)
- Elf_External_Verneed *eneed;
- unsigned int idx;
- unsigned int cnt;
-+ char *endbuf;
-
- found = 1;
-
-@@ -6566,6 +6577,7 @@ process_version_sections (FILE *file)
- eneed = get_data (NULL, file, section->sh_offset, 1,
- section->sh_size,
- _("version need section"));
-+ endbuf = (char *) eneed + section->sh_size;
- if (!eneed)
- break;
-
-@@ -6578,6 +6590,8 @@ process_version_sections (FILE *file)
- char *vstart;
-
- vstart = ((char *) eneed) + idx;
-+ if (vstart + sizeof (*entry) > endbuf)
-+ break;
-
- entry = (Elf_External_Verneed *) vstart;
-
-@@ -6603,6 +6617,8 @@ process_version_sections (FILE *file)
- Elf_External_Vernaux *eaux;
- Elf_Internal_Vernaux aux;
-
-+ if (vstart + sizeof (*eaux) > endbuf)
-+ break;
- eaux = (Elf_External_Vernaux *) vstart;
-
- aux.vna_hash = BYTE_GET (eaux->vna_hash);
-@@ -6624,9 +6640,13 @@ process_version_sections (FILE *file)
- isum += aux.vna_next;
- vstart += aux.vna_next;
- }
-+ if (j < ent.vn_cnt)
-+ printf (_(" Version need aux past end of section\n"));
-
- idx += ent.vn_next;
- }
-+ if (cnt < section->sh_info)
-+ printf (_(" Version need past end of section\n"));
-
- free (eneed);
- }
-@@ -6771,7 +6791,10 @@ process_version_sections (FILE *file)
- {
- ivna.vna_name = BYTE_GET (evna.vna_name);
-
-- name = strtab + ivna.vna_name;
-+ if (ivna.vna_name >= string_sec->sh_size)
-+ name = _("*invalid*");
-+ else
-+ name = strtab + ivna.vna_name;
- nn += printf ("(%s%-*s",
- name,
- 12 - (int) strlen (name),
-@@ -6823,7 +6846,10 @@ process_version_sections (FILE *file)
-
- ivda.vda_name = BYTE_GET (evda.vda_name);
-
-- name = strtab + ivda.vda_name;
-+ if (ivda.vda_name >= string_sec->sh_size)
-+ name = _("*invalid*");
-+ else
-+ name = strtab + ivda.vda_name;
- nn += printf ("(%s%-*s",
- name,
- 12 - (int) strlen (name),
-
+++ /dev/null
-#!/bin/sh -e
-## 313_pr5025.dpatch
-##
-## DP: Description: Fix PR ld/5025
-## DP: Upstream status: CVS head 20070908
-
-if [ $# -ne 1 ]; then
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
-
-case "$1" in
- -patch) patch $patch_opts -p1 < $0;;
- -unpatch) patch $patch_opts -p1 -R < $0;;
- *)
- echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
- exit 1;;
-esac
-
-exit 0
-
- PR ld/5025
- * emultempl/elf32.em (write_build_id_section): Correct test for
- "missing" .note.gnu.build-id. Downgrade error to a warning if
- it has been discarded.
-
-@DPATCH@
-Subject: Fix 5025, discarded .note.gnu.build-id
-
-Index: ld/emultempl/elf32.em
-===================================================================
-RCS file: /cvs/src/src/ld/emultempl/elf32.em,v
-retrieving revision 1.186
-diff -u -p -r1.186 elf32.em
---- ./ld/emultempl/elf32.em 17 Aug 2007 13:50:48 -0000 1.186
-+++ ./ld/emultempl/elf32.em 15 Sep 2007 03:39:19 -0000
-@@ -936,10 +936,11 @@ gld${EMULATION_NAME}_write_build_id_sect
- Elf_External_Note *e_note;
-
- asec = info->sec;
-- if (asec->output_section == NULL)
-+ if (bfd_is_abs_section (asec->output_section))
- {
-- einfo (_("%P: .note.gnu.build-id section missing"));
-- return FALSE;
-+ einfo (_("%P: warning: .note.gnu.build-id section discarded,"
-+ " --build-id ignored.\n"));
-+ return TRUE;
- }
- i_shdr = &elf_section_data (asec->output_section)->this_hdr;
-
-
+++ /dev/null
-#! /bin/sh /usr/share/dpatch/dpatch-run
-## 500-binutils-msp-new-cpus1.dpatch by <smckown@stevex2>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Add new cpu variations to the msp430 architecture
-
-@DPATCH@
-
-diff -ur binutils-2.18.orig/bfd/archures.c binutils-2.18/bfd/archures.c
---- binutils-2.18.orig/bfd/archures.c 2007-08-06 22:59:14.000000000 +0300
-+++ binutils-2.18/bfd/archures.c 2008-05-25 16:57:13.406250000 +0300
-@@ -374,7 +374,9 @@
- .#define bfd_mach_msp14 14
- .#define bfd_mach_msp15 15
- .#define bfd_mach_msp16 16
-+.#define bfd_mach_msp20 20
- .#define bfd_mach_msp21 21
-+.#define bfd_mach_msp22 22
- .#define bfd_mach_msp31 31
- .#define bfd_mach_msp32 32
- .#define bfd_mach_msp33 33
-@@ -382,6 +384,7 @@
- .#define bfd_mach_msp42 42
- .#define bfd_mach_msp43 43
- .#define bfd_mach_msp44 44
-+.#define bfd_mach_msp46 46
- . bfd_arch_xc16x, {* Infineon's XC16X Series. *}
- .#define bfd_mach_xc16x 1
- .#define bfd_mach_xc16xl 2
-diff -ur binutils-2.18.orig/bfd/bfd-in2.h binutils-2.18/bfd/bfd-in2.h
---- binutils-2.18.orig/bfd/bfd-in2.h 2007-08-06 22:59:15.000000000 +0300
-+++ binutils-2.18/bfd/bfd-in2.h 2008-05-25 16:57:13.437500000 +0300
-@@ -2045,7 +2045,9 @@
- #define bfd_mach_msp14 14
- #define bfd_mach_msp15 15
- #define bfd_mach_msp16 16
-+#define bfd_mach_msp20 20
- #define bfd_mach_msp21 21
-+#define bfd_mach_msp22 22
- #define bfd_mach_msp31 31
- #define bfd_mach_msp32 32
- #define bfd_mach_msp33 33
-@@ -2053,6 +2055,7 @@
- #define bfd_mach_msp42 42
- #define bfd_mach_msp43 43
- #define bfd_mach_msp44 44
-+#define bfd_mach_msp46 46
- bfd_arch_xc16x, /* Infineon's XC16X Series. */
- #define bfd_mach_xc16x 1
- #define bfd_mach_xc16xl 2
-diff -ur binutils-2.18.orig/bfd/cpu-msp430.c binutils-2.18/bfd/cpu-msp430.c
---- binutils-2.18.orig/bfd/cpu-msp430.c 2007-08-06 22:59:20.000000000 +0300
-+++ binutils-2.18/bfd/cpu-msp430.c 2008-05-25 16:57:13.437500000 +0300
-@@ -65,29 +65,38 @@
- /* msp430x16x. */
- N (16, bfd_mach_msp16, "msp:16", FALSE, & arch_info_struct[7]),
-
-+ /* msp430x20x. */
-+ N (16, bfd_mach_msp20, "msp:20", FALSE, & arch_info_struct[8]),
-+
- /* msp430x21x. */
-- N (16, bfd_mach_msp21, "msp:21", FALSE, & arch_info_struct[8]),
-+ N (16, bfd_mach_msp21, "msp:21", FALSE, & arch_info_struct[9]),
-+
-+ /* msp430x22x. */
-+ N (16, bfd_mach_msp22, "msp:22", FALSE, & arch_info_struct[10]),
-
- /* msp430x31x. */
-- N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[9]),
-+ N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[11]),
-
- /* msp430x32x. */
-- N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[10]),
-+ N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[12]),
-
- /* msp430x33x. */
-- N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[11]),
-+ N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[13]),
-
- /* msp430x41x. */
-- N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[12]),
-+ N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[14]),
-
- /* msp430x42x. */
-- N (16, bfd_mach_msp42, "msp:42", FALSE, & arch_info_struct[13]),
-+ N (16, bfd_mach_msp42, "msp:42", FALSE, & arch_info_struct[15]),
-
- /* msp430x43x. */
-- N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[14]),
-+ N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[16]),
-
- /* msp430x44x. */
-- N (16, bfd_mach_msp43, "msp:44", FALSE, NULL)
-+ N (16, bfd_mach_msp44, "msp:44", FALSE, & arch_info_struct[17]),
-+
-+ /* msp430x46xx. */
-+ N (16, bfd_mach_msp46, "msp:46", FALSE, NULL)
- };
-
- const bfd_arch_info_type bfd_msp430_arch =
-diff -ur binutils-2.18.orig/bfd/doc/archures.texi binutils-2.18/bfd/doc/archures.texi
---- binutils-2.18.orig/bfd/doc/archures.texi 2007-08-06 23:39:25.000000000 +0300
-+++ binutils-2.18/bfd/doc/archures.texi 2008-05-25 16:57:13.453125000 +0300
-@@ -339,7 +339,9 @@
- #define bfd_mach_msp14 14
- #define bfd_mach_msp15 15
- #define bfd_mach_msp16 16
-+#define bfd_mach_msp20 20
- #define bfd_mach_msp21 21
-+#define bfd_mach_msp22 22
- #define bfd_mach_msp31 31
- #define bfd_mach_msp32 32
- #define bfd_mach_msp33 33
-@@ -347,6 +349,7 @@
- #define bfd_mach_msp42 42
- #define bfd_mach_msp43 43
- #define bfd_mach_msp44 44
-+#define bfd_mach_msp46 46
- bfd_arch_xc16x, /* Infineon's XC16X Series. */
- #define bfd_mach_xc16x 1
- #define bfd_mach_xc16xl 2
-diff -ur binutils-2.18.orig/bfd/elf32-msp430.c binutils-2.18/bfd/elf32-msp430.c
---- binutils-2.18.orig/bfd/elf32-msp430.c 2007-08-06 22:59:28.000000000 +0300
-+++ binutils-2.18/bfd/elf32-msp430.c 2008-05-25 16:57:13.468750000 +0300
-@@ -564,6 +564,18 @@
- val = E_MSP430_MACH_MSP430x16;
- break;
-
-+ case bfd_mach_msp20:
-+ val = E_MSP430_MACH_MSP430x20;
-+ break;
-+
-+ case bfd_mach_msp21:
-+ val = E_MSP430_MACH_MSP430x21;
-+ break;
-+
-+ case bfd_mach_msp22:
-+ val = E_MSP430_MACH_MSP430x22;
-+ break;
-+
- case bfd_mach_msp31:
- val = E_MSP430_MACH_MSP430x31;
- break;
-@@ -591,6 +603,10 @@
- case bfd_mach_msp44:
- val = E_MSP430_MACH_MSP430x44;
- break;
-+
-+ case bfd_mach_msp46:
-+ val = E_MSP430_MACH_MSP430x46;
-+ break;
- }
-
- elf_elfheader (abfd)->e_machine = EM_MSP430;
-@@ -641,6 +657,18 @@
- e_set = bfd_mach_msp16;
- break;
-
-+ case E_MSP430_MACH_MSP430x20:
-+ e_set = bfd_mach_msp20;
-+ break;
-+
-+ case E_MSP430_MACH_MSP430x21:
-+ e_set = bfd_mach_msp21;
-+ break;
-+
-+ case E_MSP430_MACH_MSP430x22:
-+ e_set = bfd_mach_msp22;
-+ break;
-+
- case E_MSP430_MACH_MSP430x31:
- e_set = bfd_mach_msp31;
- break;
-@@ -668,6 +696,10 @@
- case E_MSP430_MACH_MSP430x44:
- e_set = bfd_mach_msp44;
- break;
-+
-+ case E_MSP430_MACH_MSP430x46:
-+ e_set = bfd_mach_msp46;
-+ break;
- }
- }
-
-diff -ur binutils-2.18.orig/gas/config/tc-msp430.c binutils-2.18/gas/config/tc-msp430.c
---- binutils-2.18.orig/gas/config/tc-msp430.c 2007-08-06 23:00:02.000000000 +0300
-+++ binutils-2.18/gas/config/tc-msp430.c 2008-05-25 16:57:13.484375000 +0300
-@@ -247,7 +247,9 @@
- #define MSP430_ISA_14 14
- #define MSP430_ISA_15 15
- #define MSP430_ISA_16 16
-+#define MSP430_ISA_20 20
- #define MSP430_ISA_21 21
-+#define MSP430_ISA_22 22
- #define MSP430_ISA_31 31
- #define MSP430_ISA_32 32
- #define MSP430_ISA_33 33
-@@ -255,83 +257,113 @@
- #define MSP430_ISA_42 42
- #define MSP430_ISA_43 43
- #define MSP430_ISA_44 44
-+#define MSP430_ISA_46 46
-
- #define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
- #define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
-
- static struct mcu_type_s mcu_types[] =
- {
-- {"msp1", MSP430_ISA_11, bfd_mach_msp11},
-- {"msp2", MSP430_ISA_14, bfd_mach_msp14},
-- {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
-- {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
-- {"msp430x1101", MSP430_ISA_110, bfd_mach_msp110},
-- {"msp430x1111", MSP430_ISA_110, bfd_mach_msp110},
-- {"msp430x1121", MSP430_ISA_110, bfd_mach_msp110},
-- {"msp430x1122", MSP430_ISA_11, bfd_mach_msp110},
-- {"msp430x1132", MSP430_ISA_11, bfd_mach_msp110},
--
-- {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
-- {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
-- {"msp430x1222", MSP430_ISA_12, bfd_mach_msp12},
-- {"msp430x1232", MSP430_ISA_12, bfd_mach_msp12},
--
-- {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
-- {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
-- {"msp430x1331", MSP430_ISA_13, bfd_mach_msp13},
-- {"msp430x1351", MSP430_ISA_13, bfd_mach_msp13},
-- {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
-- {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
-- {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
--
-- {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
-- {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
-- {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
-- {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
-- {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
-- {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
-- {"msp430x1610", MSP430_ISA_16, bfd_mach_msp16},
-- {"msp430x1611", MSP430_ISA_16, bfd_mach_msp16},
-- {"msp430x1612", MSP430_ISA_16, bfd_mach_msp16},
--
-- {"msp430x2101", MSP430_ISA_21, bfd_mach_msp21},
-- {"msp430x2111", MSP430_ISA_21, bfd_mach_msp21},
-- {"msp430x2121", MSP430_ISA_21, bfd_mach_msp21},
-- {"msp430x2131", MSP430_ISA_21, bfd_mach_msp21},
-+ {"msp1", MSP430_ISA_11, bfd_mach_msp11},
-+ {"msp2", MSP430_ISA_14, bfd_mach_msp14},
-+ {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
-+ {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
-+ {"msp430x1101", MSP430_ISA_110, bfd_mach_msp110},
-+ {"msp430x1111", MSP430_ISA_110, bfd_mach_msp110},
-+ {"msp430x1121", MSP430_ISA_110, bfd_mach_msp110},
-+ {"msp430x1122", MSP430_ISA_11, bfd_mach_msp110},
-+ {"msp430x1132", MSP430_ISA_11, bfd_mach_msp110},
-+
-+ {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
-+ {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
-+ {"msp430x1222", MSP430_ISA_12, bfd_mach_msp12},
-+ {"msp430x1232", MSP430_ISA_12, bfd_mach_msp12},
-+
-+ {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
-+ {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
-+ {"msp430x1331", MSP430_ISA_13, bfd_mach_msp13},
-+ {"msp430x1351", MSP430_ISA_13, bfd_mach_msp13},
-+ {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
-+ {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
-+ {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
-+ {"msp430x1471", MSP430_ISA_14, bfd_mach_msp14},
-+ {"msp430x1481", MSP430_ISA_14, bfd_mach_msp14},
-+ {"msp430x1491", MSP430_ISA_14, bfd_mach_msp14},
-+
-+ {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
-+ {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
-+ {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
-+ {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
-+ {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
-+ {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
-+ {"msp430x1610", MSP430_ISA_16, bfd_mach_msp16},
-+ {"msp430x1611", MSP430_ISA_16, bfd_mach_msp16},
-+ {"msp430x1612", MSP430_ISA_16, bfd_mach_msp16},
-+
-+ {"msp430x2001", MSP430_ISA_20, bfd_mach_msp20},
-+ {"msp430x2011", MSP430_ISA_20, bfd_mach_msp20},
-+
-+ {"msp430x2002", MSP430_ISA_20, bfd_mach_msp20},
-+ {"msp430x2012", MSP430_ISA_20, bfd_mach_msp20},
-+
-+ {"msp430x2003", MSP430_ISA_20, bfd_mach_msp20},
-+ {"msp430x2013", MSP430_ISA_20, bfd_mach_msp20},
-+
-+ {"msp430x2101", MSP430_ISA_21, bfd_mach_msp21},
-+ {"msp430x2111", MSP430_ISA_21, bfd_mach_msp21},
-+ {"msp430x2121", MSP430_ISA_21, bfd_mach_msp21},
-+ {"msp430x2131", MSP430_ISA_21, bfd_mach_msp21},
-+
-+ {"msp430x2234", MSP430_ISA_22, bfd_mach_msp22},
-+ {"msp430x2254", MSP430_ISA_22, bfd_mach_msp22},
-+ {"msp430x2274", MSP430_ISA_22, bfd_mach_msp22},
-
-- {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
-- {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
-- {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
-- {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
-- {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
-- {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
-- {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
-- {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
-- {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
--
-- {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
-- {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
-- {"msp430x415", MSP430_ISA_41, bfd_mach_msp41},
-- {"msp430x417", MSP430_ISA_41, bfd_mach_msp41},
--
-- {"msp430xE423", MSP430_ISA_42, bfd_mach_msp42},
-- {"msp430xE425", MSP430_ISA_42, bfd_mach_msp42},
-- {"msp430xE427", MSP430_ISA_42, bfd_mach_msp42},
--
-- {"msp430xW423", MSP430_ISA_42, bfd_mach_msp42},
-- {"msp430xW425", MSP430_ISA_42, bfd_mach_msp42},
-- {"msp430xW427", MSP430_ISA_42, bfd_mach_msp42},
--
-- {"msp430xG437", MSP430_ISA_43, bfd_mach_msp43},
-- {"msp430xG438", MSP430_ISA_43, bfd_mach_msp43},
-- {"msp430xG439", MSP430_ISA_43, bfd_mach_msp43},
--
-- {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
-- {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
-- {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
-- {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
-- {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
-- {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
-+ {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
-+ {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
-+ {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
-+ {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
-+ {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
-+ {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
-+ {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
-+ {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
-+ {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
-+
-+ {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
-+ {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
-+ {"msp430x415", MSP430_ISA_41, bfd_mach_msp41},
-+ {"msp430x417", MSP430_ISA_41, bfd_mach_msp41},
-+
-+ {"msp430x423", MSP430_ISA_42, bfd_mach_msp42},
-+ {"msp430x425", MSP430_ISA_42, bfd_mach_msp42},
-+ {"msp430x427", MSP430_ISA_42, bfd_mach_msp42},
-+
-+ {"msp430x4250", MSP430_ISA_42, bfd_mach_msp42},
-+ {"msp430x4260", MSP430_ISA_42, bfd_mach_msp42},
-+ {"msp430x4270", MSP430_ISA_42, bfd_mach_msp42},
-+
-+ {"msp430xE423", MSP430_ISA_42, bfd_mach_msp42},
-+ {"msp430xE425", MSP430_ISA_42, bfd_mach_msp42},
-+ {"msp430xE427", MSP430_ISA_42, bfd_mach_msp42},
-+
-+ {"msp430xW423", MSP430_ISA_42, bfd_mach_msp42},
-+ {"msp430xW425", MSP430_ISA_42, bfd_mach_msp42},
-+ {"msp430xW427", MSP430_ISA_42, bfd_mach_msp42},
-+
-+ {"msp430xG437", MSP430_ISA_43, bfd_mach_msp43},
-+ {"msp430xG438", MSP430_ISA_43, bfd_mach_msp43},
-+ {"msp430xG439", MSP430_ISA_43, bfd_mach_msp43},
-+
-+ {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
-+ {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
-+ {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
-+ {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
-+ {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
-+ {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
-+
-+ {"msp430xG4616", MSP430_ISA_46, bfd_mach_msp46},
-+ {"msp430xG4617", MSP430_ISA_46, bfd_mach_msp46},
-+ {"msp430xG4618", MSP430_ISA_46, bfd_mach_msp46},
-+ {"msp430xG4619", MSP430_ISA_46, bfd_mach_msp46},
-
- {NULL, 0, 0}
- };
-@@ -795,26 +827,35 @@
- fprintf (stream,
- _("MSP430 options:\n"
- " -mmcu=[msp430-name] select microcontroller type\n"
-- " msp430x110 msp430x112\n"
-- " msp430x1101 msp430x1111\n"
-- " msp430x1121 msp430x1122 msp430x1132\n"
-- " msp430x122 msp430x123\n"
-- " msp430x1222 msp430x1232\n"
-- " msp430x133 msp430x135\n"
-- " msp430x1331 msp430x1351\n"
-- " msp430x147 msp430x148 msp430x149\n"
-- " msp430x155 msp430x156 msp430x157\n"
-- " msp430x167 msp430x168 msp430x169\n"
-- " msp430x1610 msp430x1611 msp430x1612\n"
-- " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
-- " msp430x323 msp430x325\n"
-- " msp430x336 msp430x337\n"
-- " msp430x412 msp430x413 msp430x415 msp430x417\n"
-- " msp430xE423 msp430xE425 msp430E427\n"
-- " msp430xW423 msp430xW425 msp430W427\n"
-- " msp430xG437 msp430xG438 msp430G439\n"
-- " msp430x435 msp430x436 msp430x437\n"
-- " msp430x447 msp430x448 msp430x449\n"));
-+ " msp430x110 msp430x112\n"
-+ " msp430x1101 msp430x1111 msp430x1121\n"
-+ " msp430x1122 msp430x1132\n"
-+ " msp430x122 msp430x123\n"
-+ " msp430x1222 msp430x1232\n"
-+ " msp430x133 msp430x135\n"
-+ " msp430x1331 msp430x1351\n"
-+ " msp430x147 msp430x148 msp430x149\n"
-+ " msp430x1471 msp430x1481 msp430x1491\n"
-+ " msp430x155 msp430x156 msp430x157\n"
-+ " msp430x167 msp430x168 msp430x169\n"
-+ " msp430x1610 msp430x1611 msp430x1612\n"
-+ " msp430x2001 msp430x2011\n"
-+ " msp430x2002 msp430x2012\n"
-+ " msp430x2003 msp430x2013\n"
-+ " msp430x2101 msp430x2111 msp430x2121 msp430x2131\n"
-+ " msp430x2234 msp430x2254 msp430x2274\n"
-+ " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
-+ " msp430x323 msp430x325\n"
-+ " msp430x336 msp430x337\n"
-+ " msp430x412 msp430x413 msp430x415 msp430x417\n"
-+ " msp430x423 msp430x425 msp430427\n"
-+ " msp430x4250 msp430x4260 msp4304270\n"
-+ " msp430xE423 msp430xE425 msp430E427\n"
-+ " msp430xW423 msp430xW425 msp430W427\n"
-+ " msp430xG437 msp430xG438 msp430G439\n"
-+ " msp430x435 msp430x436 msp430x437\n"
-+ " msp430x447 msp430x448 msp430x449\n"
-+ " msp430xG4616 msp430xG4617 msp430xG4618 msp430xG4619\n"));
- fprintf (stream,
- _(" -mQ - enable relaxation at assembly time. DANGEROUS!\n"
- " -mP - enable polymorph instructions\n"));
-diff -ur binutils-2.18.orig/include/elf/msp430.h binutils-2.18/include/elf/msp430.h
---- binutils-2.18.orig/include/elf/msp430.h 2005-05-10 13:21:10.000000000 +0300
-+++ binutils-2.18/include/elf/msp430.h 2008-05-25 16:57:13.484375000 +0300
-@@ -26,20 +26,24 @@
- /* Processor specific flags for the ELF header e_flags field. */
- #define EF_MSP430_MACH 0xff
-
--#define E_MSP430_MACH_MSP430x11 11
--#define E_MSP430_MACH_MSP430x11x1 110
--#define E_MSP430_MACH_MSP430x12 12
--#define E_MSP430_MACH_MSP430x13 13
--#define E_MSP430_MACH_MSP430x14 14
--#define E_MSP430_MACH_MSP430x15 15
--#define E_MSP430_MACH_MSP430x16 16
--#define E_MSP430_MACH_MSP430x31 31
--#define E_MSP430_MACH_MSP430x32 32
--#define E_MSP430_MACH_MSP430x33 33
--#define E_MSP430_MACH_MSP430x41 41
--#define E_MSP430_MACH_MSP430x42 42
--#define E_MSP430_MACH_MSP430x43 43
--#define E_MSP430_MACH_MSP430x44 44
-+#define E_MSP430_MACH_MSP430x11 11
-+#define E_MSP430_MACH_MSP430x11x1 110
-+#define E_MSP430_MACH_MSP430x12 12
-+#define E_MSP430_MACH_MSP430x13 13
-+#define E_MSP430_MACH_MSP430x14 14
-+#define E_MSP430_MACH_MSP430x15 15
-+#define E_MSP430_MACH_MSP430x16 16
-+#define E_MSP430_MACH_MSP430x20 20
-+#define E_MSP430_MACH_MSP430x21 21
-+#define E_MSP430_MACH_MSP430x22 22
-+#define E_MSP430_MACH_MSP430x31 31
-+#define E_MSP430_MACH_MSP430x32 32
-+#define E_MSP430_MACH_MSP430x33 33
-+#define E_MSP430_MACH_MSP430x41 41
-+#define E_MSP430_MACH_MSP430x42 42
-+#define E_MSP430_MACH_MSP430x43 43
-+#define E_MSP430_MACH_MSP430x44 44
-+#define E_MSP430_MACH_MSP430x46 46
-
- /* Relocations. */
- START_RELOC_NUMBERS (elf_msp430_reloc_type)
-diff -ur binutils-2.18.orig/ld/Makefile.am binutils-2.18/ld/Makefile.am
---- binutils-2.18.orig/ld/Makefile.am 2007-08-06 23:00:17.000000000 +0300
-+++ binutils-2.18/ld/Makefile.am 2008-05-25 16:57:13.531250000 +0300
-@@ -296,6 +296,9 @@
- emsp430x147.o \
- emsp430x148.o \
- emsp430x149.o \
-+ emsp430x1471.o \
-+ emsp430x1481.o \
-+ emsp430x1491.o \
- emsp430x155.o \
- emsp430x156.o \
- emsp430x157.o \
-@@ -305,10 +308,19 @@
- emsp430x1610.o \
- emsp430x1611.o \
- emsp430x1612.o \
-+ emsp430x2001.o \
-+ emsp430x2011.o \
-+ emsp430x2002.o \
-+ emsp430x2012.o \
-+ emsp430x2003.o \
-+ emsp430x2014.o \
- emsp430x2101.o \
- emsp430x2111.o \
- emsp430x2121.o \
- emsp430x2131.o \
-+ emsp430x2234.o \
-+ emsp430x2254.o \
-+ emsp430x2274.o \
- emsp430x311.o \
- emsp430x312.o \
- emsp430x313.o \
-@@ -322,6 +334,12 @@
- emsp430x413.o \
- emsp430x415.o \
- emsp430x417.o \
-+ emsp430x423.o \
-+ emsp430x425.o \
-+ emsp430x427.o \
-+ emsp430x4250.o \
-+ emsp430x4260.o \
-+ emsp430x4270.o \
- emsp430xE423.o \
- emsp430xE425.o \
- emsp430xE427.o \
-@@ -337,6 +355,10 @@
- emsp430x447.o \
- emsp430x448.o \
- emsp430x449.o \
-+ emsp430xG4616.o \
-+ emsp430xG4617.o \
-+ emsp430xG4618.o \
-+ emsp430xG4619.o \
- enews.o \
- ens32knbsd.o \
- eor32.o \
-@@ -1311,6 +1333,18 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x149 "$(tdir_msp430x149)" msp430all
-+emsp430x1471.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x1471 "$(tdir_msp430x1471)" msp430all
-+emsp430x1481.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x1481 "$(tdir_msp430x1481)" msp430all
-+emsp430x1491.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x1491 "$(tdir_msp430x1491)" msp430all
- emsp430x155.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
-@@ -1347,6 +1381,30 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x1612 "$(tdir_msp430x1612)" msp430all
-+emsp430x2001.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2001 "$(tdir_msp430x2001)" msp430all
-+emsp430x2011.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2011 "$(tdir_msp430x2011)" msp430all
-+emsp430x2002.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2002 "$(tdir_msp430x2002)" msp430all
-+emsp430x2012.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2012 "$(tdir_msp430x2012)" msp430all
-+emsp430x2003.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2003 "$(tdir_msp430x2003)" msp430all
-+emsp430x2013.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2013 "$(tdir_msp430x2013)" msp430all
- emsp430x2101.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
-@@ -1363,6 +1421,18 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x2131 "$(tdir_msp430x2131)" msp430all
-+emsp430x2234.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2234 "$(tdir_msp430x2234)" msp430all
-+emsp430x2254.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2254 "$(tdir_msp430x2254)" msp430all
-+emsp430x2274.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2274 "$(tdir_msp430x2274)" msp430all
- emsp430x311.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430_3.sc \
- ${GEN_DEPENDS}
-@@ -1415,6 +1485,30 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x417 "$(tdir_msp430x417)" msp430all
-+emsp430x423.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x423 "$(tdir_msp430x423)" msp430all
-+emsp430x425.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x425 "$(tdir_msp430x425)" msp430all
-+emsp430x427.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x427 "$(tdir_msp430x427)" msp430all
-+emsp430x4250.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x4250 "$(tdir_msp430x4250)" msp430all
-+emsp430x4260.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x4260 "$(tdir_msp430x4260)" msp430all
-+emsp430x4270.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x4270 "$(tdir_msp430x4270)" msp430all
- emsp430xE423.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
-@@ -1475,6 +1569,22 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x449 "$(tdir_msp430x449)" msp430all
-+emsp430xG4616.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430xG4616 "$(tdir_msp430xG4616)" msp430all
-+emsp430xG4617.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430xG4617 "$(tdir_msp430xG4617)" msp430all
-+emsp430xG4618.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430xG4618 "$(tdir_msp430xG4618)" msp430all
-+emsp430xG4619.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430xG4619 "$(tdir_msp430xG4619)" msp430all
- enews.c: $(srcdir)/emulparams/news.sh \
- $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} news "$(tdir_news)"
-diff -ur binutils-2.18.orig/ld/Makefile.in binutils-2.18/ld/Makefile.in
---- binutils-2.18.orig/ld/Makefile.in 2007-08-06 23:29:54.000000000 +0300
-+++ binutils-2.18/ld/Makefile.in 2008-05-25 16:57:13.546875000 +0300
-@@ -543,6 +543,9 @@
- emsp430x147.o \
- emsp430x148.o \
- emsp430x149.o \
-+ emsp430x1471.o \
-+ emsp430x1481.o \
-+ emsp430x1491.o \
- emsp430x155.o \
- emsp430x156.o \
- emsp430x157.o \
-@@ -552,10 +555,19 @@
- emsp430x1610.o \
- emsp430x1611.o \
- emsp430x1612.o \
-+ emsp430x2001.o \
-+ emsp430x2011.o \
-+ emsp430x2002.o \
-+ emsp430x2012.o \
-+ emsp430x2003.o \
-+ emsp430x2013.o \
- emsp430x2101.o \
- emsp430x2111.o \
- emsp430x2121.o \
- emsp430x2131.o \
-+ emsp430x2234.o \
-+ emsp430x2254.o \
-+ emsp430x2274.o \
- emsp430x311.o \
- emsp430x312.o \
- emsp430x313.o \
-@@ -569,6 +581,12 @@
- emsp430x413.o \
- emsp430x415.o \
- emsp430x417.o \
-+ emsp430x423.o \
-+ emsp430x425.o \
-+ emsp430x427.o \
-+ emsp430x4250.o \
-+ emsp430x4260.o \
-+ emsp430x4270.o \
- emsp430xE423.o \
- emsp430xE425.o \
- emsp430xE427.o \
-@@ -584,6 +602,10 @@
- emsp430x447.o \
- emsp430x448.o \
- emsp430x449.o \
-+ emsp430xG4616.o \
-+ emsp430xG4617.o \
-+ emsp430xG4618.o \
-+ emsp430xG4619.o \
- enews.o \
- ens32knbsd.o \
- eor32.o \
-@@ -2137,6 +2159,18 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x149 "$(tdir_msp430x149)" msp430all
-+emsp430x1471.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x1471 "$(tdir_msp430x1471)" msp430all
-+emsp430x1481.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x1481 "$(tdir_msp430x1481)" msp430all
-+emsp430x1491.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x1491 "$(tdir_msp430x1491)" msp430all
- emsp430x155.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
-@@ -2173,6 +2207,30 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x1612 "$(tdir_msp430x1612)" msp430all
-+emsp430x2001.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2001 "$(tdir_msp430x2001)" msp430all
-+emsp430x2011.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2011 "$(tdir_msp430x2011)" msp430all
-+emsp430x2002.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2002 "$(tdir_msp430x2002)" msp430all
-+emsp430x2012.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2012 "$(tdir_msp430x2012)" msp430all
-+emsp430x2003.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2003 "$(tdir_msp430x2003)" msp430all
-+emsp430x2013.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2013 "$(tdir_msp430x2013)" msp430all
- emsp430x2101.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
-@@ -2189,6 +2247,18 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x2131 "$(tdir_msp430x2131)" msp430all
-+emsp430x2234.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2234 "$(tdir_msp430x2234)" msp430all
-+emsp430x2254.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2254 "$(tdir_msp430x2254)" msp430all
-+emsp430x2274.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2274 "$(tdir_msp430x2274)" msp430all
- emsp430x311.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430_3.sc \
- ${GEN_DEPENDS}
-@@ -2241,6 +2311,30 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x417 "$(tdir_msp430x417)" msp430all
-+emsp430x423.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x423 "$(tdir_msp430x423)" msp430all
-+emsp430x425.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x425 "$(tdir_msp430x425)" msp430all
-+emsp430x427.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x427 "$(tdir_msp430x427)" msp430all
-+emsp430x4250.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x4250 "$(tdir_msp430x4250)" msp430all
-+emsp430x4260.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x4260 "$(tdir_msp430x4260)" msp430all
-+emsp430x4270.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x4270 "$(tdir_msp430x4270)" msp430all
- emsp430xE423.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
-@@ -2301,6 +2395,22 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x449 "$(tdir_msp430x449)" msp430all
-+emsp430xG4616.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430xG4616 "$(tdir_msp430xG4616)" msp430all
-+emsp430xG4617.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430xG4617 "$(tdir_msp430xG4617)" msp430all
-+emsp430xG4618.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430xG4618 "$(tdir_msp430xG4618)" msp430all
-+emsp430xG4619.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430xG4619 "$(tdir_msp430xG4619)" msp430all
- enews.c: $(srcdir)/emulparams/news.sh \
- $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} news "$(tdir_news)"
-diff -ur binutils-2.18.orig/ld/configure.tgt binutils-2.18/ld/configure.tgt
---- binutils-2.18.orig/ld/configure.tgt 2007-08-28 20:19:42.000000000 +0300
-+++ binutils-2.18/ld/configure.tgt 2008-05-25 16:57:13.500000000 +0300
-@@ -407,7 +407,7 @@
- mt-*elf) targ_emul=elf32mt
- ;;
- msp430-*-*) targ_emul=msp430x110
-- targ_extra_emuls="msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x2101 msp430x2111 msp430x2121 msp430x2131 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430xE423 msp430xE425 msp430xE427 msp430xW423 msp430xW425 msp430xW427 msp430xG437 msp430xG438 msp430xG439 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449"
-+ targ_extra_emuls="msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x1471 msp430x1481 msp430x1491 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x2001 msp430x2011 msp430x2002 msp430x2012 msp430x2003 msp430x2013 msp430x2101 msp430x2111 msp430x2121 msp430x2131 msp430x2234 msp430x2254 msp430x2274 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430x423 msp430x425 msp430x427 msp430x4250 msp430x4260 msp430x4270 msp430xE423 msp430xE425 msp430xE427 msp430xW423 msp430xW425 msp430xW427 msp430xG437 msp430xG438 msp430xG439 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449 msp430xG4616 msp430xG4617 msp430xG4618 msp430xG4619"
- ;;
- ns32k-pc532-mach* | ns32k-pc532-ux*) targ_emul=pc532macha ;;
- ns32k-*-netbsd* | ns32k-pc532-lites*) targ_emul=ns32knbsd
-diff -ur binutils-2.18.orig/ld/emulparams/msp430all.sh binutils-2.18/ld/emulparams/msp430all.sh
---- binutils-2.18.orig/ld/emulparams/msp430all.sh 2006-06-20 05:22:14.000000000 +0300
-+++ binutils-2.18/ld/emulparams/msp430all.sh 2008-05-25 16:57:13.515625000 +0300
-@@ -18,6 +18,8 @@
- ROM_SIZE=0x3e0
- RAM_START=0x0200
- RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x280
- fi
-
-@@ -27,6 +29,8 @@
- ROM_SIZE=0x3e0
- RAM_START=0x0200
- RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x280
- fi
-
-@@ -36,6 +40,8 @@
- ROM_SIZE=0x07e0
- RAM_START=0x0200
- RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x280
- fi
-
-@@ -45,6 +51,8 @@
- ROM_SIZE=0xfe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -54,6 +62,8 @@
- ROM_SIZE=0x0fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -63,6 +73,8 @@
- ROM_SIZE=0x0fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -72,6 +84,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -81,6 +95,8 @@
- ROM_SIZE=0xfe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -90,6 +106,8 @@
- ROM_SIZE=0xfe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -99,6 +117,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -108,6 +128,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -117,6 +139,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -126,6 +150,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -135,6 +161,8 @@
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -144,6 +172,8 @@
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -153,6 +183,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1K
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -162,6 +194,8 @@
- ROM_SIZE=0xbfe0
- RAM_START=0x0200
- RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0xa00
- fi
-
-@@ -171,6 +205,41 @@
- ROM_SIZE=0xeee0
- RAM_START=0x0200
- RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0xa00
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x1471" ] ; then
-+ARCH=msp:14
-+ROM_START=0x8000
-+ROM_SIZE=0x7fe0
-+RAM_START=0x0200
-+RAM_SIZE=1K
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x600
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x1481" ] ; then
-+ARCH=msp:14
-+ROM_START=0x4000
-+ROM_SIZE=0xbfe0
-+RAM_START=0x0200
-+RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0xa00
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x1491" ] ; then
-+ARCH=msp:14
-+ROM_START=0x1100
-+ROM_SIZE=0xeee0
-+RAM_START=0x0200
-+RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0xa00
- fi
-
-@@ -180,6 +249,8 @@
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -189,6 +260,8 @@
- ROM_SIZE=0x5fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -198,6 +271,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1K
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -207,6 +282,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1K
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -216,6 +293,8 @@
- ROM_SIZE=0xbfe0
- RAM_START=0x0200
- RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0xa00
- fi
-
-@@ -225,6 +304,8 @@
- ROM_SIZE=0xeee0
- RAM_START=0x0200
- RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0xa00
- fi
-
-@@ -234,6 +315,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x1100
- RAM_SIZE=0x1400
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x2500
- fi
-
-@@ -243,6 +326,8 @@
- ROM_SIZE=0xbfe0
- RAM_START=0x1100
- RAM_SIZE=0x2800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x3900
- fi
-
-@@ -252,15 +337,85 @@
- ROM_SIZE=0xdae0
- RAM_START=0x1100
- RAM_SIZE=0x1400
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x2500
- fi
-
-+if [ "${MSP430_NAME}" = "msp430x2001" ] ; then
-+ARCH=msp:20
-+ROM_START=0xFC00
-+ROM_SIZE=0x03e0
-+RAM_START=0x0200
-+RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x280
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2011" ] ; then
-+ARCH=msp:20
-+ROM_START=0xF800
-+ROM_SIZE=0x07e0
-+RAM_START=0x0200
-+RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x280
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2002" ] ; then
-+ARCH=msp:20
-+ROM_START=0xFC00
-+ROM_SIZE=0x03e0
-+RAM_START=0x0200
-+RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x280
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2012" ] ; then
-+ARCH=msp:20
-+ROM_START=0xF800
-+ROM_SIZE=0x07e0
-+RAM_START=0x0200
-+RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x280
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2003" ] ; then
-+ARCH=msp:20
-+ROM_START=0xFC00
-+ROM_SIZE=0x03e0
-+RAM_START=0x0200
-+RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x280
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2013" ] ; then
-+ARCH=msp:20
-+ROM_START=0xF800
-+ROM_SIZE=0x07e0
-+RAM_START=0x0200
-+RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x280
-+fi
-+
- if [ "${MSP430_NAME}" = "msp430x2101" ] ; then
- ARCH=msp:21
- ROM_START=0xFC00
- ROM_SIZE=0x03e0
- RAM_START=0x0200
- RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x280
- fi
-
-@@ -270,6 +425,8 @@
- ROM_SIZE=0x07e0
- RAM_START=0x0200
- RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x280
- fi
-
-@@ -279,6 +436,8 @@
- ROM_SIZE=0x0fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -288,9 +447,44 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-+if [ "${MSP430_NAME}" = "msp430x2234" ] ; then
-+ARCH=msp:22
-+ROM_START=0xe000
-+ROM_SIZE=0x1fe0
-+RAM_START=0x0200
-+RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x300
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2254" ] ; then
-+ARCH=msp:22
-+ROM_START=0xc000
-+ROM_SIZE=0x3fe0
-+RAM_START=0x0200
-+RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x400
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2274" ] ; then
-+ARCH=msp:22
-+ROM_START=0x8000
-+ROM_SIZE=0x7fe0
-+RAM_START=0x0200
-+RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x600
-+fi
-+
- if [ "${MSP430_NAME}" = "msp430x311" ] ; then
- ARCH=msp:31
- SCRIPT_NAME=elf32msp430_3
-@@ -298,6 +492,8 @@
- ROM_SIZE=0x07e0
- RAM_START=0x0200
- RAM_SIZE=128
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x280
- fi
-
-@@ -308,6 +504,8 @@
- ROM_SIZE=0x0fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -318,6 +516,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -328,6 +528,8 @@
- ROM_SIZE=0x2fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -338,6 +540,8 @@
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -348,6 +552,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -358,6 +564,8 @@
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -368,6 +576,8 @@
- ROM_SIZE=0x5fe0
- RAM_START=0x0200
- RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -378,6 +588,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -387,6 +599,8 @@
- ROM_SIZE=0x0fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -396,6 +610,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -405,6 +621,8 @@
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -414,15 +632,85 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x600
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x423" ] ; then
-+ARCH=msp:42
-+ROM_START=0xe000
-+ROM_SIZE=0x1fe0
-+RAM_START=0x0200
-+RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x300
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x425" ] ; then
-+ARCH=msp:42
-+ROM_START=0xc000
-+ROM_SIZE=0x3fe0
-+RAM_START=0x0200
-+RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x400
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x427" ] ; then
-+ARCH=msp:42
-+ROM_START=0x8000
-+ROM_SIZE=0x7fe0
-+RAM_START=0x0200
-+RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-+if [ "${MSP430_NAME}" = "msp430x4250" ] ; then
-+ARCH=msp:42
-+ROM_START=0xc000
-+ROM_SIZE=0x3fe0
-+RAM_START=0x0200
-+RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x300
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x4260" ] ; then
-+ARCH=msp:42
-+ROM_START=0xa000
-+ROM_SIZE=0x5fe0
-+RAM_START=0x0200
-+RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x300
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x4270" ] ; then
-+ARCH=msp:42
-+ROM_START=0x8000
-+ROM_SIZE=0x7fe0
-+RAM_START=0x0200
-+RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x300
-+fi
-+
- if [ "${MSP430_NAME}" = "msp430x435" ] ; then
- ARCH=msp:43
- ROM_START=0xc000
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -432,6 +720,8 @@
- ROM_SIZE=0x5fe0
- RAM_START=0x0200
- RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -441,6 +731,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -450,6 +742,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -459,6 +753,8 @@
- ROM_SIZE=0xbfe0
- RAM_START=0x0200
- RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0xa00
- fi
-
-@@ -468,6 +764,8 @@
- ROM_SIZE=0xeee0
- RAM_START=0x0200
- RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0xa00
- fi
-
-@@ -477,6 +775,8 @@
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -486,6 +786,8 @@
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -495,6 +797,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -504,6 +808,8 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=1024
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-
-@@ -513,6 +819,8 @@
- ROM_SIZE=0xbef0
- RAM_START=0x0200
- RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0xa00
- fi
-
-@@ -522,15 +830,63 @@
- ROM_SIZE=0xeee0
- RAM_START=0x0200
- RAM_SIZE=0x0800
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0xa00
- fi
-
-+if [ "${MSP430_NAME}" = "msp430xG4616" ] ; then
-+ARCH=msp:46
-+ROM_START=0x9100
-+ROM_SIZE=0x6ec0
-+RAM_START=0x1100
-+RAM_SIZE=0x1000
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430xG4617" ] ; then
-+ARCH=msp:46
-+ROM_START=0x9100
-+ROM_SIZE=0x6ec0
-+RAM_START=0x1100
-+RAM_SIZE=0x2000
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x3100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430xG4618" ] ; then
-+ARCH=msp:46
-+ROM_START=0x3100
-+ROM_SIZE=0xcec0
-+RAM_START=0x1100
-+RAM_SIZE=0x2000
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x3100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430xG4619" ] ; then
-+ARCH=msp:46
-+ROM_START=0x2100
-+ROM_SIZE=0xdec0
-+RAM_START=0x1100
-+RAM_SIZE=0x1000
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x2100
-+fi
-+
- if [ "${MSP430_NAME}" = "msp430xW423" ] ; then
- ARCH=msp:42
- ROM_START=0xe000
- ROM_SIZE=0x1fe0
- RAM_START=0x0200
- RAM_SIZE=256
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x300
- fi
-
-@@ -540,6 +896,8 @@
- ROM_SIZE=0x3fe0
- RAM_START=0x0200
- RAM_SIZE=512
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x400
- fi
-
-@@ -549,5 +907,7 @@
- ROM_SIZE=0x7fe0
- RAM_START=0x0200
- RAM_SIZE=0x400
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
- STACK=0x600
- fi
-diff -ur binutils-2.18.orig/ld/scripttempl/elf32msp430.sc binutils-2.18/ld/scripttempl/elf32msp430.sc
---- binutils-2.18.orig/ld/scripttempl/elf32msp430.sc 2004-08-25 15:54:10.000000000 +0300
-+++ binutils-2.18/ld/scripttempl/elf32msp430.sc 2008-05-25 16:57:13.562500000 +0300
-@@ -24,12 +24,12 @@
-
- MEMORY
- {
-- text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
-- data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
-- vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20
-- bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K
-- infomem(rx) : ORIGIN = 0x1000, LENGTH = 256
-- infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256
-+ text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
-+ data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
-+ vectors (rw) : ORIGIN = $VECTORS_START LENGTH = $VECTORS_SIZE
-+ bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K
-+ infomem(rx) : ORIGIN = 0x1000, LENGTH = 256
-+ infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256
- ${HEAP_MEMORY_MSP430}
- }
-
-diff -ur binutils-2.18.orig/ld/scripttempl/elf32msp430_3.sc binutils-2.18/ld/scripttempl/elf32msp430_3.sc
---- binutils-2.18.orig/ld/scripttempl/elf32msp430_3.sc 2003-04-09 14:07:51.000000000 +0300
-+++ binutils-2.18/ld/scripttempl/elf32msp430_3.sc 2008-05-25 16:57:13.546875000 +0300
-@@ -4,9 +4,9 @@
-
- MEMORY
- {
-- text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
-- data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
-- vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20
-+ text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
-+ data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
-+ vectors (rw) : ORIGIN = $VECTORS_START LENGTH = $VECTORS_SIZE
- }
-
- SECTIONS
-diff -ur binutils-2.18.orig/opcodes/msp430-dis.c binutils-2.18/opcodes/msp430-dis.c
---- binutils-2.18.orig/opcodes/msp430-dis.c 2007-08-06 22:59:07.000000000 +0300
-+++ binutils-2.18/opcodes/msp430-dis.c 2008-05-25 16:57:13.578125000 +0300
-@@ -679,7 +679,9 @@
- insn = msp430dis_opcode (addr, info);
- sprintf (dinfo, "0x%04x", insn);
-
-- if (((int) addr & 0xffff) > 0xffdf)
-+ if (((int) addr & 0xffff) >= 0xffe0
-+ ||
-+ (info->mach == 46 && ((int) addr & 0xffff) >= 0xffc0))
- {
- (*prin) (stream, "interrupt service routine at 0x%04x", 0xffff & insn);
- return 2;
+++ /dev/null
-#! /bin/sh /usr/share/dpatch/dpatch-run
-## 501-binutils-msp-new-cpus2.dpatch by <smckown@stevex2>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Add new cpu variations to the msp430 architecture
-
-@DPATCH@
-
-diff -ur binutils-2.18.orig/bfd/archures.c binutils-2.18/bfd/archures.c
---- binutils-2.18.orig/bfd/archures.c 2008-05-25 16:57:13.406250000 +0300
-+++ binutils-2.18/bfd/archures.c 2008-05-25 17:07:00.437500000 +0300
-@@ -377,6 +377,9 @@
- .#define bfd_mach_msp20 20
- .#define bfd_mach_msp21 21
- .#define bfd_mach_msp22 22
-+.#define bfd_mach_msp24 24
-+.#define bfd_mach_msp241 241
-+.#define bfd_mach_msp26 26
- .#define bfd_mach_msp31 31
- .#define bfd_mach_msp32 32
- .#define bfd_mach_msp33 33
-diff -ur binutils-2.18.orig/bfd/bfd-in2.h binutils-2.18/bfd/bfd-in2.h
---- binutils-2.18.orig/bfd/bfd-in2.h 2008-05-25 16:57:13.437500000 +0300
-+++ binutils-2.18/bfd/bfd-in2.h 2008-05-25 17:07:00.468750000 +0300
-@@ -2048,6 +2048,9 @@
- #define bfd_mach_msp20 20
- #define bfd_mach_msp21 21
- #define bfd_mach_msp22 22
-+#define bfd_mach_msp24 24
-+#define bfd_mach_msp241 241
-+#define bfd_mach_msp26 26
- #define bfd_mach_msp31 31
- #define bfd_mach_msp32 32
- #define bfd_mach_msp33 33
-diff -ur binutils-2.18.orig/bfd/cpu-msp430.c binutils-2.18/bfd/cpu-msp430.c
---- binutils-2.18.orig/bfd/cpu-msp430.c 2008-05-25 16:57:13.437500000 +0300
-+++ binutils-2.18/bfd/cpu-msp430.c 2008-05-25 17:07:00.484375000 +0300
-@@ -74,26 +74,35 @@
- /* msp430x22x. */
- N (16, bfd_mach_msp22, "msp:22", FALSE, & arch_info_struct[10]),
-
-+ /* msp430x24x including msp430x2410 */
-+ N (16, bfd_mach_msp24, "msp:24", FALSE, & arch_info_struct[11]),
-+
-+ /* msp430x241x except msp430x2410 (extended address range) */
-+ N (16, bfd_mach_msp241, "msp:241", FALSE, & arch_info_struct[12]),
-+
-+ /* msp430x26x. */
-+ N (16, bfd_mach_msp26, "msp:26", FALSE, & arch_info_struct[13]),
-+
- /* msp430x31x. */
-- N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[11]),
-+ N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[14]),
-
- /* msp430x32x. */
-- N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[12]),
-+ N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[15]),
-
- /* msp430x33x. */
-- N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[13]),
-+ N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[16]),
-
- /* msp430x41x. */
-- N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[14]),
-+ N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[17]),
-
- /* msp430x42x. */
-- N (16, bfd_mach_msp42, "msp:42", FALSE, & arch_info_struct[15]),
-+ N (16, bfd_mach_msp42, "msp:42", FALSE, & arch_info_struct[18]),
-
- /* msp430x43x. */
-- N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[16]),
-+ N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[19]),
-
- /* msp430x44x. */
-- N (16, bfd_mach_msp44, "msp:44", FALSE, & arch_info_struct[17]),
-+ N (16, bfd_mach_msp44, "msp:44", FALSE, & arch_info_struct[20]),
-
- /* msp430x46xx. */
- N (16, bfd_mach_msp46, "msp:46", FALSE, NULL)
-diff -ur binutils-2.18.orig/bfd/doc/archures.texi binutils-2.18/bfd/doc/archures.texi
---- binutils-2.18.orig/bfd/doc/archures.texi 2008-05-25 16:57:13.453125000 +0300
-+++ binutils-2.18/bfd/doc/archures.texi 2008-05-25 17:07:00.500000000 +0300
-@@ -342,6 +342,9 @@
- #define bfd_mach_msp20 20
- #define bfd_mach_msp21 21
- #define bfd_mach_msp22 22
-+#define bfd_mach_msp24 24
-+#define bfd_mach_msp241 241
-+#define bfd_mach_msp26 26
- #define bfd_mach_msp31 31
- #define bfd_mach_msp32 32
- #define bfd_mach_msp33 33
-@@ -599,4 +602,3 @@
-
- This routine is provided for those cases where a bfd * is not
- available
--
-diff -ur binutils-2.18.orig/bfd/elf32-msp430.c binutils-2.18/bfd/elf32-msp430.c
---- binutils-2.18.orig/bfd/elf32-msp430.c 2008-05-25 16:57:13.468750000 +0300
-+++ binutils-2.18/bfd/elf32-msp430.c 2008-05-25 17:07:00.515625000 +0300
-@@ -576,6 +576,18 @@
- val = E_MSP430_MACH_MSP430x22;
- break;
-
-+ case bfd_mach_msp24:
-+ val = E_MSP430_MACH_MSP430x24;
-+ break;
-+
-+ case bfd_mach_msp241:
-+ val = E_MSP430_MACH_MSP430x241;
-+ break;
-+
-+ case bfd_mach_msp26:
-+ val = E_MSP430_MACH_MSP430x26;
-+ break;
-+
- case bfd_mach_msp31:
- val = E_MSP430_MACH_MSP430x31;
- break;
-@@ -669,6 +681,18 @@
- e_set = bfd_mach_msp22;
- break;
-
-+ case E_MSP430_MACH_MSP430x24:
-+ e_set = bfd_mach_msp24;
-+ break;
-+
-+ case E_MSP430_MACH_MSP430x241:
-+ e_set = bfd_mach_msp241;
-+ break;
-+
-+ case E_MSP430_MACH_MSP430x26:
-+ e_set = bfd_mach_msp26;
-+ break;
-+
- case E_MSP430_MACH_MSP430x31:
- e_set = bfd_mach_msp31;
- break;
-diff -ur binutils-2.18.orig/gas/config/tc-msp430.c binutils-2.18/gas/config/tc-msp430.c
---- binutils-2.18.orig/gas/config/tc-msp430.c 2008-05-25 16:57:13.484375000 +0300
-+++ binutils-2.18/gas/config/tc-msp430.c 2008-05-25 17:07:00.531250000 +0300
-@@ -250,6 +250,9 @@
- #define MSP430_ISA_20 20
- #define MSP430_ISA_21 21
- #define MSP430_ISA_22 22
-+#define MSP430_ISA_24 24
-+#define MSP430_ISA_241 241
-+#define MSP430_ISA_26 26
- #define MSP430_ISA_31 31
- #define MSP430_ISA_32 32
- #define MSP430_ISA_33 33
-@@ -317,6 +320,24 @@
- {"msp430x2234", MSP430_ISA_22, bfd_mach_msp22},
- {"msp430x2254", MSP430_ISA_22, bfd_mach_msp22},
- {"msp430x2274", MSP430_ISA_22, bfd_mach_msp22},
-+
-+ {"msp430x247", MSP430_ISA_24, bfd_mach_msp24},
-+ {"msp430x2471", MSP430_ISA_24, bfd_mach_msp24},
-+ {"msp430x248", MSP430_ISA_24, bfd_mach_msp24},
-+ {"msp430x2481", MSP430_ISA_24, bfd_mach_msp24},
-+ {"msp430x249", MSP430_ISA_24, bfd_mach_msp24},
-+ {"msp430x2491", MSP430_ISA_24, bfd_mach_msp24},
-+ {"msp430x2410", MSP430_ISA_24, bfd_mach_msp24},
-+
-+ {"msp430x2416", MSP430_ISA_241, bfd_mach_msp241},
-+ {"msp430x2417", MSP430_ISA_241, bfd_mach_msp241},
-+ {"msp430x2418", MSP430_ISA_241, bfd_mach_msp241},
-+ {"msp430x2419", MSP430_ISA_241, bfd_mach_msp241},
-+
-+ {"msp430x2616", MSP430_ISA_26, bfd_mach_msp26},
-+ {"msp430x2617", MSP430_ISA_26, bfd_mach_msp26},
-+ {"msp430x2618", MSP430_ISA_26, bfd_mach_msp26},
-+ {"msp430x2619", MSP430_ISA_26, bfd_mach_msp26},
-
- {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
- {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
-@@ -844,6 +865,10 @@
- " msp430x2003 msp430x2013\n"
- " msp430x2101 msp430x2111 msp430x2121 msp430x2131\n"
- " msp430x2234 msp430x2254 msp430x2274\n"
-+ " msp430x247 msp430x248 msp430x249 msp430x2410\n"
-+ " msp430x2471 msp430x2481 msp430x2491\n"
-+ " msp430x2416 msp430x2417 msp430x2418 msp430x2419\n"
-+ " msp430x2616 msp430x2617 msp430x2618 msp430x2619\n"
- " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
- " msp430x323 msp430x325\n"
- " msp430x336 msp430x337\n"
-diff -ur binutils-2.18.orig/include/elf/msp430.h binutils-2.18/include/elf/msp430.h
---- binutils-2.18.orig/include/elf/msp430.h 2008-05-25 16:57:13.484375000 +0300
-+++ binutils-2.18/include/elf/msp430.h 2008-05-25 17:07:00.531250000 +0300
-@@ -36,6 +36,9 @@
- #define E_MSP430_MACH_MSP430x20 20
- #define E_MSP430_MACH_MSP430x21 21
- #define E_MSP430_MACH_MSP430x22 22
-+#define E_MSP430_MACH_MSP430x24 24
-+#define E_MSP430_MACH_MSP430x241 241
-+#define E_MSP430_MACH_MSP430x26 26
- #define E_MSP430_MACH_MSP430x31 31
- #define E_MSP430_MACH_MSP430x32 32
- #define E_MSP430_MACH_MSP430x33 33
-diff -ur binutils-2.18.orig/ld/Makefile.am binutils-2.18/ld/Makefile.am
---- binutils-2.18.orig/ld/Makefile.am 2008-05-25 16:57:13.531250000 +0300
-+++ binutils-2.18/ld/Makefile.am 2008-05-25 17:07:00.578125000 +0300
-@@ -321,6 +321,21 @@
- emsp430x2234.o \
- emsp430x2254.o \
- emsp430x2274.o \
-+ emsp430x247.o \
-+ emsp430x248.o \
-+ emsp430x249.o \
-+ emsp430x2410.o \
-+ emsp430x2471.o \
-+ emsp430x2481.o \
-+ emsp430x2491.o \
-+ emsp430x2416.o \
-+ emsp430x2417.o \
-+ emsp430x2418.o \
-+ emsp430x2419.o \
-+ emsp430x2616.o \
-+ emsp430x2617.o \
-+ emsp430x2618.o \
-+ emsp430x2619.o \
- emsp430x311.o \
- emsp430x312.o \
- emsp430x313.o \
-@@ -1433,6 +1448,66 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x2274 "$(tdir_msp430x2274)" msp430all
-+emsp430x247.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x247 "$(tdir_msp430x247)" msp430all
-+emsp430x248.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x248 "$(tdir_msp430x248)" msp430all
-+emsp430x249.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x249 "$(tdir_msp430x249)" msp430all
-+emsp430x2410.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2410 "$(tdir_msp430x2410)" msp430all
-+emsp430x2471.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2471 "$(tdir_msp430x2471)" msp430all
-+emsp430x2481.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2481 "$(tdir_msp430x2481)" msp430all
-+emsp430x2491.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2491 "$(tdir_msp430x2491)" msp430all
-+emsp430x2416.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2416 "$(tdir_msp430x2416)" msp430all
-+emsp430x2417.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2417 "$(tdir_msp430x2417)" msp430all
-+emsp430x2418.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2418 "$(tdir_msp430x2418)" msp430all
-+emsp430x2419.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2419 "$(tdir_msp430x2419)" msp430all
-+emsp430x2616.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2616 "$(tdir_msp430x2616)" msp430all
-+emsp430x2617.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2617 "$(tdir_msp430x2617)" msp430all
-+emsp430x2618.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2618 "$(tdir_msp430x2618)" msp430all
-+emsp430x2619.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2619 "$(tdir_msp430x2619)" msp430all
- emsp430x311.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430_3.sc \
- ${GEN_DEPENDS}
-diff -ur binutils-2.18.orig/ld/Makefile.in binutils-2.18/ld/Makefile.in
---- binutils-2.18.orig/ld/Makefile.in 2008-05-25 16:57:13.546875000 +0300
-+++ binutils-2.18/ld/Makefile.in 2008-05-25 17:07:00.593750000 +0300
-@@ -568,6 +568,21 @@
- emsp430x2234.o \
- emsp430x2254.o \
- emsp430x2274.o \
-+ emsp430x247.o \
-+ emsp430x248.o \
-+ emsp430x249.o \
-+ emsp430x2410.o \
-+ emsp430x2471.o \
-+ emsp430x2481.o \
-+ emsp430x2491.o \
-+ emsp430x2416.o \
-+ emsp430x2417.o \
-+ emsp430x2418.o \
-+ emsp430x2419.o \
-+ emsp430x2616.o \
-+ emsp430x2617.o \
-+ emsp430x2618.o \
-+ emsp430x2619.o \
- emsp430x311.o \
- emsp430x312.o \
- emsp430x313.o \
-@@ -2259,6 +2274,66 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430x2274 "$(tdir_msp430x2274)" msp430all
-+emsp430x247.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x247 "$(tdir_msp430x247)" msp430all
-+emsp430x248.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x248 "$(tdir_msp430x248)" msp430all
-+emsp430x249.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x249 "$(tdir_msp430x249)" msp430all
-+emsp430x2410.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2410 "$(tdir_msp430x2410)" msp430all
-+emsp430x2471.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2471 "$(tdir_msp430x2471)" msp430all
-+emsp430x2481.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2481 "$(tdir_msp430x2481)" msp430all
-+emsp430x2491.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2491 "$(tdir_msp430x2491)" msp430all
-+emsp430x2416.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2416 "$(tdir_msp430x2416)" msp430all
-+emsp430x2417.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2417 "$(tdir_msp430x2417)" msp430all
-+emsp430x2418.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2418 "$(tdir_msp430x2418)" msp430all
-+emsp430x2419.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2419 "$(tdir_msp430x2419)" msp430all
-+emsp430x2616.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2616 "$(tdir_msp430x2616)" msp430all
-+emsp430x2617.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2617 "$(tdir_msp430x2617)" msp430all
-+emsp430x2618.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2618 "$(tdir_msp430x2618)" msp430all
-+emsp430x2619.c: $(srcdir)/emulparams/msp430all.sh \
-+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
-+ ${GEN_DEPENDS}
-+ ${GENSCRIPTS} msp430x2619 "$(tdir_msp430x2619)" msp430all
- emsp430x311.c: $(srcdir)/emulparams/msp430all.sh \
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430_3.sc \
- ${GEN_DEPENDS}
-diff -ur binutils-2.18.orig/ld/configure.tgt binutils-2.18/ld/configure.tgt
---- binutils-2.18.orig/ld/configure.tgt 2008-05-25 16:57:13.500000000 +0300
-+++ binutils-2.18/ld/configure.tgt 2008-05-25 17:07:00.562500000 +0300
-@@ -407,7 +407,7 @@
- mt-*elf) targ_emul=elf32mt
- ;;
- msp430-*-*) targ_emul=msp430x110
-- targ_extra_emuls="msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x1471 msp430x1481 msp430x1491 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x2001 msp430x2011 msp430x2002 msp430x2012 msp430x2003 msp430x2013 msp430x2101 msp430x2111 msp430x2121 msp430x2131 msp430x2234 msp430x2254 msp430x2274 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430x423 msp430x425 msp430x427 msp430x4250 msp430x4260 msp430x4270 msp430xE423 msp430xE425 msp430xE427 msp430xW423 msp430xW425 msp430xW427 msp430xG437 msp430xG438 msp430xG439 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449 msp430xG4616 msp430xG4617 msp430xG4618 msp430xG4619"
-+ targ_extra_emuls="msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x1471 msp430x1481 msp430x1491 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x2001 msp430x2011 msp430x2002 msp430x2012 msp430x2003 msp430x2013 msp430x2101 msp430x2111 msp430x2121 msp430x2131 msp430x2234 msp430x2254 msp430x2274 msp430x247 msp430x248 msp430x249 msp430x2410 msp430x2471 msp430x2481 msp430x2491 msp430x2416 msp430x2417 msp430x2418 msp430x2419 msp430x2616 msp430x2617 msp430x2618 msp430x2619 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430x423 msp430x425 msp430x427 msp430x4250 msp430x4260 msp430x4270 msp430xE423 msp430xE425 msp430xE427 msp430xW423 msp430xW425 msp430xW427 msp430xG437 msp430xG438 msp430xG439 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449 msp430xG4616 msp430xG4617 msp430xG4618 msp430xG4619"
- ;;
- ns32k-pc532-mach* | ns32k-pc532-ux*) targ_emul=pc532macha ;;
- ns32k-*-netbsd* | ns32k-pc532-lites*) targ_emul=ns32knbsd
-diff -ur binutils-2.18.orig/ld/emulparams/msp430all.sh binutils-2.18/ld/emulparams/msp430all.sh
---- binutils-2.18.orig/ld/emulparams/msp430all.sh 2008-05-25 16:57:13.515625000 +0300
-+++ binutils-2.18/ld/emulparams/msp430all.sh 2008-05-25 17:07:00.562500000 +0300
-@@ -485,6 +485,171 @@
- STACK=0x600
- fi
-
-+if [ "${MSP430_NAME}" = "msp430x247" ] ; then
-+ARCH=msp:24
-+ROM_START=0x8000
-+ROM_SIZE=0x7fe0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x248" ] ; then
-+ARCH=msp:24
-+ROM_START=0x4000
-+ROM_SIZE=0xbfe0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x249" ] ; then
-+ARCH=msp:24
-+ROM_START=0x1100
-+ROM_SIZE=0xeee0
-+RAM_START=0x0200
-+RAM_SIZE=2048
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0xa00
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2410" ] ; then
-+ARCH=msp:24
-+ROM_START=0x2100
-+ROM_SIZE=0xdee0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2471" ] ; then
-+ARCH=msp:24
-+ROM_START=0x8000
-+ROM_SIZE=0x7fe0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2481" ] ; then
-+ARCH=msp:24
-+ROM_START=0x4000
-+ROM_SIZE=0xbfe0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2491" ] ; then
-+ARCH=msp:24
-+ROM_START=0x1100
-+ROM_SIZE=0xeee0
-+RAM_START=0x0200
-+RAM_SIZE=2048
-+VECTORS_START=0xffe0
-+VECTORS_SIZE=32
-+STACK=0xa00
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2416" ] ; then
-+ARCH=msp:241
-+ROM_START=0x2100
-+ROM_SIZE=0xdec0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2417" ] ; then
-+ARCH=msp:241
-+ROM_START=0x3100
-+ROM_SIZE=0xcec0
-+RAM_START=0x1100
-+RAM_SIZE=8192
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x3100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2418" ] ; then
-+ARCH=msp:241
-+ROM_START=0x3100
-+ROM_SIZE=0xcec0
-+RAM_START=0x1100
-+RAM_SIZE=8192
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x3100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2419" ] ; then
-+ARCH=msp:241
-+ROM_START=0x2100
-+ROM_SIZE=0xdec0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2616" ] ; then
-+ARCH=msp:26
-+ROM_START=0x2100
-+ROM_SIZE=0xdec0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x2100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2617" ] ; then
-+ARCH=msp:26
-+ROM_START=0x3100
-+ROM_SIZE=0xcec0
-+RAM_START=0x1100
-+RAM_SIZE=8192
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x3100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2618" ] ; then
-+ARCH=msp:26
-+ROM_START=0x3100
-+ROM_SIZE=0xcec0
-+RAM_START=0x1100
-+RAM_SIZE=8192
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x3100
-+fi
-+
-+if [ "${MSP430_NAME}" = "msp430x2619" ] ; then
-+ARCH=msp:26
-+ROM_START=0x2100
-+ROM_SIZE=0xdec0
-+RAM_START=0x1100
-+RAM_SIZE=4096
-+VECTORS_START=0xffc0
-+VECTORS_SIZE=64
-+STACK=0x2100
-+fi
-+
- if [ "${MSP430_NAME}" = "msp430x311" ] ; then
- ARCH=msp:31
- SCRIPT_NAME=elf32msp430_3
-diff -ur binutils-2.18.orig/opcodes/msp430-dis.c binutils-2.18/opcodes/msp430-dis.c
---- binutils-2.18.orig/opcodes/msp430-dis.c 2008-05-25 16:57:13.578125000 +0300
-+++ binutils-2.18/opcodes/msp430-dis.c 2008-05-25 17:07:00.609375000 +0300
-@@ -681,7 +681,9 @@
-
- if (((int) addr & 0xffff) >= 0xffe0
- ||
-- (info->mach == 46 && ((int) addr & 0xffff) >= 0xffc0))
-+ ((info->mach == 241 || info->mach == 26 || info->mach == 46)
-+ &&
-+ ((int) addr & 0xffff) >= 0xffc0))
- {
- (*prin) (stream, "interrupt service routine at 0x%04x", 0xffff & insn);
- return 2;
+++ /dev/null
-#! /bin/sh /usr/share/dpatch/dpatch-run
-## 502-binutils-msp-ldscripts.dpatch by <smckown@stevex2>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Add new ldscripts for cpu variations of the msp430 architecture
-
-@DPATCH@
-
-diff -ru binutils-2.17.orig/ld/scripttempl/elf32msp430.sc binutils-2.17/ld/scripttempl/elf32msp430.sc
---- binutils-2.17.orig/ld/scripttempl/elf32msp430.sc 2008-05-23 02:00:49.049465400 +0300
-+++ binutils-2.17/ld/scripttempl/elf32msp430.sc 2008-05-24 18:13:23.343750000 +0300
-@@ -14,7 +14,7 @@
- ${RELOCATING+ PROVIDE (__heap_bottom = .) ; }
- ${RELOCATING+ PROVIDE (__heap_top = ${HEAP_START} + ${HEAP_LENGTH}) ; }
- } ${RELOCATING+ > heap}"
--HEAP_MEMORY_MSP430="heap(rwx) : ORIGIN = $HEAP_START, LENGTH = $HEAP_LENGTH"
-+HEAP_MEMORY_MSP430="heap(rwx) : ORIGIN = $HEAP_START, LENGTH = $HEAP_LENGTH"
- fi
-
-
-@@ -24,12 +24,12 @@
-
- MEMORY
- {
-- text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
-- data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
-- vectors (rw) : ORIGIN = $VECTORS_START LENGTH = $VECTORS_SIZE
-- bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K
-- infomem(rx) : ORIGIN = 0x1000, LENGTH = 256
-- infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256
-+ text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
-+ data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
-+ vectors (rw) : ORIGIN = $VECTORS_START, LENGTH = $VECTORS_SIZE
-+ bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K
-+ infomem(rx) : ORIGIN = 0x1000, LENGTH = 256
-+ infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256
- ${HEAP_MEMORY_MSP430}
- }
-
-@@ -100,22 +100,35 @@
- {
- ${RELOCATING+. = ALIGN(2);}
- *(.init)
-- *(.init0) /* Start here after reset. */
-- *(.init1)
-- *(.init2) /* Copy data loop */
-- *(.init3)
-- *(.init4) /* Clear bss */
-- *(.init5)
-- *(.init6) /* C++ constructors. */
-- *(.init7)
-- *(.init8)
-- *(.init9) /* Call main(). */
-+ KEEP(*(.init))
-+ *(.init0) /* Start here after reset. */
-+ KEEP(*(.init0))
-+ *(.init1) /* User definable. */
-+ KEEP(*(.init1))
-+ *(.init2) /* Initialize stack. */
-+ KEEP(*(.init2))
-+ *(.init3) /* Initialize hardware, user definable. */
-+ KEEP(*(.init3))
-+ *(.init4) /* Copy data to .data, clear bss. */
-+ KEEP(*(.init4))
-+ *(.init5) /* User definable. */
-+ KEEP(*(.init5))
-+ *(.init6) /* C++ constructors. */
-+ KEEP(*(.init6))
-+ *(.init7) /* User definable. */
-+ KEEP(*(.init7))
-+ *(.init8) /* User definable. */
-+ KEEP(*(.init8))
-+ *(.init9) /* Call main(). */
-+ KEEP(*(.init9))
-
- ${CONSTRUCTING+ __ctors_start = . ; }
- ${CONSTRUCTING+ *(.ctors) }
-+ ${CONSTRUCTING+ KEEP(*(.ctors)) }
- ${CONSTRUCTING+ __ctors_end = . ; }
- ${CONSTRUCTING+ __dtors_start = . ; }
- ${CONSTRUCTING+ *(.dtors) }
-+ ${CONSTRUCTING+ KEEP(*(.dtors)) }
- ${CONSTRUCTING+ __dtors_end = . ; }
-
- ${RELOCATING+. = ALIGN(2);}
-@@ -124,31 +137,45 @@
- *(.text.*)
-
- ${RELOCATING+. = ALIGN(2);}
-- *(.fini9) /* */
-- *(.fini8)
-- *(.fini7)
-- *(.fini6) /* C++ destructors. */
-- *(.fini5)
-- *(.fini4)
-- *(.fini3)
-- *(.fini2)
-- *(.fini1)
-+ *(.fini9) /* Jumps here after main(). User definable. */
-+ KEEP(*(.fini9))
-+ *(.fini8) /* User definable. */
-+ KEEP(*(.fini8))
-+ *(.fini7) /* User definable. */
-+ KEEP(*(.fini7))
-+ *(.fini6) /* C++ destructors. */
-+ KEEP(*(.fini6))
-+ *(.fini5) /* User definable. */
-+ KEEP(*(.fini5))
-+ *(.fini4) /* User definable. */
-+ KEEP(*(.fini4))
-+ *(.fini3) /* User definable. */
-+ KEEP(*(.fini3))
-+ *(.fini2) /* User definable. */
-+ KEEP(*(.fini2))
-+ *(.fini1) /* User definable. */
-+ KEEP(*(.fini1))
- *(.fini0) /* Infinite loop after program termination. */
-+ KEEP(*(.fini0))
- *(.fini)
-+ KEEP(*(.fini))
-
- _etext = .;
- } ${RELOCATING+ > text}
-
-- .data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))}
-+ .data ${RELOCATING-0} :
- {
- ${RELOCATING+ PROVIDE (__data_start = .) ; }
- ${RELOCATING+. = ALIGN(2);}
- *(.data)
-+ *(SORT_BY_ALIGNMENT(.data.*))
- ${RELOCATING+. = ALIGN(2);}
- *(.gnu.linkonce.d*)
- ${RELOCATING+. = ALIGN(2);}
- ${RELOCATING+ _edata = . ; }
-- } ${RELOCATING+ > data}
-+ } ${RELOCATING+ > data AT > text}
-+ ${RELOCATING+ PROVIDE (__data_load_start = LOADADDR(.data) ); }
-+ ${RELOCATING+ PROVIDE (__data_size = SIZEOF(.data) ); }
-
- /* Bootloader. */
- .bootloader ${RELOCATING-0} :
-@@ -175,19 +202,22 @@
- *(.infomemnobits.*)
- } ${RELOCATING+ > infomemnobits}
-
-- .bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
-+ .bss ${RELOCATING-0} :
- {
- ${RELOCATING+ PROVIDE (__bss_start = .) ; }
- *(.bss)
-+ *(SORT_BY_ALIGNMENT(.bss.*))
- *(COMMON)
- ${RELOCATING+ PROVIDE (__bss_end = .) ; }
- ${RELOCATING+ _end = . ; }
- } ${RELOCATING+ > data}
-+ ${RELOCATING+ PROVIDE (__bss_size = SIZEOF(.bss) ); }
-
-- .noinit ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
-+ .noinit ${RELOCATING-0} :
- {
- ${RELOCATING+ PROVIDE (__noinit_start = .) ; }
- *(.noinit)
-+ *(.noinit.*)
- *(COMMON)
- ${RELOCATING+ PROVIDE (__noinit_end = .) ; }
- ${RELOCATING+ _end = . ; }
-@@ -197,6 +227,7 @@
- {
- ${RELOCATING+ PROVIDE (__vectors_start = .) ; }
- *(.vectors*)
-+ KEEP(*(.vectors*))
- ${RELOCATING+ _vectors_end = . ; }
- } ${RELOCATING+ > vectors}
-
-diff -ru binutils-2.17.orig/ld/scripttempl/elf32msp430_3.sc binutils-2.17/ld/scripttempl/elf32msp430_3.sc
---- binutils-2.17.orig/ld/scripttempl/elf32msp430_3.sc 2008-05-23 02:00:49.033840400 +0300
-+++ binutils-2.17/ld/scripttempl/elf32msp430_3.sc 2008-05-24 17:50:27.953125000 +0300
-@@ -6,7 +6,7 @@
- {
- text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
- data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
-- vectors (rw) : ORIGIN = $VECTORS_START LENGTH = $VECTORS_SIZE
-+ vectors (rw) : ORIGIN = $VECTORS_START, LENGTH = $VECTORS_SIZE
- }
-
- SECTIONS
-@@ -76,22 +76,35 @@
- {
- ${RELOCATING+. = ALIGN(2);}
- *(.init)
-- *(.init0) /* Start here after reset. */
-- *(.init1)
-- *(.init2)
-- *(.init3)
-- *(.init4)
-- *(.init5)
-- *(.init6) /* C++ constructors. */
-- *(.init7)
-- *(.init8)
-- *(.init9) /* Call main(). */
-+ KEEP(*(.init))
-+ *(.init0) /* Start here after reset. */
-+ KEEP(*(.init0))
-+ *(.init1) /* User definable. */
-+ KEEP(*(.init1))
-+ *(.init2) /* Initialize stack. */
-+ KEEP(*(.init2))
-+ *(.init3) /* Initialize hardware, user definable. */
-+ KEEP(*(.init3))
-+ *(.init4) /* Copy data to .data, clear bss. */
-+ KEEP(*(.init4))
-+ *(.init5) /* User definable. */
-+ KEEP(*(.init5))
-+ *(.init6) /* C++ constructors. */
-+ KEEP(*(.init6))
-+ *(.init7) /* User definable. */
-+ KEEP(*(.init7))
-+ *(.init8) /* User definable. */
-+ KEEP(*(.init8))
-+ *(.init9) /* Call main(). */
-+ KEEP(*(.init9))
-
- ${CONSTRUCTING+ __ctors_start = . ; }
- ${CONSTRUCTING+ *(.ctors) }
-+ ${CONSTRUCTING+ KEEP(*(.ctors)) }
- ${CONSTRUCTING+ __ctors_end = . ; }
- ${CONSTRUCTING+ __dtors_start = . ; }
- ${CONSTRUCTING+ *(.dtors) }
-+ ${CONSTRUCTING+ KEEP(*(.dtors)) }
- ${CONSTRUCTING+ __dtors_end = . ; }
-
- ${RELOCATING+. = ALIGN(2);}
-@@ -100,43 +113,60 @@
- *(.text.*)
-
- ${RELOCATING+. = ALIGN(2);}
-- *(.fini9)
-- *(.fini8)
-- *(.fini7)
-- *(.fini6) /* C++ destructors. */
-- *(.fini5)
-- *(.fini4)
-- *(.fini3)
-- *(.fini2)
-- *(.fini1)
-+ *(.fini9) /* Jumps here after main(). User definable. */
-+ KEEP(*(.fini9))
-+ *(.fini8) /* User definable. */
-+ KEEP(*(.fini8))
-+ *(.fini7) /* User definable. */
-+ KEEP(*(.fini7))
-+ *(.fini6) /* C++ destructors. */
-+ KEEP(*(.fini6))
-+ *(.fini5) /* User definable. */
-+ KEEP(*(.fini5))
-+ *(.fini4) /* User definable. */
-+ KEEP(*(.fini4))
-+ *(.fini3) /* User definable. */
-+ KEEP(*(.fini3))
-+ *(.fini2) /* User definable. */
-+ KEEP(*(.fini2))
-+ *(.fini1) /* User definable. */
-+ KEEP(*(.fini1))
- *(.fini0) /* Infinite loop after program termination. */
-+ KEEP(*(.fini0))
- *(.fini)
-+ KEEP(*(.fini))
-
- ${RELOCATING+ _etext = . ; }
- } ${RELOCATING+ > text}
-
-- .data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))}
-+ .data ${RELOCATING-0} :
- {
- ${RELOCATING+ PROVIDE (__data_start = .) ; }
- *(.data)
-+ *(SORT_BY_ALIGNMENT(.data.*))
- *(.gnu.linkonce.d*)
- ${RELOCATING+. = ALIGN(2);}
- ${RELOCATING+ _edata = . ; }
-- } ${RELOCATING+ > data}
-+ } ${RELOCATING+ > data AT > text}
-+ ${RELOCATING+ PROVIDE (__data_load_start = LOADADDR(.data) ); }
-+ ${RELOCATING+ PROVIDE (__data_size = SIZEOF(.data) ); }
-
-- .bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
-+ .bss ${RELOCATING-0} :
- {
- ${RELOCATING+ PROVIDE (__bss_start = .) ; }
- *(.bss)
-+ *(SORT_BY_ALIGNMENT(.bss.*))
- *(COMMON)
- ${RELOCATING+ PROVIDE (__bss_end = .) ; }
- ${RELOCATING+ _end = . ; }
- } ${RELOCATING+ > data}
-+ ${RELOCATING+ PROVIDE (__bss_size = SIZEOF(.bss) ); }
-
-- .noinit ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
-+ .noinit ${RELOCATING-0} :
- {
- ${RELOCATING+ PROVIDE (__noinit_start = .) ; }
- *(.noinit)
-+ *(SORT_BY_ALIGNMENT(.noinit.*))
- *(COMMON)
- ${RELOCATING+ PROVIDE (__noinit_end = .) ; }
- ${RELOCATING+ _end = . ; }
-@@ -146,6 +176,7 @@
- {
- ${RELOCATING+ PROVIDE (__vectors_start = .) ; }
- *(.vectors*)
-+ KEEP(*(.vectors*))
- ${RELOCATING+ _vectors_end = . ; }
- } ${RELOCATING+ > vectors}
-
+++ /dev/null
-#! /bin/sh /usr/share/dpatch/dpatch-run
-## 503-binutils-msp-undef-LEX_DOLLAR.dpatch by <smckown@stevex2>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Allow LEX_DOLLAR to be used as an identifier in the msp430 architecture
-
-@DPATCH@
-
-diff -urN binutils-2.18.1~cvs20080103.orig/gas/config/tc-msp430.h binutils-2.18.1~cvs20080103/gas/config/tc-msp430.h
---- binutils-2.18.1~cvs20080103.orig/gas/config/tc-msp430.h 2007-07-03 05:01:04.000000000 -0600
-+++ binutils-2.18.1~cvs20080103/gas/config/tc-msp430.h 2008-08-21 13:46:29.000000000 -0600
-@@ -97,8 +97,8 @@
- example, a value of 2 might print `1234 5678' where a value of 1
- would print `12 34 56 78'. The default value is 4. */
-
--#define LEX_DOLLAR 0
--/* MSP430 port does not use `$' as a logical line separator */
-+#undef LEX_DOLLAR
-+/* Allow the MSP430 port to use `$' in identifiers */
-
- #define TC_IMPLICIT_LCOMM_ALIGNMENT(SIZE, P2VAR) (P2VAR) = 0
- /* An `.lcomm' directive with no explicit alignment parameter will
--- /dev/null
+#! /bin/sh /usr/share/dpatch/dpatch-run
+## 001-msp430-binutils-2.20.patch.dpatch by <smckown@stevex2>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: No description.
+
+@DPATCH@
+diff -urNad msp430-binutils~/bfd/archures.c msp430-binutils/bfd/archures.c
+--- msp430-binutils~/bfd/archures.c 2010-05-20 09:47:59.000000000 -0600
++++ msp430-binutils/bfd/archures.c 2010-05-20 10:03:14.000000000 -0600
+@@ -398,7 +398,13 @@
+ .#define bfd_mach_msp14 14
+ .#define bfd_mach_msp15 15
+ .#define bfd_mach_msp16 16
++.#define bfd_mach_msp20 20
+ .#define bfd_mach_msp21 21
++.#define bfd_mach_msp22 22
++.#define bfd_mach_msp23 23
++.#define bfd_mach_msp24 24
++.#define bfd_mach_msp241 241
++.#define bfd_mach_msp26 26
+ .#define bfd_mach_msp31 31
+ .#define bfd_mach_msp32 32
+ .#define bfd_mach_msp33 33
+@@ -406,6 +412,10 @@
+ .#define bfd_mach_msp42 42
+ .#define bfd_mach_msp43 43
+ .#define bfd_mach_msp44 44
++.#define bfd_mach_msp46 46
++.#define bfd_mach_msp47 47
++.#define bfd_mach_msp471 471
++.#define bfd_mach_msp54 54
+ . bfd_arch_xc16x, {* Infineon's XC16X Series. *}
+ .#define bfd_mach_xc16x 1
+ .#define bfd_mach_xc16xl 2
+diff -urNad msp430-binutils~/bfd/bfd-in2.h msp430-binutils/bfd/bfd-in2.h
+--- msp430-binutils~/bfd/bfd-in2.h 2010-05-20 09:47:59.000000000 -0600
++++ msp430-binutils/bfd/bfd-in2.h 2010-05-20 10:03:14.000000000 -0600
+@@ -2065,7 +2065,13 @@
+ #define bfd_mach_msp14 14
+ #define bfd_mach_msp15 15
+ #define bfd_mach_msp16 16
++#define bfd_mach_msp20 20
+ #define bfd_mach_msp21 21
++#define bfd_mach_msp22 22
++#define bfd_mach_msp23 23
++#define bfd_mach_msp24 24
++#define bfd_mach_msp241 241
++#define bfd_mach_msp26 26
+ #define bfd_mach_msp31 31
+ #define bfd_mach_msp32 32
+ #define bfd_mach_msp33 33
+@@ -2073,6 +2079,10 @@
+ #define bfd_mach_msp42 42
+ #define bfd_mach_msp43 43
+ #define bfd_mach_msp44 44
++#define bfd_mach_msp46 46
++#define bfd_mach_msp47 47
++#define bfd_mach_msp471 471
++#define bfd_mach_msp54 54
+ bfd_arch_xc16x, /* Infineon's XC16X Series. */
+ #define bfd_mach_xc16x 1
+ #define bfd_mach_xc16xl 2
+@@ -4409,6 +4419,25 @@
+ BFD_RELOC_MSP430_16_BYTE,
+ BFD_RELOC_MSP430_2X_PCREL,
+ BFD_RELOC_MSP430_RL_PCREL,
++ BFD_RELOC_MSP430X_SRC_BYTE,
++ BFD_RELOC_MSP430X_SRC,
++ BFD_RELOC_MSP430X_DST_BYTE,
++ BFD_RELOC_MSP430X_DST,
++ BFD_RELOC_MSP430X_DST_2ND_BYTE,
++ BFD_RELOC_MSP430X_DST_2ND,
++ BFD_RELOC_MSP430X_PCREL_SRC_BYTE,
++ BFD_RELOC_MSP430X_PCREL_SRC,
++ BFD_RELOC_MSP430X_PCREL_DST_BYTE,
++ BFD_RELOC_MSP430X_PCREL_DST,
++ BFD_RELOC_MSP430X_PCREL_DST_2ND,
++ BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE,
++ BFD_RELOC_MSP430X_S_BYTE,
++ BFD_RELOC_MSP430X_S,
++ BFD_RELOC_MSP430X_D_BYTE,
++ BFD_RELOC_MSP430X_D,
++ BFD_RELOC_MSP430X_PCREL_D,
++ BFD_RELOC_MSP430X_INDXD,
++ BFD_RELOC_MSP430X_PCREL_INDXD,
+
+ /* IQ2000 Relocations. */
+ BFD_RELOC_IQ2000_OFFSET_16,
+diff -urNad msp430-binutils~/bfd/cpu-msp430.c msp430-binutils/bfd/cpu-msp430.c
+--- msp430-binutils~/bfd/cpu-msp430.c 2010-05-20 09:47:59.000000000 -0600
++++ msp430-binutils/bfd/cpu-msp430.c 2010-05-20 10:03:14.000000000 -0600
+@@ -65,29 +65,60 @@
+ /* msp430x16x. */
+ N (16, bfd_mach_msp16, "msp:16", FALSE, & arch_info_struct[7]),
+
++ /* msp430x20x. */
++ N (16, bfd_mach_msp20, "msp:20", FALSE, & arch_info_struct[8]),
++
+ /* msp430x21x. */
+- N (16, bfd_mach_msp21, "msp:21", FALSE, & arch_info_struct[8]),
++ N (16, bfd_mach_msp21, "msp:21", FALSE, & arch_info_struct[9]),
++
++ /* msp430x22x. */
++ N (16, bfd_mach_msp22, "msp:22", FALSE, & arch_info_struct[10]),
++
++ /* msp430x23x0. */
++ N (16, bfd_mach_msp23, "msp:23", FALSE, & arch_info_struct[11]),
++
++ /* msp430x24x including msp430x2410 */
++ N (16, bfd_mach_msp24, "msp:24", FALSE, & arch_info_struct[12]),
++
++ /* msp430x241x except msp430x2410 (extended address range) */
++ N (20, bfd_mach_msp241, "msp:241", FALSE, & arch_info_struct[13]),
++
++ /* msp430x26x. */
++ N (20, bfd_mach_msp26, "msp:26", FALSE, & arch_info_struct[14]),
+
+ /* msp430x31x. */
+- N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[9]),
++ N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[15]),
+
+ /* msp430x32x. */
+- N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[10]),
++ N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[16]),
+
+ /* msp430x33x. */
+- N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[11]),
++ N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[17]),
+
+ /* msp430x41x. */
+- N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[12]),
++ N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[18]),
+
+ /* msp430x42x. */
+- N (16, bfd_mach_msp42, "msp:42", FALSE, & arch_info_struct[13]),
++ N (16, bfd_mach_msp42, "msp:42", FALSE, & arch_info_struct[19]),
+
+ /* msp430x43x. */
+- N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[14]),
++ N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[20]),
+
+ /* msp430x44x. */
+- N (16, bfd_mach_msp43, "msp:44", FALSE, NULL)
++ N (16, bfd_mach_msp44, "msp:44", FALSE, & arch_info_struct[21]),
++
++ /* msp430x46xx. */
++ N (20, bfd_mach_msp46, "msp:46", FALSE, & arch_info_struct[22]),
++
++ /* msp430x47x3, 47x4. */
++ N (16, bfd_mach_msp47, "msp:47", FALSE, & arch_info_struct[23]),
++
++ /* msp430x471x6, 471x7. */
++ N (20, bfd_mach_msp471, "msp:471", FALSE, & arch_info_struct[24]),
++
++ /* msp430x54xx. */
++ N (20, bfd_mach_msp54, "msp:54", FALSE, NULL)
++
+ };
+
+ const bfd_arch_info_type bfd_msp430_arch =
+diff -urNad msp430-binutils~/bfd/doc/archures.texi msp430-binutils/bfd/doc/archures.texi
+--- msp430-binutils~/bfd/doc/archures.texi 2010-05-20 09:47:59.000000000 -0600
++++ msp430-binutils/bfd/doc/archures.texi 2010-05-20 10:03:14.000000000 -0600
+@@ -363,7 +363,12 @@
+ #define bfd_mach_msp14 14
+ #define bfd_mach_msp15 15
+ #define bfd_mach_msp16 16
++#define bfd_mach_msp20 20
+ #define bfd_mach_msp21 21
++#define bfd_mach_msp22 22
++#define bfd_mach_msp24 24
++#define bfd_mach_msp241 241
++#define bfd_mach_msp26 26
+ #define bfd_mach_msp31 31
+ #define bfd_mach_msp32 32
+ #define bfd_mach_msp33 33
+@@ -371,6 +376,7 @@
+ #define bfd_mach_msp42 42
+ #define bfd_mach_msp43 43
+ #define bfd_mach_msp44 44
++#define bfd_mach_msp46 46
+ bfd_arch_xc16x, /* Infineon's XC16X Series. */
+ #define bfd_mach_xc16x 1
+ #define bfd_mach_xc16xl 2
+@@ -623,4 +629,3 @@
+
+ This routine is provided for those cases where a bfd * is not
+ available
+-
+diff -urNad msp430-binutils~/bfd/elf32-msp430.c msp430-binutils/bfd/elf32-msp430.c
+--- msp430-binutils~/bfd/elf32-msp430.c 2010-05-20 09:48:00.000000000 -0600
++++ msp430-binutils/bfd/elf32-msp430.c 2010-05-20 10:03:14.000000000 -0600
+@@ -90,7 +90,7 @@
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+- /* A 16 bit absolute relocation for command address. */
++ /* A 16 bit PC relative relocation for command address. */
+ HOWTO (R_MSP430_16_PCREL, /* type */
+ 1, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+@@ -120,7 +120,7 @@
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+- /* A 16 bit absolute relocation for command address. */
++ /* A 16 bit PC relative relocation, byte operations. */
+ HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
+ 1, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+@@ -163,7 +163,292 @@
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xffff, /* dst_mask */
+- TRUE) /* pcrel_offset */
++ TRUE), /* pcrel_offset */
++
++ /* A 20 bit msp430x absolute src operand relocation, byte operations */
++ HOWTO (R_MSP430X_SRC_BYTE, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_SRC_BYTE", /* name */
++ FALSE, /* partial_inplace */
++ 0xfffff, /* src_mask */
++ 0, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x absolute src operand relocation */
++ HOWTO (R_MSP430X_SRC, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_SRC", /* name */
++ FALSE, /* partial_inplace */
++ 0xfffff, /* src_mask */
++ 0, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x absolute dst operand relocation, src is register mode, byte operations */
++ HOWTO (R_MSP430X_DST_BYTE, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_DST_BYTE", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x absolute dst operand relocation, src is register mode */
++ HOWTO (R_MSP430X_DST, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_DST", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x absolute dst operand relocation, byte operations */
++ HOWTO (R_MSP430X_DST_2ND_BYTE, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_DST_2ND_BYTE", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x absolute dst operand relocation */
++ HOWTO (R_MSP430X_DST_2ND, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_DST_2ND", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x PC relative src operand relocation, byte operations */
++ HOWTO (R_MSP430X_PCREL_SRC_BYTE, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ TRUE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_PCREL_SRC_BYTE", /* name */
++ FALSE, /* partial_inplace */
++ 0xfffff, /* src_mask */
++ 0, /* dst_mask */
++ TRUE), /* pcrel_offset */
++
++ /* A 20 bit msp430x PC relative src operand relocation */
++ HOWTO (R_MSP430X_PCREL_SRC, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ TRUE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_PCREL_SRC", /* name */
++ FALSE, /* partial_inplace */
++ 0xfffff, /* src_mask */
++ 0, /* dst_mask */
++ TRUE), /* pcrel_offset */
++
++ /* A 20 bit msp430x PC relative dst operand relocation, src is register mode, byte operations */
++ HOWTO (R_MSP430X_PCREL_DST_BYTE, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ TRUE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_PCREL_DST_BYTE", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ TRUE), /* pcrel_offset */
++
++ /* A 20 bit msp430x PC relative dst operand relocation, src is register mode */
++ HOWTO (R_MSP430X_PCREL_DST, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ TRUE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_PCREL_DST", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ TRUE), /* pcrel_offset */
++
++ /* A 20 bit msp430x PC relative dst operand relocation, byte operations */
++ HOWTO (R_MSP430X_PCREL_DST_2ND_BYTE, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ TRUE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_PCREL_DST_2ND_BYTE", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ TRUE), /* pcrel_offset */
++
++ /* A 20 bit msp430x PC relative dst operand relocation */
++ HOWTO (R_MSP430X_PCREL_DST_2ND, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ TRUE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_PCREL_DST_2ND", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ TRUE), /* pcrel_offset */
++
++ /* A 20 bit msp430x address instructions immediate src operand relocation */
++ HOWTO (R_MSP430X_S_BYTE, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_S_BYTE", /* name */
++ FALSE, /* partial_inplace */
++ 0xfffff, /* src_mask */
++ 0, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x address instructions absolute src operand relocation */
++ HOWTO (R_MSP430X_S, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_S", /* name */
++ FALSE, /* partial_inplace */
++ 0xfffff, /* src_mask */
++ 0, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x address instructions immediate dst operand relocation */
++ HOWTO (R_MSP430X_D_BYTE, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_D_BYTE", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x address instructions absolute dst operand relocation */
++ HOWTO (R_MSP430X_D, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_D", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* A 20 bit msp430x address instructions absolute dst operand relocation */
++ HOWTO (R_MSP430X_PCREL_D, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 20, /* bitsize */
++ TRUE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_PCREL_D", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0xfffff, /* dst_mask */
++ TRUE), /* pcrel_offset */
++
++ /* A 16 bit msp430x relocation *** for msp430x calla 16-bit PC-relative index ***/
++ HOWTO (R_MSP430X_PCREL_INDXD, /* type */
++ 0, /* rightshift */
++ 1, /* size (0 = byte, 1 = short, 2 = long) */
++ 16, /* bitsize */
++ TRUE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_PCREL_INDXD", /* name */
++ FALSE, /* partial_inplace */
++ 0xffff, /* src_mask */
++ 0xffff, /* dst_mask */
++ TRUE), /* pcrel_offset */
++
++ /* A 16 bit msp430x relocation *** for msp430x bra/calla 16-bit index ***/
++ HOWTO (R_MSP430X_INDXD, /* type */
++ 0, /* rightshift */
++ 1, /* size (0 = byte, 1 = short, 2 = long) */
++ 16, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont,/* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_MSP430X_INDXD", /* name */
++ FALSE, /* partial_inplace */
++ 0xffff, /* src_mask */
++ 0xffff, /* dst_mask */
++ FALSE), /* pcrel_offset */
+ };
+
+ /* Map BFD reloc types to MSP430 ELF reloc types. */
+@@ -185,7 +470,29 @@
+ {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
+ {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
+ {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
+- {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
++ {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL},
++
++ {BFD_RELOC_MSP430X_SRC_BYTE, R_MSP430X_SRC_BYTE},
++ {BFD_RELOC_MSP430X_SRC, R_MSP430X_SRC},
++ {BFD_RELOC_MSP430X_DST_BYTE, R_MSP430X_DST_BYTE},
++ {BFD_RELOC_MSP430X_DST, R_MSP430X_DST},
++ {BFD_RELOC_MSP430X_DST_2ND_BYTE, R_MSP430X_DST_2ND_BYTE},
++ {BFD_RELOC_MSP430X_DST_2ND, R_MSP430X_DST_2ND},
++
++ {BFD_RELOC_MSP430X_PCREL_SRC_BYTE, R_MSP430X_PCREL_SRC_BYTE},
++ {BFD_RELOC_MSP430X_PCREL_SRC, R_MSP430X_PCREL_SRC},
++ {BFD_RELOC_MSP430X_PCREL_DST_BYTE, R_MSP430X_PCREL_DST_BYTE},
++ {BFD_RELOC_MSP430X_PCREL_DST, R_MSP430X_PCREL_DST},
++ {BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE, R_MSP430X_PCREL_DST_2ND_BYTE},
++ {BFD_RELOC_MSP430X_PCREL_DST_2ND, R_MSP430X_PCREL_DST_2ND},
++
++ {BFD_RELOC_MSP430X_S_BYTE, R_MSP430X_S_BYTE},
++ {BFD_RELOC_MSP430X_S, R_MSP430X_S},
++ {BFD_RELOC_MSP430X_D_BYTE, R_MSP430X_D_BYTE},
++ {BFD_RELOC_MSP430X_D, R_MSP430X_D},
++ {BFD_RELOC_MSP430X_PCREL_D, R_MSP430X_PCREL_D},
++ {BFD_RELOC_MSP430X_INDXD, R_MSP430X_INDXD},
++ {BFD_RELOC_MSP430X_PCREL_INDXD, R_MSP430X_PCREL_INDXD},
+ };
+
+ static reloc_howto_type *
+@@ -207,10 +514,7 @@
+ {
+ unsigned int i;
+
+- for (i = 0;
+- i < (sizeof (elf_msp430_howto_table)
+- / sizeof (elf_msp430_howto_table[0]));
+- i++)
++ for (i = 0; i < ARRAY_SIZE (elf_msp430_howto_table); i++)
+ if (elf_msp430_howto_table[i].name != NULL
+ && strcasecmp (elf_msp430_howto_table[i].name, r_name) == 0)
+ return &elf_msp430_howto_table[i];
+@@ -282,18 +586,44 @@
+ {
+ bfd_reloc_status_type r = bfd_reloc_ok;
+ bfd_vma x;
+- bfd_signed_vma srel;
++ bfd_signed_vma srel = 0;
+
+- switch (howto->type)
++ if (howto->type > R_MSP430_32 && howto->type < R_MSP430_max)
+ {
+- case R_MSP430_10_PCREL:
+ contents += rel->r_offset;
+ srel = (bfd_signed_vma) relocation;
+ srel += rel->r_addend;
+- srel -= rel->r_offset;
++
++ if(howto->pc_relative)
++ {
++ srel -= rel->r_offset;
++ srel -= (input_section->output_section->vma +
++ input_section->output_offset);
++ }
++
++ switch (howto->type)
++ {
++ case R_MSP430X_PCREL_D: // PC relative dst operand of calla
++ case R_MSP430X_PCREL_INDXD: // 16-bit idx in mova/bra instruction PC relative (symbolic) mode operand
++ srel -= 2; // operand located 2 bytes after opcode
++ break;
++ case R_MSP430X_PCREL_SRC: // PC-relative 20-bit address operand
++ case R_MSP430X_PCREL_SRC_BYTE:
++ case R_MSP430X_PCREL_DST:
++ case R_MSP430X_PCREL_DST_BYTE:
++ srel -= 4; // operand located 4 bytes after opcode
++ break;
++ case R_MSP430X_PCREL_DST_2ND:
++ case R_MSP430X_PCREL_DST_2ND_BYTE:
++ srel -= 6; // operand located 6 bytes after opcode
++ break;
++ }
++ }
++
++ switch (howto->type)
++ {
++ case R_MSP430_10_PCREL:
+ srel -= 2; /* Branch instructions add 2 to the PC... */
+- srel -= (input_section->output_section->vma +
+- input_section->output_offset);
+
+ if (srel & 1)
+ return bfd_reloc_outofrange;
+@@ -311,13 +641,7 @@
+ break;
+
+ case R_MSP430_2X_PCREL:
+- contents += rel->r_offset;
+- srel = (bfd_signed_vma) relocation;
+- srel += rel->r_addend;
+- srel -= rel->r_offset;
+ srel -= 2; /* Branch instructions add 2 to the PC... */
+- srel -= (input_section->output_section->vma +
+- input_section->output_offset);
+
+ if (srel & 1)
+ return bfd_reloc_outofrange;
+@@ -341,13 +665,7 @@
+
+ case R_MSP430_16_PCREL:
+ case R_MSP430_RL_PCREL:
+- contents += rel->r_offset;
+- srel = (bfd_signed_vma) relocation;
+- srel += rel->r_addend;
+- srel -= rel->r_offset;
+ /* Only branch instructions add 2 to the PC... */
+- srel -= (input_section->output_section->vma +
+- input_section->output_offset);
+
+ if (srel & 1)
+ return bfd_reloc_outofrange;
+@@ -356,35 +674,138 @@
+ break;
+
+ case R_MSP430_16_PCREL_BYTE:
+- contents += rel->r_offset;
+- srel = (bfd_signed_vma) relocation;
+- srel += rel->r_addend;
+- srel -= rel->r_offset;
+ /* Only branch instructions add 2 to the PC... */
+- srel -= (input_section->output_section->vma +
+- input_section->output_offset);
+
+ bfd_put_16 (input_bfd, srel & 0xffff, contents);
+ break;
+
+ case R_MSP430_16_BYTE:
+- contents += rel->r_offset;
+- srel = (bfd_signed_vma) relocation;
+- srel += rel->r_addend;
+ bfd_put_16 (input_bfd, srel & 0xffff, contents);
+ break;
+
+ case R_MSP430_16:
+- contents += rel->r_offset;
+- srel = (bfd_signed_vma) relocation;
+- srel += rel->r_addend;
+-
+ if (srel & 1)
+ return bfd_reloc_notsupported;
+
+ bfd_put_16 (input_bfd, srel & 0xffff, contents);
+ break;
+
++ case R_MSP430X_SRC: // address operand
++ case R_MSP430X_PCREL_SRC: // PC-relative address operand
++
++ // 20 bit reloc for msp430x
++ // src in Non-register mode extended instructions,
++ // imm/abs in bra instruction
++
++ // src(19:16) located at positions 10:7 of extension word
++ // src(15:0) located just after opcode
++
++ if (srel & 1) // odd address
++ return bfd_reloc_notsupported;
++ /* and fall trough, no break here!!! */
++ case R_MSP430X_SRC_BYTE: // byte instructions or immediate operand
++ case R_MSP430X_PCREL_SRC_BYTE:
++ x = bfd_get_16 (input_bfd, contents);
++ /* 4 most-significant bits */
++ x = (x & 0xf87f) | ((srel >> 9) & 0x0780);
++ bfd_put_16 (input_bfd, x, contents);
++ /* 16 least-significant bits */
++ bfd_put_16 (input_bfd, srel & 0xffff, contents + 4);
++ break;
++
++ case R_MSP430X_DST: // address operand
++ case R_MSP430X_PCREL_DST:
++
++ // 20 bit reloc for msp430x
++ // dst in Non-register mode extended instructions,
++ // imm/abs/20-bit idx in calla instruction
++
++ // dst(19:16) located at positions 3:0 of extension word
++ // dst(15:0) located just after opcode
++
++ if (srel & 1) // odd address
++ return bfd_reloc_notsupported;
++ /* and fall trough, no break here!!! */
++ case R_MSP430X_DST_BYTE: // byte instructions or immediate operand
++ case R_MSP430X_PCREL_DST_BYTE:
++ x = bfd_get_16 (input_bfd, contents);
++ /* 4 most-significant bits */
++ x = (x & 0xfff0) | ((srel >> 16) & 0x000f);
++ bfd_put_16 (input_bfd, x, contents);
++ /* 16 least-significant bits */
++ bfd_put_16 (input_bfd, srel & 0xffff, contents + 4);
++ break;
++
++ case R_MSP430X_DST_2ND: // address operand
++ case R_MSP430X_PCREL_DST_2ND:
++
++ // 20 bit reloc for msp430x
++ // dst in Non-register mode extended instructions,
++
++ // dst(19:16) located at positions 3:0 of extension word
++ // dst(15:0) located after src(15:0)
++
++ if (srel & 1) // odd address
++ return bfd_reloc_notsupported;
++ /* and fall trough, no break here!!! */
++ case R_MSP430X_DST_2ND_BYTE: // byte instructions or immediate operand
++ case R_MSP430X_PCREL_DST_2ND_BYTE:
++ x = bfd_get_16 (input_bfd, contents);
++ /* 4 most-significant bits */
++ x = (x & 0xfff0) | ((srel >> 16) & 0x000f);
++ bfd_put_16 (input_bfd, x, contents);
++ /* 16 least-significant bits */
++ bfd_put_16 (input_bfd, srel & 0xffff, contents + 6);
++ break;
++
++ case R_MSP430X_S: // absolute src operand of address instructions
++ // 20 bit reloc for msp430x
++
++ // src(19:16) located at positions 11:8 of opcode
++ // src(15:0) located just after opcode
++
++ if (srel & 1) //odd address
++ return bfd_reloc_notsupported;
++ /* and fall trough, no break here!!! */
++ case R_MSP430X_S_BYTE: // immediate src operand of address instructions
++ x = bfd_get_16 (input_bfd, contents);
++ /* 4 most-significant bits */
++ x = (x & 0xf0ff) | ((srel >> 8) & 0x0f00);
++ bfd_put_16 (input_bfd, x, contents);
++ /* 16 least-significant bits */
++ bfd_put_16 (input_bfd, srel & 0xffff, contents + 2);
++ break;
++
++ case R_MSP430X_D: // absolute dst operand of address instructions
++ case R_MSP430X_PCREL_D: // PC relative dst operand of calla
++ // 20 bit reloc for msp430x,
++
++ // dst(19:16) located at positions 3:0 of opcode
++ // dst(15:0) located just after opcode
++
++ if (srel & 1) //odd address
++ return bfd_reloc_notsupported;
++ /* and fall trough, no break here!!! */
++ case R_MSP430X_D_BYTE: //immediate dst operand of address instructions
++
++ x = bfd_get_16 (input_bfd, contents);
++ /* 4 most-significant bits */
++ x = (x & 0xfff0) | ((srel >> 16) & 0x000f);
++ bfd_put_16 (input_bfd, x, contents);
++ /* 16 least-significant bits */
++ bfd_put_16 (input_bfd, srel & 0xffff, contents + 2);
++ break;
++
++ case R_MSP430X_PCREL_INDXD: // 16-bit idx in mova/bra instruction PC relative (symbolic) mode operand
++
++ if (srel & 1) //odd address
++ return bfd_reloc_notsupported;
++ case R_MSP430X_INDXD: // 16-bit idx in calla/mova/bra instruction
++
++ x = srel & 0xffff;
++ bfd_put_16 (input_bfd, x, contents + 2); //16 least-significant bits
++ break;
++
+ default:
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ contents, rel->r_offset,
+@@ -560,6 +981,34 @@
+ val = E_MSP430_MACH_MSP430x16;
+ break;
+
++ case bfd_mach_msp20:
++ val = E_MSP430_MACH_MSP430x20;
++ break;
++
++ case bfd_mach_msp21:
++ val = E_MSP430_MACH_MSP430x21;
++ break;
++
++ case bfd_mach_msp22:
++ val = E_MSP430_MACH_MSP430x22;
++ break;
++
++ case bfd_mach_msp23:
++ val = E_MSP430_MACH_MSP430x23;
++ break;
++
++ case bfd_mach_msp24:
++ val = E_MSP430_MACH_MSP430x24;
++ break;
++
++ case bfd_mach_msp241:
++ val = E_MSP430_MACH_MSP430x241;
++ break;
++
++ case bfd_mach_msp26:
++ val = E_MSP430_MACH_MSP430x26;
++ break;
++
+ case bfd_mach_msp31:
+ val = E_MSP430_MACH_MSP430x31;
+ break;
+@@ -587,6 +1036,22 @@
+ case bfd_mach_msp44:
+ val = E_MSP430_MACH_MSP430x44;
+ break;
++
++ case bfd_mach_msp46:
++ val = E_MSP430_MACH_MSP430x46;
++ break;
++
++ case bfd_mach_msp47:
++ val = E_MSP430_MACH_MSP430x47;
++ break;
++
++ case bfd_mach_msp471:
++ val = E_MSP430_MACH_MSP430x471;
++ break;
++
++ case bfd_mach_msp54:
++ val = E_MSP430_MACH_MSP430x54;
++ break;
+ }
+
+ elf_elfheader (abfd)->e_machine = EM_MSP430;
+@@ -637,6 +1102,34 @@
+ e_set = bfd_mach_msp16;
+ break;
+
++ case E_MSP430_MACH_MSP430x20:
++ e_set = bfd_mach_msp20;
++ break;
++
++ case E_MSP430_MACH_MSP430x21:
++ e_set = bfd_mach_msp21;
++ break;
++
++ case E_MSP430_MACH_MSP430x22:
++ e_set = bfd_mach_msp22;
++ break;
++
++ case E_MSP430_MACH_MSP430x23:
++ e_set = bfd_mach_msp23;
++ break;
++
++ case E_MSP430_MACH_MSP430x24:
++ e_set = bfd_mach_msp24;
++ break;
++
++ case E_MSP430_MACH_MSP430x241:
++ e_set = bfd_mach_msp241;
++ break;
++
++ case E_MSP430_MACH_MSP430x26:
++ e_set = bfd_mach_msp26;
++ break;
++
+ case E_MSP430_MACH_MSP430x31:
+ e_set = bfd_mach_msp31;
+ break;
+@@ -664,6 +1157,22 @@
+ case E_MSP430_MACH_MSP430x44:
+ e_set = bfd_mach_msp44;
+ break;
++
++ case E_MSP430_MACH_MSP430x46:
++ e_set = bfd_mach_msp46;
++ break;
++
++ case E_MSP430_MACH_MSP430x47:
++ e_set = bfd_mach_msp47;
++ break;
++
++ case E_MSP430_MACH_MSP430x471:
++ e_set = bfd_mach_msp471;
++ break;
++
++ case E_MSP430_MACH_MSP430x54:
++ e_set = bfd_mach_msp54;
++ break;
+ }
+ }
+
+diff -urNad msp430-binutils~/bfd/libbfd.h msp430-binutils/bfd/libbfd.h
+--- msp430-binutils~/bfd/libbfd.h 2010-05-20 09:48:00.000000000 -0600
++++ msp430-binutils/bfd/libbfd.h 2010-05-20 10:03:14.000000000 -0600
+@@ -2004,6 +2004,25 @@
+ "BFD_RELOC_MSP430_16_BYTE",
+ "BFD_RELOC_MSP430_2X_PCREL",
+ "BFD_RELOC_MSP430_RL_PCREL",
++ "BFD_RELOC_MSP430X_SRC_BYTE",
++ "BFD_RELOC_MSP430X_SRC",
++ "BFD_RELOC_MSP430X_DST_BYTE",
++ "BFD_RELOC_MSP430X_DST",
++ "BFD_RELOC_MSP430X_DST_2ND_BYTE",
++ "BFD_RELOC_MSP430X_DST_2ND",
++ "BFD_RELOC_MSP430X_PCREL_SRC_BYTE",
++ "BFD_RELOC_MSP430X_PCREL_SRC",
++ "BFD_RELOC_MSP430X_PCREL_DST_BYTE",
++ "BFD_RELOC_MSP430X_PCREL_DST",
++ "BFD_RELOC_MSP430X_PCREL_DST_2ND",
++ "BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE",
++ "BFD_RELOC_MSP430X_S_BYTE",
++ "BFD_RELOC_MSP430X_S",
++ "BFD_RELOC_MSP430X_D_BYTE",
++ "BFD_RELOC_MSP430X_D",
++ "BFD_RELOC_MSP430X_PCREL_D",
++ "BFD_RELOC_MSP430X_INDXD",
++ "BFD_RELOC_MSP430X_PCREL_INDXD",
+ "BFD_RELOC_IQ2000_OFFSET_16",
+ "BFD_RELOC_IQ2000_OFFSET_21",
+ "BFD_RELOC_IQ2000_UHI16",
+diff -urNad msp430-binutils~/bfd/reloc.c msp430-binutils/bfd/reloc.c
+--- msp430-binutils~/bfd/reloc.c 2010-05-20 09:48:00.000000000 -0600
++++ msp430-binutils/bfd/reloc.c 2010-05-20 10:03:14.000000000 -0600
+@@ -4993,6 +4993,44 @@
+ BFD_RELOC_MSP430_2X_PCREL
+ ENUMX
+ BFD_RELOC_MSP430_RL_PCREL
++ENUMX
++ BFD_RELOC_MSP430X_SRC_BYTE
++ENUMX
++ BFD_RELOC_MSP430X_SRC
++ENUMX
++ BFD_RELOC_MSP430X_DST_BYTE
++ENUMX
++ BFD_RELOC_MSP430X_DST
++ENUMX
++ BFD_RELOC_MSP430X_DST_2ND_BYTE
++ENUMX
++ BFD_RELOC_MSP430X_DST_2ND
++ENUMX
++ BFD_RELOC_MSP430X_PCREL_SRC_BYTE
++ENUMX
++ BFD_RELOC_MSP430X_PCREL_SRC
++ENUMX
++ BFD_RELOC_MSP430X_PCREL_DST_BYTE
++ENUMX
++ BFD_RELOC_MSP430X_PCREL_DST
++ENUMX
++ BFD_RELOC_MSP430X_PCREL_DST_2ND
++ENUMX
++ BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE
++ENUMX
++ BFD_RELOC_MSP430X_S_BYTE
++ENUMX
++ BFD_RELOC_MSP430X_S
++ENUMX
++ BFD_RELOC_MSP430X_D_BYTE
++ENUMX
++ BFD_RELOC_MSP430X_D
++ENUMX
++ BFD_RELOC_MSP430X_PCREL_D
++ENUMX
++ BFD_RELOC_MSP430X_INDXD
++ENUMX
++ BFD_RELOC_MSP430X_PCREL_INDXD
+ ENUMDOC
+ msp430 specific relocation codes
+
+diff -urNad msp430-binutils~/gas/config/tc-msp430.c msp430-binutils/gas/config/tc-msp430.c
+--- msp430-binutils~/gas/config/tc-msp430.c 2010-05-20 09:48:00.000000000 -0600
++++ msp430-binutils/gas/config/tc-msp430.c 2010-05-20 10:03:14.000000000 -0600
+@@ -23,7 +23,6 @@
+
+ #include <limits.h>
+
+-#define PUSH_1X_WORKAROUND
+ #include "as.h"
+ #include "subsegs.h"
+ #include "opcode/msp430.h"
+@@ -69,6 +68,7 @@
+
+ int msp430_enable_relax;
+ int msp430_enable_polys;
++int msp430x_repeats; // It's not a right way to use global variable, but I don't know other way how to do it
+
+ /* GCC uses the some condition codes which we'll
+ implement as new polymorph instructions.
+@@ -99,12 +99,13 @@
+ Also, we add 'jump' instruction:
+ jump UNCOND -> jmp br lab
+
+- They will have fmt == 4, and insn_opnumb == number of instruction. */
++ They will have opcode_format() == FMT_EMULATED_POLYMORPH_JUMP,
++ and opcode_variant() == number of instruction. */
+
+ struct rcodes_s
+ {
+ char * name;
+- int index; /* Corresponding insn_opnumb. */
++ int index; /* Corresponding opcode_variant(). */
+ int sop; /* Opcode if jump length is short. */
+ long lpos; /* Label position. */
+ long lop0; /* Opcode 1 _word_ (16 bits). */
+@@ -143,7 +144,7 @@
+ struct hcodes_s
+ {
+ char * name;
+- int index; /* Corresponding insn_opnumb. */
++ int index; /* Corresponding opcode_variant(). */
+ int tlab; /* Number of labels in short mode. */
+ int op0; /* Opcode for first word of short jump. */
+ int op1; /* Opcode for second word of short jump. */
+@@ -237,107 +238,251 @@
+ int mach;
+ };
+
+-#define MSP430_ISA_11 11
+-#define MSP430_ISA_110 110
+-#define MSP430_ISA_12 12
+-#define MSP430_ISA_13 13
+-#define MSP430_ISA_14 14
+-#define MSP430_ISA_15 15
+-#define MSP430_ISA_16 16
+-#define MSP430_ISA_21 21
+-#define MSP430_ISA_31 31
+-#define MSP430_ISA_32 32
+-#define MSP430_ISA_33 33
+-#define MSP430_ISA_41 41
+-#define MSP430_ISA_42 42
+-#define MSP430_ISA_43 43
+-#define MSP430_ISA_44 44
++enum
++{
++ CORE_MASK = 0x3,
++ CPU4_BUG = 1 << 2, // push #4, push #8 cannot use CG
++ CPU7_BUG = 1 << 3, // CALL and PUSH with @SP+, @SP, and X(SP) uses the SP to calculate the address, then decrements it
++ CPU8_BUG = 1 << 4, // using odd values with SP
++ CPU11_BUG = 1 << 5, // When addressing the program counter (PC) in register mode and the PC is the destination, the
++ // status register (SR) may be erroneous. The instructions BIS, BIC, and MOV do not affect SR contents.
++ CPU12_BUG = 1 << 6, // Any instruction immediately following a CMP(.B) or BIT(.B) instruction where the PC is the
++ // destination address using register mode is ignored or erroneously executed.
++ // *** we can issue warning if any instruction other than nop follows cmp(.b) or bit(.b) ***
++ CPU13_BUG = 1 << 7, // Performing arithmetic operations with the status register as the destination address does not
++ // update the status register as intended. The result in SR can be invalid, leading to erroneous low-
++ // power mode entry. *** we can issue warning ***
++ CPU16_BUG = 1 << 8, // With indexed addressing mode and instructions calla, mova and bra
++ // it is not possible to reach memory above 64k if the register content is <64k.
++};
++static core_t msp430_core( struct mcu_type_s const * mcu )
++{
++ return (core_t)(mcu->isa & CORE_MASK);
++}
+
+-#define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
+-#define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
++#define MSP430_ISA_11 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_110 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_12 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_13 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_14 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_15 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_16 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_20 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_21 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_21x1 (CORE_430 | CPU4_BUG|CPU11_BUG|CPU12_BUG|CPU13_BUG)
++#define MSP430_ISA_22 (CORE_430)
++#define MSP430_ISA_23 (CORE_430)
++#define MSP430_ISA_24 (CORE_430 | CPU8_BUG)
++#define MSP430_ISA_241 (CORE_430X | CPU7_BUG|CPU8_BUG|CPU16_BUG)
++#define MSP430_ISA_26 (CORE_430X | CPU7_BUG|CPU8_BUG|CPU16_BUG)
++#define MSP430_ISA_31 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_32 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_33 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_41 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_42 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_43 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_44 (CORE_430 | CPU4_BUG)
++#define MSP430_ISA_46 (CORE_430X | CPU7_BUG|CPU8_BUG)
++#define MSP430_ISA_47 (CORE_430)
++#define MSP430_ISA_471 (CORE_430X)
++#define MSP430_ISA_54 (CORE_430X2)
+
+-static struct mcu_type_s mcu_types[] =
++#define CHECK_RELOC_MSP430 ((imm_op || op_width == BYTE_OP) ? BFD_RELOC_MSP430_16_BYTE : BFD_RELOC_MSP430_16)
++#define CHECK_RELOC_MSP430_PCREL ((imm_op || op_width == BYTE_OP) ? BFD_RELOC_MSP430_16_PCREL_BYTE : BFD_RELOC_MSP430_16_PCREL)
++#define CHECK_RELOC_MSP430X_SRC ((imm_op || op_width == BYTE_OP) ? BFD_RELOC_MSP430X_SRC_BYTE : BFD_RELOC_MSP430X_SRC)
++#define CHECK_RELOC_MSP430X_PCREL_SRC ((imm_op || op_width == BYTE_OP) ? BFD_RELOC_MSP430X_PCREL_SRC_BYTE : BFD_RELOC_MSP430X_PCREL_SRC)
++#define CHECK_RELOC_MSP430X_DST ((imm_op || op_width == BYTE_OP) ? BFD_RELOC_MSP430X_DST_BYTE : BFD_RELOC_MSP430X_DST)
++#define CHECK_RELOC_MSP430X_PCREL_DST ((imm_op || op_width == BYTE_OP) ? BFD_RELOC_MSP430X_PCREL_DST_BYTE : BFD_RELOC_MSP430X_PCREL_DST)
++#define CHECK_RELOC_MSP430X_DST_2ND ((imm_op || op_width == BYTE_OP) ? BFD_RELOC_MSP430X_DST_2ND_BYTE : BFD_RELOC_MSP430X_DST_2ND)
++#define CHECK_RELOC_MSP430X_PCREL_DST_2ND ((imm_op || op_width == BYTE_OP) ? BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE : BFD_RELOC_MSP430X_PCREL_DST_2ND)
++
++static struct mcu_type_s const mcu_types[] =
+ {
+- {"msp1", MSP430_ISA_11, bfd_mach_msp11},
+- {"msp2", MSP430_ISA_14, bfd_mach_msp14},
+- {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
+- {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
+- {"msp430x1101", MSP430_ISA_110, bfd_mach_msp110},
+- {"msp430x1111", MSP430_ISA_110, bfd_mach_msp110},
+- {"msp430x1121", MSP430_ISA_110, bfd_mach_msp110},
+- {"msp430x1122", MSP430_ISA_11, bfd_mach_msp110},
+- {"msp430x1132", MSP430_ISA_11, bfd_mach_msp110},
++ {"msp1", MSP430_ISA_11, bfd_mach_msp11},
++ {"msp2", MSP430_ISA_14, bfd_mach_msp14},
++ {"msp3", MSP430_ISA_46, bfd_mach_msp46},
++ {"msp4", MSP430_ISA_47, bfd_mach_msp47},
++ {"msp5", MSP430_ISA_471, bfd_mach_msp471},
++ {"msp6", MSP430_ISA_54, bfd_mach_msp54},
++ {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
++ {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
++ {"msp430x1101", MSP430_ISA_110, bfd_mach_msp110},
++ {"msp430x1111", MSP430_ISA_110, bfd_mach_msp110},
++ {"msp430x1121", MSP430_ISA_110, bfd_mach_msp110},
++ {"msp430x1122", MSP430_ISA_11, bfd_mach_msp110},
++ {"msp430x1132", MSP430_ISA_11, bfd_mach_msp110},
+
+- {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
+- {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
+- {"msp430x1222", MSP430_ISA_12, bfd_mach_msp12},
+- {"msp430x1232", MSP430_ISA_12, bfd_mach_msp12},
++ {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
++ {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
++ {"msp430x1222", MSP430_ISA_12, bfd_mach_msp12},
++ {"msp430x1232", MSP430_ISA_12, bfd_mach_msp12},
+
+- {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
+- {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
+- {"msp430x1331", MSP430_ISA_13, bfd_mach_msp13},
+- {"msp430x1351", MSP430_ISA_13, bfd_mach_msp13},
+- {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
+- {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
+- {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
++ {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
++ {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
++ {"msp430x1331", MSP430_ISA_13, bfd_mach_msp13},
++ {"msp430x1351", MSP430_ISA_13, bfd_mach_msp13},
++ {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
++ {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
++ {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
++ {"msp430x1471", MSP430_ISA_14, bfd_mach_msp14},
++ {"msp430x1481", MSP430_ISA_14, bfd_mach_msp14},
++ {"msp430x1491", MSP430_ISA_14, bfd_mach_msp14},
+
+- {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
+- {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
+- {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
+- {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
+- {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
+- {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
+- {"msp430x1610", MSP430_ISA_16, bfd_mach_msp16},
+- {"msp430x1611", MSP430_ISA_16, bfd_mach_msp16},
+- {"msp430x1612", MSP430_ISA_16, bfd_mach_msp16},
++ {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
++ {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
++ {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
++ {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
++ {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
++ {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
++ {"msp430x1610", MSP430_ISA_16, bfd_mach_msp16},
++ {"msp430x1611", MSP430_ISA_16, bfd_mach_msp16},
++ {"msp430x1612", MSP430_ISA_16, bfd_mach_msp16},
+
+- {"msp430x2101", MSP430_ISA_21, bfd_mach_msp21},
+- {"msp430x2111", MSP430_ISA_21, bfd_mach_msp21},
+- {"msp430x2121", MSP430_ISA_21, bfd_mach_msp21},
+- {"msp430x2131", MSP430_ISA_21, bfd_mach_msp21},
++ {"msp430x2001", MSP430_ISA_20, bfd_mach_msp20},
++ {"msp430x2011", MSP430_ISA_20, bfd_mach_msp20},
++
++ {"msp430x2002", MSP430_ISA_20, bfd_mach_msp20},
++ {"msp430x2012", MSP430_ISA_20, bfd_mach_msp20},
++
++ {"msp430x2003", MSP430_ISA_20, bfd_mach_msp20},
++ {"msp430x2013", MSP430_ISA_20, bfd_mach_msp20},
++
++ {"msp430x2101", MSP430_ISA_21x1, bfd_mach_msp21},
++ {"msp430x2111", MSP430_ISA_21x1, bfd_mach_msp21},
++ {"msp430x2112", MSP430_ISA_21, bfd_mach_msp21},
++ {"msp430x2121", MSP430_ISA_21x1, bfd_mach_msp21},
++ {"msp430x2122", MSP430_ISA_21, bfd_mach_msp21},
++ {"msp430x2131", MSP430_ISA_21x1, bfd_mach_msp21},
++ {"msp430x2132", MSP430_ISA_21, bfd_mach_msp21},
++
++ {"msp430x2232", MSP430_ISA_22, bfd_mach_msp22},
++ {"msp430x2234", MSP430_ISA_22, bfd_mach_msp22},
++ {"msp430x2252", MSP430_ISA_22, bfd_mach_msp22},
++ {"msp430x2254", MSP430_ISA_22, bfd_mach_msp22},
++ {"msp430x2272", MSP430_ISA_22, bfd_mach_msp22},
++ {"msp430x2274", MSP430_ISA_22, bfd_mach_msp22},
++
++ {"msp430x233", MSP430_ISA_24, bfd_mach_msp24},
++ {"msp430x235", MSP430_ISA_24, bfd_mach_msp24},
++ {"msp430x2330", MSP430_ISA_23, bfd_mach_msp23},
++ {"msp430x2350", MSP430_ISA_23, bfd_mach_msp23},
++ {"msp430x2370", MSP430_ISA_23, bfd_mach_msp23},
++
++ {"msp430x247", MSP430_ISA_24, bfd_mach_msp24},
++ {"msp430x2471", MSP430_ISA_24, bfd_mach_msp24},
++ {"msp430x248", MSP430_ISA_24, bfd_mach_msp24},
++ {"msp430x2481", MSP430_ISA_24, bfd_mach_msp24},
++ {"msp430x249", MSP430_ISA_24, bfd_mach_msp24},
++ {"msp430x2491", MSP430_ISA_24, bfd_mach_msp24},
++ {"msp430x2410", MSP430_ISA_24, bfd_mach_msp24},
++
++ {"msp430x2416", MSP430_ISA_241, bfd_mach_msp241},
++ {"msp430x2417", MSP430_ISA_241, bfd_mach_msp241},
++ {"msp430x2418", MSP430_ISA_241, bfd_mach_msp241},
++ {"msp430x2419", MSP430_ISA_241, bfd_mach_msp241},
+
+- {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
+- {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
+- {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
+- {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
+- {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
+- {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
+- {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
+- {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
+- {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
++ {"msp430x2616", MSP430_ISA_26, bfd_mach_msp26},
++ {"msp430x2617", MSP430_ISA_26, bfd_mach_msp26},
++ {"msp430x2618", MSP430_ISA_26, bfd_mach_msp26},
++ {"msp430x2619", MSP430_ISA_26, bfd_mach_msp26},
++
++ {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
++ {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
++ {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
++ {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
++ {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
++ {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
++ {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
++ {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
++ {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
+
+- {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
+- {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
+- {"msp430x415", MSP430_ISA_41, bfd_mach_msp41},
+- {"msp430x417", MSP430_ISA_41, bfd_mach_msp41},
++ {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
++ {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
++ {"msp430x415", MSP430_ISA_41, bfd_mach_msp41},
++ {"msp430x417", MSP430_ISA_41, bfd_mach_msp41},
+
+- {"msp430xE423", MSP430_ISA_42, bfd_mach_msp42},
+- {"msp430xE425", MSP430_ISA_42, bfd_mach_msp42},
+- {"msp430xE427", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430x423", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430x425", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430x427", MSP430_ISA_42, bfd_mach_msp42},
+
+- {"msp430xW423", MSP430_ISA_42, bfd_mach_msp42},
+- {"msp430xW425", MSP430_ISA_42, bfd_mach_msp42},
+- {"msp430xW427", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430x4250", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430x4260", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430x4270", MSP430_ISA_42, bfd_mach_msp42},
+
+- {"msp430xG437", MSP430_ISA_43, bfd_mach_msp43},
+- {"msp430xG438", MSP430_ISA_43, bfd_mach_msp43},
+- {"msp430xG439", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430xG4250", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xG4260", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xG4270", MSP430_ISA_42, bfd_mach_msp42},
+
+- {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
+- {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
+- {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
+- {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
+- {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
+- {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
++ {"msp430xE423", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xE4232", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xE4242", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xE4252", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xE425", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xE427", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xE4272", MSP430_ISA_42, bfd_mach_msp42},
++
++ {"msp430xW423", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xW425", MSP430_ISA_42, bfd_mach_msp42},
++ {"msp430xW427", MSP430_ISA_42, bfd_mach_msp42},
++
++ {"msp430xG437", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430xG438", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430xG439", MSP430_ISA_43, bfd_mach_msp43},
++
++ {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430x4351", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430x4361", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430x4371", MSP430_ISA_43, bfd_mach_msp43},
++ {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
++ {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
++ {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
++
++ {"msp430xG4616", MSP430_ISA_46, bfd_mach_msp46},
++ {"msp430xG4617", MSP430_ISA_46, bfd_mach_msp46},
++ {"msp430xG4618", MSP430_ISA_46, bfd_mach_msp46},
++ {"msp430xG4619", MSP430_ISA_46, bfd_mach_msp46},
++
++ {"msp430x4783", MSP430_ISA_47, bfd_mach_msp47},
++ {"msp430x4784", MSP430_ISA_47, bfd_mach_msp47},
++ {"msp430x4793", MSP430_ISA_47, bfd_mach_msp47},
++ {"msp430x4794", MSP430_ISA_47, bfd_mach_msp47},
++
++ {"msp430x47166", MSP430_ISA_471, bfd_mach_msp471},
++ {"msp430x47176", MSP430_ISA_471, bfd_mach_msp471},
++ {"msp430x47186", MSP430_ISA_471, bfd_mach_msp471},
++ {"msp430x47196", MSP430_ISA_471, bfd_mach_msp471},
++
++ {"msp430x47167", MSP430_ISA_471, bfd_mach_msp471},
++ {"msp430x47177", MSP430_ISA_471, bfd_mach_msp471},
++ {"msp430x47187", MSP430_ISA_471, bfd_mach_msp471},
++ {"msp430x47197", MSP430_ISA_471, bfd_mach_msp471},
++
++ {"msp430x5418", MSP430_ISA_54, bfd_mach_msp54},
++ {"msp430x5419", MSP430_ISA_54, bfd_mach_msp54},
++ {"msp430x5435", MSP430_ISA_54, bfd_mach_msp54},
++ {"msp430x5436", MSP430_ISA_54, bfd_mach_msp54},
++ {"msp430x5437", MSP430_ISA_54, bfd_mach_msp54},
++ {"msp430x5438", MSP430_ISA_54, bfd_mach_msp54},
++
++ {"cc430x5123", MSP430_ISA_54, bfd_mach_msp54},
++ {"cc430x5125", MSP430_ISA_54, bfd_mach_msp54},
++ {"cc430x6125", MSP430_ISA_54, bfd_mach_msp54},
++ {"cc430x6135", MSP430_ISA_54, bfd_mach_msp54},
++ {"cc430x6126", MSP430_ISA_54, bfd_mach_msp54},
++ {"cc430x5137", MSP430_ISA_54, bfd_mach_msp54},
++ {"cc430x6127", MSP430_ISA_54, bfd_mach_msp54},
++ {"cc430x6137", MSP430_ISA_54, bfd_mach_msp54},
+
+ {NULL, 0, 0}
+ };
+
+
+-static struct mcu_type_s default_mcu =
++static struct mcu_type_s const default_mcu =
+ { "msp430x11", MSP430_ISA_11, bfd_mach_msp11 };
+
+-static struct mcu_type_s * msp430_mcu = & default_mcu;
++static struct mcu_type_s const * msp430_mcu = & default_mcu;
+
+ /* Profiling capability:
+ It is a performance hit to use gcc's profiling approach for this tiny target.
+@@ -446,11 +591,14 @@
+ static char *
+ parse_exp (char * s, expressionS * op)
+ {
++ char * in_save = input_line_pointer;
+ input_line_pointer = s;
+ expression (op);
++ s = input_line_pointer;
++ input_line_pointer = in_save;
+ if (op->X_op == O_absent)
+ as_bad (_("missing operand"));
+- return input_line_pointer;
++ return s;
+ }
+
+
+@@ -504,7 +652,8 @@
+ *(to + size) = 0;
+ del_spaces (to);
+
+- from++;
++ if(*from == ',')
++ from++;
+
+ return from;
+ }
+@@ -549,7 +698,8 @@
+ return;
+ }
+
+- input_line_pointer = extract_operand (input_line_pointer, flags, 32);
++ input_line_pointer = extract_operand (input_line_pointer, flags, 32)
++ + 1; // skip trailing zero
+
+ while (*flags)
+ {
+@@ -662,7 +812,7 @@
+ /* Process like ".word xxx" directive. */
+ parse_exp (str, & exp);
+ emit_expr (& exp, 2);
+- input_line_pointer = halt;
++ input_line_pointer = halt + 1;
+ }
+
+ /* Fill the rest with zeros. */
+@@ -766,11 +916,14 @@
+ return 0;
+ }
+
++static void
++msp430_repeat_insn (int dummy ATTRIBUTE_UNUSED);
+
+ const pseudo_typeS md_pseudo_table[] =
+ {
+ {"arch", msp430_set_arch, 0},
+ {"profiler", msp430_profiler, 0},
++ {"rpt", msp430_repeat_insn, 0},
+ {NULL, NULL, 0}
+ };
+
+@@ -792,26 +945,57 @@
+ fprintf (stream,
+ _("MSP430 options:\n"
+ " -mmcu=[msp430-name] select microcontroller type\n"
+- " msp430x110 msp430x112\n"
+- " msp430x1101 msp430x1111\n"
+- " msp430x1121 msp430x1122 msp430x1132\n"
+- " msp430x122 msp430x123\n"
+- " msp430x1222 msp430x1232\n"
+- " msp430x133 msp430x135\n"
+- " msp430x1331 msp430x1351\n"
+- " msp430x147 msp430x148 msp430x149\n"
+- " msp430x155 msp430x156 msp430x157\n"
+- " msp430x167 msp430x168 msp430x169\n"
+- " msp430x1610 msp430x1611 msp430x1612\n"
+- " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
+- " msp430x323 msp430x325\n"
+- " msp430x336 msp430x337\n"
+- " msp430x412 msp430x413 msp430x415 msp430x417\n"
+- " msp430xE423 msp430xE425 msp430E427\n"
+- " msp430xW423 msp430xW425 msp430W427\n"
+- " msp430xG437 msp430xG438 msp430G439\n"
+- " msp430x435 msp430x436 msp430x437\n"
+- " msp430x447 msp430x448 msp430x449\n"));
++ " msp430x110 msp430x112\n"
++ " msp430x1101 msp430x1111 msp430x1121\n"
++ " msp430x1122 msp430x1132\n"
++ " msp430x122 msp430x123\n"
++ " msp430x1222 msp430x1232\n"
++ " msp430x133 msp430x135\n"
++ " msp430x1331 msp430x1351\n"
++ " msp430x147 msp430x148 msp430x149\n"
++ " msp430x1471 msp430x1481 msp430x1491\n"
++ " msp430x155 msp430x156 msp430x157\n"
++ " msp430x167 msp430x168 msp430x169\n"
++ " msp430x1610 msp430x1611 msp430x1612\n"
++ " msp430x2001 msp430x2011\n"
++ " msp430x2002 msp430x2012\n"
++ " msp430x2003 msp430x2013\n"
++ " msp430x2101 msp430x2111 msp430x2121 msp430x2131\n"
++ " msp430x2112 msp430x2122 msp430x2132\n"
++ " msp430x2232 msp430x2252 msp430x2272\n"
++ " msp430x2234 msp430x2254 msp430x2274\n"
++ " msp430x233 msp430x235\n"
++ " msp430x2330 msp430x2350 msp430x2370\n"
++ " msp430x247 msp430x248 msp430x249 msp430x2410\n"
++ " msp430x2471 msp430x2481 msp430x2491\n"
++ " msp430x2416 msp430x2417 msp430x2418 msp430x2419\n"
++ " msp430x2616 msp430x2617 msp430x2618 msp430x2619\n"
++ " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
++ " msp430x323 msp430x325\n"
++ " msp430x336 msp430x337\n"
++ " msp430x412 msp430x413 msp430x415 msp430x417\n"
++ " msp430x423 msp430x425 msp430427\n"
++ " msp430x4250 msp430x4260 msp4304270\n"
++ " msp430xE423 msp430xE425 msp430E427\n"
++ " msp430xE4232 msp430xE4242 msp430xE4252 msp430E4272\n"
++ " msp430xW423 msp430xW425 msp430W427\n"
++ " msp430xG4250 msp430xG4260 msp430G4270\n"
++ " msp430xG437 msp430xG438 msp430G439\n"
++ " msp430x435 msp430x436 msp430x437\n"
++ " msp430x4351 msp430x4361 msp430x4371\n"
++ " msp430x447 msp430x448 msp430x449\n"
++ " msp430xG4616 msp430xG4617 msp430xG4618 msp430xG4619\n"
++ " msp430x4783 msp430x4784 msp430x4793 msp430x4794\n"
++ " msp430x47166 msp430x47176 msp430x47186 msp430x47196\n"
++ " msp430x47167 msp430x47177 msp430x47187 msp430x47197\n"
++ " msp430x5418 msp430xG5419\n"
++ " msp430x5435 msp430x5436 msp430x5437 msp430x5438\n"
++ " cc430x5123\n"
++ " cc430x5125 cc430x6125 cc430x6135\n"
++ " cc430x6126\n"
++ " cc430x5137 cc430x6127 cc430x6137\n"
++
++ ));
+ fprintf (stream,
+ _(" -mQ - enable relaxation at assembly time. DANGEROUS!\n"
+ " -mP - enable polymorph instructions\n"));
+@@ -851,7 +1035,7 @@
+ void
+ md_begin (void)
+ {
+- struct msp430_opcode_s * opcode;
++ struct msp430_opcode_s const * opcode;
+ msp430_hash = hash_new ();
+
+ for (opcode = msp430_opcodes; opcode->name; opcode++)
+@@ -881,10 +1065,63 @@
+ return 0;
+ }
+
++static void
++msp430_substitute_CG(struct msp430_operand_s * op, int workaround)
++{
++ /* Substitute register mode with a constant generator if applicable. */
++ if( op->mode != OP_EXP || ( op->exp.X_op != O_constant && op->exp.X_op != O_big ))
++ return;
++ if( op->am != 3 || op->reg != 0 ) // not #N
++ return;
++ int x = (short) op->exp.X_add_number; /* Extend sign. */
++
++ if (x == 0)
++ {
++ op->reg = 3;
++ op->am = 0;
++ op->ol = 0;
++ op->mode = OP_REG;
++ }
++ else if (x == 1)
++ {
++ op->reg = 3;
++ op->am = 1;
++ op->ol = 0;
++ op->mode = OP_REG;
++ }
++ else if (x == 2)
++ {
++ op->reg = 3;
++ op->am = 2;
++ op->ol = 0;
++ op->mode = OP_REG;
++ }
++ else if (x == -1)
++ {
++ op->reg = 3;
++ op->am = 3;
++ op->ol = 0;
++ op->mode = OP_REG;
++ }
++ else if (x == 4 && !workaround)
++ {
++ op->reg = 2;
++ op->am = 2;
++ op->ol = 0;
++ op->mode = OP_REG;
++ }
++ else if (x == 8 && ! workaround)
++ {
++ op->reg = 2;
++ op->am = 3;
++ op->ol = 0;
++ op->mode = OP_REG;
++ }
++}
+
+ static int
+ msp430_srcoperand (struct msp430_operand_s * op,
+- char * l, int bin, int * imm_op)
++ char * l, int * imm_op, int imm_min, int imm_max)
+ {
+ char *__tl = l;
+
+@@ -965,79 +1202,11 @@
+ x = op->exp.X_add_number;
+ }
+
+- if (op->exp.X_add_number > 65535 || op->exp.X_add_number < -32768)
+- {
+- as_bad (_("value %d out of range. Use #lo() or #hi()"), x);
++ if (x >= imm_max || x < imm_min)
++ {
++ as_bad (_("value %d out of %d...%d (0x%X...0x%X) range."), x, imm_min, imm_max - 1, imm_min, imm_max - 1);
+ return 1;
+ }
+-
+- /* Now check constants. */
+- /* Substitute register mode with a constant generator if applicable. */
+-
+- x = (short) x; /* Extend sign. */
+-
+- if (x == 0)
+- {
+- op->reg = 3;
+- op->am = 0;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == 1)
+- {
+- op->reg = 3;
+- op->am = 1;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == 2)
+- {
+- op->reg = 3;
+- op->am = 2;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == -1)
+- {
+- op->reg = 3;
+- op->am = 3;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == 4)
+- {
+-#ifdef PUSH_1X_WORKAROUND
+- if (bin == 0x1200)
+- {
+- /* Remove warning as confusing.
+- as_warn (_("Hardware push bug workaround")); */
+- }
+- else
+-#endif
+- {
+- op->reg = 2;
+- op->am = 2;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- }
+- else if (x == 8)
+- {
+-#ifdef PUSH_1X_WORKAROUND
+- if (bin == 0x1200)
+- {
+- /* Remove warning as confusing.
+- as_warn (_("Hardware push bug workaround")); */
+- }
+- else
+-#endif
+- {
+- op->reg = 2;
+- op->am = 3;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- }
+ }
+ else if (op->exp.X_op == O_symbol)
+ {
+@@ -1045,12 +1214,10 @@
+ }
+ else if (op->exp.X_op == O_big)
+ {
+- short x;
+ if (vshift != -1)
+ {
+ op->exp.X_op = O_constant;
+ op->exp.X_add_number = 0xffff & generic_bignum[vshift];
+- x = op->exp.X_add_number;
+ }
+ else
+ {
+@@ -1059,49 +1226,6 @@
+ l);
+ return 1;
+ }
+-
+- if (x == 0)
+- {
+- op->reg = 3;
+- op->am = 0;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == 1)
+- {
+- op->reg = 3;
+- op->am = 1;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == 2)
+- {
+- op->reg = 3;
+- op->am = 2;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == -1)
+- {
+- op->reg = 3;
+- op->am = 3;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == 4)
+- {
+- op->reg = 2;
+- op->am = 2;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+- else if (x == 8)
+- {
+- op->reg = 2;
+- op->am = 3;
+- op->ol = 0;
+- op->mode = OP_REG;
+- }
+ }
+ /* Redundant (yet) check. */
+ else if (op->exp.X_op == O_register)
+@@ -1128,7 +1252,7 @@
+ {
+ int x = op->exp.X_add_number;
+
+- if (x > 65535 || x < -32768)
++ if (x >= imm_max || x < imm_min)
+ {
+ as_bad (_("value out of range: %d"), x);
+ return 1;
+@@ -1263,7 +1387,7 @@
+ {
+ int x = op->exp.X_add_number;
+
+- if (x > 65535 || x < -32768)
++ if (x > imm_max || x < imm_min)
+ {
+ as_bad (_("value out of range: %d"), x);
+ return 1;
+@@ -1339,10 +1463,10 @@
+
+
+ static int
+-msp430_dstoperand (struct msp430_operand_s * op, char * l, int bin)
++msp430_dstoperand (struct msp430_operand_s * op, char * l, int imm_min, int imm_max)
+ {
+ int dummy;
+- int ret = msp430_srcoperand (op, l, bin, & dummy);
++ int ret = msp430_srcoperand (op, l, & dummy, imm_min, imm_max);
+
+ if (ret)
+ return ret;
+@@ -1374,39 +1498,135 @@
+ return 0;
+ }
+
++static void
++msp430_repeat_insn (int dummy ATTRIBUTE_UNUSED)
++{
++ char operand[MAX_OP_LEN];
++ struct msp430_operand_s op;
++ int imm_op = 0;
++ char *line = input_line_pointer;
++
++ if (msp430_core(msp430_mcu) < CORE_430X)
++ {
++ as_bad (_("Repeatable instructions not allowed with %s mcu"), msp430_mcu->name);
++ return;
++ }
++
++ if (msp430x_repeats)
++ as_warn (_("two consecutive .rpt pseudo-ops. Previous .rpt discarded"));
++
++ if (!*line || *line == '\n')
++ {
++ as_bad (_("rpt pseudo-op requires 1 operand"));
++ return;
++ }
++
++ memset (&op, 0, sizeof (op));
++
++ input_line_pointer = extract_operand (line, operand, sizeof(operand));
++
++ if (msp430_srcoperand(&op, operand, &imm_op, 1, 15) != 0)
++ return;
++
++ if ( !(op.mode == OP_REG && op.am == 0) // Rn
++ && !(op.mode == OP_EXP && op.am == 3) // #N
++ )
++ {
++ as_bad (_("rpt pseudo-op requires immediate or register operand"));
++ return;
++ }
++
++ if (op.am == 0) // rpt Rn
++ msp430x_repeats = (((1 << 7) | op.reg) << 1) | 1; // last bit as .rpt flag
++ else // rpt #N
++ msp430x_repeats = ((op.exp.X_add_number - 1) << 1) | 1; // last bit as .rpt flag
++}
+
+ /* Parse instruction operands.
+ Return binary opcode. */
+
+ static unsigned int
+-msp430_operands (struct msp430_opcode_s * opcode, char * line)
++msp430_operands (struct msp430_opcode_s const * opcode, char * line)
+ {
+ int bin = opcode->bin_opcode; /* Opcode mask. */
+ int __is = 0;
+ char l1[MAX_OP_LEN], l2[MAX_OP_LEN];
+- char *frag;
+- int where;
++ char *frag = 0;
++ int where = 0;
+ struct msp430_operand_s op1, op2;
+ int res = 0;
+ static short ZEROS = 0;
+- int byte_op, imm_op;
+-
++ int imm_op;
++ opwidth_t op_width = DEFAULT_OP;
++
+ /* Opcode is the one from opcodes table
+ line contains something like
+ [.w] @r2+, 5(R1)
+ or
+- .b @r2+, 5(R1). */
++ .b @r2+, 5(R1)
++ or
++ .a @r2+, 5(R1) */
+
+ /* Check if byte or word operation. */
++
+ if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
+ {
+- bin |= BYTE_OPERATION;
+- byte_op = 1;
++ op_width = BYTE_OP;
++ }
++ else if (*line == '.' && TOLOWER (*(line + 1)) == 'w')
++ {
++ op_width = WORD_OP;
++ }
++ else if (*line == '.' && TOLOWER (*(line + 1)) == 'a')
++ {
++ op_width = ADDR_OP;
++ }
++
++ if ((op_width == WORD_OP && !(opcode_modifier(opcode) & MOD_W))
++ || (op_width == BYTE_OP && !(opcode_modifier(opcode) & MOD_B))
++ || (op_width == ADDR_OP && !(opcode_modifier(opcode) & MOD_A))
++ )
++ {
++ static char* const modifier[] = { "", ".w", ".b", ".a" };
++ as_bad (_("%s not allowed with %s instruction"),
++ modifier[op_width], opcode->name);
++ return 0;
++ }
++
++ if ( opcode_format(opcode) == FMT_X_DOUBLE_OPERAND
++ || opcode_format(opcode) == FMT_X_SINGLE_OPERAND
++ || opcode_format(opcode) == FMT_X_EMULATED
++ )
++ {
++ switch(op_width)
++ {
++ case DEFAULT_OP:
++ case WORD_OP:
++ bin |= NON_ADDR_OPERATION;
++ break;
++ case BYTE_OP:
++ bin |= NON_ADDR_OPERATION;
++ bin |= BYTE_OPERATION_X;
++ break;
++ case ADDR_OP:
++ bin |= BYTE_OPERATION_X;
++ break;
++ }
+ }
+ else
+- byte_op = 0;
++ {
++ if(msp430x_repeats)
++ {
++ as_bad (_("%s instruction is not repeatable"), opcode->name);
++ return 0;
++ }
+
+- /* skip .[bwBW]. */
++ if ( opcode_format(opcode) < FMT_X && op_width == BYTE_OP ) // 430 instructions
++ {
++ bin |= BYTE_OPERATION;
++ }
++ }
++ /* skip .[abwABW]. */
+ while (! ISSPACE (*line) && *line)
+ line++;
+
+@@ -1424,22 +1644,22 @@
+
+ imm_op = 0;
+
+- switch (opcode->fmt)
++ switch (opcode_format(opcode))
+ {
+- case 0: /* Emulated. */
+- switch (opcode->insn_opnumb)
++ case FMT_EMULATED: /* Emulated. */
++ switch (opcode_variant(opcode))
+ {
+- case 0:
+- /* Set/clear bits instructions. */
++ case V_NOOP:
++ /* Set/clear SR bits instructions, ret, nop */
+ __is = 2;
+ frag = frag_more (__is);
+ bfd_putl16 ((bfd_vma) bin, frag);
+ dwarf2_emit_insn (__is);
+ break;
+- case 1:
++ case V_NONE:
+ /* Something which works with destination operand. */
+ line = extract_operand (line, l1, sizeof (l1));
+- res = msp430_dstoperand (&op1, l1, opcode->bin_opcode);
++ res = msp430_dstoperand (&op1, l1, -(1<<15), (1<<16) );
+ if (res)
+ break;
+
+@@ -1464,14 +1684,15 @@
+ }
+ break;
+
+- case 2:
++ case V_SHIFT:
+ {
+ /* Shift instruction. */
+ line = extract_operand (line, l1, sizeof (l1));
+ strncpy (l2, l1, sizeof (l2));
+ l2[sizeof (l2) - 1] = '\0';
+- res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
+- res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<15), (1<<16));
++ msp430_substitute_CG(&op1, 0);
++ res += msp430_dstoperand (&op2, l2, -(1<<15), (1<<16));
+
+ if (res)
+ break; /* An error occurred. All warnings were done before. */
+@@ -1499,7 +1720,12 @@
+
+ if (op2.mode == OP_EXP)
+ {
+- imm_op = 0;
++ /*
++ x(Rn). x can be odd in non-byte operations
++ except x(R2) = x(0) = &TONI and x(PC) = TONI
++ */
++ imm_op = (op2.mode == 1 && op2.reg != 2 && op2.reg != 0);
++
+ bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
+
+ if (op2.reg) /* Not PC relative. */
+@@ -1511,16 +1737,21 @@
+ }
+ break;
+ }
+- case 3:
++ case V_BR:
+ /* Branch instruction => mov dst, r0. */
+ line = extract_operand (line, l1, sizeof (l1));
+
+- res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<15), (1<<16));
++ msp430_substitute_CG(&op1, 0);
+ if (res)
+ break;
+
+- byte_op = 0;
+- imm_op = 0;
++ if (op1.mode == 1 && (op1.reg == 2 || op1.reg == 0))
++ /*
++ x(Rn). x can be odd in non-byte operations
++ except x(R2) = x(0) = &EDE and x(PC) = EDE
++ */
++ imm_op = 0;
+
+ bin |= ((op1.reg << 8) | (op1.am << 4));
+ __is = 1 + op1.ol;
+@@ -1545,11 +1776,12 @@
+ }
+ break;
+
+- case 1: /* Format 1, double operand. */
++ case FMT_DOUBLE_OPERAND: /* Format 1, double operand. */
+ line = extract_operand (line, l1, sizeof (l1));
+ line = extract_operand (line, l2, sizeof (l2));
+- res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
+- res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<15), (1<<16));
++ msp430_substitute_CG(&op1, 0);
++ res += msp430_dstoperand (&op2, l2, -(1<<15), (1<<16));
+
+ if (res)
+ break; /* Error occurred. All warnings were done before. */
+@@ -1577,7 +1809,12 @@
+
+ if (op2.mode == OP_EXP)
+ {
+- imm_op = 0;
++ /*
++ x(Rn). x can be odd in non-byte operations
++ except x(R2) = x(0) = &TONI and x(PC) = TONI
++ */
++ imm_op = (op2.mode == 1 && op2.reg != 2 && op2.reg != 0);
++
+ bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
+
+ if (op2.reg) /* Not PC relative. */
+@@ -1589,8 +1826,8 @@
+ }
+ break;
+
+- case 2: /* Single-operand mostly instr. */
+- if (opcode->insn_opnumb == 0)
++ case FMT_SINGLE_OPERAND: /* Single-operand mostly instr. */
++ if (opcode_variant(opcode) == V_RETI)
+ {
+ /* reti instruction. */
+ frag = frag_more (2);
+@@ -1600,9 +1837,10 @@
+ }
+
+ line = extract_operand (line, l1, sizeof (l1));
+- res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<15), (1<<16));
+ if (res)
+ break; /* Error in operand. */
++ msp430_substitute_CG(&op1, (msp430_mcu->isa & CPU4_BUG) && (opcode->bin_opcode == 0x1200));
+
+ bin |= op1.reg | (op1.am << 4);
+ __is = 1 + op1.ol;
+@@ -1624,7 +1862,7 @@
+ }
+ break;
+
+- case 3: /* Conditional jumps instructions. */
++ case FMT_JUMP: /* Conditional jumps instructions. */
+ line = extract_operand (line, l1, sizeof (l1));
+ /* l1 is a label. */
+ if (l1[0])
+@@ -1694,11 +1932,13 @@
+ else if (*l1 == '$')
+ {
+ as_bad (_("instruction requires label sans '$'"));
++ break;
+ }
+ else
+ {
+ as_bad (_
+ ("instruction requires label or value in range -511:512"));
++ break;
+ }
+ dwarf2_emit_insn (2 * __is);
+ break;
+@@ -1710,7 +1950,7 @@
+ }
+ break;
+
+- case 4: /* Extended jumps. */
++ case FMT_EMULATED_POLYMORPH_JUMP: /* Extended jumps. */
+ if (!msp430_enable_polys)
+ {
+ as_bad (_("polymorphs are not enabled. Use -mP option to enable."));
+@@ -1731,7 +1971,7 @@
+ if (exp.X_op == O_symbol)
+ {
+ /* Relaxation required. */
+- struct rcodes_s rc = msp430_rcodes[opcode->insn_opnumb];
++ struct rcodes_s rc = msp430_rcodes[opcode_variant(opcode)];
+
+ /* The parameter to dwarf2_emit_insn is actually the offset to the start
+ of the insn from the fix piece of instruction that was emitted.
+@@ -1752,7 +1992,7 @@
+ as_bad (_("instruction requires label"));
+ break;
+
+- case 5: /* Emulated extended branches. */
++ case FMT_EMULATED_LONG_POLYMORPH_JUMP: /* Emulated extended branches. */
+ if (!msp430_enable_polys)
+ {
+ as_bad (_("polymorphs are not enabled. Use -mP option to enable."));
+@@ -1772,7 +2012,7 @@
+ if (exp.X_op == O_symbol)
+ {
+ /* Relaxation required. */
+- struct hcodes_s hc = msp430_hcodes[opcode->insn_opnumb];
++ struct hcodes_s hc = msp430_hcodes[opcode_variant(opcode)];
+
+ frag = frag_more (8);
+ dwarf2_emit_insn (0);
+@@ -1791,18 +2031,680 @@
+ as_bad (_("instruction requires label"));
+ break;
+
++ case FMT_X_DOUBLE_OPERAND: /* Extended Format 1 ( double operand). */
++ line = extract_operand (line, l1, sizeof (l1));
++ line = extract_operand (line, l2, sizeof (l2));
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<19), (1<<20));
++ msp430_substitute_CG(&op1, 0);
++ res += msp430_dstoperand (&op2, l2, -(1<<19), (1<<20));
++
++ if (res)
++ break; /* Error occurred. All warnings were done before. */
++
++ if (msp430x_repeats)
++ {
++ if (op1.mode != OP_REG || op2.mode != OP_REG)
++ {
++ as_bad(_("Repeated instruction must have register mode operands"));
++ break;
++ }
++ bin |= msp430x_repeats >> 1;
++ msp430x_repeats = 0;
++ }
++
++ bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7)) << 16;
++
++ __is = 2 + op1.ol + op2.ol; /* insn size in words, opcode is 2 words wide. */
++ frag = frag_more (2 * __is);
++ where = frag - frag_now->fr_literal;
++ bfd_putl32 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (2 * __is);
++
++ if (op1.mode == OP_EXP)
++ {
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 4);
++
++ if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, CHECK_RELOC_MSP430X_SRC);
++ else
++ fix_new_exp (frag_now, where , 2,
++ &(op1.exp), TRUE, CHECK_RELOC_MSP430X_PCREL_SRC);
++ }
++
++ if (op2.mode == OP_EXP)
++ {
++ /*
++ x(Rn). x can be odd in non-byte operations
++ except x(R2) = x(0) = &TONI and x(PC) = TONI
++ */
++ imm_op = (op2.mode == 1 && op2.reg != 2 && op2.reg != 0);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 4 + ((__is == 4) ? 2 : 0));
++
++ if (op1.mode == OP_EXP)
++ {
++ if (op2.reg) /* Not PC relative. */
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), FALSE, CHECK_RELOC_MSP430X_DST_2ND);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), TRUE, CHECK_RELOC_MSP430X_PCREL_DST_2ND);
++ }
++ else
++ {
++ if (op2.reg) /* Not PC relative. */
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), FALSE, CHECK_RELOC_MSP430X_DST);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), TRUE, CHECK_RELOC_MSP430X_PCREL_DST);
++ }
++ }
++ break;
++
++ case FMT_X_SINGLE_OPERAND: /* Extended format 2 (single-operand). */
++ line = extract_operand (line, l1, sizeof (l1));
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<19), (1<<20));
++ msp430_substitute_CG(&op1, 0);
++ if (res)
++ break; /* Error in operand. */
++
++ if (opcode_variant(opcode) != V_PUSHX && op1.mode == OP_EXP && op1.am == 3) // #N
++ {
++ as_bad (_("bad operand [%s]"), l1);
++ break;
++ }
++
++ if (msp430x_repeats)
++ {
++ if (op1.mode != OP_REG)
++ {
++ as_bad(_("Repeated instruction must have register mode operand"));
++ break;
++ }
++ bin |= msp430x_repeats >> 1;
++ msp430x_repeats = 0;
++ }
++
++ if(opcode_variant(opcode) == V_SWPSXT && op_width == ADDR_OP)
++ { // sxtx.a | swpbx.a opcode
++ bin ^= BYTE_OPERATION_X;
++ }
++
++ bin |= (op1.reg | (op1.am << 4)) << 16;
++ __is = 2 + op1.ol; /* insn size in words, opcode is 2 words wide. */
++ frag = frag_more (2 * __is);
++ where = frag - frag_now->fr_literal;
++ bfd_putl32 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (2 * __is);
++
++ if (op1.mode == OP_EXP)
++ {
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 4);
++
++ if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, CHECK_RELOC_MSP430X_DST);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), TRUE, CHECK_RELOC_MSP430X_PCREL_DST);
++ }
++ break;
++
++ case FMT_X_EXCEPTION:
++ /* calla, pushm, popm, rrcm, rrum, rram, rlam */
++ bin = opcode->bin_opcode; // remove WB/AL bits
++ line = extract_operand (line, l1, sizeof (l1));
++ switch(opcode_variant(opcode))
++ {
++ case V_CALLA: // calla
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<19), (1<<20));
++ if (res)
++ break; /* Error in operand. */
++ __is = 1 + op1.ol;
++ frag = frag_more(__is * 2);
++
++ if (op1.mode == OP_REG)
++ {
++ bin |= op1.reg;
++ switch (op1.am)
++ {
++ case 0: // Rdst
++ bin |= 0x0040;
++ break;
++ case 2: // @Rdst
++ bin |= 0x0060;
++ break;
++ case 3: // @Rdst+
++ bin |= 0x0070;
++ break;
++ }
++ bin |= op1.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ }
++ else if (op1.mode == OP_EXP)
++ {
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ where = frag - frag_now->fr_literal;
++ switch (op1.am)
++ {
++ case 1:
++ switch(op1.reg)
++ {
++ case 0: // x(PC) = EDE
++ bin |= 0x0090;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), TRUE, BFD_RELOC_MSP430X_PCREL_D);
++ break;
++ case 2: // &abs20
++ bin |= 0x0080;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_D);
++ break;
++ default: //z16(Rdst)
++ bin |= 0x0050 | op1.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_INDXD);
++ break;
++ }
++ break;
++ case 3: // calla #imm
++ bin |= 0x00b0;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_D);
++ break;
++ }
++ dwarf2_emit_insn (__is * 2);
++ }
++ break;
++ case V_ROTM: // rxxm
++ line = extract_operand(line, l2, sizeof(l2));
++ res = msp430_srcoperand (&op1, l1, &imm_op, 1, 5);
++ res += msp430_dstoperand (&op2, l2, -(1<<19), (1<<20));
++ if(res)
++ break; /* An error occurred. All warnings were done before. */
++
++ if(op_width != ADDR_OP)
++ bin |= (1 << 4);
++
++ if(op1.mode != OP_EXP || op1.am != 3) // not #imm
++ {
++ as_bad (_("bad operand [%s]"), l1);
++ break;
++ }
++
++ bin |= ((op1.exp.X_add_number - 1) & 0x0003) << 10;
++
++ if(op2.mode != OP_REG)
++ {
++ as_bad (_("bad operand [%s]"), l2);
++ break;
++ }
++ bin |= op2.reg;
++
++ frag = frag_more (2);
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (2);
++ break;
++ case V_PUSHM:
++ case V_POPM:
++ line = extract_operand(line, l2, sizeof(l2));
++ res = msp430_srcoperand (&op1, l1, &imm_op, 1, 17);
++ res += msp430_dstoperand (&op2, l2, -(1<<19), (1<<20));
++ if(res)
++ break; /* An error occurred. All warnings were done before. */
++
++
++ if(imm_op == 0)
++ {
++ as_bad (_("bad operand [%s]"), l1);
++ break;
++ }
++
++ if(op_width != ADDR_OP)
++ {
++ bin |= (1 << 8);
++ }
++ bin |= ((op1.exp.X_add_number - 1) & 0x000F) << 4;
++
++ if(op2.mode != OP_REG)
++ {
++ as_bad (_("bad operand [%s]"), l2);
++ break;
++ }
++ if(opcode_variant(opcode) == V_POPM)
++ {
++ /* popm */
++ bin |= (op2.reg - op1.exp.X_add_number + 1) & 0x000F;
++ }
++ else
++ {
++ /* pushm */
++ bin |= op2.reg;
++ }
++
++ frag = frag_more (2);
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (2);
++ break;
++ }
++ break;
++ case FMT_X_ADDRESS:
++ /* mova, adda, suba, cmpa */
++ line = extract_operand (line, l1, sizeof (l1));
++ line = extract_operand (line, l2, sizeof (l2));
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<19), (1<<20));
++ res += msp430_dstoperand (&op2, l2, -(1<<19), (1<<20));
++ if (res)
++ break; /* Error in operand. */
++
++ __is = 1 + op1.ol + op2.ol;
++ frag = frag_more(__is * 2);
++ where = frag - frag_now->fr_literal;
++ bin = opcode->bin_opcode; // remove WB/AL bits
++ if( opcode_variant(opcode) == V_MOVA)
++ {
++ if (op1.mode == OP_REG && op1.am == 0)
++ { // Rsrc
++ if(op2.mode == OP_REG && op2.am == 0)
++ {
++ // mova Rsrc, Rdst
++ bin |= 0x00c0 | op1.reg << 8 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ }
++ else if(op2.mode == OP_EXP && op2.am == 1 && op2.reg == 2)
++ {
++ // mova Rsrc, &abs20
++ bin |= 0x0060 | op1.reg << 8;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), FALSE, BFD_RELOC_MSP430X_D);
++ }
++ else if(op2.mode == OP_EXP && op2.am == 1 && op2.reg == 0)
++ {
++ bin |= 0x0070 | op1.reg << 8;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), TRUE, BFD_RELOC_MSP430X_PCREL_D);
++ }
++ else if(op2.mode == OP_EXP && op2.am == 1)
++ {
++ // mova Rsrc, z16(Rdst)
++ bin |= 0x0070 | op1.reg << 8 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ if(op2.reg == 0)
++ // mova Rsrc, TONI == mova Rsrc, z16(PC)
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), TRUE, BFD_RELOC_MSP430X_PCREL_INDXD);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), FALSE, BFD_RELOC_MSP430X_INDXD);
++ }
++ else
++ as_bad (_("destination operand address mode not allowed with mova instruction"));
++
++ }
++ else if (op2.mode == OP_REG && op2.am == 0)
++ { // Rdst
++ if(op1.mode == OP_REG && op1.am == 2)
++ {
++ // mova @Rsrc, Rdst
++ bin |= 0x0000 | op1.reg << 8 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ }
++ else if (op1.mode == OP_REG && op1.am == 3)
++ {
++ // mova @Rsrc+, Rdst
++ bin |= 0x0010 | op1.reg << 8 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ }
++ else if (op1.mode == OP_EXP && op1.am == 1 && op1.reg == 2)
++ {
++ if (op1.reg == 2)
++ {
++ // mova &abs20, Rdst
++ bin |= 0x0020 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_S);
++ }
++ else
++ {
++ // mova z16(Rsrc), Rdst
++ bin |= 0x0030 | op1.reg << 8 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ if (op1.reg == 0)
++ // mova TONI, Rdst
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_PCREL_INDXD);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_INDXD);
++ }
++ }
++ else if (op1.mode == OP_EXP && op1.am == 3)
++ {
++ // mova #imm20, Rdst
++ bin |= 0x0080 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ if (op2.reg == 0)
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_S);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_S_BYTE);
++ }
++ else
++ as_bad (_("source operand address mode not allowed with mova instruction"));
++ }
++ break;
++ }
++ else
++ /* adda, suba, cmpa */
++ {
++ if(op2.mode == OP_REG && op2.am == 0)
++ {
++ if (op1.mode == OP_REG && op1.am == 0)
++ { // Rsrc, Rdst
++ bin |= 0x0040 | op1.reg << 8 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ }
++ else if (op1.mode == OP_EXP && op1.am == 3)
++ {
++ // #imm20, Rdst
++ bin |= 0x0080 | op2.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ if (op2.reg == 0)
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_S);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_S_BYTE);
++ }
++ else
++ as_bad (_("source operand address mode not allowed with %s instruction"), opcode->name);
++ }
++ else
++ as_bad (_("destination operand address mode not allowed with %s instruction"), opcode->name);
++ break;
++ }
++ break;
++
++ case FMT_X_EMULATED: /* Extended emulated. */
++ switch (opcode_variant(opcode))
++ {
++ case V_NONE:
++ /* single operand instruction emulated with Extended type 1 (double operand) instructions. */
++ line = extract_operand (line, l1, sizeof (l1));
++ res = msp430_dstoperand (&op1, l1, -(1<<19), (1<<20) );
++ if (res)
++ break;
++
++ if (msp430x_repeats)
++ {
++ if ((bin >> 20) && 0x3 == 1)
++ {
++ as_bad (_("%s instruction is not repeatable"), opcode->name);
++ break;
++ }
++ if (op1.mode != OP_REG)
++ {
++ as_bad(_("Repeated instruction must have register mode operand"));
++ break;
++ }
++ bin |= msp430x_repeats >> 1;
++ msp430x_repeats = 0;
++ }
++
++ bin |= (op1.reg | (op1.am << 7)) << 16;
++ __is = 2 + op1.ol;
++ frag = frag_more (2 * __is);
++ where = frag - frag_now->fr_literal;
++ bfd_putl32 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (2 * __is);
++
++ if (op1.mode == OP_EXP)
++ {
++ /*
++ x(Rn). x can be odd in non-byte operations
++ except x(R2) = x(0) = &TONI and x(PC) = TONI
++ */
++ imm_op = (op2.mode == 1 && op2.reg != 2 && op2.reg != 0);
++
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 4);
++ if (op1.reg || (op1.reg == 0 && op1.am == 3))
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, CHECK_RELOC_MSP430X_DST);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), TRUE, CHECK_RELOC_MSP430X_PCREL_DST);
++ }
++ break;
++ case V_X_SHIFT:
++ {
++ /* Shift instruction. */
++ line = extract_operand (line, l1, sizeof (l1));
++ strncpy (l2, l1, sizeof (l2));
++ l2[sizeof (l2) - 1] = '\0';
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<19), (1<<20));
++ msp430_substitute_CG(&op1, 0);
++ res += msp430_dstoperand (&op2, l2, -(1<<19), (1<<20));
++
++ if (res)
++ break; /* An error occurred. All warnings were done before. */
++
++ if (msp430x_repeats)
++ {
++ if (op2.mode != OP_REG)
++ {
++ as_bad(_("Repeated instruction must have register mode operands"));
++ break;
++ }
++ bin |= msp430x_repeats >> 1;
++ msp430x_repeats = 0;
++ }
++
++ bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7)) << 16;
++
++ __is = 2 + op1.ol + op2.ol; /* insn size in words. */
++ frag = frag_more (2 * __is);
++ where = frag - frag_now->fr_literal;
++ bfd_putl32 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (2 * __is);
++
++ if (op1.mode == OP_EXP)
++ {
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 4);
++
++ if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, CHECK_RELOC_MSP430X_SRC);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), TRUE, CHECK_RELOC_MSP430X_PCREL_SRC);
++ }
++
++ if (op2.mode == OP_EXP)
++ {
++ /*
++ x(Rn). x can be odd in non-byte operations
++ except x(R2) = x(0) = &TONI and x(PC) = TONI
++ */
++ imm_op = (op2.mode == 1 && op2.reg != 2 && op2.reg != 0);
++
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 4 + ((__is == 4) ? 2 : 0));
++ if (op1.mode == OP_EXP)
++ {
++
++ if (op2.reg) /* Not PC relative. */
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), FALSE, CHECK_RELOC_MSP430X_DST_2ND);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), TRUE, CHECK_RELOC_MSP430X_PCREL_DST_2ND);
++ }
++ else
++ {
++
++ if (op2.reg) /* Not PC relative. */
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), FALSE, CHECK_RELOC_MSP430X_DST);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op2.exp), TRUE, CHECK_RELOC_MSP430X_PCREL_DST);
++ }
++ }
++ }
++ break;
++ case V_RETA:
++ /* reta */
++ if (msp430x_repeats)
++ {
++ as_bad (_("%s instruction is not repeatable"), opcode->name);
++ break;
++ }
++ bin = opcode->bin_opcode; // remove WB/AL bits
++ frag = frag_more (2);
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (2);
++ break;
++ case V_EMU_ADDR: // incda, decda, tsta
++ if (msp430x_repeats)
++ {
++ as_bad (_("%s instruction is not repeatable"), opcode->name);
++ break;
++ }
++ bin = opcode->bin_opcode; // remove WB/AL bits
++ line = extract_operand (line, l1, sizeof (l1));
++ res = msp430_dstoperand (&op1, l1, -(1<<19), (1<<20) );
++ if (res)
++ break;
++
++ if(op1.mode == OP_REG && op1.am == 0)
++ {
++ frag = frag_more(2);
++ bin |= op1.reg;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (2);
++ }
++ else
++ as_bad (_("destination operand address mode not allowed with %s instruction"), opcode->name);
++ break;
++ case V_BRA: // bra, emulated with Address type instruction
++ if (msp430x_repeats)
++ {
++ as_bad (_("%s instruction is not repeatable"), opcode->name);
++ break;
++ }
++
++ bin = opcode->bin_opcode; // remove WB/AL bits
++ line = extract_operand (line, l1, sizeof (l1));
++ res = msp430_srcoperand (&op1, l1, &imm_op, -(1<<19), (1<<20));
++ if (res)
++ break; /* Error in operand. */
++
++ __is = 1 + op1.ol;
++ frag = frag_more(__is * 2);
++ where = frag - frag_now->fr_literal;
++ if (op1.mode == OP_REG && op1.am == 0)
++ {
++ // mova Rsrc, PC
++ bin |= 0x00C0 | op1.reg << 8;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ }
++ else if(op1.mode == OP_REG && op1.am == 2)
++ {
++ // mova @Rsrc, PC
++ bin |= 0x0000 | op1.reg << 8;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ }
++ else if (op1.mode == OP_REG && op1.am == 3)
++ {
++ // mova @Rsrc+, PC
++ bin |= 0x0010 | op1.reg << 8;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ }
++ else if (op1.mode == OP_EXP && op1.am == 1)
++ {
++ if (op1.reg == 2)
++ {
++ // mova &abs20, PC
++ bin |= 0x0020;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_S);
++ }
++ else
++ {
++ // mova z16(Rsrc), PC
++ bin |= 0x0030 | op1.reg << 8;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ if (op1.reg == 0)
++ // mova z16(PC), PC = mova TONI, PC
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), TRUE, BFD_RELOC_MSP430X_PCREL_INDXD);
++ else
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_INDXD);
++ }
++ }
++ else if (op1.mode == OP_EXP && op1.am == 3)
++ {
++ // mova #imm20, Rdst
++ bin |= 0x0080;
++ bfd_putl16 ((bfd_vma) bin, frag);
++ dwarf2_emit_insn (__is * 2);
++ bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
++ fix_new_exp (frag_now, where, 2,
++ &(op1.exp), FALSE, BFD_RELOC_MSP430X_S);
++ }
++ else
++ as_bad (_("source operand address mode not allowed with bra instruction"));
++ }
++ break;
++
+ default:
+ as_bad (_("Illegal instruction or not implemented opcode."));
+ }
+
+- input_line_pointer = line;
++ input_line_pointer = line + 1; // skip trailing zero
+ return 0;
+ }
+
+ void
+ md_assemble (char * str)
+ {
+- struct msp430_opcode_s * opcode;
++ struct msp430_opcode_s const * opcode;
+ char cmd[32];
+ unsigned int i = 0;
+
+@@ -1822,7 +2724,7 @@
+ return;
+ }
+
+- opcode = (struct msp430_opcode_s *) hash_find (msp430_hash, cmd);
++ opcode = (struct msp430_opcode_s const *) hash_find (msp430_hash, cmd);
+
+ if (opcode == NULL)
+ {
+@@ -1830,6 +2732,12 @@
+ return;
+ }
+
++ if (msp430_core(msp430_mcu) < CORE_430X && opcode_format(opcode) >= FMT_X)
++ {
++ as_bad (_("Extended instruction (%s) not allowed with %s mcu"), opcode->name, msp430_mcu->name);
++ return;
++ }
++
+ {
+ char *__t = input_line_pointer;
+
+@@ -1964,6 +2872,26 @@
+
+ switch (fixp->fx_r_type)
+ {
++ case BFD_RELOC_MSP430X_PCREL_D:
++ case BFD_RELOC_MSP430X_PCREL_INDXD:
++ value -= 2; // operand located 2 bytes after opcode
++ break;
++ case BFD_RELOC_MSP430X_PCREL_SRC:
++ case BFD_RELOC_MSP430X_PCREL_SRC_BYTE:
++ case BFD_RELOC_MSP430X_PCREL_DST:
++ case BFD_RELOC_MSP430X_PCREL_DST_BYTE:
++ value -= 4; // operand located 4 bytes after opcode
++ break;
++ case BFD_RELOC_MSP430X_PCREL_DST_2ND:
++ case BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE:
++ value -= 6; // operand located 6 bytes after opcode
++ break;
++ default:
++ break;
++ }
++
++ switch (fixp->fx_r_type)
++ {
+ case BFD_RELOC_MSP430_10_PCREL:
+ if (value & 1)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+@@ -1988,7 +2916,7 @@
+ _("odd address operand: %ld"), value);
+
+ /* Nothing to be corrected here. */
+- if (value < -32768 || value > 65536)
++ if (value < -32768 || value > 65535)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("operand out of range: %ld"), value);
+
+@@ -1998,7 +2926,7 @@
+
+ case BFD_RELOC_MSP430_16_PCREL_BYTE:
+ /* Nothing to be corrected here. */
+- if (value < -32768 || value > 65536)
++ if (value < -32768 || value > 65535)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("operand out of range: %ld"), value);
+
+@@ -2017,6 +2945,76 @@
+ bfd_putl16 ((bfd_vma) value, where);
+ break;
+
++ case BFD_RELOC_MSP430X_SRC:
++ case BFD_RELOC_MSP430X_PCREL_SRC:
++ if (value & 1)
++ as_bad_where (fixp->fx_file, fixp->fx_line,
++ _("odd operand: %ld"), value);
++ case BFD_RELOC_MSP430X_SRC_BYTE:
++ case BFD_RELOC_MSP430X_PCREL_SRC_BYTE:
++ value &= 0xfffff;
++ bfd_putl16 ((bfd_vma)(bfd_getl16 (where) & 0xf87f) | ((value >> 9) & 0x0780), where);
++ /* 16 least-significant bits */
++ bfd_putl16 ((bfd_vma) (value & 0xffff), where + 4);
++ break;
++ case BFD_RELOC_MSP430X_DST:
++ case BFD_RELOC_MSP430X_PCREL_DST:
++ if (value & 1)
++ as_bad_where (fixp->fx_file, fixp->fx_line,
++ _("odd operand: %ld"), value);
++ case BFD_RELOC_MSP430X_DST_BYTE:
++ case BFD_RELOC_MSP430X_PCREL_DST_BYTE:
++ bfd_putl16 ((bfd_vma)(bfd_getl16 (where) & 0xfff0) | ((value >> 16) & 0x000f), where);
++ /* 16 least-significant bits */
++ value &= 0xfffff;
++ bfd_putl16 ((bfd_vma) (value & 0xffff), where + 4);
++ break;
++ case BFD_RELOC_MSP430X_DST_2ND:
++ case BFD_RELOC_MSP430X_PCREL_DST_2ND:
++ if (value & 1)
++ as_bad_where (fixp->fx_file, fixp->fx_line,
++ _("odd operand: %ld"), value);
++ case BFD_RELOC_MSP430X_DST_2ND_BYTE:
++ case BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE:
++ value &= 0xfffff;
++ bfd_putl16 ((bfd_vma)(bfd_getl16 (where) & 0xfff0) | ((value >> 16) & 0x000f), where);
++ /* 16 least-significant bits */
++ bfd_putl16 ((bfd_vma) (value & 0xffff), where + 6);
++ break;
++ case BFD_RELOC_MSP430X_S:
++ if (value & 1)
++ as_bad_where (fixp->fx_file, fixp->fx_line,
++ _("odd operand: %ld"), value);
++ case BFD_RELOC_MSP430X_S_BYTE:
++ value &= 0xfffff;
++ bfd_putl16 ((bfd_vma)(bfd_getl16 (where) & 0xf0ff) | ((value >> 8) & 0x0f00), where);
++ /* 16 least-significant bits */
++ bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
++ break;
++ case BFD_RELOC_MSP430X_D:
++ case BFD_RELOC_MSP430X_PCREL_D:
++ if (value & 1)
++ as_bad_where (fixp->fx_file, fixp->fx_line,
++ _("odd operand: %ld"), value);
++ case BFD_RELOC_MSP430X_D_BYTE:
++ value &= 0xfffff;
++ bfd_putl16 ((bfd_vma)(bfd_getl16 (where) & 0xfff0) | ((value >> 16) & 0x000f), where);
++ /* 16 least-significant bits */
++ bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
++ break;
++ case BFD_RELOC_MSP430X_PCREL_INDXD:
++ if (value & 1)
++ as_bad_where (fixp->fx_file, fixp->fx_line,
++ _("odd operand: %ld"), value);
++ case BFD_RELOC_MSP430X_INDXD:
++ if (value < -32768 || value > 65535)
++ as_bad_where (fixp->fx_file, fixp->fx_line,
++ _("operand out of range: %ld"), value);
++
++ value &= 0xffff; /* Get rid of extended sign. */
++ bfd_putl16 ((bfd_vma) value, where + 2);
++ break;
++
+ default:
+ as_fatal (_("line %d: unknown relocation type: 0x%x"),
+ fixp->fx_line, fixp->fx_r_type);
+diff -urNad msp430-binutils~/include/elf/msp430.h msp430-binutils/include/elf/msp430.h
+--- msp430-binutils~/include/elf/msp430.h 2005-05-10 04:21:10.000000000 -0600
++++ msp430-binutils/include/elf/msp430.h 2010-05-20 10:03:14.000000000 -0600
+@@ -26,20 +26,31 @@
+ /* Processor specific flags for the ELF header e_flags field. */
+ #define EF_MSP430_MACH 0xff
+
+-#define E_MSP430_MACH_MSP430x11 11
+-#define E_MSP430_MACH_MSP430x11x1 110
+-#define E_MSP430_MACH_MSP430x12 12
+-#define E_MSP430_MACH_MSP430x13 13
+-#define E_MSP430_MACH_MSP430x14 14
+-#define E_MSP430_MACH_MSP430x15 15
+-#define E_MSP430_MACH_MSP430x16 16
+-#define E_MSP430_MACH_MSP430x31 31
+-#define E_MSP430_MACH_MSP430x32 32
+-#define E_MSP430_MACH_MSP430x33 33
+-#define E_MSP430_MACH_MSP430x41 41
+-#define E_MSP430_MACH_MSP430x42 42
+-#define E_MSP430_MACH_MSP430x43 43
+-#define E_MSP430_MACH_MSP430x44 44
++#define E_MSP430_MACH_MSP430x11 11
++#define E_MSP430_MACH_MSP430x11x1 110
++#define E_MSP430_MACH_MSP430x12 12
++#define E_MSP430_MACH_MSP430x13 13
++#define E_MSP430_MACH_MSP430x14 14
++#define E_MSP430_MACH_MSP430x15 15
++#define E_MSP430_MACH_MSP430x16 16
++#define E_MSP430_MACH_MSP430x20 20
++#define E_MSP430_MACH_MSP430x21 21
++#define E_MSP430_MACH_MSP430x22 22
++#define E_MSP430_MACH_MSP430x23 23
++#define E_MSP430_MACH_MSP430x24 24
++#define E_MSP430_MACH_MSP430x241 241
++#define E_MSP430_MACH_MSP430x26 26
++#define E_MSP430_MACH_MSP430x31 31
++#define E_MSP430_MACH_MSP430x32 32
++#define E_MSP430_MACH_MSP430x33 33
++#define E_MSP430_MACH_MSP430x41 41
++#define E_MSP430_MACH_MSP430x42 42
++#define E_MSP430_MACH_MSP430x43 43
++#define E_MSP430_MACH_MSP430x44 44
++#define E_MSP430_MACH_MSP430x46 46
++#define E_MSP430_MACH_MSP430x47 47
++#define E_MSP430_MACH_MSP430x471 471
++#define E_MSP430_MACH_MSP430x54 54
+
+ /* Relocations. */
+ START_RELOC_NUMBERS (elf_msp430_reloc_type)
+@@ -52,6 +63,25 @@
+ RELOC_NUMBER (R_MSP430_16_PCREL_BYTE, 6)
+ RELOC_NUMBER (R_MSP430_2X_PCREL, 7)
+ RELOC_NUMBER (R_MSP430_RL_PCREL, 8)
++ RELOC_NUMBER (R_MSP430X_SRC_BYTE, 9)
++ RELOC_NUMBER (R_MSP430X_SRC, 10)
++ RELOC_NUMBER (R_MSP430X_DST_BYTE, 11)
++ RELOC_NUMBER (R_MSP430X_DST, 12)
++ RELOC_NUMBER (R_MSP430X_DST_2ND_BYTE, 13)
++ RELOC_NUMBER (R_MSP430X_DST_2ND, 14)
++ RELOC_NUMBER (R_MSP430X_PCREL_SRC_BYTE, 15)
++ RELOC_NUMBER (R_MSP430X_PCREL_SRC, 16)
++ RELOC_NUMBER (R_MSP430X_PCREL_DST_BYTE, 17)
++ RELOC_NUMBER (R_MSP430X_PCREL_DST, 18)
++ RELOC_NUMBER (R_MSP430X_PCREL_DST_2ND, 19)
++ RELOC_NUMBER (R_MSP430X_PCREL_DST_2ND_BYTE, 20)
++ RELOC_NUMBER (R_MSP430X_S_BYTE, 21)
++ RELOC_NUMBER (R_MSP430X_S, 22)
++ RELOC_NUMBER (R_MSP430X_D_BYTE, 23)
++ RELOC_NUMBER (R_MSP430X_D, 24)
++ RELOC_NUMBER (R_MSP430X_PCREL_D, 25)
++ RELOC_NUMBER (R_MSP430X_INDXD, 26)
++ RELOC_NUMBER (R_MSP430X_PCREL_INDXD, 27)
+
+ END_RELOC_NUMBERS (R_MSP430_max)
+
+diff -urNad msp430-binutils~/include/opcode/msp430.h msp430-binutils/include/opcode/msp430.h
+--- msp430-binutils~/include/opcode/msp430.h 2005-05-10 04:21:13.000000000 -0600
++++ msp430-binutils/include/opcode/msp430.h 2010-05-20 10:03:14.000000000 -0600
+@@ -25,7 +25,7 @@
+ int ol; /* Operand length words. */
+ int am; /* Addr mode. */
+ int reg; /* Register. */
+- int mode; /* Pperand mode. */
++ int mode; /* Operand mode. */
+ #define OP_REG 0
+ #define OP_EXP 1
+ #ifndef DASM_SECTION
+@@ -33,91 +33,240 @@
+ #endif
+ };
+
+-#define BYTE_OPERATION (1 << 6) /* Byte operation flag for all instructions. */
++#define BYTE_OPERATION (1 << 6) /* Byte operation flag for 430 instructions. */
++#define BYTE_OPERATION_X (1 << 22) /* Byte operation flag for 430x instructions. */
++#define NON_ADDR_OPERATION (1 << 6) /* Address operation flag for 430x instructions. */
++
++typedef enum
++{
++ DEFAULT_OP, // instruction has no modifier
++ WORD_OP, // .w
++ BYTE_OP, // .b
++ ADDR_OP // .a
++}
++opwidth_t;
++
++typedef enum
++{
++ CORE_430, // 1xxx, 2xxx, 3xxx, 4xxx
++ CORE_430X, // 241x, 26xx, 46xx
++ CORE_430X2, // 5xxx
++}
++core_t;
++
++typedef enum
++{
++ FMT_EMULATED = 0,
++ FMT_DOUBLE_OPERAND,
++ FMT_SINGLE_OPERAND,
++ FMT_JUMP,
++ FMT_EMULATED_POLYMORPH_JUMP,
++ FMT_EMULATED_LONG_POLYMORPH_JUMP,
++ FMT_X_DOUBLE_OPERAND,
++ FMT_X_SINGLE_OPERAND,
++ FMT_X_EXCEPTION,
++ FMT_X_EMULATED,
++ FMT_X_ADDRESS,
++
++ FMT_X = FMT_X_DOUBLE_OPERAND,
++ FMT_MASK = 0x000f,
++
++ /* allowed modifiers: .b, .w, .a */
++ MOD_NONE = 0,
++ MOD_W = 1 << 4,
++ MOD_B = 1 << 5,
++ MOD_A = 1 << 6,
++ MOD_MASK = 0x0070,
++
++ /* opcode variant */
++ VAR_MASK = 0x0380,
++}
++format_t;
++
++#define OP_V(x) (x << 7)
+
+ struct msp430_opcode_s
+ {
+ char *name;
+- int fmt;
+- int insn_opnumb;
+- int bin_opcode;
+- int bin_mask;
++ format_t fmt;
++ unsigned int insn_opnumb;
++ unsigned int bin_opcode;
++ unsigned int bin_mask;
+ };
+
+-#define MSP_INSN(name, size, numb, bin, mask) { #name, size, numb, bin, mask }
++#define opcode_format(opcode) (opcode->fmt & FMT_MASK)
++#define opcode_modifier(opcode) (opcode->fmt & MOD_MASK)
++#define opcode_variant(opcode) ((opcode->fmt & VAR_MASK) >> 7)
+
+-static struct msp430_opcode_s msp430_opcodes[] =
++/* opcode variants: */
++enum
++{
++ V_NONE = 0, // ordinary instruction
++
++ /* FMT_EMULATED: */
++ V_NOOP, // no operands: set/clear bit instructions, reti
++ V_SHIFT, // shift instructions
++ V_BR, // br instruction
++
++ /* FMT_SINGLE_OPERAND: */
++ V_RETI = 1, // reti
++ V_CALL = 2, // hex operand in disassembly
++
++ /* FMT_X_SINGLE_OPERAND: */
++ // V_NONE - #N operand disallowed
++ V_SWPSXT = 1, // #N operand disallowed, special A/L, B/W bits case with .a modifier
++ V_PUSHX, // #N operand allowed
++
++ /* FMT_X_EXCEPTIONS: */
++ V_CALLA = 0, // calla
++ V_ROTM, // two operands, rotations
++ V_POPM, // two operands, popm
++ V_PUSHM, // two operands, pushm
++
++ /* FMT_X_EMULATED: */
++ // V_NONE - substituted by 430x double operand instruction
++ V_X_SHIFT, // shifts
++ V_RETA, // reta, short instruction, no operands
++ V_EMU_ADDR, // substituted by address instruction other than mova
++ V_BRA, // bra, substituted by mova address instruction == format II exception instruction
++ // clra emulated by msp430 instruction
++
++ /* FMT_X_ADDRESS: */
++ V_MOVA = 1, // mova, more address modes allowed
++};
++
++#define MSP_INSN(name, format, opnumb, bin, mask) { #name, format, opnumb, bin, mask }
++
++static struct msp430_opcode_s const msp430_opcodes[] =
+ {
+- MSP_INSN (and, 1, 2, 0xf000, 0xf000),
+- MSP_INSN (inv, 0, 1, 0xe330, 0xfff0),
+- MSP_INSN (xor, 1, 2, 0xe000, 0xf000),
+- MSP_INSN (setz, 0, 0, 0xd322, 0xffff),
+- MSP_INSN (setc, 0, 0, 0xd312, 0xffff),
+- MSP_INSN (eint, 0, 0, 0xd232, 0xffff),
+- MSP_INSN (setn, 0, 0, 0xd222, 0xffff),
+- MSP_INSN (bis, 1, 2, 0xd000, 0xf000),
+- MSP_INSN (clrz, 0, 0, 0xc322, 0xffff),
+- MSP_INSN (clrc, 0, 0, 0xc312, 0xffff),
+- MSP_INSN (dint, 0, 0, 0xc232, 0xffff),
+- MSP_INSN (clrn, 0, 0, 0xc222, 0xffff),
+- MSP_INSN (bic, 1, 2, 0xc000, 0xf000),
+- MSP_INSN (bit, 1, 2, 0xb000, 0xf000),
+- MSP_INSN (dadc, 0, 1, 0xa300, 0xff30),
+- MSP_INSN (dadd, 1, 2, 0xa000, 0xf000),
+- MSP_INSN (tst, 0, 1, 0x9300, 0xff30),
+- MSP_INSN (cmp, 1, 2, 0x9000, 0xf000),
+- MSP_INSN (decd, 0, 1, 0x8320, 0xff30),
+- MSP_INSN (dec, 0, 1, 0x8310, 0xff30),
+- MSP_INSN (sub, 1, 2, 0x8000, 0xf000),
+- MSP_INSN (sbc, 0, 1, 0x7300, 0xff30),
+- MSP_INSN (subc, 1, 2, 0x7000, 0xf000),
+- MSP_INSN (adc, 0, 1, 0x6300, 0xff30),
+- MSP_INSN (rlc, 0, 2, 0x6000, 0xf000),
+- MSP_INSN (addc, 1, 2, 0x6000, 0xf000),
+- MSP_INSN (incd, 0, 1, 0x5320, 0xff30),
+- MSP_INSN (inc, 0, 1, 0x5310, 0xff30),
+- MSP_INSN (rla, 0, 2, 0x5000, 0xf000),
+- MSP_INSN (add, 1, 2, 0x5000, 0xf000),
+- MSP_INSN (nop, 0, 0, 0x4303, 0xffff),
+- MSP_INSN (clr, 0, 1, 0x4300, 0xff30),
+- MSP_INSN (ret, 0, 0, 0x4130, 0xff30),
+- MSP_INSN (pop, 0, 1, 0x4130, 0xff30),
+- MSP_INSN (br, 0, 3, 0x4000, 0xf000),
+- MSP_INSN (mov, 1, 2, 0x4000, 0xf000),
+- MSP_INSN (jmp, 3, 1, 0x3c00, 0xfc00),
+- MSP_INSN (jl, 3, 1, 0x3800, 0xfc00),
+- MSP_INSN (jge, 3, 1, 0x3400, 0xfc00),
+- MSP_INSN (jn, 3, 1, 0x3000, 0xfc00),
+- MSP_INSN (jc, 3, 1, 0x2c00, 0xfc00),
+- MSP_INSN (jhs, 3, 1, 0x2c00, 0xfc00),
+- MSP_INSN (jnc, 3, 1, 0x2800, 0xfc00),
+- MSP_INSN (jlo, 3, 1, 0x2800, 0xfc00),
+- MSP_INSN (jz, 3, 1, 0x2400, 0xfc00),
+- MSP_INSN (jeq, 3, 1, 0x2400, 0xfc00),
+- MSP_INSN (jnz, 3, 1, 0x2000, 0xfc00),
+- MSP_INSN (jne, 3, 1, 0x2000, 0xfc00),
+- MSP_INSN (reti, 2, 0, 0x1300, 0xffc0),
+- MSP_INSN (call, 2, 1, 0x1280, 0xffc0),
+- MSP_INSN (push, 2, 1, 0x1200, 0xff80),
+- MSP_INSN (sxt, 2, 1, 0x1180, 0xffc0),
+- MSP_INSN (rra, 2, 1, 0x1100, 0xff80),
+- MSP_INSN (swpb, 2, 1, 0x1080, 0xffc0),
+- MSP_INSN (rrc, 2, 1, 0x1000, 0xff80),
++ MSP_INSN (and, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0xf000, 0xfffff000),
++ MSP_INSN (inv, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0xe330, 0xfffffff0),
++ MSP_INSN (xor, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0xe000, 0xfffff000),
++ MSP_INSN (setz, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0xd322, 0xffffffff),
++ MSP_INSN (setc, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0xd312, 0xffffffff),
++ MSP_INSN (eint, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0xd232, 0xffffffff),
++ MSP_INSN (setn, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0xd222, 0xffffffff),
++ MSP_INSN (bis, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0xd000, 0xfffff000),
++ MSP_INSN (clrz, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0xc322, 0xffffffff),
++ MSP_INSN (clrc, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0xc312, 0xffffffff),
++ MSP_INSN (dint, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0xc232, 0xffffffff),
++ MSP_INSN (clrn, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0xc222, 0xffffffff),
++ MSP_INSN (bic, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0xc000, 0xfffff000),
++ MSP_INSN (bit, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0xb000, 0xfffff000),
++ MSP_INSN (dadc, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0xa300, 0xffffff30),
++ MSP_INSN (dadd, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0xa000, 0xfffff000),
++ MSP_INSN (tst, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x9300, 0xffffff30),
++ MSP_INSN (cmp, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0x9000, 0xfffff000),
++ MSP_INSN (decd, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x8320, 0xffffff30),
++ MSP_INSN (dec, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x8310, 0xffffff30),
++ MSP_INSN (sub, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0x8000, 0xfffff000),
++ MSP_INSN (sbc, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x7300, 0xffffff30),
++ MSP_INSN (subc, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0x7000, 0xfffff000),
++ MSP_INSN (adc, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x6300, 0xffffff30),
++ MSP_INSN (rlc, FMT_EMULATED | MOD_W|MOD_B | OP_V(V_SHIFT), 2, 0x6000, 0xfffff000),
++ MSP_INSN (addc, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0x6000, 0xfffff000),
++ MSP_INSN (incd, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x5320, 0xffffff30),
++ MSP_INSN (inc, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x5310, 0xffffff30),
++ MSP_INSN (rla, FMT_EMULATED | MOD_W|MOD_B | OP_V(V_SHIFT), 2, 0x5000, 0xfffff000),
++ MSP_INSN (add, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0x5000, 0xfffff000),
++ MSP_INSN (nop, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0x4303, 0xffffffff),
++ MSP_INSN (clr, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x4300, 0xffffff30),
++ MSP_INSN (clra, FMT_EMULATED | MOD_NONE | OP_V(0), 1, 0x4300, 0xffffff30), // MOV #0, Rdst
++ MSP_INSN (ret, FMT_EMULATED | MOD_NONE | OP_V(V_NOOP), 0, 0x4130, 0xffffffff),
++ MSP_INSN (pop, FMT_EMULATED | MOD_W|MOD_B | OP_V(0), 1, 0x4130, 0xffffff30),
++ MSP_INSN (br, FMT_EMULATED | MOD_NONE | OP_V(V_BR), 1, 0x4000, 0xfffff08f),
++ MSP_INSN (mov, FMT_DOUBLE_OPERAND | MOD_W|MOD_B | OP_V(0), 2, 0x4000, 0xfffff000),
++
++ MSP_INSN (jmp, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x3c00, 0xfffffc00),
++ MSP_INSN (jl, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x3800, 0xfffffc00),
++ MSP_INSN (jge, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x3400, 0xfffffc00),
++ MSP_INSN (jn, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x3000, 0xfffffc00),
++ MSP_INSN (jc, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x2c00, 0xfffffc00),
++ MSP_INSN (jhs, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x2c00, 0xfffffc00),
++ MSP_INSN (jnc, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x2800, 0xfffffc00),
++ MSP_INSN (jlo, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x2800, 0xfffffc00),
++ MSP_INSN (jz, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x2400, 0xfffffc00),
++ MSP_INSN (jeq, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x2400, 0xfffffc00),
++ MSP_INSN (jnz, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x2000, 0xfffffc00),
++ MSP_INSN (jne, FMT_JUMP | MOD_NONE | OP_V(0), 1, 0x2000, 0xfffffc00),
++
++ MSP_INSN (reti, FMT_SINGLE_OPERAND | MOD_NONE | OP_V(V_RETI), 0, 0x1300, 0xffffffc0),
++ MSP_INSN (call, FMT_SINGLE_OPERAND | MOD_NONE | OP_V(V_CALL), 1, 0x1280, 0xffffffc0),
++ MSP_INSN (push, FMT_SINGLE_OPERAND | MOD_W|MOD_B | OP_V(0), 1, 0x1200, 0xffffff80),
++ MSP_INSN (sxt, FMT_SINGLE_OPERAND | MOD_NONE | OP_V(0), 1, 0x1180, 0xffffffc0),
++ MSP_INSN (rra, FMT_SINGLE_OPERAND | MOD_W|MOD_B | OP_V(0), 1, 0x1100, 0xffffff80),
++ MSP_INSN (swpb, FMT_SINGLE_OPERAND | MOD_NONE | OP_V(0), 1, 0x1080, 0xffffffc0),
++ MSP_INSN (rrc, FMT_SINGLE_OPERAND | MOD_W|MOD_B | OP_V(0), 1, 0x1000, 0xffffff80),
++
++
++ /* emulated instructions placed just before instruction emulated by for disassembly search */
++ MSP_INSN (popx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x41301800, 0xff30f800), // MOVX @SP+, dst
++ MSP_INSN (clrx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x43001800, 0xff30f800), // MOVX #0, dst
++ MSP_INSN (movx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0x40001800, 0xf000f800),
++ MSP_INSN (incx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x53101800, 0xff30f800), // ADDX #1, dst
++ MSP_INSN (incdx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x53201800, 0xff30f800), // ADDX #2, dst
++ MSP_INSN (rlax, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(V_X_SHIFT), 1, 0x50001800, 0xf000f800), // ADDX dst, dst
++ MSP_INSN (addx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0x50001800, 0xf000f800),
++ MSP_INSN (adcx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x63001800, 0xff30f800), // ADDCX #0, dst
++ MSP_INSN (rlcx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(V_X_SHIFT), 1, 0x60001800, 0xf000f800), // ADDCX dst, dst
++ MSP_INSN (addcx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0x60001800, 0xf000f800),
++ MSP_INSN (sbcx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x73001800, 0xff30f800), // SUBCX #0, dst
++ MSP_INSN (subcx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0x70001800, 0xf000f800),
++ MSP_INSN (decx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x83101800, 0xff30f800), // SUBX #1, dst
++ MSP_INSN (decdx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x83201800, 0xff30f800), // SUBX #2, dst
++ MSP_INSN (subx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0x80001800, 0xf000f800),
++ MSP_INSN (tstx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x93001800, 0xff30f800), // CMPX #0, dst
++ MSP_INSN (cmpx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0x90001800, 0xf000f800),
++ MSP_INSN (dadcx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0xa3001800, 0xff30f800), // DADDX #0, dst
++ MSP_INSN (daddx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0xa0001800, 0xf000f800),
++ MSP_INSN (bitx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0xb0001800, 0xf000f800),
++ MSP_INSN (bicx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0xc0001800, 0xf000f800),
++ MSP_INSN (bisx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0xd0001800, 0xf000f800),
++ MSP_INSN (invx, FMT_X_EMULATED | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0xe3301800, 0xff30f800), // XORX #-1, dst
++ MSP_INSN (xorx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0xe0001800, 0xf000f800),
++ MSP_INSN (andx, FMT_X_DOUBLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 2, 0xf0001800, 0xf000f800),
++
++ MSP_INSN (rrcx, FMT_X_SINGLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x10001800, 0xff80f800),
++ MSP_INSN (swpbx, FMT_X_SINGLE_OPERAND | MOD_W|MOD_A | OP_V(V_SWPSXT), 1, 0x10801800, 0xffc0f800),
++ MSP_INSN (rrax, FMT_X_SINGLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(0), 1, 0x11001800, 0xff80f800),
++ MSP_INSN (sxtx, FMT_X_SINGLE_OPERAND | MOD_W|MOD_A | OP_V(V_SWPSXT), 1, 0x11801800, 0xffc0f800),
++ MSP_INSN (pushx, FMT_X_SINGLE_OPERAND | MOD_W|MOD_B|MOD_A | OP_V(V_PUSHX), 1, 0x12001800, 0xff80f800),
++
++ MSP_INSN (calla, FMT_X_EXCEPTION | MOD_NONE | OP_V(V_CALLA), 1, 0x1300, 0xffffff00),
++ MSP_INSN (pushm, FMT_X_EXCEPTION | MOD_W|MOD_A | OP_V(V_PUSHM), 2, 0x1400, 0xfffffe00),
++ MSP_INSN (popm, FMT_X_EXCEPTION | MOD_W|MOD_A | OP_V(V_POPM), 2, 0x1600, 0xfffffe00),
++ MSP_INSN (rrcm, FMT_X_EXCEPTION | MOD_W|MOD_A | OP_V(V_ROTM), 2, 0x0040, 0xfffff3e0),
++ MSP_INSN (rram, FMT_X_EXCEPTION | MOD_W|MOD_A | OP_V(V_ROTM), 2, 0x0140, 0xfffff3e0),
++ MSP_INSN (rlam, FMT_X_EXCEPTION | MOD_W|MOD_A | OP_V(V_ROTM), 2, 0x0240, 0xfffff3e0),
++ MSP_INSN (rrum, FMT_X_EXCEPTION | MOD_W|MOD_A | OP_V(V_ROTM), 2, 0x0340, 0xfffff3e0),
++
++ /* Address. */
++ MSP_INSN (incda, FMT_X_EMULATED | MOD_NONE | OP_V(V_EMU_ADDR), 1, 0x03e0, 0xfffffff0), // ADDA #2, Rdst = ADDA R3, Rdst
++ MSP_INSN (adda, FMT_X_ADDRESS | MOD_NONE | OP_V(0), 2, 0x00a0, 0xfffff0b0),
++ MSP_INSN (tsta, FMT_X_EMULATED | MOD_NONE | OP_V(V_EMU_ADDR), 1, 0x03d0, 0xfffffff0), // CMPA #0, Rdst = CMPA R3, Rdst
++ MSP_INSN (cmpa, FMT_X_ADDRESS | MOD_NONE | OP_V(0), 2, 0x0090, 0xfffff0b0),
++ MSP_INSN (decda, FMT_X_EMULATED | MOD_NONE | OP_V(V_EMU_ADDR), 1, 0x03f0, 0xfffffff0), // SUBA #2, Rdst = SUBA R3, Rdst
++ MSP_INSN (suba, FMT_X_ADDRESS | MOD_NONE | OP_V(0), 2, 0x00b0, 0xfffff0b0),
++ MSP_INSN (reta, FMT_X_EMULATED | MOD_NONE | OP_V(V_RETA), 0, 0x0110, 0xffffffff), // MOVA @SP+, PC
++ MSP_INSN (bra, FMT_X_EMULATED | MOD_NONE | OP_V(V_BRA), 1, 0x0000, 0xfffff0cf), // MOVA dst, PC
++ MSP_INSN (bra, FMT_X_EMULATED | MOD_NONE | OP_V(V_BRA), 1, 0x0080, 0xfffff0bf), // MOVA #imm20, PC; MOVA Rsrc, Rdst
++ MSP_INSN (mova, FMT_X_ADDRESS | MOD_NONE | OP_V(V_MOVA), 1, 0x0000, 0xfffff000),
++
+ /* Simple polymorphs. */
+- MSP_INSN (beq, 4, 0, 0, 0xffff),
+- MSP_INSN (bne, 4, 1, 0, 0xffff),
+- MSP_INSN (blt, 4, 2, 0, 0xffff),
+- MSP_INSN (bltu, 4, 3, 0, 0xffff),
+- MSP_INSN (bge, 4, 4, 0, 0xffff),
+- MSP_INSN (bgeu, 4, 5, 0, 0xffff),
+- MSP_INSN (bltn, 4, 6, 0, 0xffff),
+- MSP_INSN (jump, 4, 7, 0, 0xffff),
+- /* Long polymorphs. */
+- MSP_INSN (bgt, 5, 0, 0, 0xffff),
+- MSP_INSN (bgtu, 5, 1, 0, 0xffff),
+- MSP_INSN (bleu, 5, 2, 0, 0xffff),
+- MSP_INSN (ble, 5, 3, 0, 0xffff),
++ MSP_INSN (beq, FMT_EMULATED_POLYMORPH_JUMP | MOD_NONE | OP_V(0), 1, 0, 0xffff),
++ MSP_INSN (bne, FMT_EMULATED_POLYMORPH_JUMP | MOD_NONE | OP_V(1), 1, 0, 0xffff),
++ MSP_INSN (blt, FMT_EMULATED_POLYMORPH_JUMP | MOD_NONE | OP_V(2), 1, 0, 0xffff),
++ MSP_INSN (bltu, FMT_EMULATED_POLYMORPH_JUMP | MOD_NONE | OP_V(3), 1, 0, 0xffff),
++ MSP_INSN (bge, FMT_EMULATED_POLYMORPH_JUMP | MOD_NONE | OP_V(4), 1, 0, 0xffff),
++ MSP_INSN (bgeu, FMT_EMULATED_POLYMORPH_JUMP | MOD_NONE | OP_V(5), 1, 0, 0xffff),
++ MSP_INSN (bltn, FMT_EMULATED_POLYMORPH_JUMP | MOD_NONE | OP_V(6), 1, 0, 0xffff),
++ MSP_INSN (jump, FMT_EMULATED_POLYMORPH_JUMP | MOD_NONE | OP_V(7), 1, 0, 0xffff),
+
++ /* Long polymorphs. */
++ MSP_INSN (bgt, FMT_EMULATED_LONG_POLYMORPH_JUMP | MOD_NONE | OP_V(0), 1, 0, 0xffff),
++ MSP_INSN (bgtu, FMT_EMULATED_LONG_POLYMORPH_JUMP | MOD_NONE | OP_V(1), 1, 0, 0xffff),
++ MSP_INSN (bleu, FMT_EMULATED_LONG_POLYMORPH_JUMP | MOD_NONE | OP_V(2), 1, 0, 0xffff),
++ MSP_INSN (ble, FMT_EMULATED_LONG_POLYMORPH_JUMP | MOD_NONE | OP_V(3), 1, 0, 0xffff),
+ /* End of instruction set. */
+ { NULL, 0, 0, 0, 0 }
+ };
+diff -urNad msp430-binutils~/ld/Makefile.am msp430-binutils/ld/Makefile.am
+--- msp430-binutils~/ld/Makefile.am 2010-05-20 09:48:01.000000000 -0600
++++ msp430-binutils/ld/Makefile.am 2010-05-20 10:03:14.000000000 -0600
+@@ -311,6 +311,9 @@
+ emsp430x147.o \
+ emsp430x148.o \
+ emsp430x149.o \
++ emsp430x1471.o \
++ emsp430x1481.o \
++ emsp430x1491.o \
+ emsp430x155.o \
+ emsp430x156.o \
+ emsp430x157.o \
+@@ -320,10 +323,45 @@
+ emsp430x1610.o \
+ emsp430x1611.o \
+ emsp430x1612.o \
++ emsp430x2001.o \
++ emsp430x2011.o \
++ emsp430x2002.o \
++ emsp430x2012.o \
++ emsp430x2003.o \
++ emsp430x2014.o \
+ emsp430x2101.o \
+ emsp430x2111.o \
++ emsp430x2112.o \
+ emsp430x2121.o \
++ emsp430x2122.o \
+ emsp430x2131.o \
++ emsp430x2132.o \
++ emsp430x2232.o \
++ emsp430x2234.o \
++ emsp430x2252.o \
++ emsp430x2254.o \
++ emsp430x2272.o \
++ emsp430x2274.o \
++ emsp430x233.o \
++ emsp430x235.o \
++ emsp430x2330.o \
++ emsp430x2350.o \
++ emsp430x2370.o \
++ emsp430x247.o \
++ emsp430x248.o \
++ emsp430x249.o \
++ emsp430x2410.o \
++ emsp430x2471.o \
++ emsp430x2481.o \
++ emsp430x2491.o \
++ emsp430x2416.o \
++ emsp430x2417.o \
++ emsp430x2418.o \
++ emsp430x2419.o \
++ emsp430x2616.o \
++ emsp430x2617.o \
++ emsp430x2618.o \
++ emsp430x2619.o \
+ emsp430x311.o \
+ emsp430x312.o \
+ emsp430x313.o \
+@@ -337,21 +375,67 @@
+ emsp430x413.o \
+ emsp430x415.o \
+ emsp430x417.o \
++ emsp430x423.o \
++ emsp430x425.o \
++ emsp430x427.o \
++ emsp430x4250.o \
++ emsp430x4260.o \
++ emsp430x4270.o \
+ emsp430xE423.o \
+ emsp430xE425.o \
+ emsp430xE427.o \
++ emsp430xE4232.o \
++ emsp430xE4242.o \
++ emsp430xE4252.o \
++ emsp430xE4272.o \
+ emsp430xW423.o \
+ emsp430xW425.o \
+ emsp430xW427.o \
++ emsp430xG4250.o \
++ emsp430xG4260.o \
++ emsp430xG4270.o \
+ emsp430xG437.o \
+ emsp430xG438.o \
+ emsp430xG439.o \
+ emsp430x435.o \
+ emsp430x436.o \
+ emsp430x437.o \
++ emsp430x4351.o \
++ emsp430x4361.o \
++ emsp430x4371.o \
+ emsp430x447.o \
+ emsp430x448.o \
+ emsp430x449.o \
++ emsp430xG4616.o \
++ emsp430xG4617.o \
++ emsp430xG4618.o \
++ emsp430xG4619.o \
++ emsp430x4783.o \
++ emsp430x4784.o \
++ emsp430x4793.o \
++ emsp430x4794.o \
++ emsp430x47166.o \
++ emsp430x47176.o \
++ emsp430x47186.o \
++ emsp430x47196.o \
++ emsp430x47167.o \
++ emsp430x47177.o \
++ emsp430x47187.o \
++ emsp430x47197.o \
++ emsp430x5418.o \
++ emsp430x5419.o \
++ emsp430x5435.o \
++ emsp430x5436.o \
++ emsp430x5437.o \
++ emsp430x5438.o \
++ ecc430x5123.o \
++ ecc430x5125.o \
++ ecc430x6125.o \
++ ecc430x6135.o \
++ ecc430x6126.o \
++ ecc430x5137.o \
++ ecc430x6127.o \
++ ecc430x6137.o \
+ enews.o \
+ ens32knbsd.o \
+ eor32.o \
+@@ -1447,6 +1531,18 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x149 "$(tdir_msp430x149)" msp430all
++emsp430x1471.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x1471 "$(tdir_msp430x1471)" msp430all
++emsp430x1481.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x1481 "$(tdir_msp430x1481)" msp430all
++emsp430x1491.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x1491 "$(tdir_msp430x1491)" msp430all
+ emsp430x155.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -1483,6 +1579,30 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x1612 "$(tdir_msp430x1612)" msp430all
++emsp430x2001.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2001 "$(tdir_msp430x2001)" msp430all
++emsp430x2011.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2011 "$(tdir_msp430x2011)" msp430all
++emsp430x2002.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2002 "$(tdir_msp430x2002)" msp430all
++emsp430x2012.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2012 "$(tdir_msp430x2012)" msp430all
++emsp430x2003.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2003 "$(tdir_msp430x2003)" msp430all
++emsp430x2013.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2013 "$(tdir_msp430x2013)" msp430all
+ emsp430x2101.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -1491,14 +1611,130 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x2111 "$(tdir_msp430x2111)" msp430all
++emsp430x2112.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2112 "$(tdir_msp430x2112)" msp430all
+ emsp430x2121.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x2121 "$(tdir_msp430x2121)" msp430all
++emsp430x2122.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2122 "$(tdir_msp430x2122)" msp430all
+ emsp430x2131.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x2131 "$(tdir_msp430x2131)" msp430all
++emsp430x2132.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2132 "$(tdir_msp430x2132)" msp430all
++emsp430x2232.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2232 "$(tdir_msp430x2232)" msp430all
++emsp430x2234.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2234 "$(tdir_msp430x2234)" msp430all
++emsp430x2252.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2252 "$(tdir_msp430x2252)" msp430all
++emsp430x2254.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2254 "$(tdir_msp430x2254)" msp430all
++emsp430x2272.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2272 "$(tdir_msp430x2272)" msp430all
++emsp430x2274.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2274 "$(tdir_msp430x2274)" msp430all
++emsp430x233.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x233 "$(tdir_msp430x233)" msp430all
++emsp430x235.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x235 "$(tdir_msp430x235)" msp430all
++emsp430x2330.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2330 "$(tdir_msp430x2330)" msp430all
++emsp430x2350.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2350 "$(tdir_msp430x2350)" msp430all
++emsp430x2370.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2370 "$(tdir_msp430x2370)" msp430all
++emsp430x247.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x247 "$(tdir_msp430x247)" msp430all
++emsp430x248.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x248 "$(tdir_msp430x248)" msp430all
++emsp430x249.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x249 "$(tdir_msp430x249)" msp430all
++emsp430x2410.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2410 "$(tdir_msp430x2410)" msp430all
++emsp430x2471.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2471 "$(tdir_msp430x2471)" msp430all
++emsp430x2481.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2481 "$(tdir_msp430x2481)" msp430all
++emsp430x2491.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2491 "$(tdir_msp430x2491)" msp430all
++emsp430x2416.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2416 "$(tdir_msp430x2416)" msp430all
++emsp430x2417.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2417 "$(tdir_msp430x2417)" msp430all
++emsp430x2418.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2418 "$(tdir_msp430x2418)" msp430all
++emsp430x2419.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2419 "$(tdir_msp430x2419)" msp430all
++emsp430x2616.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2616 "$(tdir_msp430x2616)" msp430all
++emsp430x2617.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2617 "$(tdir_msp430x2617)" msp430all
++emsp430x2618.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2618 "$(tdir_msp430x2618)" msp430all
++emsp430x2619.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2619 "$(tdir_msp430x2619)" msp430all
+ emsp430x311.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430_3.sc \
+ ${GEN_DEPENDS}
+@@ -1551,6 +1787,46 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x417 "$(tdir_msp430x417)" msp430all
++emsp430x423.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x423 "$(tdir_msp430x423)" msp430all
++emsp430x425.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x425 "$(tdir_msp430x425)" msp430all
++emsp430x427.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x427 "$(tdir_msp430x427)" msp430all
++emsp430x4250.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4250 "$(tdir_msp430x4250)" msp430all
++emsp430x4260.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4260 "$(tdir_msp430x4260)" msp430all
++emsp430x4270.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4270 "$(tdir_msp430x4270)" msp430all
++emsp430xE4232.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xE4232 "$(tdir_msp430xE4232)" msp430all
++emsp430xE4242.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xE4242 "$(tdir_msp430xE4242)" msp430all
++emsp430xE4252.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xE4252 "$(tdir_msp430xE4252)" msp430all
++emsp430xE4272.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xE4272 "$(tdir_msp430xE4272)" msp430all
+ emsp430xE423.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -1575,6 +1851,18 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430xW427 "$(tdir_msp430xW427)" msp430all
++emsp430xG4250.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4250 "$(tdir_msp430xG4250)" msp430all
++emsp430xG4260.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4260 "$(tdir_msp430xG4260)" msp430all
++emsp430xG4270.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4270 "$(tdir_msp430xG4270)" msp430all
+ emsp430xG437.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -1599,6 +1887,18 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x437 "$(tdir_msp430x437)" msp430all
++emsp430x4351.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4351 "$(tdir_msp430x4351)" msp430all
++emsp430x4361.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4361 "$(tdir_msp430x4361)" msp430all
++emsp430x4371.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4371 "$(tdir_msp430x4371)" msp430all
+ emsp430x447.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -1611,6 +1911,126 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x449 "$(tdir_msp430x449)" msp430all
++emsp430xG4616.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4616 "$(tdir_msp430xG4616)" msp430all
++emsp430xG4617.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4617 "$(tdir_msp430xG4617)" msp430all
++emsp430xG4618.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4618 "$(tdir_msp430xG4618)" msp430all
++emsp430xG4619.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4619 "$(tdir_msp430xG4619)" msp430all
++emsp430x4783.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4783 "$(tdir_msp430x4783)" msp430all
++emsp430x4784.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4784 "$(tdir_msp430x4784)" msp430all
++emsp430x4793.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4793 "$(tdir_msp430x4793)" msp430all
++emsp430x4794.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4794 "$(tdir_msp430x4794)" msp430all
++emsp430x47166.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47166 "$(tdir_msp430x47166)" msp430all
++emsp430x47176.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47176 "$(tdir_msp430x47176)" msp430all
++emsp430x47186.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47186 "$(tdir_msp430x47186)" msp430all
++emsp430x47196.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47196 "$(tdir_msp430x47196)" msp430all
++emsp430x47167.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47167 "$(tdir_msp430x47167)" msp430all
++emsp430x47177.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47177 "$(tdir_msp430x47177)" msp430all
++emsp430x47187.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47187 "$(tdir_msp430x47187)" msp430all
++emsp430x47197.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47197 "$(tdir_msp430x47197)" msp430all
++emsp430x5418.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5418 "$(tdir_msp430x5418)" msp430all
++emsp430x5419.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5419 "$(tdir_msp430x5419)" msp430all
++emsp430x5435.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5435 "$(tdir_msp430x5435)" msp430all
++emsp430x5436.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5436 "$(tdir_msp430x5436)" msp430all
++emsp430x5437.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5437 "$(tdir_msp430x5437)" msp430all
++emsp430x5438.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5438 "$(tdir_msp430x5438)" msp430all
++ecc430x5123.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x5123 "$(tdir_cc430x5123)" msp430all
++ecc430x5125.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x5125 "$(tdir_cc430x5125)" msp430all
++ecc430x6125.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6125 "$(tdir_cc430x6125)" msp430all
++ecc430x6135.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6135 "$(tdir_cc430x6135)" msp430all
++ecc430x6126.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6126 "$(tdir_cc430x6126)" msp430all
++ecc430x5137.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x5137 "$(tdir_cc430x5137)" msp430all
++ecc430x6127.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6127 "$(tdir_cc430x6127)" msp430all
++ecc430x6137.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6137 "$(tdir_cc430x6137)" msp430all
+ enews.c: $(srcdir)/emulparams/news.sh \
+ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} news "$(tdir_news)"
+diff -urNad msp430-binutils~/ld/Makefile.in msp430-binutils/ld/Makefile.in
+--- msp430-binutils~/ld/Makefile.in 2010-05-20 09:48:01.000000000 -0600
++++ msp430-binutils/ld/Makefile.in 2010-05-20 10:03:14.000000000 -0600
+@@ -597,6 +597,9 @@
+ emsp430x147.o \
+ emsp430x148.o \
+ emsp430x149.o \
++ emsp430x1471.o \
++ emsp430x1481.o \
++ emsp430x1491.o \
+ emsp430x155.o \
+ emsp430x156.o \
+ emsp430x157.o \
+@@ -606,10 +609,45 @@
+ emsp430x1610.o \
+ emsp430x1611.o \
+ emsp430x1612.o \
++ emsp430x2001.o \
++ emsp430x2011.o \
++ emsp430x2002.o \
++ emsp430x2012.o \
++ emsp430x2003.o \
++ emsp430x2014.o \
+ emsp430x2101.o \
+ emsp430x2111.o \
++ emsp430x2112.o \
+ emsp430x2121.o \
++ emsp430x2122.o \
+ emsp430x2131.o \
++ emsp430x2132.o \
++ emsp430x2232.o \
++ emsp430x2234.o \
++ emsp430x2252.o \
++ emsp430x2254.o \
++ emsp430x2272.o \
++ emsp430x2274.o \
++ emsp430x233.o \
++ emsp430x235.o \
++ emsp430x2330.o \
++ emsp430x2350.o \
++ emsp430x2370.o \
++ emsp430x247.o \
++ emsp430x248.o \
++ emsp430x249.o \
++ emsp430x2410.o \
++ emsp430x2471.o \
++ emsp430x2481.o \
++ emsp430x2491.o \
++ emsp430x2416.o \
++ emsp430x2417.o \
++ emsp430x2418.o \
++ emsp430x2419.o \
++ emsp430x2616.o \
++ emsp430x2617.o \
++ emsp430x2618.o \
++ emsp430x2619.o \
+ emsp430x311.o \
+ emsp430x312.o \
+ emsp430x313.o \
+@@ -623,21 +661,67 @@
+ emsp430x413.o \
+ emsp430x415.o \
+ emsp430x417.o \
++ emsp430x423.o \
++ emsp430x425.o \
++ emsp430x427.o \
++ emsp430x4250.o \
++ emsp430x4260.o \
++ emsp430x4270.o \
+ emsp430xE423.o \
+ emsp430xE425.o \
+ emsp430xE427.o \
++ emsp430xE4232.o \
++ emsp430xE4242.o \
++ emsp430xE4252.o \
++ emsp430xE4272.o \
+ emsp430xW423.o \
+ emsp430xW425.o \
+ emsp430xW427.o \
++ emsp430xG4250.o \
++ emsp430xG4260.o \
++ emsp430xG4270.o \
+ emsp430xG437.o \
+ emsp430xG438.o \
+ emsp430xG439.o \
+ emsp430x435.o \
+ emsp430x436.o \
+ emsp430x437.o \
++ emsp430x4351.o \
++ emsp430x4361.o \
++ emsp430x4371.o \
+ emsp430x447.o \
+ emsp430x448.o \
+ emsp430x449.o \
++ emsp430xG4616.o \
++ emsp430xG4617.o \
++ emsp430xG4618.o \
++ emsp430xG4619.o \
++ emsp430x4783.o \
++ emsp430x4784.o \
++ emsp430x4793.o \
++ emsp430x4794.o \
++ emsp430x47166.o \
++ emsp430x47176.o \
++ emsp430x47186.o \
++ emsp430x47196.o \
++ emsp430x47167.o \
++ emsp430x47177.o \
++ emsp430x47187.o \
++ emsp430x47197.o \
++ emsp430x5418.o \
++ emsp430x5419.o \
++ emsp430x5435.o \
++ emsp430x5436.o \
++ emsp430x5437.o \
++ emsp430x5438.o \
++ ecc430x5123.o \
++ ecc430x5125.o \
++ ecc430x6125.o \
++ ecc430x6135.o \
++ ecc430x6126.o \
++ ecc430x5137.o \
++ ecc430x6127.o \
++ ecc430x6137.o \
+ enews.o \
+ ens32knbsd.o \
+ eor32.o \
+@@ -2788,6 +2872,18 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x149 "$(tdir_msp430x149)" msp430all
++emsp430x1471.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x1471 "$(tdir_msp430x1471)" msp430all
++emsp430x1481.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x1481 "$(tdir_msp430x1481)" msp430all
++emsp430x1491.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x1491 "$(tdir_msp430x1491)" msp430all
+ emsp430x155.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -2824,6 +2920,30 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x1612 "$(tdir_msp430x1612)" msp430all
++emsp430x2001.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2001 "$(tdir_msp430x2001)" msp430all
++emsp430x2011.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2011 "$(tdir_msp430x2011)" msp430all
++emsp430x2002.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2002 "$(tdir_msp430x2002)" msp430all
++emsp430x2012.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2012 "$(tdir_msp430x2012)" msp430all
++emsp430x2003.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2003 "$(tdir_msp430x2003)" msp430all
++emsp430x2013.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2013 "$(tdir_msp430x2013)" msp430all
+ emsp430x2101.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -2832,14 +2952,130 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x2111 "$(tdir_msp430x2111)" msp430all
++emsp430x2112.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2112 "$(tdir_msp430x2112)" msp430all
+ emsp430x2121.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x2121 "$(tdir_msp430x2121)" msp430all
++emsp430x2122.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2122 "$(tdir_msp430x2122)" msp430all
+ emsp430x2131.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x2131 "$(tdir_msp430x2131)" msp430all
++emsp430x2132.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2132 "$(tdir_msp430x2132)" msp430all
++emsp430x2232.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2232 "$(tdir_msp430x2232)" msp430all
++emsp430x2234.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2234 "$(tdir_msp430x2234)" msp430all
++emsp430x2252.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2252 "$(tdir_msp430x2252)" msp430all
++emsp430x2254.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2254 "$(tdir_msp430x2254)" msp430all
++emsp430x2272.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2272 "$(tdir_msp430x2272)" msp430all
++emsp430x2274.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2274 "$(tdir_msp430x2274)" msp430all
++emsp430x233.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x233 "$(tdir_msp430x233)" msp430all
++emsp430x235.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x235 "$(tdir_msp430x235)" msp430all
++emsp430x2330.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2330 "$(tdir_msp430x2330)" msp430all
++emsp430x2350.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2350 "$(tdir_msp430x2350)" msp430all
++emsp430x2370.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2370 "$(tdir_msp430x2370)" msp430all
++emsp430x247.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x247 "$(tdir_msp430x247)" msp430all
++emsp430x248.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x248 "$(tdir_msp430x248)" msp430all
++emsp430x249.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x249 "$(tdir_msp430x249)" msp430all
++emsp430x2410.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2410 "$(tdir_msp430x2410)" msp430all
++emsp430x2471.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2471 "$(tdir_msp430x2471)" msp430all
++emsp430x2481.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2481 "$(tdir_msp430x2481)" msp430all
++emsp430x2491.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2491 "$(tdir_msp430x2491)" msp430all
++emsp430x2416.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2416 "$(tdir_msp430x2416)" msp430all
++emsp430x2417.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2417 "$(tdir_msp430x2417)" msp430all
++emsp430x2418.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2418 "$(tdir_msp430x2418)" msp430all
++emsp430x2419.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2419 "$(tdir_msp430x2419)" msp430all
++emsp430x2616.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2616 "$(tdir_msp430x2616)" msp430all
++emsp430x2617.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2617 "$(tdir_msp430x2617)" msp430all
++emsp430x2618.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2618 "$(tdir_msp430x2618)" msp430all
++emsp430x2619.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x2619 "$(tdir_msp430x2619)" msp430all
+ emsp430x311.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430_3.sc \
+ ${GEN_DEPENDS}
+@@ -2892,6 +3128,46 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x417 "$(tdir_msp430x417)" msp430all
++emsp430x423.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x423 "$(tdir_msp430x423)" msp430all
++emsp430x425.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x425 "$(tdir_msp430x425)" msp430all
++emsp430x427.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x427 "$(tdir_msp430x427)" msp430all
++emsp430x4250.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4250 "$(tdir_msp430x4250)" msp430all
++emsp430x4260.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4260 "$(tdir_msp430x4260)" msp430all
++emsp430x4270.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4270 "$(tdir_msp430x4270)" msp430all
++emsp430xE4232.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xE4232 "$(tdir_msp430xE4232)" msp430all
++emsp430xE4242.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xE4242 "$(tdir_msp430xE4242)" msp430all
++emsp430xE4252.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xE4252 "$(tdir_msp430xE4252)" msp430all
++emsp430xE4272.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xE4272 "$(tdir_msp430xE4272)" msp430all
+ emsp430xE423.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -2916,6 +3192,18 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430xW427 "$(tdir_msp430xW427)" msp430all
++emsp430xG4250.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4250 "$(tdir_msp430xG4250)" msp430all
++emsp430xG4260.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4260 "$(tdir_msp430xG4260)" msp430all
++emsp430xG4270.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4270 "$(tdir_msp430xG4270)" msp430all
+ emsp430xG437.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -2940,6 +3228,18 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x437 "$(tdir_msp430x437)" msp430all
++emsp430x4351.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4351 "$(tdir_msp430x4351)" msp430all
++emsp430x4361.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4361 "$(tdir_msp430x4361)" msp430all
++emsp430x4371.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4371 "$(tdir_msp430x4371)" msp430all
+ emsp430x447.c: $(srcdir)/emulparams/msp430all.sh \
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+@@ -2952,6 +3252,126 @@
+ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
+ ${GEN_DEPENDS}
+ ${GENSCRIPTS} msp430x449 "$(tdir_msp430x449)" msp430all
++emsp430xG4616.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4616 "$(tdir_msp430xG4616)" msp430all
++emsp430xG4617.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4617 "$(tdir_msp430xG4617)" msp430all
++emsp430xG4618.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4618 "$(tdir_msp430xG4618)" msp430all
++emsp430xG4619.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430xG4619 "$(tdir_msp430xG4619)" msp430all
++emsp430x4783.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4783 "$(tdir_msp430x4783)" msp430all
++emsp430x4784.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4784 "$(tdir_msp430x4784)" msp430all
++emsp430x4793.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4793 "$(tdir_msp430x4793)" msp430all
++emsp430x4794.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x4794 "$(tdir_msp430x4794)" msp430all
++emsp430x5418.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5418 "$(tdir_msp430x5418)" msp430all
++emsp430x47166.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47166 "$(tdir_msp430x47166)" msp430all
++emsp430x47176.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47176 "$(tdir_msp430x47176)" msp430all
++emsp430x47186.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47186 "$(tdir_msp430x47186)" msp430all
++emsp430x47196.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47196 "$(tdir_msp430x47196)" msp430all
++emsp430x47167.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47167 "$(tdir_msp430x47167)" msp430all
++emsp430x47177.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47177 "$(tdir_msp430x47177)" msp430all
++emsp430x47187.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47187 "$(tdir_msp430x47187)" msp430all
++emsp430x47197.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x47197 "$(tdir_msp430x47197)" msp430all
++emsp430x5419.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5419 "$(tdir_msp430x5419)" msp430all
++emsp430x5435.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5435 "$(tdir_msp430x5435)" msp430all
++emsp430x5436.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5436 "$(tdir_msp430x5436)" msp430all
++emsp430x5437.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5437 "$(tdir_msp430x5437)" msp430all
++emsp430x5438.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} msp430x5438 "$(tdir_msp430x5438)" msp430all
++ecc430x5123.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x5123 "$(tdir_cc430x5123)" msp430all
++ecc430x5125.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x5125 "$(tdir_cc430x5125)" msp430all
++ecc430x6125.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6125 "$(tdir_cc430x6125)" msp430all
++ecc430x6135.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6135 "$(tdir_cc430x6135)" msp430all
++ecc430x6126.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6126 "$(tdir_cc430x6126)" msp430all
++ecc430x5137.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x5137 "$(tdir_cc430x5137)" msp430all
++ecc430x6127.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6127 "$(tdir_cc430x6127)" msp430all
++ecc430x6137.c: $(srcdir)/emulparams/msp430all.sh \
++ $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
++ ${GEN_DEPENDS}
++ ${GENSCRIPTS} cc430x6137 "$(tdir_cc430x6137)" msp430all
+ enews.c: $(srcdir)/emulparams/news.sh \
+ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} news "$(tdir_news)"
+diff -urNad msp430-binutils~/ld/configure.tgt msp430-binutils/ld/configure.tgt
+--- msp430-binutils~/ld/configure.tgt 2010-05-20 09:48:01.000000000 -0600
++++ msp430-binutils/ld/configure.tgt 2010-05-20 10:03:14.000000000 -0600
+@@ -426,7 +426,7 @@
+ mt-*elf) targ_emul=elf32mt
+ ;;
+ msp430-*-*) targ_emul=msp430x110
+- targ_extra_emuls="msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x2101 msp430x2111 msp430x2121 msp430x2131 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430xE423 msp430xE425 msp430xE427 msp430xW423 msp430xW425 msp430xW427 msp430xG437 msp430xG438 msp430xG439 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449"
++ targ_extra_emuls="msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x1471 msp430x1481 msp430x1491 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x2001 msp430x2011 msp430x2002 msp430x2012 msp430x2003 msp430x2013 msp430x2101 msp430x2111 msp430x2112 msp430x2121 msp430x2122 msp430x2131 msp430x2132 msp430x2232 msp430x2234 msp430x2252 msp430x2254 msp430x2272 msp430x2274 msp430x233 msp430x235 msp430x2330 msp430x2350 msp430x2370 msp430x247 msp430x248 msp430x249 msp430x2410 msp430x2471 msp430x2481 msp430x2491 msp430x2416 msp430x2417 msp430x2418 msp430x2419 msp430x2616 msp430x2617 msp430x2618 msp430x2619 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430x423 msp430x425 msp430x427 msp430x4250 msp430x4260 msp430x4270 msp430xE423 msp430xE425 msp430xE427 msp430xE4232 msp430xE4242 msp430xE4252 msp430xE4272 msp430xW423 msp430xW425 msp430xW427 msp430xG4250 msp430xG4260 msp430xG4270 msp430xG437 msp430xG438 msp430xG439 msp430x435 msp430x436 msp430x437 msp430x4351 msp430x4361 msp430x4371 msp430x447 msp430x448 msp430x449 msp430xG4616 msp430xG4617 msp430xG4618 msp430xG4619 msp430x4783 msp430x4784 msp430x4793 msp430x4794 msp430x47166 msp430x47176 msp430x47186 msp430x47196 msp430x47167 msp430x47177 msp430x47187 msp430x47197 msp430x5418 msp430x5419 msp430x5435 msp430x5436 msp430x5437 msp430x5438 cc430x5123 cc430x5125 cc430x6125 cc430x6135 cc430x6126 cc430x5137 cc430x6127 cc430x6137"
+ ;;
+ ns32k-pc532-mach* | ns32k-pc532-ux*) targ_emul=pc532macha ;;
+ ns32k-*-netbsd* | ns32k-pc532-lites*) targ_emul=ns32knbsd
+diff -urNad msp430-binutils~/ld/emulparams/msp430all.sh msp430-binutils/ld/emulparams/msp430all.sh
+--- msp430-binutils~/ld/emulparams/msp430all.sh 2006-06-19 20:22:14.000000000 -0600
++++ msp430-binutils/ld/emulparams/msp430all.sh 2010-05-20 10:03:14.000000000 -0600
+@@ -18,7 +18,7 @@
+ ROM_SIZE=0x3e0
+ RAM_START=0x0200
+ RAM_SIZE=128
+-STACK=0x280
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x1101" ] ; then
+@@ -27,7 +27,7 @@
+ ROM_SIZE=0x3e0
+ RAM_START=0x0200
+ RAM_SIZE=128
+-STACK=0x280
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x1111" ] ; then
+@@ -36,7 +36,7 @@
+ ROM_SIZE=0x07e0
+ RAM_START=0x0200
+ RAM_SIZE=128
+-STACK=0x280
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x112" ] ; then
+@@ -45,25 +45,16 @@
+ ROM_SIZE=0xfe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
+-fi
+-
+-if [ "${MSP430_NAME}" = "msp430x1121" ] ; then
+-ARCH=msp:110
+-ROM_START=0xf000
+-ROM_SIZE=0x0fe0
+-RAM_START=0x0200
+-RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x1122" ] ; then
++if [ "${MSP430_NAME}" = "msp430x1121" -o "${MSP430_NAME}" = "msp430x1122" ] ; then
+ ARCH=msp:110
+ ROM_START=0xf000
+ ROM_SIZE=0x0fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x1132" ] ; then
+@@ -72,106 +63,70 @@
+ ROM_SIZE=0x1fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
+-fi
+-
+-if [ "${MSP430_NAME}" = "msp430x122" ] ; then
+-ARCH=msp:12
+-ROM_START=0xf000
+-ROM_SIZE=0xfe0
+-RAM_START=0x0200
+-RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x1222" ] ; then
++if [ "${MSP430_NAME}" = "msp430x122" -o "${MSP430_NAME}" = "msp430x1222" ] ; then
+ ARCH=msp:12
+ ROM_START=0xf000
+ ROM_SIZE=0xfe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
+-fi
+-
+-if [ "${MSP430_NAME}" = "msp430x123" ] ; then
+-ARCH=msp:12
+-ROM_START=0xe000
+-ROM_SIZE=0x1fe0
+-RAM_START=0x0200
+-RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x1232" ] ; then
++if [ "${MSP430_NAME}" = "msp430x123" -o "${MSP430_NAME}" = "msp430x1232" ] ; then
+ ARCH=msp:12
+ ROM_START=0xe000
+ ROM_SIZE=0x1fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
+-fi
+-
+-if [ "${MSP430_NAME}" = "msp430x133" ] ; then
+-ARCH=msp:13
+-ROM_START=0xe000
+-ROM_SIZE=0x1fe0
+-RAM_START=0x0200
+-RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x1331" ] ; then
++if [ "${MSP430_NAME}" = "msp430x133" -o "${MSP430_NAME}" = "msp430x1331" ] ; then
+ ARCH=msp:13
+ ROM_START=0xe000
+ ROM_SIZE=0x1fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
+-fi
+-
+-if [ "${MSP430_NAME}" = "msp430x135" ] ; then
+-ARCH=msp:13
+-ROM_START=0xc000
+-ROM_SIZE=0x3fe0
+-RAM_START=0x0200
+-RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x1351" ] ; then
++if [ "${MSP430_NAME}" = "msp430x135" -o "${MSP430_NAME}" = "msp430x1351" ] ; then
+ ARCH=msp:13
+ ROM_START=0xc000
+ ROM_SIZE=0x3fe0
+ RAM_START=0x0200
+ RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x147" ] ; then
++if [ "${MSP430_NAME}" = "msp430x147" -o "${MSP430_NAME}" = "msp430x1471" ] ; then
+ ARCH=msp:14
+ ROM_START=0x8000
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
+-RAM_SIZE=1K
+-STACK=0x600
++RAM_SIZE=1024
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x148" ] ; then
++if [ "${MSP430_NAME}" = "msp430x148" -o "${MSP430_NAME}" = "msp430x1481" ] ; then
+ ARCH=msp:14
+ ROM_START=0x4000
+ ROM_SIZE=0xbfe0
+ RAM_START=0x0200
+-RAM_SIZE=0x0800
+-STACK=0xa00
++RAM_SIZE=2048
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x149" ] ; then
++if [ "${MSP430_NAME}" = "msp430x149" -o "${MSP430_NAME}" = "msp430x1491" ] ; then
+ ARCH=msp:14
+ ROM_START=0x1100
+ ROM_SIZE=0xeee0
+ RAM_START=0x0200
+-RAM_SIZE=0x0800
+-STACK=0xa00
++RAM_SIZE=2048
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x155" ] ; then
+@@ -180,7 +135,7 @@
+ ROM_SIZE=0x3fe0
+ RAM_START=0x0200
+ RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x156" ] ; then
+@@ -189,7 +144,7 @@
+ ROM_SIZE=0x5fe0
+ RAM_START=0x0200
+ RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x157" ] ; then
+@@ -197,8 +152,8 @@
+ ROM_START=0x8000
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
+-RAM_SIZE=1K
+-STACK=0x600
++RAM_SIZE=1024
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x167" ] ; then
+@@ -206,8 +161,8 @@
+ ROM_START=0x8000
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
+-RAM_SIZE=1K
+-STACK=0x600
++RAM_SIZE=1024
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x168" ] ; then
+@@ -215,8 +170,8 @@
+ ROM_START=0x4000
+ ROM_SIZE=0xbfe0
+ RAM_START=0x0200
+-RAM_SIZE=0x0800
+-STACK=0xa00
++RAM_SIZE=2048
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x169" ] ; then
+@@ -224,8 +179,8 @@
+ ROM_START=0x1100
+ ROM_SIZE=0xeee0
+ RAM_START=0x0200
+-RAM_SIZE=0x0800
+-STACK=0xa00
++RAM_SIZE=2048
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x1610" ] ; then
+@@ -234,7 +189,7 @@
+ ROM_SIZE=0x7fe0
+ RAM_START=0x1100
+ RAM_SIZE=0x1400
+-STACK=0x2500
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x1611" ] ; then
+@@ -243,7 +198,7 @@
+ ROM_SIZE=0xbfe0
+ RAM_START=0x1100
+ RAM_SIZE=0x2800
+-STACK=0x3900
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x1612" ] ; then
+@@ -252,7 +207,25 @@
+ ROM_SIZE=0xdae0
+ RAM_START=0x1100
+ RAM_SIZE=0x1400
+-STACK=0x2500
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2001" -o "${MSP430_NAME}" = "msp430x2002" -o "${MSP430_NAME}" = "msp430x2003" ] ; then
++ARCH=msp:20
++ROM_START=0xFC00
++ROM_SIZE=0x03e0
++RAM_START=0x0200
++RAM_SIZE=128
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2011" -o "${MSP430_NAME}" = "msp430x2012" -o "${MSP430_NAME}" = "msp430x2013" ] ; then
++ARCH=msp:20
++ROM_START=0xF800
++ROM_SIZE=0x07e0
++RAM_START=0x0200
++RAM_SIZE=128
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x2101" ] ; then
+@@ -261,34 +234,210 @@
+ ROM_SIZE=0x03e0
+ RAM_START=0x0200
+ RAM_SIZE=128
+-STACK=0x280
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x2111" ] ; then
++if [ "${MSP430_NAME}" = "msp430x2111" -o "${MSP430_NAME}" = "msp430x2112" ] ; then
+ ARCH=msp:21
+ ROM_START=0xF800
+ ROM_SIZE=0x07e0
+ RAM_START=0x0200
+ RAM_SIZE=128
+-STACK=0x280
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x2121" ] ; then
++if [ "${MSP430_NAME}" = "msp430x2121" -o "${MSP430_NAME}" = "msp430x2122" ] ; then
+ ARCH=msp:21
+ ROM_START=0xf000
+ ROM_SIZE=0x0fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x2131" ] ; then
++if [ "${MSP430_NAME}" = "msp430x2131" -o "${MSP430_NAME}" = "msp430x2132" ] ; then
+ ARCH=msp:21
+ ROM_START=0xe000
+ ROM_SIZE=0x1fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2232" -o "${MSP430_NAME}" = "msp430x2234" ] ; then
++ARCH=msp:22
++ROM_START=0xe000
++ROM_SIZE=0x1fe0
++RAM_START=0x0200
++RAM_SIZE=512
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2252" -o "${MSP430_NAME}" = "msp430x2254" ] ; then
++ARCH=msp:22
++ROM_START=0xc000
++ROM_SIZE=0x3fe0
++RAM_START=0x0200
++RAM_SIZE=512
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2272" -o "${MSP430_NAME}" = "msp430x2274" ] ; then
++ARCH=msp:22
++ROM_START=0x8000
++ROM_SIZE=0x7fe0
++RAM_START=0x0200
++RAM_SIZE=1024
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x233" ] ; then
++ARCH=msp:24
++ROM_START=0xe000
++ROM_SIZE=0x1fe0
++RAM_START=0x0200
++RAM_SIZE=0x0400
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x235" ] ; then
++ARCH=msp:24
++ROM_START=0xc000
++ROM_SIZE=0x3fe0
++RAM_START=0x0200
++RAM_SIZE=2048
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2330" ] ; then
++ARCH=msp:23
++ROM_START=0xe000
++ROM_SIZE=0x1fe0
++RAM_START=0x0200
++RAM_SIZE=0x0400
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2350" ] ; then
++ARCH=msp:23
++ROM_START=0xc000
++ROM_SIZE=0x3fe0
++RAM_START=0x0200
++RAM_SIZE=2048
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2370" ] ; then
++ARCH=msp:23
++ROM_START=0x8000
++ROM_SIZE=0x7fe0
++RAM_START=0x0200
++RAM_SIZE=2048
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x247" -o "${MSP430_NAME}" = "msp430x2471" ] ; then
++ARCH=msp:24
++ROM_START=0x8000
++ROM_SIZE=0x7fe0
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x248" -o "${MSP430_NAME}" = "msp430x2481" ] ; then
++ARCH=msp:24
++ROM_START=0x4000
++ROM_SIZE=0xbfe0
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x249" -o "${MSP430_NAME}" = "msp430x2491" ] ; then
++ARCH=msp:24
++ROM_START=0x1100
++ROM_SIZE=0xeee0
++RAM_START=0x0200
++RAM_SIZE=2048
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2410" ] ; then
++ARCH=msp:24
++ROM_START=0x2100
++ROM_SIZE=0xdee0
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2416" -o "${MSP430_NAME}" = "msp430x2616" ] ; then
++if [ "${MSP430_NAME}" = "msp430x2416" ] ; then
++ARCH=msp:241
++else
++ARCH=msp:26
++fi
++ROM_START=0x2100
++ROM_SIZE=0x16f00
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2417" -o "${MSP430_NAME}" = "msp430x2617" ] ; then
++if [ "${MSP430_NAME}" = "msp430x2417" ] ; then
++ARCH=msp:241
++else
++ARCH=msp:26
++fi
++ROM_START=0x3100
++ROM_SIZE=0x16f00
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=8192
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2418" -o "${MSP430_NAME}" = "msp430x2618" ] ; then
++if [ "${MSP430_NAME}" = "msp430x2418" ] ; then
++ARCH=msp:241
++else
++ARCH=msp:26
++fi
++ROM_START=0x3100
++ROM_SIZE=0x1cf00
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=8192
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x2419" -o "${MSP430_NAME}" = "msp430x2619" ] ; then
++if [ "${MSP430_NAME}" = "msp430x2419" ] ; then
++ARCH=msp:241
++else
++ARCH=msp:26
++fi
++ROM_START=0x2100
++ROM_SIZE=0x1df00
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffc0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x311" ] ; then
+@@ -298,7 +447,7 @@
+ ROM_SIZE=0x07e0
+ RAM_START=0x0200
+ RAM_SIZE=128
+-STACK=0x280
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x312" ] ; then
+@@ -308,7 +457,7 @@
+ ROM_SIZE=0x0fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x313" ] ; then
+@@ -318,7 +467,7 @@
+ ROM_SIZE=0x1fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x314" ] ; then
+@@ -328,7 +477,7 @@
+ ROM_SIZE=0x2fe0
+ RAM_START=0x0200
+ RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x315" ] ; then
+@@ -338,7 +487,7 @@
+ ROM_SIZE=0x3fe0
+ RAM_START=0x0200
+ RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x323" ] ; then
+@@ -348,7 +497,7 @@
+ ROM_SIZE=0x1fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x325" ] ; then
+@@ -358,7 +507,7 @@
+ ROM_SIZE=0x3fe0
+ RAM_START=0x0200
+ RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x336" ] ; then
+@@ -368,7 +517,7 @@
+ ROM_SIZE=0x5fe0
+ RAM_START=0x0200
+ RAM_SIZE=1024
+-STACK=0x600
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x337" ] ; then
+@@ -378,7 +527,7 @@
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
+ RAM_SIZE=1024
+-STACK=0x600
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x412" ] ; then
+@@ -387,7 +536,7 @@
+ ROM_SIZE=0x0fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x413" ] ; then
+@@ -396,7 +545,7 @@
+ ROM_SIZE=0x1fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x415" ] ; then
+@@ -405,7 +554,7 @@
+ ROM_SIZE=0x3fe0
+ RAM_START=0x0200
+ RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x417" ] ; then
+@@ -414,34 +563,79 @@
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
+ RAM_SIZE=1024
+-STACK=0x600
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x435" ] ; then
++if [ "${MSP430_NAME}" = "msp430x423" ] ; then
++ARCH=msp:42
++ROM_START=0xe000
++ROM_SIZE=0x1fe0
++RAM_START=0x0200
++RAM_SIZE=256
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x425" -o "${MSP430_NAME}" = "msp430x4250" ] ; then
++ARCH=msp:42
++ROM_START=0xc000
++ROM_SIZE=0x3fe0
++RAM_START=0x0200
++if [ "${MSP430_NAME}" = "msp430x4250" ] ; then
++RAM_SIZE=256
++else
++RAM_SIZE=512
++fi
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x4260" ] ; then
++ARCH=msp:42
++ROM_START=0xa000
++ROM_SIZE=0x5fe0
++RAM_START=0x0200
++RAM_SIZE=256
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x427" -o "${MSP430_NAME}" = "msp430x4270" ] ; then
++ARCH=msp:42
++ROM_START=0x8000
++ROM_SIZE=0x7fe0
++RAM_START=0x0200
++if [ "${MSP430_NAME}" = "msp430x4270" ] ; then
++RAM_SIZE=256
++else
++RAM_SIZE=1024
++fi
++VECTORS_START=0xffe0
++fi
++
++
++if [ "${MSP430_NAME}" = "msp430x435" -o "${MSP430_NAME}" = "msp430x4351" ] ; then
+ ARCH=msp:43
+ ROM_START=0xc000
+ ROM_SIZE=0x3fe0
+ RAM_START=0x0200
+ RAM_SIZE=512
+-STACK=0x400
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x436" ] ; then
++if [ "${MSP430_NAME}" = "msp430x436" -o "${MSP430_NAME}" = "msp430x4361" ] ; then
+ ARCH=msp:43
+ ROM_START=0xa000
+ ROM_SIZE=0x5fe0
+ RAM_START=0x0200
+ RAM_SIZE=1024
+-STACK=0x600
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430x437" ] ; then
++if [ "${MSP430_NAME}" = "msp430x437" -o "${MSP430_NAME}" = "msp430x4371" ] ; then
+ ARCH=msp:43
+ ROM_START=0x8000
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
+ RAM_SIZE=1024
+-STACK=0x600
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x447" ] ; then
+@@ -450,7 +644,7 @@
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
+ RAM_SIZE=1024
+-STACK=0x600
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x448" ] ; then
+@@ -458,8 +652,8 @@
+ ROM_START=0x4000
+ ROM_SIZE=0xbfe0
+ RAM_START=0x0200
+-RAM_SIZE=0x0800
+-STACK=0xa00
++RAM_SIZE=2048
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430x449" ] ; then
+@@ -467,36 +661,69 @@
+ ROM_START=0x1100
+ ROM_SIZE=0xeee0
+ RAM_START=0x0200
+-RAM_SIZE=0x0800
+-STACK=0xa00
++RAM_SIZE=2048
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430xE423" ] ; then
++if [ "${MSP430_NAME}" = "msp430xE423" -o "${MSP430_NAME}" = "msp430xW423" \
++ -o "${MSP430_NAME}" = "msp430xE4232" \
++ ] ; then
+ ARCH=msp:42
+ ROM_START=0xe000
+ ROM_SIZE=0x1fe0
+ RAM_START=0x0200
+ RAM_SIZE=256
+-STACK=0x300
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430xE425" ] ; then
++if [ "${MSP430_NAME}" = "msp430xE4242" ] ; then
++ARCH=msp:42
++ROM_START=0xd000
++ROM_SIZE=0x2fe0
++RAM_START=0x0200
++RAM_SIZE=512
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430xE425" -o "${MSP430_NAME}" = "msp430xW425" \
++ -o "${MSP430_NAME}" = "msp430xG4250" -o "${MSP430_NAME}" = "msp430xE4252" \
++ ] ; then
+ ARCH=msp:42
+ ROM_START=0xc000
+ ROM_SIZE=0x3fe0
+ RAM_START=0x0200
++if [ "${MSP430_NAME}" = "msp430xG4250" ] ; then
++RAM_SIZE=256
++else
+ RAM_SIZE=512
+-STACK=0x400
++fi
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430xE427" ] ; then
++if [ "${MSP430_NAME}" = "msp430xG4260" ] ; then
++ARCH=msp:42
++ROM_START=0xa000
++ROM_SIZE=0x5fe0
++RAM_START=0x0200
++RAM_SIZE=256
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430xE427" -o "${MSP430_NAME}" = "msp430xW427" \
++ -o "${MSP430_NAME}" = "msp430xG4270" -o "${MSP430_NAME}" = "msp430xE4272" \
++ ] ; then
+ ARCH=msp:42
+ ROM_START=0x8000
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
++if [ "${MSP430_NAME}" = "msp430xG4270" ] ; then
++RAM_SIZE=256
++else
+ RAM_SIZE=1024
+-STACK=0x600
+ fi
++VECTORS_START=0xffe0
++fi
++
+
+ if [ "${MSP430_NAME}" = "msp430xG437" ] ; then
+ ARCH=msp:43
+@@ -504,7 +731,7 @@
+ ROM_SIZE=0x7fe0
+ RAM_START=0x0200
+ RAM_SIZE=1024
+-STACK=0x600
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430xG438" ] ; then
+@@ -512,8 +739,8 @@
+ ROM_START=0x4000
+ ROM_SIZE=0xbef0
+ RAM_START=0x0200
+-RAM_SIZE=0x0800
+-STACK=0xa00
++RAM_SIZE=2048
++VECTORS_START=0xffe0
+ fi
+
+ if [ "${MSP430_NAME}" = "msp430xG439" ] ; then
+@@ -521,33 +748,222 @@
+ ROM_START=0x1100
+ ROM_SIZE=0xeee0
+ RAM_START=0x0200
+-RAM_SIZE=0x0800
+-STACK=0xa00
++RAM_SIZE=2048
++VECTORS_START=0xffe0
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430xW423" ] ; then
+-ARCH=msp:42
++if [ "${MSP430_NAME}" = "msp430xG4616" ] ; then
++ARCH=msp:46
++ROM_START=0x2100
++ROM_SIZE=0x17000
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430xG4617" ] ; then
++ARCH=msp:46
++ROM_START=0x3100
++ROM_SIZE=0x17000
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=8192
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430xG4618" ] ; then
++ARCH=msp:46
++ROM_START=0x3100
++ROM_SIZE=0x1D000
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=8192
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430xG4619" ] ; then
++ARCH=msp:46
++ROM_START=0x2100
++ROM_SIZE=0x1E000
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x4783" -o "${MSP430_NAME}" = "msp430x4784" ] ; then
++ARCH=msp:47
++ROM_START=0x4000
++ROM_SIZE=0xbfe0
++RAM_START=0x200
++RAM_SIZE=2048
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x4793" -o "${MSP430_NAME}" = "msp430x4794" ] ; then
++ARCH=msp:47
++ROM_START=0x1100
++ROM_SIZE=0xeee0
++RAM_START=0x200
++RAM_SIZE=2560
++VECTORS_START=0xffe0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x47166" -o "${MSP430_NAME}" = "msp430x47167" ] ; then
++ARCH=msp:471
++ROM_START=0x2100
++ROM_SIZE=0x16f00
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x47176" -o "${MSP430_NAME}" = "msp430x47177" ] ; then
++ARCH=msp:471
++ROM_START=0x3100
++ROM_SIZE=0x16f00
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=8192
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x47186" -o "${MSP430_NAME}" = "msp430x47187" ] ; then
++ARCH=msp:471
++ROM_START=0x3100
++ROM_SIZE=0x1cf00
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=8192
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x47196" -o "${MSP430_NAME}" = "msp430x47197" ] ; then
++ARCH=msp:471
++ROM_START=0x2100
++ROM_SIZE=0x1df00
++INFO_START=0x1000
++INFO_SIZE=256
++BOOT_START=0x0c00
++BOOT_SIZE=1024
++RAM_START=0x1100
++RAM_SIZE=4096
++VECTORS_START=0xffc0
++fi
++
++if [ "${MSP430_NAME}" = "msp430x5418" -o "${MSP430_NAME}" = "msp430x5419" ] ; then
++ARCH=msp:54
++ROM_START=0x5c00
++ROM_SIZE=0x20000
++INFO_START=0x1800
++INFO_SIZE=512
++BOOT_START=0x1000
++BOOT_SIZE=2048
++RAM_START=0x1c00
++RAM_SIZE=16384
++VECTORS_START=0xff80
++fi
++
++if [ "${MSP430_NAME}" = "msp430x5435" -o "${MSP430_NAME}" = "msp430x5436" ] ; then
++ARCH=msp:54
++ROM_START=0x5c00
++ROM_SIZE=0x30000
++INFO_START=0x1800
++INFO_SIZE=512
++BOOT_START=0x1000
++BOOT_SIZE=2048
++RAM_START=0x1c00
++RAM_SIZE=16384
++VECTORS_START=0xff80
++fi
++
++if [ "${MSP430_NAME}" = "msp430x5437" -o "${MSP430_NAME}" = "msp430x5438" ] ; then
++ARCH=msp:54
++ROM_START=0x5c00
++ROM_SIZE=0x40000
++INFO_START=0x1800
++INFO_SIZE=512
++BOOT_START=0x1000
++BOOT_SIZE=2048
++RAM_START=0x1c00
++RAM_SIZE=16384
++VECTORS_START=0xff80
++fi
++
++if [ "${MSP430_NAME}" = "cc430x5123" ] ; then
++ARCH=msp:54
+ ROM_START=0xe000
+-ROM_SIZE=0x1fe0
+-RAM_START=0x0200
+-RAM_SIZE=256
+-STACK=0x300
++ROM_SIZE=0x2000
++INFO_START=0x1800
++INFO_SIZE=512
++BOOT_START=0x1000
++BOOT_SIZE=2048
++RAM_START=0x1c00
++RAM_SIZE=2048
++VECTORS_START=0xff80
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430xW425" ] ; then
+-ARCH=msp:42
++if [ "${MSP430_NAME}" = "cc430x5125" -o "${MSP430_NAME}" = "cc430x6125" -o "${MSP430_NAME}" = "cc430x6135" ] ; then
++ARCH=msp:54
+ ROM_START=0xc000
+-ROM_SIZE=0x3fe0
+-RAM_START=0x0200
+-RAM_SIZE=512
+-STACK=0x400
++ROM_SIZE=0x4000
++INFO_START=0x1800
++INFO_SIZE=512
++BOOT_START=0x1000
++BOOT_SIZE=2048
++RAM_START=0x1c00
++RAM_SIZE=2048
++VECTORS_START=0xff80
+ fi
+
+-if [ "${MSP430_NAME}" = "msp430xW427" ] ; then
+-ARCH=msp:42
++if [ "${MSP430_NAME}" = "cc430x6126" ] ; then
++ARCH=msp:54
+ ROM_START=0x8000
+-ROM_SIZE=0x7fe0
+-RAM_START=0x0200
+-RAM_SIZE=0x400
+-STACK=0x600
++ROM_SIZE=0x8000
++INFO_START=0x1800
++INFO_SIZE=512
++BOOT_START=0x1000
++BOOT_SIZE=2048
++RAM_START=0x1c00
++RAM_SIZE=2048
++VECTORS_START=0xff80
+ fi
++
++if [ "${MSP430_NAME}" = "cc430x5137" -o "${MSP430_NAME}" = "cc430x6127" -o "${MSP430_NAME}" = "cc430x6137" ] ; then
++ARCH=msp:54
++ROM_START=0x8000
++ROM_SIZE=0x8000
++INFO_START=0x1800
++INFO_SIZE=512
++BOOT_START=0x1000
++BOOT_SIZE=2048
++RAM_START=0x1c00
++RAM_SIZE=4096
++VECTORS_START=0xff80
++fi
++
++STACK=$(printf "0x%x" $(( RAM_START + RAM_SIZE )) )
++VECTORS_SIZE=$((0x10000 - VECTORS_START))
+diff -urNad msp430-binutils~/ld/scripttempl/elf32msp430.sc msp430-binutils/ld/scripttempl/elf32msp430.sc
+--- msp430-binutils~/ld/scripttempl/elf32msp430.sc 2009-10-09 07:12:35.000000000 -0600
++++ msp430-binutils/ld/scripttempl/elf32msp430.sc 2010-05-20 10:03:14.000000000 -0600
+@@ -14,9 +14,32 @@
+ ${RELOCATING+ PROVIDE (__heap_bottom = .) ; }
+ ${RELOCATING+ PROVIDE (__heap_top = ${HEAP_START} + ${HEAP_LENGTH}) ; }
+ } ${RELOCATING+ > heap}"
+-HEAP_MEMORY_MSP430="heap(rwx) : ORIGIN = $HEAP_START, LENGTH = $HEAP_LENGTH"
++HEAP_MEMORY_MSP430="heap(rwx) : ORIGIN = $HEAP_START, LENGTH = $HEAP_LENGTH"
+ fi
+
++ROM_END=$(( $ROM_START + $ROM_SIZE ))
++if [ $ROM_END -gt 65536 ]
++then
++NEAR_ROM_SIZE=$(printf "0x%x" $(( $VECTORS_START - $ROM_START )) )
++FAR_ROM_SIZE=$(printf "0x%x" $(( $ROM_START + $ROM_SIZE - 0x10000 )) )
++
++TEXT_REGION_MSP430="text (rx) : ORIGIN = $ROM_START, LENGTH = $NEAR_ROM_SIZE
++ fartext(rx) : ORIGIN = 0x10000, LENGTH = $FAR_ROM_SIZE"
++
++FARTEXT_SECTION_MSP430="/* Extended address space, accessed with extended instructions. */
++ .fartext :
++ {
++ ${RELOCATING+. = ALIGN(2);}
++ *(.fartext)
++ ${RELOCATING+. = ALIGN(2);}
++ *(.fartext.*)
++
++ _efartext = .;
++ } ${RELOCATING+ > fartext}"
++else
++TEXT_REGION_MSP430="text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE"
++FARTEXT_SECTION_MSP430=""
++fi
+
+ cat <<EOF
+ OUTPUT_FORMAT("${OUTPUT_FORMAT}","${OUTPUT_FORMAT}","${OUTPUT_FORMAT}")
+@@ -24,12 +47,12 @@
+
+ MEMORY
+ {
+- text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
+- data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
+- vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20
+- bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K
+- infomem(rx) : ORIGIN = 0x1000, LENGTH = 256
+- infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256
++ ${TEXT_REGION_MSP430}
++ data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
++ vectors (rw) : ORIGIN = $VECTORS_START, LENGTH = $VECTORS_SIZE
++ bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K
++ infomem(rx) : ORIGIN = 0x1000, LENGTH = 256
++ infomemnobits(rx) : ORIGIN = 0x1000, LENGTH = 256
+ ${HEAP_MEMORY_MSP430}
+ }
+
+@@ -100,22 +123,35 @@
+ {
+ ${RELOCATING+. = ALIGN(2);}
+ *(.init)
+- *(.init0) /* Start here after reset. */
+- *(.init1)
+- *(.init2) /* Copy data loop */
+- *(.init3)
+- *(.init4) /* Clear bss */
+- *(.init5)
+- *(.init6) /* C++ constructors. */
+- *(.init7)
+- *(.init8)
+- *(.init9) /* Call main(). */
++ KEEP(*(.init))
++ *(.init0) /* Start here after reset. */
++ KEEP(*(.init0))
++ *(.init1) /* User definable. */
++ KEEP(*(.init1))
++ *(.init2) /* Initialize stack. */
++ KEEP(*(.init2))
++ *(.init3) /* Initialize hardware, user definable. */
++ KEEP(*(.init3))
++ *(.init4) /* Copy data to .data, clear bss. */
++ KEEP(*(.init4))
++ *(.init5) /* User definable. */
++ KEEP(*(.init5))
++ *(.init6) /* C++ constructors. */
++ KEEP(*(.init6))
++ *(.init7) /* User definable. */
++ KEEP(*(.init7))
++ *(.init8) /* User definable. */
++ KEEP(*(.init8))
++ *(.init9) /* Call main(). */
++ KEEP(*(.init9))
+
+ ${CONSTRUCTING+ __ctors_start = . ; }
+ ${CONSTRUCTING+ *(.ctors) }
++ ${CONSTRUCTING+ KEEP(*(.ctors)) }
+ ${CONSTRUCTING+ __ctors_end = . ; }
+ ${CONSTRUCTING+ __dtors_start = . ; }
+ ${CONSTRUCTING+ *(.dtors) }
++ ${CONSTRUCTING+ KEEP(*(.dtors)) }
+ ${CONSTRUCTING+ __dtors_end = . ; }
+
+ ${RELOCATING+. = ALIGN(2);}
+@@ -124,31 +160,45 @@
+ *(.text.*)
+
+ ${RELOCATING+. = ALIGN(2);}
+- *(.fini9) /* */
+- *(.fini8)
+- *(.fini7)
+- *(.fini6) /* C++ destructors. */
+- *(.fini5)
+- *(.fini4)
+- *(.fini3)
+- *(.fini2)
+- *(.fini1)
++ *(.fini9) /* Jumps here after main(). User definable. */
++ KEEP(*(.fini9))
++ *(.fini8) /* User definable. */
++ KEEP(*(.fini8))
++ *(.fini7) /* User definable. */
++ KEEP(*(.fini7))
++ *(.fini6) /* C++ destructors. */
++ KEEP(*(.fini6))
++ *(.fini5) /* User definable. */
++ KEEP(*(.fini5))
++ *(.fini4) /* User definable. */
++ KEEP(*(.fini4))
++ *(.fini3) /* User definable. */
++ KEEP(*(.fini3))
++ *(.fini2) /* User definable. */
++ KEEP(*(.fini2))
++ *(.fini1) /* User definable. */
++ KEEP(*(.fini1))
+ *(.fini0) /* Infinite loop after program termination. */
++ KEEP(*(.fini0))
+ *(.fini)
++ KEEP(*(.fini))
+
+ _etext = .;
+ } ${RELOCATING+ > text}
+
+- .data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))}
++ .data ${RELOCATING-0} :
+ {
+ ${RELOCATING+ PROVIDE (__data_start = .) ; }
+ ${RELOCATING+. = ALIGN(2);}
+ *(.data)
++ *(SORT_BY_ALIGNMENT(.data.*))
+ ${RELOCATING+. = ALIGN(2);}
+ *(.gnu.linkonce.d*)
+ ${RELOCATING+. = ALIGN(2);}
+ ${RELOCATING+ _edata = . ; }
+- } ${RELOCATING+ > data}
++ } ${RELOCATING+ > data AT > text}
++ ${RELOCATING+ PROVIDE (__data_load_start = LOADADDR(.data) ); }
++ ${RELOCATING+ PROVIDE (__data_size = SIZEOF(.data) ); }
+
+ /* Bootloader. */
+ .bootloader ${RELOCATING-0} :
+@@ -175,19 +225,22 @@
+ *(.infomemnobits.*)
+ } ${RELOCATING+ > infomemnobits}
+
+- .bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
++ .bss ${RELOCATING-0} :
+ {
+ ${RELOCATING+ PROVIDE (__bss_start = .) ; }
+ *(.bss)
++ *(SORT_BY_ALIGNMENT(.bss.*))
+ *(COMMON)
+ ${RELOCATING+ PROVIDE (__bss_end = .) ; }
+ ${RELOCATING+ _end = . ; }
+ } ${RELOCATING+ > data}
++ ${RELOCATING+ PROVIDE (__bss_size = SIZEOF(.bss) ); }
+
+- .noinit ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
++ .noinit ${RELOCATING-0} :
+ {
+ ${RELOCATING+ PROVIDE (__noinit_start = .) ; }
+ *(.noinit)
++ *(.noinit.*)
+ *(COMMON)
+ ${RELOCATING+ PROVIDE (__noinit_end = .) ; }
+ ${RELOCATING+ _end = . ; }
+@@ -197,9 +250,11 @@
+ {
+ ${RELOCATING+ PROVIDE (__vectors_start = .) ; }
+ *(.vectors*)
++ KEEP(*(.vectors*))
+ ${RELOCATING+ _vectors_end = . ; }
+ } ${RELOCATING+ > vectors}
+
++ ${FARTEXT_SECTION_MSP430}
+ ${HEAP_SECTION_MSP430}
+
+ /* Stabs for profiling information*/
+@@ -239,6 +294,10 @@
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+
++ /* DWARF 3 */
++ .debug_pubtypes 0 : { *(.debug_pubtypes) }
++ .debug_ranges 0 : { *(.debug_ranges) }
++
+ PROVIDE (__stack = ${STACK}) ;
+ PROVIDE (__data_start_rom = _etext) ;
+ PROVIDE (__data_end_rom = _etext + SIZEOF (.data)) ;
+diff -urNad msp430-binutils~/ld/scripttempl/elf32msp430_3.sc msp430-binutils/ld/scripttempl/elf32msp430_3.sc
+--- msp430-binutils~/ld/scripttempl/elf32msp430_3.sc 2009-10-09 07:12:35.000000000 -0600
++++ msp430-binutils/ld/scripttempl/elf32msp430_3.sc 2010-05-20 10:03:14.000000000 -0600
+@@ -4,9 +4,9 @@
+
+ MEMORY
+ {
+- text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
+- data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
+- vectors (rw) : ORIGIN = 0xffe0, LENGTH = 0x20
++ text (rx) : ORIGIN = $ROM_START, LENGTH = $ROM_SIZE
++ data (rwx) : ORIGIN = $RAM_START, LENGTH = $RAM_SIZE
++ vectors (rw) : ORIGIN = $VECTORS_START, LENGTH = $VECTORS_SIZE
+ }
+
+ SECTIONS
+@@ -76,22 +76,35 @@
+ {
+ ${RELOCATING+. = ALIGN(2);}
+ *(.init)
+- *(.init0) /* Start here after reset. */
+- *(.init1)
+- *(.init2)
+- *(.init3)
+- *(.init4)
+- *(.init5)
+- *(.init6) /* C++ constructors. */
+- *(.init7)
+- *(.init8)
+- *(.init9) /* Call main(). */
++ KEEP(*(.init))
++ *(.init0) /* Start here after reset. */
++ KEEP(*(.init0))
++ *(.init1) /* User definable. */
++ KEEP(*(.init1))
++ *(.init2) /* Initialize stack. */
++ KEEP(*(.init2))
++ *(.init3) /* Initialize hardware, user definable. */
++ KEEP(*(.init3))
++ *(.init4) /* Copy data to .data, clear bss. */
++ KEEP(*(.init4))
++ *(.init5) /* User definable. */
++ KEEP(*(.init5))
++ *(.init6) /* C++ constructors. */
++ KEEP(*(.init6))
++ *(.init7) /* User definable. */
++ KEEP(*(.init7))
++ *(.init8) /* User definable. */
++ KEEP(*(.init8))
++ *(.init9) /* Call main(). */
++ KEEP(*(.init9))
+
+ ${CONSTRUCTING+ __ctors_start = . ; }
+ ${CONSTRUCTING+ *(.ctors) }
++ ${CONSTRUCTING+ KEEP(*(.ctors)) }
+ ${CONSTRUCTING+ __ctors_end = . ; }
+ ${CONSTRUCTING+ __dtors_start = . ; }
+ ${CONSTRUCTING+ *(.dtors) }
++ ${CONSTRUCTING+ KEEP(*(.dtors)) }
+ ${CONSTRUCTING+ __dtors_end = . ; }
+
+ ${RELOCATING+. = ALIGN(2);}
+@@ -100,43 +113,60 @@
+ *(.text.*)
+
+ ${RELOCATING+. = ALIGN(2);}
+- *(.fini9)
+- *(.fini8)
+- *(.fini7)
+- *(.fini6) /* C++ destructors. */
+- *(.fini5)
+- *(.fini4)
+- *(.fini3)
+- *(.fini2)
+- *(.fini1)
++ *(.fini9) /* Jumps here after main(). User definable. */
++ KEEP(*(.fini9))
++ *(.fini8) /* User definable. */
++ KEEP(*(.fini8))
++ *(.fini7) /* User definable. */
++ KEEP(*(.fini7))
++ *(.fini6) /* C++ destructors. */
++ KEEP(*(.fini6))
++ *(.fini5) /* User definable. */
++ KEEP(*(.fini5))
++ *(.fini4) /* User definable. */
++ KEEP(*(.fini4))
++ *(.fini3) /* User definable. */
++ KEEP(*(.fini3))
++ *(.fini2) /* User definable. */
++ KEEP(*(.fini2))
++ *(.fini1) /* User definable. */
++ KEEP(*(.fini1))
+ *(.fini0) /* Infinite loop after program termination. */
++ KEEP(*(.fini0))
+ *(.fini)
++ KEEP(*(.fini))
+
+ ${RELOCATING+ _etext = . ; }
+ } ${RELOCATING+ > text}
+
+- .data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))}
++ .data ${RELOCATING-0} :
+ {
+ ${RELOCATING+ PROVIDE (__data_start = .) ; }
+ *(.data)
++ *(SORT_BY_ALIGNMENT(.data.*))
+ *(.gnu.linkonce.d*)
+ ${RELOCATING+. = ALIGN(2);}
+ ${RELOCATING+ _edata = . ; }
+- } ${RELOCATING+ > data}
++ } ${RELOCATING+ > data AT > text}
++ ${RELOCATING+ PROVIDE (__data_load_start = LOADADDR(.data) ); }
++ ${RELOCATING+ PROVIDE (__data_size = SIZEOF(.data) ); }
+
+- .bss ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
++ .bss ${RELOCATING-0} :
+ {
+ ${RELOCATING+ PROVIDE (__bss_start = .) ; }
+ *(.bss)
++ *(SORT_BY_ALIGNMENT(.bss.*))
+ *(COMMON)
+ ${RELOCATING+ PROVIDE (__bss_end = .) ; }
+ ${RELOCATING+ _end = . ; }
+ } ${RELOCATING+ > data}
++ ${RELOCATING+ PROVIDE (__bss_size = SIZEOF(.bss) ); }
+
+- .noinit ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
++ .noinit ${RELOCATING-0} :
+ {
+ ${RELOCATING+ PROVIDE (__noinit_start = .) ; }
+ *(.noinit)
++ *(SORT_BY_ALIGNMENT(.noinit.*))
+ *(COMMON)
+ ${RELOCATING+ PROVIDE (__noinit_end = .) ; }
+ ${RELOCATING+ _end = . ; }
+@@ -146,6 +176,7 @@
+ {
+ ${RELOCATING+ PROVIDE (__vectors_start = .) ; }
+ *(.vectors*)
++ KEEP(*(.vectors*))
+ ${RELOCATING+ _vectors_end = . ; }
+ } ${RELOCATING+ > vectors}
+
+diff -urNad msp430-binutils~/opcodes/msp430-dis.c msp430-binutils/opcodes/msp430-dis.c
+--- msp430-binutils~/opcodes/msp430-dis.c 2010-05-20 09:48:01.000000000 -0600
++++ msp430-binutils/opcodes/msp430-dis.c 2010-05-20 10:03:14.000000000 -0600
+@@ -51,12 +51,153 @@
+ return bfd_getl16 (buffer);
+ }
+
++static unsigned short
++msp430dis_operand (bfd_vma addr, disassemble_info *info, int reg, int am, int *cmd_len)
++{
++ static int const op_length [][5] =
++ {
++ // am | reg 0 1 2 3 >3
++ /* 0 */ { 0, 0, 0, 0, 0 }, // Rn
++ /* 1 */ { 2, 2, 2, 0, 2 }, // x(Rn)
++ /* 2 */ { 0, 0, 0, 0, 0 }, // @Rn
++ /* 3 */ { 2, 0, 0, 0, 0 }, // @Rn+
++ };
++ if (reg >= (int)(sizeof(op_length[0]) / sizeof(op_length[0][0])))
++ reg = sizeof(op_length[0]) / sizeof(op_length[0][0])- 1;
++
++ if (op_length[am][reg])
++ {
++ bfd_byte buffer[2];
++ int status = info->read_memory_func (addr, buffer, 2, info);
++ if (status != 0)
++ {
++ info->memory_error_func (status, addr, info);
++ return -1;
++ }
++ *cmd_len += 2;
++ return bfd_getl16 (buffer);
++ }
++ return 0;
++}
++
++typedef enum
++{
++ OP_20BIT,
++ OP_16BIT,
++ OP_20BIT_HEX,
++ OP_16BIT_HEX,
++ OP_DECIMAL,
++} operand_t;
++
++static void
++msp430x_decode_operand(int reg, int am, int addr, int dst, operand_t size, char *op, char *comm)
++{
++ if (op) // if operand not hidden in emulated instruction
++ switch (am)
++ {
++ case 0: // Rn
++ if (reg == 3)
++ {
++ sprintf (op, "#0"); // constant #0
++ sprintf (comm, "r3 As==00");
++ }
++ else
++ {
++ sprintf (op, "r%d", reg);
++ }
++ break;
++ case 1: // x(Rn)
++ if (reg == 0) // Symbolic, ADDR
++ {
++ if (size == OP_20BIT || size == OP_20BIT_HEX)
++ sprintf (op, "0x%05x", dst & 0xfffff);
++ else
++ sprintf (op, "0x%04x", dst & 0xffff);
++ sprintf (comm, "PC rel. 0x%05x", ((int)addr + dst) & 0xfffff);
++ }
++ else if (reg == 2) // Absolute, &ADDR
++ {
++ if (size == OP_20BIT || size == OP_20BIT_HEX)
++ sprintf (op, "&0x%05x", dst & 0xfffff);
++ else
++ sprintf (op, "&0x%04x", dst & 0xffff);
++ }
++ else if (reg == 3) // constant #1
++ {
++ sprintf (op, "#1");
++ sprintf (comm, "r3 As==01");
++ }
++ else // Indexed, x(Rn)
++ {
++ sprintf (op, "%d(r%d)", dst, reg);
++ if (size == OP_20BIT || size == OP_20BIT_HEX)
++ sprintf (comm, "0x%05x(r%d)", dst & 0xfffff, reg);
++ else
++ sprintf (comm, "0x%04x(r%d)", dst & 0xffff, reg);
++ }
++ break;
++ case 2: // @Rn
++ if (reg == 2) // constant #4
++ {
++ sprintf (op, "#4");
++ sprintf (comm, "r2 As==10");
++ }
++ else if(reg == 3) // constant #2
++ {
++ sprintf (op, "#2");
++ sprintf (comm, "r3 As==10");
++ }
++ else
++ {
++ sprintf (op, "@r%d", reg);
++ }
++ break;
++ case 3: // @Rn+
++ switch (reg)
++ {
++ case 0: // immediate, #N
++ switch (size)
++ {
++ case OP_16BIT:
++ sprintf (op, "#%d", dst);
++ sprintf (comm, "#0x%04x", dst & 0xffff);
++ break;
++ case OP_16BIT_HEX:
++ sprintf (op, "#0x%04x", dst & 0xffff);
++ break;
++ case OP_20BIT:
++ sprintf (op, "#%d", dst);
++ sprintf (comm, "#0x%05x", dst & 0xfffff);
++ break;
++ case OP_20BIT_HEX:
++ sprintf (op, "#0x%05x", dst & 0xfffff);
++ break;
++ default: // #n in rxxm
++ sprintf (op, "#%d", dst);
++ break;
++ }
++ break;
++ case 2: // constant #8
++ sprintf (op, "#8");
++ sprintf (comm, "r2 As==11");
++ break;
++ case 3: // constant #-1
++ sprintf (op, "#-1");
++ sprintf (comm, "r3 As==11");
++ break;
++ default:
++ sprintf (op, "@r%d+", reg);
++ break;
++ }
++ break;
++ }
++}
++
+ static int
+-msp430_nooperands (struct msp430_opcode_s *opcode,
++msp430_nooperands (struct msp430_opcode_s const *opcode,
+ bfd_vma addr ATTRIBUTE_UNUSED,
+ unsigned short insn ATTRIBUTE_UNUSED,
+- char *comm,
+- int *cycles)
++ char *comm)
+ {
+ /* Pop with constant. */
+ if (insn == 0x43b2)
+@@ -64,18 +205,16 @@
+ if (insn == opcode->bin_opcode)
+ return 2;
+
+- if (opcode->fmt == 0)
++ if (opcode_format(opcode) == FMT_EMULATED)
+ {
+ if ((insn & 0x0f00) != 3 || (insn & 0x0f00) != 2)
+ return 0;
+
+ strcpy (comm, "emulated...");
+- *cycles = 1;
+ }
+ else
+ {
+ strcpy (comm, "return from interupt");
+- *cycles = 5;
+ }
+
+ return 2;
+@@ -83,16 +222,14 @@
+
+ static int
+ msp430_singleoperand (disassemble_info *info,
+- struct msp430_opcode_s *opcode,
++ struct msp430_opcode_s const *opcode,
+ bfd_vma addr,
+ unsigned short insn,
+ char *op,
+- char *comm,
+- int *cycles)
++ char *comm)
+ {
+ int regs = 0, regd = 0;
+ int ad = 0, as = 0;
+- int where = 0;
+ int cmd_len = 2;
+ short dst = 0;
+
+@@ -101,9 +238,9 @@
+ as = (insn & 0x0030) >> 4;
+ ad = (insn & 0x0080) >> 7;
+
+- switch (opcode->fmt)
++ switch (opcode_format(opcode))
+ {
+- case 0: /* Emulated work with dst register. */
++ case FMT_EMULATED: /* Emulated work with dst register. */
+ if (regs != 2 && regs != 3 && regs != 1)
+ return 0;
+
+@@ -115,167 +252,23 @@
+ if ((opcode->bin_opcode & 0xff00) == 0x5300 && as == 3)
+ return 0;
+
+- if (ad == 0)
+- {
+- *cycles = 1;
+-
+- /* Register. */
+- if (regd == 0)
+- {
+- *cycles += 1;
+- sprintf (op, "r0");
+- }
+- else if (regd == 1)
+- sprintf (op, "r1");
+-
+- else if (regd == 2)
+- sprintf (op, "r2");
+-
+- else
+- sprintf (op, "r%d", regd);
+- }
+- else /* ad == 1 msp430dis_opcode. */
+- {
+- if (regd == 0)
+- {
+- /* PC relative. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- *cycles = 4;
+- sprintf (op, "0x%04x", dst);
+- sprintf (comm, "PC rel. abs addr 0x%04x",
+- PS ((short) (addr + 2) + dst));
+- }
+- else if (regd == 2)
+- {
+- /* Absolute. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- *cycles = 4;
+- sprintf (op, "&0x%04x", PS (dst));
+- }
+- else
+- {
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- *cycles = 4;
+- sprintf (op, "%d(r%d)", dst, regd);
+- }
+- }
++ dst = msp430dis_operand (addr + cmd_len, info, regd, ad, &cmd_len);
++ msp430x_decode_operand (regd, ad, addr + cmd_len, dst, OP_16BIT, op, comm);
+ break;
+
+- case 2: /* rrc, push, call, swpb, rra, sxt, push, call, reti etc... */
+- if (as == 0)
+- {
+- if (regd == 3)
+- {
+- /* Constsnts. */
+- sprintf (op, "#0");
+- sprintf (comm, "r3 As==00");
+- }
+- else
+- {
+- /* Register. */
+- sprintf (op, "r%d", regd);
+- }
+- *cycles = 1;
+- }
+- else if (as == 2)
+- {
+- *cycles = 1;
+- if (regd == 2)
+- {
+- sprintf (op, "#4");
+- sprintf (comm, "r2 As==10");
+- }
+- else if (regd == 3)
+- {
+- sprintf (op, "#2");
+- sprintf (comm, "r3 As==10");
+- }
+- else
+- {
+- *cycles = 3;
+- /* Indexed register mode @Rn. */
+- sprintf (op, "@r%d", regd);
+- }
+- }
+- else if (as == 3)
+- {
+- *cycles = 1;
+- if (regd == 2)
+- {
+- sprintf (op, "#8");
+- sprintf (comm, "r2 As==11");
+- }
+- else if (regd == 3)
+- {
+- sprintf (op, "#-1");
+- sprintf (comm, "r3 As==11");
+- }
+- else if (regd == 0)
+- {
+- *cycles = 3;
+- /* absolute. @pc+ */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op, "#%d", dst);
+- sprintf (comm, "#0x%04x", PS (dst));
+- }
+- else
+- {
+- *cycles = 3;
+- sprintf (op, "@r%d+", regd);
+- }
+- }
+- else if (as == 1)
+- {
+- *cycles = 4;
+- if (regd == 0)
+- {
+- /* PC relative. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op, "0x%04x", PS (dst));
+- sprintf (comm, "PC rel. 0x%04x",
+- PS ((short) addr + 2 + dst));
+- }
+- else if (regd == 2)
+- {
+- /* Absolute. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op, "&0x%04x", PS (dst));
+- }
+- else if (regd == 3)
+- {
+- *cycles = 1;
+- sprintf (op, "#1");
+- sprintf (comm, "r3 As==01");
+- }
+- else
+- {
+- /* Indexd. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op, "%d(r%d)", dst, regd);
+- }
+- }
++ case FMT_SINGLE_OPERAND: /* rrc, push, call, swpb, rra, sxt, push, call, reti etc... */
++ dst = msp430dis_operand (addr + cmd_len, info, regd, as, &cmd_len);
++ if(opcode_variant(opcode) != V_CALL)
++ msp430x_decode_operand (regd, as, addr + cmd_len, dst, OP_16BIT, op, comm);
++ else
++ msp430x_decode_operand (regd, as, addr + cmd_len, dst, OP_16BIT_HEX, op, comm);
+ break;
+
+- case 3: /* Jumps. */
+- where = insn & 0x03ff;
+- if (where & 0x200)
+- where |= ~0x03ff;
+- if (where > 512 || where < -511)
+- return 0;
+-
+- where *= 2;
+- sprintf (op, "$%+-8d", where + 2);
+- sprintf (comm, "abs 0x%x", PS ((short) (addr) + 2 + where));
+- *cycles = 2;
++ case FMT_JUMP: /* Jumps. */
++ dst = (short)((insn & 0x03ff) << 6) >> 5; // sign extension, word addr to byte addr conversion
++ sprintf (op, "$%+-8d", dst + 2);
++ sprintf (comm, "abs 0x%x", PS ((short) (addr) + 2 + dst));
+ return 2;
+- break;
+ default:
+ cmd_len = 0;
+ }
+@@ -285,26 +278,26 @@
+
+ static int
+ msp430_doubleoperand (disassemble_info *info,
+- struct msp430_opcode_s *opcode,
++ struct msp430_opcode_s const *opcode,
+ bfd_vma addr,
+ unsigned short insn,
+ char *op1,
+ char *op2,
+ char *comm1,
+- char *comm2,
+- int *cycles)
++ char *comm2)
+ {
+ int regs = 0, regd = 0;
+ int ad = 0, as = 0;
+ int cmd_len = 2;
+- short dst = 0;
++ short ops;
++ short opd;
+
+ regd = insn & 0x0f;
+ regs = (insn & 0x0f00) >> 8;
+ as = (insn & 0x0030) >> 4;
+ ad = (insn & 0x0080) >> 7;
+
+- if (opcode->fmt == 0)
++ if (opcode_format(opcode) == FMT_EMULATED)
+ {
+ /* Special case: rla and rlc are the only 2 emulated instructions that
+ fall into two operand instructions. */
+@@ -319,348 +312,352 @@
+ if (regd != regs || as != ad)
+ return 0; /* May be 'data' section. */
+
+- if (ad == 0)
+- {
+- /* Register mode. */
+- if (regd == 3)
+- {
+- strcpy (comm1, _("Illegal as emulation instr"));
+- return -1;
+- }
+-
+- sprintf (op1, "r%d", regd);
+- *cycles = 1;
+- }
+- else /* ad == 1 */
++ if (ad == 0 && regd == 3) // #N
+ {
+- if (regd == 0)
+- {
+- /* PC relative, Symbolic. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 4;
+- *cycles = 6;
+- sprintf (op1, "0x%04x", PS (dst));
+- sprintf (comm1, "PC rel. 0x%04x",
+- PS ((short) addr + 2 + dst));
+-
+- }
+- else if (regd == 2)
+- {
+- /* Absolute. */
+- dst = msp430dis_opcode (addr + 2, info);
+- /* If the 'src' field is not the same as the dst
+- then this is not an rla instruction. */
+- if (dst != msp430dis_opcode (addr + 4, info))
+- return 0;
+- cmd_len += 4;
+- *cycles = 6;
+- sprintf (op1, "&0x%04x", PS (dst));
+- }
+- else
+- {
+- /* Indexed. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 4;
+- *cycles = 6;
+- sprintf (op1, "%d(r%d)", dst, regd);
+- }
++ strcpy (comm1, _("Illegal as emulation instr"));
++ return -1;
+ }
++ ops = msp430dis_operand (addr + cmd_len, info, regs, as, &cmd_len);
++ opd = msp430dis_operand (addr + cmd_len, info, regd, ad, &cmd_len);
++ /* If the 'src' field is not the same as the dst
++ then this is not an rla instruction. */
++ if (ops != opd)
++ return 0;
++ msp430x_decode_operand (regs, as, addr + cmd_len, ops, OP_16BIT, op1, comm1);
+
+ *op2 = 0;
+ *comm2 = 0;
+ return cmd_len;
+ }
+-
+ /* Two operands exactly. */
++
+ if (ad == 0 && regd == 3)
+ {
+ /* R2/R3 are illegal as dest: may be data section. */
+ strcpy (comm1, _("Illegal as 2-op instr"));
+ return -1;
+ }
++ ops = msp430dis_operand (addr + cmd_len, info, regs, as, &cmd_len);
++ msp430x_decode_operand (regs, as, addr + cmd_len, ops, OP_16BIT, op1, comm1);
+
+- /* Source. */
+- if (as == 0)
+- {
+- *cycles = 1;
+- if (regs == 3)
+- {
+- /* Constsnts. */
+- sprintf (op1, "#0");
+- sprintf (comm1, "r3 As==00");
+- }
+- else
+- {
+- /* Register. */
+- sprintf (op1, "r%d", regs);
+- }
+- }
+- else if (as == 2)
+- {
+- *cycles = 1;
++ opd = msp430dis_operand (addr + cmd_len, info, regd, ad, &cmd_len);
++ msp430x_decode_operand (regd, ad, addr + cmd_len, opd, OP_16BIT, op2, comm2);
++ return cmd_len;
++}
+
+- if (regs == 2)
+- {
+- sprintf (op1, "#4");
+- sprintf (comm1, "r2 As==10");
+- }
+- else if (regs == 3)
+- {
+- sprintf (op1, "#2");
+- sprintf (comm1, "r3 As==10");
+- }
+- else
+- {
+- *cycles = 2;
++static int
++msp430_branchinstr (disassemble_info *info,
++ struct msp430_opcode_s const *opcode ATTRIBUTE_UNUSED,
++ bfd_vma addr ATTRIBUTE_UNUSED,
++ unsigned short insn,
++ char *op1,
++ char *comm1)
++{
++ int regs = (insn & 0x0f00) >> 8;
++ int as = (insn & 0x0030) >> 4;
++ int cmd_len = 2;
++ short dst;
+
+- /* Indexed register mode @Rn. */
+- sprintf (op1, "@r%d", regs);
+- }
+- if (!regs)
+- *cycles = 3;
+- }
+- else if (as == 3)
+- {
+- if (regs == 2)
+- {
+- sprintf (op1, "#8");
+- sprintf (comm1, "r2 As==11");
+- *cycles = 1;
+- }
+- else if (regs == 3)
+- {
+- sprintf (op1, "#-1");
+- sprintf (comm1, "r3 As==11");
+- *cycles = 1;
+- }
+- else if (regs == 0)
+- {
+- *cycles = 3;
+- /* Absolute. @pc+. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op1, "#%d", dst);
+- sprintf (comm1, "#0x%04x", PS (dst));
+- }
+- else
+- {
+- *cycles = 2;
+- sprintf (op1, "@r%d+", regs);
+- }
+- }
+- else if (as == 1)
++ dst = msp430dis_operand (addr + cmd_len, info, regs, as, &cmd_len);
++ msp430x_decode_operand(regs, as, addr + cmd_len, dst, OP_16BIT_HEX, op1, comm1);
++
++ return cmd_len;
++}
++
++static opwidth_t
++msp430x_opwidth(unsigned int insn)
++{
++ insn &= NON_ADDR_OPERATION | BYTE_OPERATION_X;
++
++ if(insn == (NON_ADDR_OPERATION | BYTE_OPERATION_X))
++ return BYTE_OP;
++ if(insn == NON_ADDR_OPERATION)
++ return WORD_OP;
++ if(insn == BYTE_OPERATION_X)
++ return ADDR_OP;
++
++ return 0; // reserved
++}
++
++static int
++msp430x_singleoperand (disassemble_info *info,
++ struct msp430_opcode_s const *opcode,
++ bfd_vma addr,
++ unsigned int insn,
++ char *op,
++ char *comm,
++ int *repeats)
++{
++ int reg = (insn >> 16) & 0xf;
++ int am = (insn >> 20) & 0x3;
++ int cmd_len = 4;
++ int dst = 0;
++
++ if ( opcode_variant(opcode) < V_PUSHX )
++ if ((am == 3 && reg == 0) // #N operand
++ || (am == 0 && reg == 3) // R3 is illegal as dest: may be data section.
++ )
++ {
++ strcpy (comm, _("Illegal as 1-op instr"));
++ return -1;
++ }
++
++ // extract repeat count if any
++ if ( am == 0 ) // extension word for register mode
+ {
+- if (regs == 0)
+- {
+- *cycles = 4;
+- /* PC relative. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op1, "0x%04x", PS (dst));
+- sprintf (comm1, "PC rel. 0x%04x",
+- PS ((short) addr + 2 + dst));
+- }
+- else if (regs == 2)
+- {
+- *cycles = 2;
+- /* Absolute. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op1, "&0x%04x", PS (dst));
+- sprintf (comm1, "0x%04x", PS (dst));
+- }
+- else if (regs == 3)
+- {
+- *cycles = 1;
+- sprintf (op1, "#1");
+- sprintf (comm1, "r3 As==01");
+- }
+- else
+- {
+- *cycles = 3;
+- /* Indexed. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op1, "%d(r%d)", dst, regs);
+- }
++ if (insn & 0x008f) // repetitions
++ {
++ if (insn & 0x0080)
++ *repeats = insn & 0xf; // positive number is Rn
++ else
++ *repeats = 0 - (insn & 0xf); // negative number is #N
++ }
+ }
+
+- /* Destination. Special care needed on addr + XXXX. */
++ // extract operands
++ dst = msp430dis_operand(addr + cmd_len, info, reg, am, &cmd_len) | ((insn & 0x0000000f) << 16);
++ dst = (dst << 12) >> 12; // sign extension
++ msp430x_decode_operand(reg, am, addr + cmd_len, dst, OP_20BIT, op, comm);
+
+- if (ad == 0)
++ return cmd_len;
++}
++
++static int
++msp430x_exception (disassemble_info *info,
++ struct msp430_opcode_s const *opcode,
++ bfd_vma addr,
++ unsigned int insn,
++ char *op1,
++ char *op2,
++ char *comm1,
++ char *comm2,
++ opwidth_t *op_width)
++{
++ int reg = 0;
++ int cmd_len = 2;
++ int n = 0;
++ int dst = 0;
++
++ reg = insn & 0xf;
++
++ switch(opcode_variant(opcode))
+ {
+- /* Register. */
+- if (regd == 0)
+- {
+- *cycles += 1;
+- sprintf (op2, "r0");
+- }
+- else if (regd == 1)
+- sprintf (op2, "r1");
++ case V_CALLA:
++ switch((insn >> 4) & 0xf)
++ {
++ case 4: // Rdst
++ msp430x_decode_operand(reg, 0, 0, 0, 0, op1, comm1);
++ break;
++ case 5: // x(Rdst)
++ dst = (short)msp430dis_operand(addr + cmd_len, info, reg, 1, &cmd_len);
++ msp430x_decode_operand(reg, 1, addr + cmd_len, dst, OP_16BIT, op1, comm1);
++ break;
++ case 6: // @Rdst
++ msp430x_decode_operand(reg, 2, 0, 0, 0, op1, comm1);
++ break;
++ case 7: // @Rdst+
++ msp430x_decode_operand(reg, 3, 0, 0, 0, op1, comm1);
++ break;
++ case 8: // &abs20
++ dst = msp430dis_operand(addr + cmd_len, info, 2, 1, &cmd_len) | ((insn & 0x000f) << 16);
++ msp430x_decode_operand(2, 1, addr + cmd_len, dst, OP_20BIT_HEX, op1, comm1);
++ break;
++ case 9: // EDE
++ dst = msp430dis_operand(addr + cmd_len, info, 0, 1, &cmd_len) | ((insn & 0x000f) << 16);
++ msp430x_decode_operand(0, 1, addr + cmd_len, dst, OP_20BIT, op1, comm1);
++ break;
++ case 0xb: // #imm20
++ dst = msp430dis_operand(addr + cmd_len, info, 0, 3, &cmd_len) | ((insn & 0x000f) << 16);
++ msp430x_decode_operand(0, 3, addr + cmd_len, dst, OP_20BIT_HEX, op1, comm1);
++ break;
++ }
++ break;
++ case V_PUSHM:
++ n = ((insn >> 4) & 0xf) + 1;
++ msp430x_decode_operand(0, 3, 0, n, OP_DECIMAL, op1, comm1); // #N
++ msp430x_decode_operand(reg, 0, 0, 0, 0, op2, comm2); // Rdst
++ if ((insn & 0x0100) == 0)
++ *op_width = ADDR_OP;
++ break;
++ case V_POPM:
++ n = ((insn >> 4) & 0xf) + 1;
++ reg = (reg + n - 1) & 0xf;
++ msp430x_decode_operand(0, 3, 0, n, OP_DECIMAL, op1, comm1); // #N
++ msp430x_decode_operand(reg, 0, 0, 0, 0, op2, comm2); // Rdst
++ if ((insn & 0x0100) == 0)
++ *op_width = ADDR_OP;
++ break;
++ case V_ROTM:
++ n = ((insn >> 10) & 0x3) + 1;
++ msp430x_decode_operand(0, 3, 0, n, OP_DECIMAL, op1, comm1); // #N
++ msp430x_decode_operand(reg, 0, 0, 0, 0, op2, comm2); // Rdst
++ if ((insn & 0x0010) == 0)
++ *op_width = ADDR_OP;
++ break;
++ default:
++ break;
++ }
++ return cmd_len;
++}
+
+- else if (regd == 2)
+- sprintf (op2, "r2");
++static int
++msp430x_doubleoperand (disassemble_info *info,
++ struct msp430_opcode_s const *opcode,
++ bfd_vma addr,
++ unsigned int insn,
++ char *op1,
++ char *op2,
++ char *comm1,
++ char *comm2,
++ opwidth_t *op_width,
++ int *repeats)
++{
++ int regs, regd;
++ int as, ad;
++ int ops, opd;
++ int cmd_len = 4;
+
+- else
+- sprintf (op2, "r%d", regd);
++ regd = (insn >> 16) & 0xf;
++ regs = (insn >> 24) & 0xf;
++ as = (insn >> 20) & 0x3;
++ ad = (insn >> 23) & 0x1;
++
++ if (ad == 0 && regd == 3)
++ {
++ // R3 is illegal as dest: may be data section.
++ if (comm1)
++ strcpy (comm1, _("Illegal as 2-op instr"));
++ else if (comm2)
++ strcpy (comm2, _("Illegal as 2-op instr"));
++ return -1;
+ }
+- else /* ad == 1. */
++ *op_width = msp430x_opwidth(insn);
++
++ // extract repeat count if any
++ if ( as == 0 && ad == 0 ) // extension word for register mode
+ {
+- * cycles += 3;
+-
+- if (regd == 0)
+- {
+- /* PC relative. */
+- *cycles += 1;
+- dst = msp430dis_opcode (addr + cmd_len, info);
+- sprintf (op2, "0x%04x", PS (dst));
+- sprintf (comm2, "PC rel. 0x%04x",
+- PS ((short) addr + cmd_len + dst));
+- cmd_len += 2;
+- }
+- else if (regd == 2)
+- {
+- /* Absolute. */
+- dst = msp430dis_opcode (addr + cmd_len, info);
+- cmd_len += 2;
+- sprintf (op2, "&0x%04x", PS (dst));
+- }
+- else
+- {
+- dst = msp430dis_opcode (addr + cmd_len, info);
+- cmd_len += 2;
+- sprintf (op2, "%d(r%d)", dst, regd);
+- }
++ if (insn & 0x008f) // repetitions
++ {
++ if (insn & 0x0080)
++ *repeats = insn & 0xf; // positive number is Rn
++ else
++ *repeats = 0 - (insn & 0xf); // negative number is #N
++ }
+ }
++ // extract operands
++ ops = msp430dis_operand(addr + cmd_len, info, regs, as, &cmd_len) | ((insn & 0x00000780) << 9);
++ ops = (ops << 12) >> 12; // sign extension
++ msp430x_decode_operand(regs, as, addr + cmd_len, ops, OP_20BIT, op1, comm1);
++
++ opd = msp430dis_operand(addr + cmd_len, info, regd, ad, &cmd_len) | ((insn & 0x0000000f) << 16);
++ opd = (opd << 12) >> 12; // sign extension
++ if (opcode_variant(opcode) == V_X_SHIFT && ops != opd)
++ return 0; // different operand => not emulated shift
++
++ msp430x_decode_operand(regd, ad, addr + cmd_len, opd, OP_20BIT, op2, comm2);
+
+ return cmd_len;
+ }
+
+ static int
+-msp430_branchinstr (disassemble_info *info,
+- struct msp430_opcode_s *opcode ATTRIBUTE_UNUSED,
+- bfd_vma addr ATTRIBUTE_UNUSED,
++msp430x_address (disassemble_info *info,
++ bfd_vma addr,
+ unsigned short insn,
+ char *op1,
++ char *op2,
+ char *comm1,
+- int *cycles)
++ char *comm2)
+ {
+- int regs = 0, regd = 0;
+- int ad = 0, as = 0;
+ int cmd_len = 2;
+- short dst = 0;
+-
+- regd = insn & 0x0f;
+- regs = (insn & 0x0f00) >> 8;
+- as = (insn & 0x0030) >> 4;
+- ad = (insn & 0x0080) >> 7;
+-
+- if (regd != 0) /* Destination register is not a PC. */
+- return 0;
+-
+- /* dst is a source register. */
+- if (as == 0)
++ int dst = 0;
++ typedef struct
+ {
+- /* Constants. */
+- if (regs == 3)
+- {
+- *cycles = 1;
+- sprintf (op1, "#0");
+- sprintf (comm1, "r3 As==00");
+- }
+- else
+- {
+- /* Register. */
+- *cycles = 1;
+- sprintf (op1, "r%d", regs);
+- }
++ int as, regs;
++ int ad, regd;
++ int length;
+ }
+- else if (as == 2)
++ operands_t;
++
++ static operands_t const operands_table[] =
+ {
+- if (regs == 2)
+- {
+- *cycles = 2;
+- sprintf (op1, "#4");
+- sprintf (comm1, "r2 As==10");
+- }
+- else if (regs == 3)
+- {
+- *cycles = 1;
+- sprintf (op1, "#2");
+- sprintf (comm1, "r3 As==10");
+- }
+- else
+- {
+- /* Indexed register mode @Rn. */
+- *cycles = 2;
+- sprintf (op1, "@r%d", regs);
+- }
+- }
+- else if (as == 3)
++ { 2, -1, 0, -1, 0 }, // 0 @Rsrc, Rdst
++ { 3, -1, 0, -1, 0 }, // 1 @Rsrc+, Rdst
++ { 1, 2, 0, -1, 2 }, // 2 &abs20, Rdst
++ { 1, -1, 0, -1, 2 }, // 3 x(Rsrc), Rdst
++ { 0, 0, 0, 0, 0 }, // 4
++ { 0, 0, 0, 0, 0 }, // 5
++ { 0, -1, 1, 2, 2 }, // 6 Rsrc, &abs20
++ { 0, -1, 1, -1, 2 }, // 7 Rsrc, x(Rdst)
++ { 3, 0, 0, -1, 2 }, // 8 #imm20, Rdst
++ { 3, 0, 0, -1, 2 }, // 9 #imm20, Rdst
++ { 3, 0, 0, -1, 2 }, // a #imm20, Rdst
++ { 3, 0, 0, -1, 2 }, // b #imm20, Rdst
++ { 0, -1, 0, -1, 0 }, // c Rsrc, Rdst
++ { 0, -1, 0, -1, 0 }, // d Rsrc, Rdst
++ { 0, -1, 0, -1, 0 }, // e Rsrc, Rdst
++ { 0, -1, 0, -1, 0 }, // f Rsrc, Rdst
++ };
++
++ operands_t operands = operands_table[(insn >> 4) & 0xf];
++ if(((insn >> 4) & 0xf) == 6)
++ dst = msp430dis_opcode (addr + cmd_len, info) | ((insn & 0x000f) << 16);
++ else if(((insn >> 4) & 0xb) == 3)
++ dst = (short)msp430dis_opcode (addr + cmd_len, info);
++ else if(operands.length != 0)
++ dst = msp430dis_opcode(addr + cmd_len, info) | ((insn & 0x0f00) << 8);
++
++ if(operands.regs == -1)
++ operands.regs = (insn >> 8 ) & 0x000f;
++ if(operands.regd == -1)
++ operands.regd = (insn >> 0 ) & 0x000f;
++
++ if (operands.regd == 3)
+ {
+- if (regs == 2)
+- {
+- *cycles = 1;
+- sprintf (op1, "#8");
+- sprintf (comm1, "r2 As==11");
+- }
+- else if (regs == 3)
+- {
+- *cycles = 1;
+- sprintf (op1, "#-1");
+- sprintf (comm1, "r3 As==11");
+- }
+- else if (regs == 0)
+- {
+- /* Absolute. @pc+ */
+- *cycles = 3;
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op1, "#0x%04x", PS (dst));
+- }
+- else
+- {
+- *cycles = 2;
+- sprintf (op1, "@r%d+", regs);
+- }
++ // R3 is illegal as dest: may be data section.
++ if (comm1)
++ strcpy (comm1, _("Illegal as address instr"));
++ else if (comm2)
++ strcpy (comm2, _("Illegal as address instr"));
++ return -1;
+ }
+- else if (as == 1)
+- {
+- * cycles = 3;
++ // extract operands
++ msp430x_decode_operand(operands.regs, operands.as, addr + cmd_len, dst,
++ ((insn >> 4) & 0xf) == 3 ? OP_16BIT_HEX : OP_20BIT_HEX, op1, comm1);
++ msp430x_decode_operand(operands.regd, operands.ad, addr + cmd_len, dst,
++ ((insn >> 4) & 0xf) == 7 ? OP_16BIT_HEX : OP_20BIT_HEX, op2, comm2);
++ return cmd_len + operands.length;
++}
+
+- if (regs == 0)
+- {
+- /* PC relative. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- (*cycles)++;
+- sprintf (op1, "0x%04x", PS (dst));
+- sprintf (comm1, "PC rel. 0x%04x",
+- PS ((short) addr + 2 + dst));
+- }
+- else if (regs == 2)
+- {
+- /* Absolute. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op1, "&0x%04x", PS (dst));
+- }
+- else if (regs == 3)
+- {
+- (*cycles)--;
+- sprintf (op1, "#1");
+- sprintf (comm1, "r3 As==01");
+- }
+- else
+- {
+- /* Indexd. */
+- dst = msp430dis_opcode (addr + 2, info);
+- cmd_len += 2;
+- sprintf (op1, "%d(r%d)", dst, regs);
+- }
+- }
++static int
++msp430x_emulated (disassemble_info *info,
++ struct msp430_opcode_s const *opcode,
++ bfd_vma addr,
++ unsigned int insn,
++ char *op1,
++ char *comm1,
++ opwidth_t *op_width,
++ int *repeats)
++{
+
+- return cmd_len;
++ switch(opcode_variant(opcode))
++ {
++ case V_NONE:
++ case V_X_SHIFT:
++ // emulated by double operand instruction
++ return msp430x_doubleoperand(info, opcode, addr, insn, (char *)0, op1,
++ (char *)0, comm1, op_width, repeats);
++ case V_RETA: // reta, substituted by mova
++ return 2;
++ case V_EMU_ADDR: // substituted by other address instruction
++ return msp430x_address(info, addr, insn, (char *)0, op1,
++ (char *)0, comm1);
++ case V_BRA: // bra, substituted by mova
++ return msp430x_address(info, addr, insn, op1, (char *)0,
++ comm1, (char *)0);
++ default:
++ break;
++ }
++ return 0;
+ }
+
+ int
+@@ -668,85 +665,147 @@
+ {
+ void *stream = info->stream;
+ fprintf_ftype prin = info->fprintf_func;
+- struct msp430_opcode_s *opcode;
++ struct msp430_opcode_s const *opcode;
+ char op1[32], op2[32], comm1[64], comm2[64];
+ int cmd_len = 0;
+- unsigned short insn;
+- int cycles = 0;
+- char *bc = "";
+- char dinfo[32]; /* Debug purposes. */
+-
++ unsigned int insn;
++ int repeats = 0;
++ core_t core = CORE_430;
++
++ opwidth_t op_width = DEFAULT_OP; // word instruction by default
++ static char const *width_modifier[] =
++ {"", "", ".b", ".a" };
++
+ insn = msp430dis_opcode (addr, info);
+- sprintf (dinfo, "0x%04x", insn);
+
+- if (((int) addr & 0xffff) > 0xffdf)
++ if (info->mach == 241 || info->mach == 26 || info->mach == 46 || info->mach == 471)
++ {
++ core = CORE_430X;
++ }
++ else if (info->mach == 54)
++ {
++ core = CORE_430X2;
++ }
++
++ if ( (core == CORE_430 && ((int) addr & 0xffff) >= 0xffe0)
++ || ( core == CORE_430X && (((int) addr & 0xfffff) >= 0xffc0) && ((int) addr & 0xfffff) < 0x10000)
++ || ( core == CORE_430X2 && (((int) addr & 0xfffff) >= 0xff80) && ((int) addr & 0xfffff) < 0x10000)
++ )
+ {
+ (*prin) (stream, "interrupt service routine at 0x%04x", 0xffff & insn);
+ return 2;
+ }
+
++ if (core > CORE_430 && ((insn & 0xf800) == 0x1800)) // Extended instruction
++ insn |= msp430dis_opcode(addr + 2, info) << 16;
++
+ *comm1 = 0;
+ *comm2 = 0;
+
+ for (opcode = msp430_opcodes; opcode->name; opcode++)
+ {
+ if ((insn & opcode->bin_mask) == opcode->bin_opcode
+- && opcode->bin_opcode != 0x9300)
++// && opcode->bin_opcode != 0x9300 // was disasm tst instruction as cmp #0, dst?
++ )
+ {
+ *op1 = 0;
+ *op2 = 0;
+ *comm1 = 0;
+ *comm2 = 0;
+
+- /* r0 as destination. Ad should be zero. */
+- if (opcode->insn_opnumb == 3 && (insn & 0x000f) == 0
+- && (0x0080 & insn) == 0)
++ /* unsupported instruction */
++ if(opcode_format(opcode) >= FMT_X && core < CORE_430X)
++ break;
++
++ /* r0 as destination. Ad should be zero. Rdst=0 and Ad=0 are encoded in opcode & opcode_mask */
++ if (opcode_format(opcode) == FMT_EMULATED && opcode_variant(opcode) == V_BR)
+ {
+ cmd_len =
+- msp430_branchinstr (info, opcode, addr, insn, op1, comm1,
+- &cycles);
++ msp430_branchinstr (info, opcode, addr, insn, op1, comm1);
+ if (cmd_len)
+ break;
+ }
++ if(opcode_format(opcode) < FMT_X)
++ switch (opcode->insn_opnumb)
++ {
++ case 0:
++ cmd_len = msp430_nooperands (opcode, addr, insn, comm1);
++ break;
++ case 2:
++ cmd_len =
++ msp430_doubleoperand (info, opcode, addr, insn, op1, op2,
++ comm1, comm2);
++ if (insn & BYTE_OPERATION)
++ op_width = BYTE_OP;
++ break;
++ case 1:
++ cmd_len =
++ msp430_singleoperand (info, opcode, addr, insn, op1, comm1);
++ if (insn & BYTE_OPERATION && opcode_format(opcode) != FMT_JUMP)
++ op_width = BYTE_OP;
++ break;
++ default:
++ break;
++ }
++ else // 430x instruction
++ switch(opcode_format(opcode))
++ {
++ case FMT_X_SINGLE_OPERAND:
++ if( opcode_variant(opcode) == V_SWPSXT // swpbx, sxtx
++ && (insn & (NON_ADDR_OPERATION | BYTE_OPERATION_X)) == 0) // .a, special case
++ insn ^= BYTE_OPERATION_X; // make A/L, B/W as ordinary
+
+- switch (opcode->insn_opnumb)
+- {
+- case 0:
+- cmd_len = msp430_nooperands (opcode, addr, insn, comm1, &cycles);
+- break;
+- case 2:
+- cmd_len =
+- msp430_doubleoperand (info, opcode, addr, insn, op1, op2,
+- comm1, comm2, &cycles);
+- if (insn & BYTE_OPERATION)
+- bc = ".b";
+- break;
+- case 1:
+- cmd_len =
+- msp430_singleoperand (info, opcode, addr, insn, op1, comm1,
+- &cycles);
+- if (insn & BYTE_OPERATION && opcode->fmt != 3)
+- bc = ".b";
+- break;
+- default:
+- break;
+- }
++ op_width = msp430x_opwidth(insn);
++
++ if( opcode_variant(opcode) == V_SWPSXT && op_width == BYTE_OP) // swpbx, sxtx
++ strcpy (comm1, _("Illegal A/L, B/W bits setting"));
++
++ cmd_len = msp430x_singleoperand (info, opcode, addr, insn, op1, comm1,
++ &repeats);
++ break;
++ case FMT_X_EXCEPTION:
++ cmd_len = msp430x_exception (info, opcode, addr, insn, op1, op2,
++ comm1, comm2, &op_width);
++ break;
++ case FMT_X_DOUBLE_OPERAND:
++ cmd_len = msp430x_doubleoperand (info, opcode, addr, insn, op1, op2,
++ comm1, comm2, &op_width, &repeats);
++ break;
++ case FMT_X_EMULATED:
++ cmd_len = msp430x_emulated (info, opcode, addr, insn, op1,
++ comm1, &op_width, &repeats);
++ break;
++
++ case FMT_X_ADDRESS:
++ cmd_len = msp430x_address (info, addr, insn, op1, op2,
++ comm1, comm2);
++ break;
++ default:
++ break;
++ }
+ }
+
+ if (cmd_len)
+ break;
+ }
+
+- dinfo[5] = 0;
+-
+ if (cmd_len < 1)
+ {
+ /* Unknown opcode, or invalid combination of operands. */
+- (*prin) (stream, ".word 0x%04x; ????", PS (insn));
++ (*prin) (stream, ".word 0x%04x; ????\t%s%s", PS (insn), comm1, comm2);
+ return 2;
+ }
+
+- (*prin) (stream, "%s%s", opcode->name, bc);
++
++ if (repeats)
++ {
++ if (repeats < 0)
++ (*prin) (stream, ".rpt\t#%d\n\t\t\t\t", 0 - repeats);
++ else
++ (*prin) (stream, ".rpt\tr%d\n\t\t\t\t", repeats);
++ }
++
++ (*prin) (stream, "%s%s", opcode->name, width_modifier[op_width]);
+
+ if (*op1)
+ (*prin) (stream, "\t%s", op1);
+@@ -765,23 +824,11 @@
+
+ if (*comm1 || *comm2)
+ (*prin) (stream, ";");
+- else if (cycles)
+- {
+- if (*op2)
+- (*prin) (stream, ";");
+- else
+- {
+- if (strlen (op1) < 7)
+- (*prin) (stream, ";");
+- else
+- (*prin) (stream, "\t;");
+- }
+- }
+ if (*comm1)
+ (*prin) (stream, "%s", comm1);
+ if (*comm1 && *comm2)
+- (*prin) (stream, ",");
++ (*prin) (stream, ", ");
+ if (*comm2)
+- (*prin) (stream, " %s", comm2);
++ (*prin) (stream, "%s", comm2);
+ return cmd_len;
+ }
projects / msp430-binutils.git / commitdiff