--- /dev/null
+
+About the mspgcc device-specific headers
+========================================
+
+M. P. Ashton <data@ieee.org>, 18 March 2002
+
+The device-specific headers, which are located in msp430/include,
+define various symbols for use while writing low-level software for
+the MSP430 series. Bit names, register names, and other such things
+are defined by these files, so that they can be used just as they are
+in the data-sheets (hopefully).
+
+The headers originally included with mspgcc were taken from the IAR
+development package (the headers were provided by TI, not IAR).
+There was one header for each family of devices in the MSP430 family,
+more or less. Unfortunately, these files were large and difficult to
+maintain, since they each contained all of the definitions pertinent
+to a given device family. This is not necessary, since the MSP430
+family shares modules between devices, and the implementations of the
+modules are, in most cases, exactly the same.
+
+The new headers are an attempt to improve on this. The top-level
+headers, such as msp430x14x.h, msp430x11x.h, etc. are retained, and
+should operate exactly as the IAR headers do; but where these files
+share a number of symbols, because the devices have common modules,
+the symbols have been split into a separate header file, and that file
+included.
+
+For example, for each MSP430 family with the ADC12 analog-to-digital
+converter module, each of the IAR headers duplicates the register
+definitions for each file. The new headers instead #include a
+separate file, adc12.h, since the ADC12 module has exactly the same
+register definitions for all MSP430 devices which incorporate it.
+
+In the author's opinion, this structure is far easier both to maintain
+and to work with; errors corrected in one module's register set are
+propagated to all of the devices which include it, and one need not
+search through a large header to find definitions for a particular
+module.
+
+Organisation
+------------
+
+For the most part, each module header file is simply included directly
+into the header for a device which includes that module. This can be
+done in most cases because modules in the MSP430 line, as of this
+writing, are nearly always mapped to the same address.
+
+I have found only one exception to this: in the x41x family, the LCD
+module begins at address 0x90; other MSP430s with this module map it
+to 0x30. The LCD module therefore is defined so that all of its
+registers are offsets from LCD_BASE, which is defined in the family
+headers. It is entirely possible that future devices will remap other
+modules; the affected headers will be modified as necessary.
+
+Three of the modules are implemented only partially in some devices;
+for these, #defines are used to control which registers are imported
+from the module files. These "switches" are listed at the beginning
+of each module file which has them. The GPIO module has seven
+such switches, one for each port (0-6). All of the switches are named
+__msp430_have_FUNCTION, where FUNCTION is the name of a particular
+function from a module.
+
+The greatest differences between the various families are in the
+special function registers and interrupt vectors. These vary widely
+from device to device, and I could not think of a clean way to abstract
+them from the family headers. Therefore, each device family header
+has the definitions for the SFRs and interrupt vectors included in the
+file; the module files do not define interrupt vectors or SFRs.
+
+Notes
+-----
+
+<msp430/common.h> must be included in each file. It is included after
+all the other headers, on a line by itself, but before the SFRs and
+interrupt vectors.
+
+Switches are listed by themselves following the <msp430/iomacros.h>
+inclusion.
+
+GPIO is included in every MSP430 device. However, the GPIO gets its
+own header, instead of being included in "common", because it is
+possible that future MSP430s will implement GPIO differently.
+
+When converting the old headers to the new format, I checked each one
+carefully to see that I wasn't messing anything up. However, it is
+possible - nay, probable - that I have made a mistake somewhere, so if
+registers aren't defined or are behaving oddly, check them. I will
+fix all reported problems as quickly as possible. Eventually the
+new headers will stabilise and will not be a source of concern.
+
+
+Bit-field access to ports
+-------------------------
+
+File <msp430/iostructures.h> contains defenitions for port0 .. port6.
+This file being included automatically if used includes io.h, msp430xXXX.h
+or msp430/gpio.h
+Each port declared as an assembler alias to the structure containing
+port's registers defenition.
+Each port register described as a union of an unsigned 8-bit register
+'reg_p' and bit-field 'pins' __p0 .. __p7.
+So, user can write port0.out.__pin.__p0 = 1;
+Also __pin.__pX defined as pinX => port0.out.__pin.__p0 is equivalent to
+port0.out.pin0
+Please note, that port register declared as volatile. Any changes to this
+register value will take in-place: gcc will not combile several insn into one.
+For example, for sequence:
+ port0.out.pin0 = 1;
+ port0.out.pin1 = 1;
+two separate asm insns will be issued.
+
+
--- /dev/null
+The "as if" rule -- which is stated in 5.1.2.3 [#3] in C99 -- is explicitly
+defined to NOT allow optimizing away accesses to volatile objects.
+
+ | 5.1.2.3 Program execution
+ ...
+ | [#2] Accessing a volatile object, modifying an object,
+ | modifying a file, or calling a function that does any of
+ | those operations are all side effects
+ ...
+ | [#3] In the abstract machine, all expressions are evaluated
+ | as specified by the semantics. An actual implementation
+ | need not evaluate part of an expression if it can deduce
+ | that its value is not used and that no needed side effects
+ | are produced (including any caused by calling a function or
+ | accessing a volatile object).
+ ...
+ | [#5] The least requirements on a conforming implementation
+ | are:
+ |
+ | -- At sequence points, volatile objects are stable in the
+ | sense that previous accesses are complete and
+ | subsequent accesses have not yet occurred.
+
+--
+
+This rule is worked around, so in simple instructions variables of 8 and 16
+bits long performs as non-volatile ones. This feature can be disabled with
+'-mno-volatile-workaround' gcc flag.
+
--- /dev/null
+/*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: ctype.h,v 1.7 2006/11/15 14:34:56 coppice Exp $
+ */
+
+#if !defined(__CTYPE_H_)
+#define __CTYPE_H_
+
+extern inline int isalpha(int c) { return ((c>='A'&&c<='Z')||(c>='a'&&c<='z')); }
+
+extern inline int iscntrl(int c) { return ((c>=0&&c<=27)||c==127);}
+
+extern inline int isdigit(int c) { return (((c)>='0')&&((c)<='9'));}
+
+extern inline int isalnum(int c) { return (isalpha(c)||isdigit(c));}
+
+extern inline int isspace(int c) { return ((c) == ' ' || ((c) >= '\t' && (c) <= '\r'));}
+
+extern inline int isascii(int c) { return (((c) & ~0x7f) == 0);}
+
+extern inline int isupper(int c) { return ((c) >= 'A' && (c) <= 'Z');}
+
+extern inline int islower(int c) { return ((c) >= 'a' && (c) <= 'z');}
+
+extern inline int isprint(int c) { return (c >= ' ' && c < 127);}
+
+extern inline int isblank(int c) { return (c == '\t' || c == ' ');}
+
+extern inline int isxdigit(int c)
+{
+ return (isdigit(c) || ((c) >= 'A' && (c) <= 'F') || ((c) >= 'a' && (c) <= 'f'));
+}
+
+extern inline int ispunct(int c)
+{
+ return (isprint (c) && !islower(c) && !isupper(c) && c != ' ' && !isdigit(c));
+}
+
+extern inline int toupper(int c) { return ((c) - 0x20 * (((c) >= 'a') && ((c) <= 'z')));}
+
+extern inline int tolower(int c) { return ((c) + 0x20 * (((c) >= 'A') && ((c) <= 'Z'))) ;}
+
+extern inline int toascii(int c) { return (c & 0x7f); }
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2002 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: debug.h,v 1.2 2006/11/15 14:34:56 coppice Exp $
+ */
+
+#if !defined(__DEBUG_H_)
+#define __DEBUG_H_
+
+#define DEBUG_TRAP() __asm__ __volatile__(".word 1")
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: errno.h,v 1.3 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#if !defined(__ERRNO_H_)
+#define __ERRNO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int errno;
+
+#define ERANGE 34
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: io.h,v 1.17 2008/05/15 00:54:32 cliechti Exp $
+ */
+
+#ifndef _IO_H_
+#define _IO_H_
+
+#if defined(__MSP430_1101__) || defined(__MSP430_1111__) || defined(__MSP430_1121__)
+#include <msp430x11x1.h>
+
+#elif defined(__MSP430_110__) || defined(__MSP430_112__)
+#include <msp430x11x.h>
+
+#elif defined(__MSP430_122__) || defined(__MSP430_123__)
+#include <msp430x12x.h>
+
+#elif defined(__MSP430_1122__) || defined(__MSP430_1132__)
+#include <msp430x11x2.h>
+
+#elif defined(__MSP430_1222__) || defined(__MSP430_1232__)
+#include <msp430x12x2.h>
+
+#elif defined(__MSP430_133__) || defined(__MSP430_135__)
+#include <msp430x13x.h>
+
+#elif defined(__MSP430_147__) || defined(__MSP430_148__) || defined(__MSP430_149__)
+#include <msp430x14x.h>
+
+#elif defined(__MSP430_1331__) || defined(__MSP430_1351__)
+#include <msp430x13x1.h>
+
+#elif defined(__MSP430_1471__) || defined(__MSP430_1481__) || defined(__MSP430_1491__)
+#include <msp430x14x1.h>
+
+#elif defined(__MSP430_155__) || defined(__MSP430_156__) || defined(__MSP430_157__)
+#include <msp430x15x.h>
+
+#elif defined(__MSP430_167__) || defined(__MSP430_168__) || defined(__MSP430_169__) || defined(__MSP430_1610__) || defined(__MSP430_1611__) || defined(__MSP430_1612__)
+#include <msp430x16x.h>
+
+#elif defined(__MSP430_2001__) || defined(__MSP430_2011__)
+#include <msp430x20x1.h>
+
+#elif defined(__MSP430_2002__) || defined(__MSP430_2012__)
+#include <msp430x20x2.h>
+
+#elif defined(__MSP430_2003__) || defined(__MSP430_2013__)
+#include <msp430x20x3.h>
+
+#elif defined(__MSP430_2101__) || defined(__MSP430_2111__) || defined(__MSP430_2121__) || defined(__MSP430_2131__)
+#include <msp430x21x1.h>
+
+#elif defined(__MSP430_2232__) || defined(__MSP430_2252__) || defined(__MSP430_2272__)
+#include <msp430x22x2.h>
+
+#elif defined(__MSP430_2234__) || defined(__MSP430_2254__) || defined(__MSP430_2274__)
+#include <msp430x22x4.h>
+
+#elif defined(__MSP430_233__) || defined(__MSP430_235__)
+#include <msp430x23x.h>
+
+#elif defined(__MSP430_2330__) || defined(__MSP430_2350__) || defined(__MSP430_2370__)
+#include <msp430x23x0.h>
+
+#elif defined(__MSP430_247__) || defined(__MSP430_248__) || defined(__MSP430_249__) || defined(__MSP430_2410__)
+#include <msp430x24x.h>
+
+#elif defined(__MSP430_2471__) || defined(__MSP430_2481__) || defined(__MSP430_2491__)
+#include <msp430x24x1.h>
+
+#elif defined(__MSP430_2416__) || defined(__MSP430_2417__) || defined(__MSP430_2418__) || defined(__MSP430_2419__)
+#include <msp430x241x.h>
+
+#elif defined(__MSP430_2616__) || defined(__MSP430_2617__) || defined(__MSP430_2618__) || defined(__MSP430_2619__)
+#include <msp430x261x.h>
+
+#elif defined(__MSP430_311__) || defined(__MSP430_312__) || defined(__MSP430_313__) || defined(__MSP430_314__) || defined(__MSP430_315__)
+#include <msp430x31x.h>
+
+#elif defined(__MSP430_323__) || defined(__MSP430_325__)
+#include <msp430x32x.h>
+
+#elif defined(__MSP430_336__) || defined(__MSP430_337__)
+#include <msp430x33x.h>
+
+#elif defined(__MSP430_412__) || defined(__MSP430_413__) || defined(__MSP430_415__) || defined(__MSP430_417__)
+#include <msp430x41x.h>
+
+#elif defined(__MSP430_423__) || defined(__MSP430_425__) || defined(__MSP430_427__)
+#include <msp430x42x.h>
+
+#elif defined(__MSP430_4250__) || defined(__MSP430_4260__) || defined(__MSP430_4270__)
+#include <msp430x42x0.h>
+
+#elif defined(__MSP430_E423__) || defined(__MSP430_E425__) || defined(__MSP430_E427__)
+#include <msp430xE42x.h>
+
+#elif defined(__MSP430_W423__) || defined(__MSP430_W425__) || defined(__MSP430_W427__)
+#include <msp430xW42x.h>
+
+#elif defined(__MSP430_G437__) || defined(__MSP430_G438__) || defined(__MSP430_G439__)
+#include <msp430xG43x.h>
+
+#elif defined(__MSP430_435__) || defined(__MSP430_436__) || defined(__MSP430_437__)
+#include <msp430x43x.h>
+
+#elif defined(__MSP430_447__) || defined(__MSP430_448__) || defined(__MSP430_449__)
+#include <msp430x44x.h>
+
+#elif defined(__MSP430_G4616__) || defined(__MSP430_G4617__) || defined(__MSP430_G4618__) || defined(__MSP430_G4619__)
+#include <msp430xG461x.h>
+
+#else
+#warning "Unknown arch! Please check"
+#include <iomacros.h>
+#endif
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: iomacros.h,v 1.35 2008/05/26 20:27:51 cliechti Exp $
+ */
+
+#if !defined(__IOMACROS_H_)
+#define __IOMACROS_H_
+
+#if !defined(_GNU_ASSEMBLER_)
+
+#include <sys/inttypes.h>
+
+#ifndef BV
+ #define BV(x) (1 << (x))
+#endif
+
+#ifdef __cplusplus
+#ifndef NAKED
+#define NAKED(x) \
+extern "C" void x(void); \
+void x (void) __attribute__ ((naked)); \
+void x (void)
+#endif
+#else
+#ifndef NAKED
+#define NAKED(x) \
+void x (void) __attribute__ ((naked)); \
+void x (void)
+#endif
+#endif
+
+#define Critical __attribute__ ((critical))
+#define CRITICAL __attribute__ ((critical))
+#define critical __attribute__ ((critical))
+
+#define noinit __attribute__ ((section(".noinit")))
+#define NOINIT __attribute__ ((section(".noinit")))
+#define NoInit __attribute__ ((section(".noinit")))
+
+/* Reentrant */
+#define reentrant __attribute__ ((reentrant))
+#define _REENTRANT __attribute__ ((reentrant))
+
+/* Save Prologues/epilogues */
+#define saveprologue __attribute__ ((saveprologue))
+#define SavePrologue __attribute__ ((saveprologue))
+#define SAVEPROLOGUE __attribute__ ((saveprologue))
+
+/* Reserve RAM defenition */
+#define RESERVE_RAM(x) __attribute__ ((reserve(x)))
+
+/*
+ * Status register. Cannot do
+ * register SR asm("r2"); cause it
+ * is not general register
+ */
+
+#define WRITE_SR(x) \
+ __asm__ __volatile__("mov %0, r2" : : "r" ((uint16_t) x))
+
+#define READ_SR \
+({ \
+ uint16_t __x; \
+ __asm__ __volatile__( \
+ "mov r2, %0" \
+ : "=r" ((uint16_t) __x) \
+ :); \
+ __x; \
+})
+
+
+/*
+ * Can do assembler assignement with r1
+ * but wrote next two for consistency
+ */
+
+#define WRITE_SP(x) \
+ __asm__ __volatile__("mov %0, r1" : : "r" ((uint16_t) x))
+
+#define READ_SP \
+({ \
+ uint16_t __x; \
+ __asm__ __volatile__( \
+ "mov r1, %0" \
+ : "=r" ((uint16_t) __x) \
+ :); \
+ __x; \
+})
+
+#define _BIS_SR(x) __asm__ __volatile__("bis %0, r2" : : "ir" ((uint16_t) x))
+#define _BIC_SR(x) __asm__ __volatile__("bic %0, r2" : : "ir" ((uint16_t) x))
+
+#define __bis_SR_register(x) __asm__ __volatile__("bis %0, r2" : : "ir" ((uint16_t) x))
+#define __bic_SR_register(x) __asm__ __volatile__("bic %0, r2" : : "ir" ((uint16_t) x))
+
+#if __GNUC_MINOR__ >= 4
+
+extern void __bis_sr_irq(int);
+extern void __bic_sr_irq(int);
+extern void *__get_frame_address(void);
+
+#define _BIS_SR_IRQ(x) __bis_sr_irq(x)
+#define _BIC_SR_IRQ(x) __bic_sr_irq(x)
+
+#define __bis_SR_register_on_exit(x) __bis_sr_irq(x)
+#define __bic_SR_register_on_exit(x) __bic_sr_irq(x)
+
+#define GET_FRAME_ADDR_F(x) __get_frame_address()
+#define __EXIT_LPM(x) do {int *p = __get_frame_address(); *p = x;} while(0)
+
+#else
+/* Only use the following two macros within interrupt functions */
+#define _BIS_SR_IRQ(x) \
+ __asm__ __volatile__ ( \
+ "bis %0, .L__FrameOffset_" __FUNCTION__ "(r1)" \
+ : : "ir" ((uint16_t) x) \
+ )
+
+#define _BIC_SR_IRQ(x) \
+ __asm__ __volatile__ ( \
+ "bic %0, .L__FrameOffset_" __FUNCTION__ "(r1)" \
+ : : "ir" ((uint16_t) x) \
+ )
+
+#define __bis_SR_register_on_exit(x) \
+ __asm__ __volatile__ ( \
+ "bis %0, .L__FrameOffset_" __FUNCTION__ "(r1)" \
+ : : "ir" ((uint16_t) x) \
+ )
+
+#define __bic_SR_register_on_exit(x) \
+ __asm__ __volatile__ ( \
+ "bic %0, .L__FrameOffset_" __FUNCTION__ "(r1)" \
+ : : "ir" ((uint16_t) x) \
+ )
+
+#define GET_FRAME_ADDR(name) \
+({ \
+ uint16_t __x; \
+ __asm__ __volatile__( \
+ "mov r1, %0\n\t" \
+ "add #.L__FrameOffset_" #name ", %0" \
+ : "=r" (__x)); \
+ __x; \
+})
+
+
+#define GET_FRAME_ADDR_F(name) \
+({ \
+ uint16_t __x; \
+ __asm__ __volatile__( \
+ "mov r1, %0\n\t" \
+ "add #.L__FrameOffset_" name ", %0" \
+ : "=r" (__x)); \
+ __x; \
+})
+
+
+#define __EXIT_LPM(x) \
+do \
+{ \
+ int *p = GET_FRAME_ADDR_F(__FUNCTION__); \
+ *p = x; \
+} while (0)
+
+#endif
+
+#ifdef __cplusplus
+ #define sfrb_(x,x_) \
+ extern "C" volatile unsigned char x asm(#x_)
+
+ #define sfrw_(x,x_) \
+ extern "C" volatile unsigned int x asm(#x_)
+
+#if defined(__MSP430X__)
+ #define sfra_(x,x_) \
+ extern "C" volatile unsigned long int x asm(#x_)
+#endif
+#else //__cplusplus
+ #define sfrb_(x,x_) \
+ volatile unsigned char x asm(#x_)
+
+ #define sfrw_(x,x_) \
+ volatile unsigned int x asm(#x_)
+
+#if defined(__MSP430X__)
+ #define sfra_(x,x_) \
+ volatile unsigned long int x asm(#x_)
+#endif
+#endif //__cplusplus
+
+#define sfrb(x,x_) sfrb_(x,x_)
+
+#define sfrw(x,x_) sfrw_(x,x_)
+
+#if defined(__MSP430X__)
+#define sfra(x,x_) sfra_(x,x_)
+#endif
+
+/***** USEFUL MACRO DEFINITIONS *********/
+
+/* No operation */
+#define nop() __asm__ __volatile__("nop"::)
+
+/* IAR compatibility functions */
+#define _NOP() nop()
+#define __no_operation() nop()
+
+/* Set SFR with command. Useful for bitwise operations */
+#define SFR_CMD(cmd,s,v) \
+({ \
+ typedef _ts = (s); \
+ __asm__ __volatile__( #cmd " %1, %0" \
+ : "=m" ((_ts)s) \
+ : "Imr" ((_ts)v)); \
+})
+
+#define WRITE_PERIPHERAL_REGISTER(addr, val) \
+({ \
+ volatile uint8_t *__x = (uint8_t *) addr; \
+ __asm__ __volatile__("mov.b\t%1, %0" \
+ : "=m" ((uint8_t) *__x) \
+ : "ir" ((uint8_t) val)); \
+})
+
+#define READ_PERIPHERAL_REGISTER(addr) \
+({ \
+ volatile uint8_t *__x = (uint8_t *) addr; \
+ (uint8_t)*((uint8_t *) __x); \
+})
+
+#define AND_LOW(v, i) \
+({ \
+ int __t; \
+ __asm__ __volatile__ ( \
+ "mov %A1, %0 \n\t" \
+ "and %A2, %0" \
+ : "=r" (__t) \
+ : "mr" (v), \
+ "ir" (i) \
+ ); \
+ __t; \
+})
+
+#define AND_HI(v, i) \
+({ \
+ int __t; \
+ __asm__ __volatile__ ( \
+ "mov %B1, %0 \n\t" \
+ "and %B2, %0" \
+ : "=r" (__t) \
+ : "mr" (v), \
+ "ir" (i) \
+ ); \
+ __t; \
+})
+
+#define AND_LOW_V(v, i) \
+({ \
+ int __t; \
+ __asm__ __volatile__ ( \
+ "mov %A1, %0 \n\t" \
+ "and %A2, %0" \
+ : "=r" (__t) \
+ : "m" (v), \
+ "ir" (i) \
+ ); \
+ __t; \
+})
+
+#define AND_HI_V(v, i) \
+({ \
+ int __t; \
+ __asm__ __volatile__ ( \
+ "mov %B1, %0 \n\t" \
+ "and %B2, %0" \
+ : "=r" (__t) \
+ : "m" (v), \
+ "ir" (i) \
+ ); \
+ __t; \
+})
+
+#define MARK_VOLATILE __asm__ __volatile__("; volatile")
+
+#endif /* not _GNU_ASSEMBLER_ */
+
+/*
+ * Defines for assembler.
+ * Hope there is a better way to do this.
+ */
+#if defined(_GNU_ASSEMBLER_)
+
+#define sfrb(x,x_) x=x_
+#define sfrw(x,x_) x=x_
+#if defined(__MSP430X__)
+#define sfra(x,x_) x=x_
+#endif
+
+#endif
+
+#endif /* __IOMACROS_H_ */
--- /dev/null
+/*
+ * Copyright (c) 2005 Steve Underwood
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: isr_compat.h,v 1.3 2005/12/08 17:29:52 coppice Exp $
+ */
+
+#ifndef _ISR_COMPAT_H_
+#define _ISR_COMPAT_H_
+
+/* Cross compiler interrupt service routine compatibility definitions */
+/* This code currently allows for:
+ MSPGCC - the GNU tools for the MSP430
+ Quadravox AQ430
+ IAR Version 1 (old syntax)
+ IAR Versions 2 and 3 (new syntax)
+ Rowley Crossworks
+ Code Composer Essentials
+
+ These macros allow us to define interrupt routines for all
+ compilers with a common syntax:
+
+ ISR(<interrupt>, <routine name>)
+ {
+ }
+
+ e.g.
+
+ ISR(ADC12, adc_service_routine)
+ {
+ ADC12CTL0 &= ~ENC;
+ ADC12CTL0 |= ENC;
+ }
+*/
+
+/* A tricky #define to stringify _Pragma parameters */
+#define __PRAGMA__(x) _Pragma(#x)
+
+#if defined(__GNUC__) && defined(__MSP430__)
+ /* This is the MSPGCC compiler */
+#define ISR(a,b) interrupt(a ## _VECTOR) b(void)
+#elif defined(__AQCOMPILER__)
+ /* This is the Quadravox compiler */
+#define ISR(a,b) void _INTERRUPT[a ## _VECTOR] b(void)
+#elif defined(__IAR_SYSTEMS_ICC__) && (((__TID__ >> 8) & 0x7f) == 43) && (__VER__ < 200)
+ /* This is V1.xx of the IAR compiler. */
+#define ISR(a,b) interrupt[a ## _VECTOR] void b(void)
+#elif defined(__IAR_SYSTEMS_ICC__) && (((__TID__ >> 8) & 0x7f) == 43) && (__VER__ < 400)
+ /* This is V2.xx or V3.xx of the IAR compiler. */
+#define ISR(a,b) \
+__PRAGMA__(vector=a ##_VECTOR) \
+__interrupt void b(void)
+#elif defined(__CROSSWORKS_MSP430)
+ /* This is the Rowley Crossworks compiler */
+#define ISR(a,b) void b __interrupt[a ## _VECTOR](void)
+#elif defined(__TI_COMPILER_VERSION__)
+ /* This is the Code Composer Essentials compiler. */
+#define ISR(a,b) __interrupt void b(void); \
+a ## _ISR(b) \
+__interrupt void b(void)
+#else
+ #error Compiler not recognised.
+#endif
+
+#endif
--- /dev/null
+#ifndef __LIMITS_H
+#define __LIMITS_H
+
+#define MB_LEN_MAX 1 /* Longest multi-byte character */
+#define CHAR_BIT 8 /* number of bits in a char */
+#define CHAR_MAX 127 /* maximum char value */
+#define CHAR_MIN (-128) /* mimimum char value */
+#define SHRT_MAX 32767 /* maximum (signed) short value */
+#define SHRT_MIN (-32768) /* minimum (signed) short value */
+
+#define __LONG_MAX__ 2147483647L
+#undef LONG_MIN
+#define LONG_MIN (-LONG_MAX-1)
+#undef LONG_MAX
+#define LONG_MAX __LONG_MAX__
+
+
+#define UCHAR_MAX 255 /* maximum unsigned char value */
+#define UCHAR_MIN 0 /* minimum unsigned char value */
+#define USHRT_MAX 0xffff /* maximum unsigned short value */
+#define USHRT_MIN 0 /* minimum unsigned short value */
+#define ULONG_MAX 0xfffffffful /* maximum unsigned long value */
+#define ULONG_MIN 0 /* minimum unsigned long value */
+
+#define SCHAR_MAX 127 /* maximum signed char value */
+#define SCHAR_MIN (-128) /* minimum signed char value */
+#define INT_MAX 32767 /* maximum (signed) int value */
+#define INT_MIN (-32768) /* minimum (signed) int value */
+#define UINT_MAX 0xffff /* maximum unsigned int value */
+#define UINT_MIN 0 /* minimum unsigned int value */
+
+#define ULONG_LONG_MAX 0xffffffffffffffffull
+
+#ifndef RAND_MAX
+#define RAND_MAX INT_MAX
+#endif
+
+#endif
+
--- /dev/null
+/* math.h -- Definitions for the math floating point package. */
+
+#ifndef _MATH_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define _MATH_H_
+
+#include <sys/reent.h>
+#include <sys/ieeefp.h>
+#include <sys/_ansi.h>
+
+#ifndef HUGE_VAL
+
+/* Define HUGE_VAL as infinity, unless HUGE_VAL is already defined
+ (which might have been done by something like math-68881.h). */
+
+union __dmath
+{
+ __uint32_t i[2];
+ double d;
+};
+
+/* Declare this as an array without bounds so that no matter what small data
+ support a port and/or library has, this reference will be via the general
+ method for accessing globals. */
+extern __IMPORT const union __dmath __infinity[];
+
+#define HUGE_VAL (__infinity[0].d)
+
+#endif /* ! defined (HUGE_VAL) */
+
+/* Reentrant ANSI C functions. */
+
+#ifndef __math_68881
+extern double atan _PARAMS((double));
+extern double cos _PARAMS((double));
+extern double sin _PARAMS((double));
+extern double tan _PARAMS((double));
+extern double tanh _PARAMS((double));
+extern double frexp _PARAMS((double, int *));
+extern double modf _PARAMS((double, double *));
+extern double ceil _PARAMS((double));
+extern double fabs _PARAMS((double));
+extern double floor _PARAMS((double));
+#endif /* ! defined (__math_68881) */
+
+/* Non reentrant ANSI C functions. */
+
+#ifndef _REENT_ONLY
+#ifndef __math_6881
+extern double acos _PARAMS((double));
+extern double asin _PARAMS((double));
+extern double atan2 _PARAMS((double, double));
+extern double cosh _PARAMS((double));
+extern double sinh _PARAMS((double));
+extern double exp _PARAMS((double));
+extern double ldexp _PARAMS((double, int));
+extern double log _PARAMS((double));
+extern double log10 _PARAMS((double));
+extern double pow _PARAMS((double, double));
+extern double sqrt _PARAMS((double));
+extern double fmod _PARAMS((double, double));
+#endif /* ! defined (__math_68881) */
+#endif /* ! defined (_REENT_ONLY) */
+
+#ifndef __STRICT_ANSI__
+
+/* Non ANSI double precision functions. */
+
+extern double infinity _PARAMS((void));
+extern double nan _PARAMS((void));
+extern int isnan _PARAMS((double));
+extern int isinf _PARAMS((double));
+extern int finite _PARAMS((double));
+extern double copysign _PARAMS((double, double));
+extern int ilogb _PARAMS((double));
+
+extern double asinh _PARAMS((double));
+extern double cbrt _PARAMS((double));
+extern double nextafter _PARAMS((double, double));
+extern double rint _PARAMS((double));
+extern double scalbn _PARAMS((double, int));
+
+#ifndef __math_68881
+extern double log1p _PARAMS((double));
+extern double expm1 _PARAMS((double));
+#endif /* ! defined (__math_68881) */
+
+#ifndef _REENT_ONLY
+extern double acosh _PARAMS((double));
+extern double atanh _PARAMS((double));
+extern double remainder _PARAMS((double, double));
+extern double gamma _PARAMS((double));
+extern double gamma_r _PARAMS((double, int *));
+extern double lgamma _PARAMS((double));
+extern double lgamma_r _PARAMS((double, int *));
+extern double erf _PARAMS((double));
+extern double erfc _PARAMS((double));
+extern double y0 _PARAMS((double));
+extern double y1 _PARAMS((double));
+extern double yn _PARAMS((int, double));
+extern double j0 _PARAMS((double));
+extern double j1 _PARAMS((double));
+extern double jn _PARAMS((int, double));
+#define log2(x) (log (x) / M_LOG2_E)
+
+#ifndef __math_68881
+extern double hypot _PARAMS((double, double));
+#endif
+
+extern double cabs _PARAMS((void));
+extern double drem _PARAMS((double, double));
+
+#endif /* ! defined (_REENT_ONLY) */
+
+#endif /* ! defined (__STRICT_ANSI__) */
+
+#if !defined(__STRICT_ANSI__) || defined(__cplusplus)
+
+/* Single precision versions of ANSI functions. */
+
+extern float atanf _PARAMS((float));
+extern float cosf _PARAMS((float));
+extern float sinf _PARAMS((float));
+extern float tanf _PARAMS((float));
+extern float tanhf _PARAMS((float));
+extern float frexpf _PARAMS((float, int *));
+extern float modff _PARAMS((float, float *));
+extern float ceilf _PARAMS((float));
+extern float fabsf _PARAMS((float));
+extern float floorf _PARAMS((float));
+
+#ifndef _REENT_ONLY
+extern float acosf _PARAMS((float));
+extern float asinf _PARAMS((float));
+extern float atan2f _PARAMS((float, float));
+extern float coshf _PARAMS((float));
+extern float sinhf _PARAMS((float));
+extern float expf _PARAMS((float));
+extern float ldexpf _PARAMS((float, int));
+extern float logf _PARAMS((float));
+extern float log10f _PARAMS((float));
+extern float powf _PARAMS((float, float));
+extern float sqrtf _PARAMS((float));
+extern float fmodf _PARAMS((float, float));
+#endif /* ! defined (_REENT_ONLY) */
+
+#endif /* !defined(__STRICT_ANSI__) || defined(__cplusplus) */
+
+#ifndef __STRICT_ANSI__
+
+/* Other single precision functions. */
+
+extern float infinityf _PARAMS((void));
+extern float nanf _PARAMS((void));
+extern int isnanf _PARAMS((float));
+extern int isinff _PARAMS((float));
+extern int finitef _PARAMS((float));
+extern float copysignf _PARAMS((float, float));
+extern int ilogbf _PARAMS((float));
+
+extern float asinhf _PARAMS((float));
+extern float cbrtf _PARAMS((float));
+extern float nextafterf _PARAMS((float, float));
+extern float rintf _PARAMS((float));
+extern float scalbnf _PARAMS((float, int));
+extern float log1pf _PARAMS((float));
+extern float expm1f _PARAMS((float));
+
+#ifndef _REENT_ONLY
+extern float acoshf _PARAMS((float));
+extern float atanhf _PARAMS((float));
+extern float remainderf _PARAMS((float, float));
+extern float gammaf _PARAMS((float));
+extern float gammaf_r _PARAMS((float, int *));
+extern float lgammaf _PARAMS((float));
+extern float lgammaf_r _PARAMS((float, int *));
+extern float erff _PARAMS((float));
+extern float erfcf _PARAMS((float));
+extern float y0f _PARAMS((float));
+extern float y1f _PARAMS((float));
+extern float ynf _PARAMS((int, float));
+extern float j0f _PARAMS((float));
+extern float j1f _PARAMS((float));
+extern float jnf _PARAMS((int, float));
+#define log2f(x) (logf (x) / (float) M_LOG2_E)
+extern float hypotf _PARAMS((float, float));
+
+extern float cabsf _PARAMS((void));
+extern float dremf _PARAMS((float, float));
+
+#endif /* ! defined (_REENT_ONLY) */
+
+/* The gamma functions use a global variable, signgam. */
+#ifndef _REENT_ONLY
+#define signgam (*__signgam())
+extern int *__signgam _PARAMS((void));
+#endif /* ! defined (_REENT_ONLY) */
+
+#define __signgam_r(ptr) ((ptr)->_new._reent._gamma_signgam)
+
+/* The exception structure passed to the matherr routine. */
+
+#ifdef __cplusplus
+struct __exception
+#else
+struct exception
+#endif
+{
+ int type;
+ char *name;
+ double arg1;
+ double arg2;
+ double retval;
+ int err;
+};
+
+#ifdef __cplusplus
+extern int matherr _PARAMS((struct __exception *e));
+#else
+extern int matherr _PARAMS((struct exception *e));
+#endif
+
+/* Values for the type field of struct exception. */
+
+#define DOMAIN 1
+#define SING 2
+#define OVERFLOW 3
+#define UNDERFLOW 4
+#define TLOSS 5
+#define PLOSS 6
+
+/* Useful constants. */
+
+#define M_E 2.7182818284590452354
+#define M_LOG2E 1.4426950408889634074
+#define M_LOG10E 0.43429448190325182765
+#define M_LN2 0.69314718055994530942
+#define M_LN10 2.30258509299404568402
+#define M_PI 3.14159265358979323846
+#define M_TWOPI (M_PI * 2.0)
+#define M_PI_2 1.57079632679489661923
+#define M_PI_4 0.78539816339744830962
+#define M_3PI_4 2.3561944901923448370E0
+#define M_SQRTPI 1.77245385090551602792981
+#define M_1_PI 0.31830988618379067154
+#define M_2_PI 0.63661977236758134308
+#define M_2_SQRTPI 1.12837916709551257390
+#define M_SQRT2 1.41421356237309504880
+#define M_SQRT1_2 0.70710678118654752440
+#define M_LN2LO 1.9082149292705877000E-10
+#define M_LN2HI 6.9314718036912381649E-1
+#define M_SQRT3 1.73205080756887719000
+#define M_IVLN10 0.43429448190325182765 /* 1 / log(10) */
+#define M_LOG2_E 0.693147180559945309417
+#define M_INVLN2 1.4426950408889633870E0 /* 1 / log(2) */
+
+/* Global control over fdlibm error handling. */
+
+enum __fdlibm_version
+{
+ __fdlibm_ieee = -1,
+ __fdlibm_svid,
+ __fdlibm_xopen,
+ __fdlibm_posix
+};
+
+#define _LIB_VERSION_TYPE enum __fdlibm_version
+#define _LIB_VERSION __fdlib_version
+
+extern __IMPORT _CONST _LIB_VERSION_TYPE _LIB_VERSION;
+
+#define _IEEE_ __fdlibm_ieee
+#define _SVID_ __fdlibm_svid
+#define _XOPEN_ __fdlibm_xopen
+#define _POSIX_ __fdlibm_posix
+
+#endif /* ! defined (__STRICT_ANSI__) */
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _MATH_H_ */
--- /dev/null
+#ifndef __msp430_headers_adc10_h
+#define __msp430_headers_adc10_h
+
+/* adc10.h
+ *
+ * mspgcc project: MSP430 device headers
+ * ADC10 module header
+ *
+ * (c) 2002 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: adc10.h,v 1.8 2008/05/22 16:01:19 cliechti Exp $
+ */
+
+/* Switches: none */
+
+#define ADC10DTC0_ 0x0048 /* ADC10 Data Transfer Control 0 */
+sfrb(ADC10DTC0, ADC10DTC0_);
+#define ADC10DTC1_ 0x0049 /* ADC10 Data Transfer Control 1 */
+sfrb(ADC10DTC1, ADC10DTC1_);
+#define ADC10AE0_ 0x004A /* ADC10 Analog Enable */
+sfrb(ADC10AE0, ADC10AE0_);
+
+#if defined(__msp430_have_adc10ae2)
+#define ADC10AE1_ 0x004B /* ADC10 Analog Enable */
+sfrb(ADC10AE1, ADC10AE1_);
+#endif
+
+/* Alternate register names */
+#define ADC10AE_ ADC10AE0_
+#define ADC10AE ADC10AE0
+
+#define ADC10CTL0_ 0x01B0 /* ADC10 Control 0 */
+sfrw(ADC10CTL0, ADC10CTL0_);
+#define ADC10CTL1_ 0x01B2 /* ADC10 Control 1 */
+sfrw(ADC10CTL1, ADC10CTL1_);
+#define ADC10MEM_ 0x01B4 /* ADC10 Memory */
+sfrw(ADC10MEM, ADC10MEM_);
+#define ADC10SA_ 0x01BC /* ADC10 Data Transfer Start Address */
+sfrw(ADC10SA, ADC10SA_);
+
+#ifndef _GNU_ASSEMBLER_
+/* Structured declaration */
+typedef struct {
+ volatile unsigned
+ adc10sc:1,
+ enc:1,
+ adc10ifg:1,
+ adc10ie:1,
+ adc10on:1,
+ refon:1,
+ r2_5v:1,
+ msc:1,
+ adc10sr:4,
+ adc10sht:4;
+} __attribute__ ((packed)) adc10ctl0_t;
+
+typedef struct {
+ volatile unsigned
+ adc10busy:1,
+ conseq:2,
+ adc10ssel:2,
+ adc10div:3;
+} __attribute__ ((packed)) adc10ctl1_t;
+
+/* The adc10 declaration itself */
+struct adc10_t {
+ adc10ctl0_t ctl0;
+ adc10ctl1_t ctl1;
+ volatile unsigned mem;
+ volatile unsigned sa;
+};
+#ifdef __cplusplus
+extern "C" struct adc10_t adc10 asm("0x01B0");
+#else //__cplusplus
+struct adc10_t adc10 asm("0x01B0");
+#endif //__cplusplus
+
+#endif
+
+#define ADC10SC 0x0001 /* ADC10CTL0 */
+#define ENC 0x0002
+#define ADC10IFG 0x0004
+#define ADC10IE 0x0008
+#define ADC10ON 0x0010
+#define REFON 0x0020
+#define REF2_5V 0x0040
+#define MSC 0x0080
+#define REFBURST 0x0100
+#define REFOUT 0x0200
+#define ADC10SR 0x0400
+
+#define ADC10SHT_0 (0<<11) /* 4 x ADC10CLKs */
+#define ADC10SHT_1 (1<<11) /* 8 x ADC10CLKs */
+#define ADC10SHT_2 (2<<11) /* 16 x ADC10CLKs */
+#define ADC10SHT_3 (3<<11) /* 64 x ADC10CLKs */
+
+#define SREF_0 (0<<13) /* VR+ = AVCC and VR- = AVSS */
+#define SREF_1 (1<<13) /* VR+ = VREF+ and VR- = AVSS */
+#define SREF_2 (2<<13) /* VR+ = VEREF+ and VR- = AVSS */
+#define SREF_3 (3<<13) /* VR+ = VEREF+ and VR- = AVSS */
+#define SREF_4 (4<<13) /* VR+ = AVCC and VR- = VREF-/VEREF- */
+#define SREF_5 (5<<13) /* VR+ = VREF+ and VR- = VREF-/VEREF- */
+#define SREF_6 (6<<13) /* VR+ = VEREF+ and VR- = VREF-/VEREF- */
+#define SREF_7 (7<<13) /* VR+ = VEREF+ and VR- = VREF-/VEREF- */
+
+#define ADC10BUSY 0x0001 /* ADC10CTL1 */
+
+#define CONSEQ_0 (0<<1) /* Single channel single conversion */
+#define CONSEQ_1 (1<<1) /* Sequence of channels */
+#define CONSEQ_2 (2<<1) /* Repeat single channel */
+#define CONSEQ_3 (3<<1) /* Repeat sequence of channels */
+
+#define ADC10SSEL_0 (0<<3) /* ADC10OSC */
+#define ADC10SSEL_1 (1<<3) /* ACLK */
+#define ADC10SSEL_2 (2<<3) /* MCLK */
+#define ADC10SSEL_3 (3<<3) /* SMCLK */
+
+#define ADC10DIV_0 (0<<5)
+#define ADC10DIV_1 (1<<5)
+#define ADC10DIV_2 (2<<5)
+#define ADC10DIV_3 (3<<5)
+#define ADC10DIV_4 (4<<5)
+#define ADC10DIV_5 (5<<5)
+#define ADC10DIV_6 (6<<5)
+#define ADC10DIV_7 (7<<5)
+
+#define ISSH 0x0100
+#define ADC10DF 0x0200
+
+#define SHS_0 (0<<10) /* ADC10SC */
+#define SHS_1 (1<<10) /* TA3 OUT1 */
+#define SHS_2 (2<<10) /* TA3 OUT0 */
+#define SHS_3 (3<<10) /* TA3 OUT2 */
+
+#define INCH_0 (0<<12) /* A0 */
+#define INCH_1 (1<<12) /* A1 */
+#define INCH_2 (2<<12) /* A2 */
+#define INCH_3 (3<<12) /* A3 */
+#define INCH_4 (4<<12) /* A4 */
+#define INCH_5 (5<<12) /* A5 */
+#define INCH_6 (6<<12) /* A6 */
+#define INCH_7 (7<<12) /* A7 */
+#define INCH_8 (8<<12) /* VeREF+ */
+#define INCH_9 (9<<12) /* VREF-/VeREF- */
+#define INCH_10 (10<<12) /* Temperature sensor */
+#define INCH_11 (11<<12) /* (VCC - VSS) / 2 */
+#define INCH_12 (12<<12) /* Selects channel 11 */
+#define INCH_13 (13<<12) /* Selects channel 11 */
+#define INCH_14 (14<<12) /* Selects channel 11 */
+#define INCH_15 (15<<12) /* Selects channel 11 */
+
+#define ADC10FETCH 0x0001 /* ADC10DTC0 */
+#define ADC10B1 0x0002
+#define ADC10CT 0x0004
+#define ADC10TB 0x0008
+
+#define ADC10DISABLE 0x0000 /* ADC10DTC1 */
+
+/* Aliases by mspgcc */
+#define ADC10SHT_DIV4 ADC10SHT_0 /* 4 x ADC10CLKs */
+#define ADC10SHT_DIV8 ADC10SHT_1 /* 8 x ADC10CLKs */
+#define ADC10SHT_DIV16 ADC10SHT_2 /* 16 x ADC10CLKs */
+#define ADC10SHT_DIV64 ADC10SHT_3 /* 64 x ADC10CLKs */
+
+#define SREF_AVCC_AVSS SREF_0 /* VR+ = AVCC and VR- = AVSS */
+#define SREF_VREF_AVSS SREF_1 /* VR+ = VREF+ and VR- = AVSS */
+#define SREF_VEREF_AVSS SREF_2 /* VR+ = VEREF+ and VR- = AVSS */
+//~ #define SREF_VEREF_AVSS SREF_3 /* VR+ = VEREF+ and VR- = AVSS */
+#define SREF_AVCC_VEREF SREF_4 /* VR+ = AVCC and VR- = VREF-/VEREF- */
+#define SREF_VREF_VEREF SREF_5 /* VR+ = VREF+ and VR- = VREF-/VEREF- */
+#define SREF_VEREF_VEREF SREF_6 /* VR+ = VEREF+ and VR- = VREF-/VEREF- */
+//~ #define SREF_VEREF_VEREF SREF_7 /* VR+ = VEREF+ and VR- = VREF-/VEREF- */
+
+#define ADC10SSEL_ADC10OSC ADC10SSEL_0 /* ADC10OSC */
+#define ADC10SSEL_ACLK ADC10SSEL_1 /* ACLK */
+#define ADC10SSEL_MCLK ADC10SSEL_2 /* MCLK */
+#define ADC10SSEL_SMCLK ADC10SSEL_3 /* SMCLK */
+
+#define INCH_A0 INCH_0 /* A0 */
+#define INCH_A1 INCH_1 /* A1 */
+#define INCH_A2 INCH_2 /* A2 */
+#define INCH_A3 INCH_3 /* A3 */
+#define INCH_A4 INCH_4 /* A4 */
+#define INCH_A5 INCH_5 /* A5 */
+#define INCH_A6 INCH_6 /* A6 */
+#define INCH_A7 INCH_7 /* A7 */
+#define INCH_VEREF_PLUS INCH_8 /* VeREF+ */
+#define INCH_VEREF_MINUS INCH_9 /* VREF-/VeREF- */
+#define INCH_TEMP INCH_10 /* Temperature sensor */
+#define INCH_VCC2 INCH_11 /* (VCC - VSS) / 2 */
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_adc12_h
+#define __msp430_headers_adc12_h
+
+/* adc12.h
+ *
+ * mspgcc project: MSP430 device headers
+ * ADC12 module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: adc12.h,v 1.10 2006/01/12 00:47:21 cliechti Exp $
+ */
+
+/* Switches: none */
+
+#define ADC12CTL0_ 0x01A0 /* ADC12 Control 0 */
+sfrw(ADC12CTL0,ADC12CTL0_);
+#define ADC12CTL1_ 0x01A2 /* ADC12 Control 1 */
+sfrw(ADC12CTL1,ADC12CTL1_);
+#define ADC12IFG_ 0x01A4 /* ADC12 Interrupt Flag */
+sfrw(ADC12IFG,ADC12IFG_);
+#define ADC12IE_ 0x01A6 /* ADC12 Interrupt Enable */
+sfrw(ADC12IE,ADC12IE_);
+#define ADC12IV_ 0x01A8 /* ADC12 Interrupt Vector Word */
+sfrw(ADC12IV,ADC12IV_);
+
+#ifndef _GNU_ASSEMBLER_
+/* Structured declaration */
+typedef struct {
+ volatile unsigned
+ adc12sc:1,
+ enc:1,
+ adc12tovie:1,
+ adc12ovie:1,
+ adc12on:1,
+ refon:1,
+ r2_5v:1,
+ msc:1,
+ sht0:4,
+ sht1:4;
+} __attribute__ ((packed)) adc12ctl0_t;
+
+typedef struct {
+ volatile unsigned
+ adc12busy:1,
+ conseq:2,
+ adc12ssel:2,
+ adc12div:3,
+ issh:1,
+ shp:1,
+ shs:2,
+ cstartadd:4;
+} __attribute__ ((packed)) adc12ctl1_t;
+
+typedef struct {
+ volatile unsigned
+ bit0:1,
+ bit1:1,
+ bit2:1,
+ bit3:1,
+ bit4:1,
+ bit5:1,
+ bit6:1,
+ bit7:1,
+ bit8:1,
+ bit9:1,
+ bit10:1,
+ bit11:1,
+ bit12:1,
+ bit13:1,
+ bit14:1,
+ bit15:1;
+} __attribute__ ((packed)) adc12xflg_t;
+
+/* The adc12 declaration itself */
+struct adc12_t {
+ adc12ctl0_t ctl0;
+ adc12ctl1_t ctl1;
+ adc12xflg_t ifg;
+ adc12xflg_t ie;
+ adc12xflg_t iv;
+};
+
+#ifdef __cplusplus
+extern "C" struct adc12_t adc12 asm("0x01A0");
+#else //__cplusplus
+struct adc12_t adc12 asm("0x01A0");
+#endif //__cplusplus
+
+#endif
+
+#define ADC12MEM_ 0x0140 /* ADC12 Conversion Memory */
+#ifdef _GNU_ASSEMBLER_
+#define ADC12MEM ADC12MEM_ /* ADC12 Conversion Memory (for assembler) */
+#else
+#define ADC12MEM ((int*) ADC12MEM_) /* ADC12 Conversion Memory (for C) */
+#endif
+#define ADC12MEM0_ ADC12MEM_ /* ADC12 Conversion Memory 0 */
+sfrw(ADC12MEM0,ADC12MEM0_);
+#define ADC12MEM1_ 0x0142 /* ADC12 Conversion Memory 1 */
+sfrw(ADC12MEM1,ADC12MEM1_);
+#define ADC12MEM2_ 0x0144 /* ADC12 Conversion Memory 2 */
+sfrw(ADC12MEM2,ADC12MEM2_);
+#define ADC12MEM3_ 0x0146 /* ADC12 Conversion Memory 3 */
+sfrw(ADC12MEM3,ADC12MEM3_);
+#define ADC12MEM4_ 0x0148 /* ADC12 Conversion Memory 4 */
+sfrw(ADC12MEM4,ADC12MEM4_);
+#define ADC12MEM5_ 0x014A /* ADC12 Conversion Memory 5 */
+sfrw(ADC12MEM5,ADC12MEM5_);
+#define ADC12MEM6_ 0x014C /* ADC12 Conversion Memory 6 */
+sfrw(ADC12MEM6,ADC12MEM6_);
+#define ADC12MEM7_ 0x014E /* ADC12 Conversion Memory 7 */
+sfrw(ADC12MEM7,ADC12MEM7_);
+#define ADC12MEM8_ 0x0150 /* ADC12 Conversion Memory 8 */
+sfrw(ADC12MEM8,ADC12MEM8_);
+#define ADC12MEM9_ 0x0152 /* ADC12 Conversion Memory 9 */
+sfrw(ADC12MEM9,ADC12MEM9_);
+#define ADC12MEM10_ 0x0154 /* ADC12 Conversion Memory 10 */
+sfrw(ADC12MEM10,ADC12MEM10_);
+#define ADC12MEM11_ 0x0156 /* ADC12 Conversion Memory 11 */
+sfrw(ADC12MEM11,ADC12MEM11_);
+#define ADC12MEM12_ 0x0158 /* ADC12 Conversion Memory 12 */
+sfrw(ADC12MEM12,ADC12MEM12_);
+#define ADC12MEM13_ 0x015A /* ADC12 Conversion Memory 13 */
+sfrw(ADC12MEM13,ADC12MEM13_);
+#define ADC12MEM14_ 0x015C /* ADC12 Conversion Memory 14 */
+sfrw(ADC12MEM14,ADC12MEM14_);
+#define ADC12MEM15_ 0x015E /* ADC12 Conversion Memory 15 */
+sfrw(ADC12MEM15,ADC12MEM15_);
+
+#define ADC12MCTL_ 0x0080 /* ADC12 Memory Control */
+#ifdef _GNU_ASSEMBLER_
+#define ADC12MCTL ADC12MCTL_ /* ADC12 Memory Control (for assembler) */
+#else
+#define ADC12MCTL ((char*) ADC12MCTL_) /* ADC12 Memory Control (for C) */
+#endif
+#define ADC12MCTL0_ ADC12MCTL_ /* ADC12 Memory Control 0 */
+sfrb(ADC12MCTL0,ADC12MCTL0_);
+#define ADC12MCTL1_ 0x0081 /* ADC12 Memory Control 1 */
+sfrb(ADC12MCTL1,ADC12MCTL1_);
+#define ADC12MCTL2_ 0x0082 /* ADC12 Memory Control 2 */
+sfrb(ADC12MCTL2,ADC12MCTL2_);
+#define ADC12MCTL3_ 0x0083 /* ADC12 Memory Control 3 */
+sfrb(ADC12MCTL3,ADC12MCTL3_);
+#define ADC12MCTL4_ 0x0084 /* ADC12 Memory Control 4 */
+sfrb(ADC12MCTL4,ADC12MCTL4_);
+#define ADC12MCTL5_ 0x0085 /* ADC12 Memory Control 5 */
+sfrb(ADC12MCTL5,ADC12MCTL5_);
+#define ADC12MCTL6_ 0x0086 /* ADC12 Memory Control 6 */
+sfrb(ADC12MCTL6,ADC12MCTL6_);
+#define ADC12MCTL7_ 0x0087 /* ADC12 Memory Control 7 */
+sfrb(ADC12MCTL7,ADC12MCTL7_);
+#define ADC12MCTL8_ 0x0088 /* ADC12 Memory Control 8 */
+sfrb(ADC12MCTL8,ADC12MCTL8_);
+#define ADC12MCTL9_ 0x0089 /* ADC12 Memory Control 9 */
+sfrb(ADC12MCTL9,ADC12MCTL9_);
+#define ADC12MCTL10_ 0x008A /* ADC12 Memory Control 10 */
+sfrb(ADC12MCTL10,ADC12MCTL10_);
+#define ADC12MCTL11_ 0x008B /* ADC12 Memory Control 11 */
+sfrb(ADC12MCTL11,ADC12MCTL11_);
+#define ADC12MCTL12_ 0x008C /* ADC12 Memory Control 12 */
+sfrb(ADC12MCTL12,ADC12MCTL12_);
+#define ADC12MCTL13_ 0x008D /* ADC12 Memory Control 13 */
+sfrb(ADC12MCTL13,ADC12MCTL13_);
+#define ADC12MCTL14_ 0x008E /* ADC12 Memory Control 14 */
+sfrb(ADC12MCTL14,ADC12MCTL14_);
+#define ADC12MCTL15_ 0x008F /* ADC12 Memory Control 15 */
+sfrb(ADC12MCTL15,ADC12MCTL15_);
+
+/* ADC12CTL0 */
+#define ADC12SC 0x0001 /* ADC12 Start Conversion */
+#define ENC 0x0002 /* ADC12 Enable Conversion */
+#define ADC12TOVIE 0x0004 /* ADC12 Timer Overflow interrupt enable */
+#define ADC12OVIE 0x0008 /* ADC12 Overflow interrupt enable */
+#define ADC12ON 0x0010 /* ADC12 On/enable */
+#define REFON 0x0020 /* ADC12 Reference on */
+#define REF2_5V 0x0040 /* ADC12 Ref 0:1.5V / 1:2.5V */
+#define MSC 0x0080 /* ADC12 Multiple Sample Conversion */
+#define MSH 0x0080
+#define SHT00 0x0100 /* ADC12 Sample Hold 0 Select 0 */
+#define SHT01 0x0200 /* ADC12 Sample Hold 0 Select 1 */
+#define SHT02 0x0400 /* ADC12 Sample Hold 0 Select 2 */
+#define SHT03 0x0800 /* ADC12 Sample Hold 0 Select 3 */
+#define SHT10 0x1000 /* ADC12 Sample Hold 0 Select 0 */
+#define SHT11 0x2000 /* ADC12 Sample Hold 1 Select 1 */
+#define SHT12 0x4000 /* ADC12 Sample Hold 2 Select 2 */
+#define SHT13 0x8000 /* ADC12 Sample Hold 3 Select 3 */
+
+#define SHT0_0 (0<<8) /* 4 */
+#define SHT0_1 (1<<8) /* 8 */
+#define SHT0_2 (2<<8) /* 16 */
+#define SHT0_3 (3<<8) /* 32 */
+#define SHT0_4 (4<<8) /* 64 */
+#define SHT0_5 (5<<8) /* 96 */
+#define SHT0_6 (6<<8) /* 128 */
+#define SHT0_7 (7<<8) /* 192 */
+#define SHT0_8 (8<<8) /* 256 */
+#define SHT0_9 (9<<8) /* 384 */
+#define SHT0_10 (10<<8) /* 512 */
+#define SHT0_11 (11<<8) /* 768 */
+#define SHT0_12 (12<<8) /* 1024 */
+#define SHT0_13 (13<<8) /* 1024 */
+#define SHT0_14 (14<<8) /* 1024 */
+#define SHT0_15 (15<<8) /* 1024 */
+
+#define SHT1_0 (0<<12) /* 4 */
+#define SHT1_1 (1<<12) /* 8 */
+#define SHT1_2 (2<<12) /* 16 */
+#define SHT1_3 (3<<12) /* 32 */
+#define SHT1_4 (4<<12) /* 64 */
+#define SHT1_5 (5<<12) /* 96 */
+#define SHT1_6 (6<<12) /* 128 */
+#define SHT1_7 (7<<12) /* 192 */
+#define SHT1_8 (8<<12) /* 256 */
+#define SHT1_9 (9<<12) /* 384 */
+#define SHT1_10 (10<<12) /* 512 */
+#define SHT1_11 (11<<12) /* 768 */
+#define SHT1_12 (12<<12) /* 1024 */
+#define SHT1_13 (13<<12) /* 1024 */
+#define SHT1_14 (14<<12) /* 1024 */
+#define SHT1_15 (15<<12) /* 1024 */
+
+/* ADC12CTL1 */
+#define ADC12BUSY 0x0001 /* ADC12 Busy */
+#define CONSEQ0 0x0002 /* ADC12 Conversion Sequence Select 0 */
+#define CONSEQ1 0x0004 /* ADC12 Conversion Sequence Select 1 */
+#define ADC12SSEL0 0x0008 /* ADC12 Clock Source Select 0 */
+#define ADC12SSEL1 0x0010 /* ADC12 Clock Source Select 1 */
+#define ADC12DIV0 0x0020 /* ADC12 Clock Divider Select 0 */
+#define ADC12DIV1 0x0040 /* ADC12 Clock Divider Select 1 */
+#define ADC12DIV2 0x0080 /* ADC12 Clock Divider Select 2 */
+#define ISSH 0x0100 /* ADC12 Invert Sample Hold Signal */
+#define SHP 0x0200 /* ADC12 Sample/Hold Pulse Mode */
+#define SHS0 0x0400 /* ADC12 Sample/Hold Source 0 */
+#define SHS1 0x0800 /* ADC12 Sample/Hold Source 1 */
+#define CSTARTADD0 0x1000 /* ADC12 Conversion Start Address 0 */
+#define CSTARTADD1 0x2000 /* ADC12 Conversion Start Address 1 */
+#define CSTARTADD2 0x4000 /* ADC12 Conversion Start Address 2 */
+#define CSTARTADD3 0x8000 /* ADC12 Conversion Start Address 3 */
+
+#define CONSEQ_0 (0<<1) /* Single-channel, single-conversion */
+#define CONSEQ_1 (1<<1) /* Sequence-of-channels */
+#define CONSEQ_2 (2<<1) /* Repeat-single-channel */
+#define CONSEQ_3 (3<<1) /* Repeat-sequence-of-channels */
+#define ADC12SSEL_0 (0<<3) /* ADC12OSC */
+#define ADC12SSEL_1 (1<<3) /* ACLK */
+#define ADC12SSEL_2 (2<<3) /* MCLK */
+#define ADC12SSEL_3 (3<<3) /* SMCLK */
+#define ADC12DIV_0 (0<<5)
+#define ADC12DIV_1 (1<<5)
+#define ADC12DIV_2 (2<<5)
+#define ADC12DIV_3 (3<<5)
+#define ADC12DIV_4 (4<<5)
+#define ADC12DIV_5 (5<<5)
+#define ADC12DIV_6 (6<<5)
+#define ADC12DIV_7 (7<<5)
+#define SHS_0 (0<<10) /* ADC12SC bit */
+#define SHS_1 (1<<10) /* Timer_A.OUT1 */
+#define SHS_2 (2<<10) /* Timer_B.OUT0 */
+#define SHS_3 (3<<10) /* Timer_B.OUT1 */
+#define CSTARTADD_0 (0<<12)
+#define CSTARTADD_1 (1<<12)
+#define CSTARTADD_2 (2<<12)
+#define CSTARTADD_3 (3<<12)
+#define CSTARTADD_4 (4<<12)
+#define CSTARTADD_5 (5<<12)
+#define CSTARTADD_6 (6<<12)
+#define CSTARTADD_7 (7<<12)
+#define CSTARTADD_8 (8<<12)
+#define CSTARTADD_9 (9<<12)
+#define CSTARTADD_10 (10<<12)
+#define CSTARTADD_11 (11<<12)
+#define CSTARTADD_12 (12<<12)
+#define CSTARTADD_13 (13<<12)
+#define CSTARTADD_14 (14<<12)
+#define CSTARTADD_15 (15<<12)
+
+/* ADC12MCTLx */
+#define INCH_0 0 /* A0 */
+#define INCH_1 1 /* A1 */
+#define INCH_2 2 /* A2 */
+#define INCH_3 3 /* A3 */
+#define INCH_4 4 /* A4 */
+#define INCH_5 5 /* A5 */
+#define INCH_6 6 /* A6 */
+#define INCH_7 7 /* A7 */
+#define INCH_8 8 /* VeREF+ */
+#define INCH_9 9 /* VREF\96/VeREF\96 */
+#define INCH_10 10 /* Temperature diode */
+#define INCH_11 11 /* (AVCC \96 AVSS) / 2 */
+#define INCH_12 12 /* (AVCC \96 AVSS) / 2 */
+#define INCH_13 13 /* (AVCC \96 AVSS) / 2 */
+#define INCH_14 14 /* (AVCC \96 AVSS) / 2 */
+#define INCH_15 15 /* (AVCC \96 AVSS) / 2 */
+
+#define SREF_0 (0<<4) /* VR+ = AVCC and VR\96 = AVSS */
+#define SREF_1 (1<<4) /* VR+ = VREF+ and VR\96 = AVSS */
+#define SREF_2 (2<<4) /* VR+ = VeREF+ and VR\96 = AVSS */
+#define SREF_3 (3<<4) /* VR+ = VeREF+ and VR\96 = AVSS */
+#define SREF_4 (4<<4) /* VR+ = AVCC and VR\96 = VREF\96/ VeREF\96 */
+#define SREF_5 (5<<4) /* VR+ = VREF+ and VR\96 = VREF\96/ VeREF\96 */
+#define SREF_6 (6<<4) /* VR+ = VeREF+ and VR\96 = VREF\96/ VeREF\96 */
+#define SREF_7 (7<<4) /* VR+ = VeREF+ and VR\96 = VREF\96/ VeREF\96 */
+#define EOS 0x80
+
+/* Aliases by mspgcc */
+#define SHT0_DIV4 SHT0_0 /* 4 */
+#define SHT0_DIV8 SHT0_1 /* 8 */
+#define SHT0_DIV16 SHT0_2 /* 16 */
+#define SHT0_DIV32 SHT0_3 /* 32 */
+#define SHT0_DIV64 SHT0_4 /* 64 */
+#define SHT0_DIV96 SHT0_5 /* 96 */
+#define SHT0_DIV128 SHT0_6 /* 128 */
+#define SHT0_DIV192 SHT0_7 /* 192 */
+#define SHT0_DIV256 SHT0_8 /* 256 */
+#define SHT0_DIV384 SHT0_9 /* 384 */
+#define SHT0_DIV512 SHT0_10 /* 512 */
+#define SHT0_DIV768 SHT0_11 /* 768 */
+#define SHT0_DIV1024 SHT0_12 /* 1024 */
+
+#define SHT1_DIV4 SHT1_0 /* 4 */
+#define SHT1_DIV8 SHT1_1 /* 8 */
+#define SHT1_DIV16 SHT1_2 /* 16 */
+#define SHT1_DIV32 SHT1_3 /* 32 */
+#define SHT1_DIV64 SHT1_4 /* 64 */
+#define SHT1_DIV96 SHT1_5 /* 96 */
+#define SHT1_DIV128 SHT1_6 /* 128 */
+#define SHT1_DIV192 SHT1_7 /* 192 */
+#define SHT1_DIV256 SHT1_8 /* 256 */
+#define SHT1_DIV384 SHT1_9 /* 384 */
+#define SHT1_DIV512 SHT1_10 /* 512 */
+#define SHT1_DIV768 SHT1_11 /* 768 */
+#define SHT1_DIV1024 SHT1_12 /* 1024 */
+
+#define CONSEQ_SINGLE CONSEQ_0 /* Single-channel, single-conversion */
+#define CONSEQ_SEQUENCE CONSEQ_1 /* Sequence-of-channels */
+#define CONSEQ_REPEAT_SINGLE CONSEQ_2 /* Repeat-single-channel */
+#define CONSEQ_REPEAT_SEQUENCE CONSEQ_3 /* Repeat-sequence-of-channels */
+#define ADC12SSEL_ADC12OSC ADC12SSEL_0 /* ADC12OSC */
+#define ADC12SSEL_ACLK ADC12SSEL_1 /* ACLK */
+#define ADC12SSEL_MCLK ADC12SSEL_2 /* MCLK */
+#define ADC12SSEL_SMCLK ADC12SSEL_3 /* SMCLK */
+#define SHS_ADC12SC SHS_0 /* ADC12SC bit */
+#define SHS_TACCR1 SHS_1 /* Timer_A.OUT1 */
+#define SHS_TBCCR0 SHS_2 /* Timer_B.OUT0 */
+#define SHS_TBCCR1 SHS_3 /* Timer_B.OUT1 */
+
+#define INCH_A0 0 /* A0 */
+#define INCH_A1 1 /* A1 */
+#define INCH_A2 2 /* A2 */
+#define INCH_A3 3 /* A3 */
+#define INCH_A4 4 /* A4 */
+#define INCH_A5 5 /* A5 */
+#define INCH_A6 6 /* A6 */
+#define INCH_A7 7 /* A7 */
+#define INCH_VEREF_PLUS 8 /* VeREF+ */
+#define INCH_VEREF_MINUS 9 /* VREF\96/VeREF\96 */
+#define INCH_TEMP 10 /* Temperature diode */
+#define INCH_VCC2 11 /* (AVCC \96 AVSS) / 2 */
+
+
+#define SREF_AVCC_AVSS SREF_0 /* VR+ = AVCC and VR\96 = AVSS */
+#define SREF_VREF_AVSS SREF_1 /* VR+ = VREF+ and VR\96 = AVSS */
+#define SREF_VEREF_AVSS SREF_2 /* VR+ = VeREF+ and VR\96 = AVSS */
+//~ #define SREF_VEREF_AVSS SREF_3 /* VR+ = VeREF+ and VR\96 = AVSS */
+#define SREF_AVCC_VEREF SREF_4 /* VR+ = AVCC and VR\96 = VREF\96/ VeREF\96 */
+#define SREF_VREF_VEREF SREF_5 /* VR+ = VREF+ and VR\96 = VREF\96/ VeREF\96 */
+#define SREF_VEREF_VEREF SREF_6 /* VR+ = VeREF+ and VR\96 = VREF\96/ VeREF\96 */
+//~ #define SREF_VEREF_VEREF SREF_7 /* VR+ = VeREF+ and VR\96 = VREF\96/ VeREF\96 */
+
+#endif
+
--- /dev/null
+#ifndef __msp430_headers_clock_h
+#define __msp430_headers_clock_h
+
+/* basic_clock.h
+ *
+ * mspgcc project: MSP430 device headers
+ * BASIC_CLOCK module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: basic_clock.h,v 1.7 2007/07/20 12:59:02 coppice Exp $
+ */
+
+/* Switches:
+__MSP430_HAS_BC2__
+*/
+
+#define DCOCTL_ 0x0056 /* DCO Clock Frequency Control */
+sfrb(DCOCTL,DCOCTL_);
+#define BCSCTL1_ 0x0057 /* Basic Clock System Control 1 */
+sfrb(BCSCTL1,BCSCTL1_);
+#define BCSCTL2_ 0x0058 /* Basic Clock System Control 2 */
+sfrb(BCSCTL2,BCSCTL2_);
+#if defined(__MSP430_HAS_BC2__)
+#define BCSCTL3_ 0x0053 /* Basic Clock System Control 3 */
+sfrb(BCSCTL3, BCSCTL3_);
+#endif
+
+#define MOD0 0x01 /* Modulation Bit 0 */
+#define MOD1 0x02 /* Modulation Bit 1 */
+#define MOD2 0x04 /* Modulation Bit 2 */
+#define MOD3 0x08 /* Modulation Bit 3 */
+#define MOD4 0x10 /* Modulation Bit 4 */
+#define DCO0 0x20 /* DCO Select Bit 0 */
+#define DCO1 0x40 /* DCO Select Bit 1 */
+#define DCO2 0x80 /* DCO Select Bit 2 */
+
+#define RSEL0 0x01 /* Resistor Select Bit 0 */
+#define RSEL1 0x02 /* Resistor Select Bit 1 */
+#define RSEL2 0x04 /* Resistor Select Bit 2 */
+#if defined(__MSP430_HAS_BC2__)
+#define RSEL3 0x08 /* Resistor Select Bit 3 */
+#else
+#define XT5V 0x08 /* XT5V should always be reset */
+#endif
+#define DIVA0 0x10 /* ACLK Divider 0 */
+#define DIVA1 0x20 /* ACLK Divider 1 */
+#define XTS 0x40 /* LFXTCLK 0:Low Freq. / 1: High Freq. */
+#define XT2OFF 0x80 /* Enable XT2CLK */
+
+#define DIVA_0 (0<<4) /* ACLK Divider 0: /1 */
+#define DIVA_1 (1<<4) /* ACLK Divider 1: /2 */
+#define DIVA_2 (2<<4) /* ACLK Divider 2: /4 */
+#define DIVA_3 (3<<4) /* ACLK Divider 3: /8 */
+
+#if !defined(__MSP430_HAS_BC2__)
+#define DCOR 0x01 /* Enable External Resistor : 1 */
+#endif
+#define DIVS0 0x02 /* SMCLK Divider 0 */
+#define DIVS1 0x04 /* SMCLK Divider 1 */
+#define SELS 0x08 /* SMCLK Source Select 0:DCOCLK / 1:XT2CLK/LFXTCLK */
+#define DIVM0 0x10 /* MCLK Divider 0 */
+#define DIVM1 0x20 /* MCLK Divider 1 */
+#define SELM0 0x40 /* MCLK Source Select 0 */
+#define SELM1 0x80 /* MCLK Source Select 1 */
+
+#define DIVS_0 (0<<1) /* SMCLK Divider 0: /1 */
+#define DIVS_1 (1<<1) /* SMCLK Divider 1: /2 */
+#define DIVS_2 (2<<1) /* SMCLK Divider 2: /4 */
+#define DIVS_3 (3<<1) /* SMCLK Divider 3: /8 */
+
+#define DIVM_0 (0<<4) /* MCLK Divider 0: /1 */
+#define DIVM_1 (1<<4) /* MCLK Divider 1: /2 */
+#define DIVM_2 (2<<4) /* MCLK Divider 2: /4 */
+#define DIVM_3 (3<<4) /* MCLK Divider 3: /8 */
+
+#define SELM_0 (0<<6) /* MCLK Source Select 0: DCOCLK */
+#define SELM_1 (1<<6) /* MCLK Source Select 1: DCOCLK */
+#define SELM_2 (2<<6) /* MCLK Source Select 2: XT2CLK/LFXTCLK */
+#define SELM_3 (3<<6) /* MCLK Source Select 3: LFXTCLK */
+
+#if defined(__MSP430_HAS_BC2__)
+#define LFXT1OF 0x01 /* Low/high Frequency Oscillator Fault Flag */
+#define XT2OF 0x02 /* High frequency oscillator 2 fault flag */
+#define XCAP0 0x04 /* XIN/XOUT Cap 0 */
+#define XCAP1 0x08 /* XIN/XOUT Cap 1 */
+#define LFXT1S0 0x10 /* Mode 0 for LFXT1 (XTS = 0) */
+#define LFXT1S1 0x20 /* Mode 1 for LFXT1 (XTS = 0) */
+#define XT2S0 0x40 /* Mode 0 for XT2 */
+#define XT2S1 0x80 /* Mode 1 for XT2 */
+
+#define XCAP_0 (0<<2) /* XIN/XOUT Cap : 0 pF */
+#define XCAP_1 (1<<2) /* XIN/XOUT Cap : 6 pF */
+#define XCAP_2 (2<<2) /* XIN/XOUT Cap : 10 pF */
+#define XCAP_3 (3<<2) /* XIN/XOUT Cap : 12.5 pF */
+
+#define LFXT1S_0 (0<<4) /* Mode 0 for LFXT1 : Normal operation */
+#define LFXT1S_1 (1<<4) /* Mode 1 for LFXT1 : Bypass amplitude regulation */
+#define LFXT1S_2 (2<<4) /* Mode 2 for LFXT1 : Reserved */
+#define LFXT1S_3 (3<<4) /* Mode 3 for LFXT1 : Digital input signal */
+
+#define XT2S_0 (0<<6) /* Mode 0 for XT2 : 0.4 - 1 MHz */
+#define XT2S_1 (1<<6) /* Mode 1 for XT2 : 1 - 4 MHz */
+#define XT2S_2 (2<<6) /* Mode 2 for XT2 : 2 - 16 MHz */
+#define XT2S_3 (3<<6) /* Mode 3 for XT2 : Digital input signal */
+#endif
+
+/* Aliases by mspgcc */
+#define DIVA_DIV1 DIVA_0
+#define DIVA_DIV2 DIVA_1
+#define DIVA_DIV4 DIVA_2
+#define DIVA_DIV8 DIVA_3
+
+#define DIVS_DIV1 DIVS_0
+#define DIVS_DIV2 DIVS_1
+#define DIVS_DIV4 DIVS_2
+#define DIVS_DIV8 DIVS_3
+
+#define DIVM_DIV1 DIVM_0
+#define DIVM_DIV2 DIVM_1
+#define DIVM_DIV4 DIVM_2
+#define DIVM_DIV8 DIVM_3
+
+#define SELM_DCOCLK SELM_0
+/*#define SELM_DCOCLK SELM_1*/
+#define SELM_XT2CLK SELM_2
+#define SELM_LFXTCLK SELM_3
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_basic_timer_h
+#define __msp430_headers_basic_timer_h
+
+/* basic_timer.h
+ *
+ * mspgcc project: MSP430 device headers
+ * BASIC_TIMER module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: basic_timer.h,v 1.5 2006/06/07 13:01:30 coppice Exp $
+ */
+
+/* Switches:
+__MSP430_HAS_BT_RTC__ - if device has the enhanced BT with RTC
+
+*/
+
+#define BTCTL_ 0x0040 /* Basic Timer Control */
+sfrb(BTCTL, BTCTL_);
+
+/* The bit names have been prefixed with "BT" */
+#define BTIP0 0x01
+#define BTIP1 0x02
+#define BTIP2 0x04
+#define BTFRFQ0 0x08
+#define BTFRFQ1 0x10
+#define BTDIV 0x20 /* fCLK2 = ACLK:256 */
+#define BTRESET 0x40 /* BT is reset and BTIFG is reset if this bit is set */
+#define BTHOLD 0x40 /* BT1 is held if this bit is set */
+#define BTSSEL 0x80 /* fBT = fMCLK (main clock) */
+
+#define BTCNT1_ 0x0046 /* Basic Timer Count 1 */
+sfrb(BTCNT1, BTCNT1_);
+#define BTCNT2_ 0x0047 /* Basic Timer Count 2 */
+sfrb(BTCNT2, BTCNT2_);
+
+/* Frequency of the BTCNT2 coded with Bit 5 and 7 in BTCTL */
+#define BT_fCLK2_ACLK 0x00
+#define BT_fCLK2_ACLK_DIV256 BTDIV
+#define BT_fCLK2_MCLK BTSSEL
+
+/* Interrupt interval time fINT coded with Bits 0-2 in BTCTL */
+#define BT_fCLK2_DIV2 0 /* fINT = fCLK2:2 (default) */
+#define BT_fCLK2_DIV4 (BTIP0) /* fINT = fCLK2:4 */
+#define BT_fCLK2_DIV8 (BTIP1) /* fINT = fCLK2:8 */
+#define BT_fCLK2_DIV16 (BTIP1|BTIP0) /* fINT = fCLK2:16 */
+#define BT_fCLK2_DIV32 (BTIP2) /* fINT = fCLK2:32 */
+#define BT_fCLK2_DIV64 (BTIP2|BTIP0) /* fINT = fCLK2:64 */
+#define BT_fCLK2_DIV128 (BTIP2|BTIP1) /* fINT = fCLK2:128 */
+#define BT_fCLK2_DIV256 (BTIP2|BTIP1|BTIP0) /* fINT = fCLK2:256 */
+/* Frequency of LCD coded with Bits 3-4 */
+#define BT_fLCD_DIV32 0 /* fLCD = fACLK:32 (default) */
+#define BT_fLCD_DIV64 (BTFRFQ0) /* fLCD = fACLK:64 */
+#define BT_fLCD_DIV128 (BTFRFQ1) /* fLCD = fACLK:128 */
+#define BT_fLCD_DIV256 (BTFRFQ1|BTFRFQ0) /* fLCD = fACLK:256 */
+/* LCD frequency values with fBT=fACLK */
+#define BT_fLCD_1K 0 /* fACLK:32 (default) */
+#define BT_fLCD_512 (BTFRFQ0) /* fACLK:64 */
+#define BT_fLCD_256 (BTFRFQ1) /* fACLK:128 */
+#define BT_fLCD_128 (BTFRFQ1|BTFRFQ0) /* fACLK:256 */
+/* LCD frequency values with fBT=fMCLK */
+#define BT_fLCD_31K (BTSSEL) /* fMCLK:32 */
+#define BT_fLCD_15_5K (BTSSEL|BTFRFQ0) /* fMCLK:64 */
+#define BT_fLCD_7_8K (BTSSEL|BTFRFQ1|BTFRFQ0) /* fMCLK:256 */
+/* With assumed values of fACLK=32KHz, fMCLK=1MHz */
+/* fBT=fACLK is thought for longer interval times */
+#define BT_ADLY_0_064 0 /* 0.064ms interval (default) */
+#define BT_ADLY_0_125 (BTIP0) /* 0.125ms " */
+#define BT_ADLY_0_25 (BTIP1) /* 0.25ms " */
+#define BT_ADLY_0_5 (BTIP1|BTIP0) /* 0.5ms " */
+#define BT_ADLY_1 (BTIP2) /* 1ms " */
+#define BT_ADLY_2 (BTIP2|BTIP0) /* 2ms " */
+#define BT_ADLY_4 (BTIP2|BTIP1) /* 4ms " */
+#define BT_ADLY_8 (BTIP2|BTIP1|BTIP0) /* 8ms " */
+#define BT_ADLY_16 (BTDIV) /* 16ms " */
+#define BT_ADLY_32 (BTDIV|BTIP0) /* 32ms " */
+#define BT_ADLY_64 (BTDIV|BTIP1) /* 64ms " */
+#define BT_ADLY_125 (BTDIV|BTIP1|BTIP0) /* 125ms " */
+#define BT_ADLY_250 (BTDIV|BTIP2) /* 250ms " */
+#define BT_ADLY_500 (BTDIV|BTIP2|BTIP0) /* 500ms " */
+#define BT_ADLY_1000 (BTDIV|BTIP2|BTIP1) /* 1000ms " */
+#define BT_ADLY_2000 (BTDIV|BTIP2|BTIP1|BTIP0) /* 2000ms " */
+/* fCLK2=fMCLK (1MHz) is thought for short interval times */
+/* the timing for short intervals is more precise than ACLK */
+/* NOTE */
+/* Be sure that the SCFQCTL-Register is set to 01Fh so that fMCLK=1MHz */
+/* Too low interval times result in too interrupts more frequent than the
+ processor can handle! */
+#define BT_MDLY_0_002 (BTSSEL) /* 0.002ms interval *** interval times */
+#define BT_MDLY_0_004 (BTSSEL|BTIP0) /* 0.004ms " *** too short for */
+#define BT_MDLY_0_008 (BTSSEL|BTIP1) /* 0.008ms " *** interrupt */
+#define BT_MDLY_0_016 (BTSSEL|BTIP1|BTIP0) /* 0.016ms " *** handling */
+#define BT_MDLY_0_032 (BTSSEL|BTIP2) /* 0.032ms " */
+#define BT_MDLY_0_064 (BTSSEL|BTIP2|BTIP0) /* 0.064ms " */
+#define BT_MDLY_0_125 (BTSSEL|BTIP2|BTIP1) /* 0.125ms " */
+#define BT_MDLY_0_25 (BTSSEL|BTIP2|BTIP1|BTIP0) /* 0.25ms " */
+
+/* Reset/Hold coded with Bits 6-7 in BT(1)CTL */
+/* this is for BT */
+#define BTRESET_CNT1 (BTRESET) /* BTCNT1 is reset while BTRESET is set */
+#define BTRESET_CNT1_2 (BTRESET|BTDIV) /* BTCNT1 .AND. BTCNT2 are reset while ~ is set */
+/* this is for BT1 */
+#define BTHOLD_CNT1 (BTHOLD) /* BTCNT1 is held while BTHOLD is set */
+#define BTHOLD_CNT1_2 (BTHOLD|BTDIV) /* BT1CNT1 .AND. BT1CNT2 are held while ~ is set */
+
+#if defined(__MSP430_HAS_BT_RTC__)
+
+#define RTCCTL_ 0x0041 /* Real Time Clock Control */
+sfrb(RTCCTL, RTCCTL_);
+#define RTCNT1_ 0x0042 /* Real Time Counter 1 */
+sfrb(RTCNT1, RTCNT1_);
+#define RTCNT2_ 0x0043 /* Real Time Counter 2 */
+sfrb(RTCNT2, RTCNT2_);
+#define RTCNT3_ 0x0044 /* Real Time Counter 3 */
+sfrb(RTCNT3, RTCNT3_);
+#define RTCNT4_ 0x0045 /* Real Time Counter 4 */
+sfrb(RTCNT4, RTCNT4_);
+#define RTCDAY_ 0x004C /* Real Time Clock Day */
+sfrb(RTCDAY, RTCDAY_);
+#define RTCMON_ 0x004D /* Real Time Clock Month */
+sfrb(RTCMON, RTCMON_);
+#define RTCYEARL_ 0x004E /* Real Time Clock Year (Low Byte) */
+sfrb(RTCYEARL, RTCYEARL_);
+#define RTCYEARH_ 0x004F /* Real Time Clock Year (High Byte) */
+sfrb(RTCYEARH, RTCYEARH_);
+
+#define RTCSEC RTCNT1
+#define RTCMIN RTCNT2
+#define RTCHOUR RTCNT3
+#define RTCDOW RTCNT4
+
+#define RTCTL_ 0x0040 /* Basic/Real Timer Control */
+sfrb(RTCTL, RTCTL_);
+
+#define RTCTIM0 RTCNT12
+#define RTCTIM1 RTCNT34
+
+#define RTCBCD (0x80) /* RTC BCD Select */
+#define RTCHOLD (0x40) /* RTC Hold */
+#define RTCMODE1 (0x20) /* RTC Mode 1 */
+#define RTCMODE0 (0x10) /* RTC Mode 0 */
+#define RTCTEV1 (0x08) /* RTC Time Event 1 */
+#define RTCTEV0 (0x04) /* RTC Time Event 0 */
+#define RTCIE (0x02) /* RTC Interrupt Enable */
+#define RTCFG (0x01) /* RTC Event Flag */
+
+#define RTCTEV_0 (0<<2) /* RTC Time Event: 0 */
+#define RTCTEV_1 (1<<2) /* RTC Time Event: 1 */
+#define RTCTEV_2 (2<<2) /* RTC Time Event: 2 */
+#define RTCTEV_3 (3<<2) /* RTC Time Event: 3 */
+#define RTCMODE_0 (0<<4) /* RTC Mode: 0 */
+#define RTCMODE_1 (1<<4) /* RTC Mode: 1 */
+#define RTCMODE_2 (2<<4) /* RTC Mode: 2 */
+#define RTCMODE_3 (3<<4) /* RTC Mode: 3 */
+
+#endif
+
+/* INTERRUPT CONTROL BITS */
+/* #define BTIE 0x80 */
+/* #define BTIFG 0x80 */
+/* #define BTME 0x80 */
+
+#endif
--- /dev/null
+
+#ifndef __msp430_headers_common_h
+#define __msp430_headers_common_h
+
+/* common.h
+ *
+ * mspgcc project: MSP430 device headers
+ * Common register definitions
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: common.h,v 1.5 2006/01/12 00:47:21 cliechti Exp $
+ */
+
+/* Switches: none */
+
+#define BIT0 0x0001
+#define BIT1 0x0002
+#define BIT2 0x0004
+#define BIT3 0x0008
+#define BIT4 0x0010
+#define BIT5 0x0020
+#define BIT6 0x0040
+#define BIT7 0x0080
+#define BIT8 0x0100
+#define BIT9 0x0200
+#define BITA 0x0400
+#define BITB 0x0800
+#define BITC 0x1000
+#define BITD 0x2000
+#define BITE 0x4000
+#define BITF 0x8000
+
+#define C 0x0001
+#define Z 0x0002
+#define N 0x0004
+#define V 0x0100
+#define GIE 0x0008
+#define CPUOFF 0x0010
+#define OSCOFF 0x0020
+#define SCG0 0x0040
+#define SCG1 0x0080
+
+#ifdef _GNU_ASSEMBLER_ /* Begin #defines for assembler */
+#define LPM0 CPUOFF
+#define LPM1 SCG0+CPUOFF
+#define LPM2 SCG1+CPUOFF
+#define LPM3 SCG1+SCG0+CPUOFF
+#define LPM4 SCG1+SCG0+OSCOFF+CPUOFF
+#else /* Begin #defines for C */
+#define LPM0_bits CPUOFF
+#define LPM1_bits SCG0+CPUOFF
+#define LPM2_bits SCG1+CPUOFF
+#define LPM3_bits SCG1+SCG0+CPUOFF
+#define LPM4_bits SCG1+SCG0+OSCOFF+CPUOFF
+
+#define LPM0 _BIS_SR(LPM0_bits) /* Enter Low Power Mode 0 */
+#define LPM0_EXIT _BIC_SR_IRQ(LPM0_bits) /* Exit Low Power Mode 0 */
+#define LPM1 _BIS_SR(LPM1_bits) /* Enter Low Power Mode 1 */
+#define LPM1_EXIT _BIC_SR_IRQ(LPM1_bits) /* Exit Low Power Mode 1 */
+#define LPM2 _BIS_SR(LPM2_bits) /* Enter Low Power Mode 2 */
+#define LPM2_EXIT _BIC_SR_IRQ(LPM2_bits) /* Exit Low Power Mode 2 */
+#define LPM3 _BIS_SR(LPM3_bits) /* Enter Low Power Mode 3 */
+#define LPM3_EXIT _BIC_SR_IRQ(LPM3_bits) /* Exit Low Power Mode 3 */
+#define LPM4 _BIS_SR(LPM4_bits) /* Enter Low Power Mode 4 */
+#define LPM4_EXIT _BIC_SR_IRQ(LPM4_bits) /* Exit Low Power Mode 4 */
+#endif /* End #defines for C */
+
+#define WDTCTL_ 0x0120 /* Watchdog Timer Control */
+sfrw (WDTCTL,WDTCTL_);
+/* The bit names have been prefixed with "WDT" */
+#define WDTIS0 0x0001
+#define WDTIS1 0x0002
+#define WDTSSEL 0x0004
+#define WDTCNTCL 0x0008
+#define WDTTMSEL 0x0010
+#define WDTNMI 0x0020
+#define WDTNMIES 0x0040
+#define WDTHOLD 0x0080
+
+#define WDTPW 0x5A00
+
+/* WDT-interval times [1ms] coded with Bits 0-2 */
+/* WDT is clocked by fMCLK (assumed 1MHz) */
+#define WDT_MDLY_32 (WDTPW|WDTTMSEL|WDTCNTCL) /* 32ms interval (default) */
+#define WDT_MDLY_8 (WDTPW|WDTTMSEL|WDTCNTCL|WDTIS0) /* 8ms " */
+#define WDT_MDLY_0_5 (WDTPW|WDTTMSEL|WDTCNTCL|WDTIS1) /* 0.5ms " */
+#define WDT_MDLY_0_064 (WDTPW|WDTTMSEL|WDTCNTCL|WDTIS1|WDTIS0) /* 0.064ms " */
+/* WDT is clocked by fACLK (assumed 32KHz) */
+#define WDT_ADLY_1000 (WDTPW|WDTTMSEL|WDTCNTCL|WDTSSEL) /* 1000ms " */
+#define WDT_ADLY_250 (WDTPW|WDTTMSEL|WDTCNTCL|WDTSSEL|WDTIS0) /* 250ms " */
+#define WDT_ADLY_16 (WDTPW|WDTTMSEL|WDTCNTCL|WDTSSEL|WDTIS1) /* 16ms " */
+#define WDT_ADLY_1_9 (WDTPW|WDTTMSEL|WDTCNTCL|WDTSSEL|WDTIS1|WDTIS0) /* 1.9ms " */
+/* Watchdog mode -> reset after expired time */
+/* WDT is clocked by fMCLK (assumed 1MHz) */
+#define WDT_MRST_32 (WDTPW|WDTCNTCL) /* 32ms interval (default) */
+#define WDT_MRST_8 (WDTPW|WDTCNTCL|WDTIS0) /* 8ms " */
+#define WDT_MRST_0_5 (WDTPW|WDTCNTCL|WDTIS1) /* 0.5ms " */
+#define WDT_MRST_0_064 (WDTPW|WDTCNTCL|WDTIS1|WDTIS0) /* 0.064ms " */
+/* WDT is clocked by fACLK (assumed 32KHz) */
+#define WDT_ARST_1000 (WDTPW|WDTCNTCL|WDTSSEL) /* 1000ms " */
+#define WDT_ARST_250 (WDTPW|WDTCNTCL|WDTSSEL|WDTIS0) /* 250ms " */
+#define WDT_ARST_16 (WDTPW|WDTCNTCL|WDTSSEL|WDTIS1) /* 16ms " */
+#define WDT_ARST_1_9 (WDTPW|WDTCNTCL|WDTSSEL|WDTIS1|WDTIS0) /* 1.9ms " */
+
+/* INTERRUPT CONTROL */
+/* These two bits are defined in the Special Function Registers */
+/* #define WDTIE 0x01 */
+/* #define WDTIFG 0x01 */
+
+/* Aliases by mspgcc */
+#define WDTIS_0 0x0000
+#define WDTIS_1 0x0001
+#define WDTIS_2 0x0002
+#define WDTIS_3 0x0003
+
+
+/* Backwards compatibility to older versions of the header files.
+ Please consider using the new names.
+ */
+#ifdef __MSP430_HAS_PORT1__
+ #define __msp430_have_port1
+#endif
+
+#ifdef __MSP430_HAS_PORT2__
+ #define __msp430_have_port2
+#endif
+
+#ifdef __MSP430_HAS_PORT3__
+ #define __msp430_have_port3
+#endif
+
+#ifdef __MSP430_HAS_PORT4__
+ #define __msp430_have_port4
+#endif
+
+#ifdef __MSP430_HAS_PORT5__
+ #define __msp430_have_port5
+#endif
+
+#ifdef __MSP430_HAS_PORT6__
+ #define __msp430_have_port6
+#endif
+
+#ifdef __MSP430_HAS_UART1__
+ #define __msp430_have_usart1
+#endif
+
+#ifdef __MSP430_HAS_TB7__
+ #define __msp430_have_timerb7
+#endif
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_compa_h
+#define __msp430_headers_compa_h
+
+/* compa.h
+ *
+ * mspgcc project: MSP430 device headers
+ * COMPA module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: compa.h,v 1.6 2005/08/17 14:28:46 coppice Exp $
+ */
+
+/* Switches:
+__MSP430_HAS_CAPLUS__
+*/
+
+#define CACTL1_ 0x0059 /* Comparator A Control 1 */
+sfrb(CACTL1,CACTL1_);
+#define CACTL2_ 0x005A /* Comparator A Control 2 */
+sfrb(CACTL2,CACTL2_);
+#define CAPD_ 0x005B /* Comparator A Port Disable */
+sfrb(CAPD,CAPD_);
+
+#define CAIFG 0x01 /* Comp. A Interrupt Flag */
+#define CAIE 0x02 /* Comp. A Interrupt Enable */
+#define CAIES 0x04 /* Comp. A Int. Edge Select: 0:rising / 1:falling */
+#define CAON 0x08 /* Comp. A enable */
+#define CAREF0 0x10 /* Comp. A Internal Reference Select 0 */
+#define CAREF1 0x20 /* Comp. A Internal Reference Select 1 */
+#define CARSEL 0x40 /* Comp. A Internal Reference Enable */
+#define CAEX 0x80 /* Comp. A Exchange Inputs */
+
+#define CAREF_0 0x00 /* Comp. A Int. Ref. Select 0 : Off */
+#define CAREF_1 0x10 /* Comp. A Int. Ref. Select 1 : 0.25*Vcc */
+#define CAREF_2 0x20 /* Comp. A Int. Ref. Select 2 : 0.5*Vcc */
+#define CAREF_3 0x30 /* Comp. A Int. Ref. Select 3 : Vt*/
+
+#define CAOUT 0x01 /* Comp. A Output */
+#define CAF 0x02 /* Comp. A Enable Output Filter */
+#define P2CA0 0x04 /* Comp. A Connect External Signal to CA0 : 1 */
+#define P2CA1 0x08 /* Comp. A Connect External Signal to CA1 : 1 */
+#if defined(__MSP430_HAS_CAPLUS__)
+#define P2CA2 0x10 /* Comp. A -Terminal Multiplexer */
+#define P2CA3 0x20 /* Comp. A -Terminal Multiplexer */
+#define P2CA4 0x40 /* Comp. A +Terminal Multiplexer */
+#define CASHORT 0x80 /* Comp. A Short + and - Terminals */
+#else
+#define CACTL24 0x10
+#define CACTL25 0x20
+#define CACTL26 0x40
+#define CACTL27 0x80
+#endif
+
+#define CAPD0 0x01 /* Comp. A Disable Input Buffer of Port Register .0 */
+#define CAPD1 0x02 /* Comp. A Disable Input Buffer of Port Register .1 */
+#define CAPD2 0x04 /* Comp. A Disable Input Buffer of Port Register .2 */
+#define CAPD3 0x08 /* Comp. A Disable Input Buffer of Port Register .3 */
+#define CAPD4 0x10 /* Comp. A Disable Input Buffer of Port Register .4 */
+#define CAPD5 0x20 /* Comp. A Disable Input Buffer of Port Register .5 */
+#define CAPD6 0x40 /* Comp. A Disable Input Buffer of Port Register .6 */
+#define CAPD7 0x80 /* Comp. A Disable Input Buffer of Port Register .7 */
+
+/* Aliases by mspgcc */
+#define CAREF_OFF CAREF_0
+#define CAREF_025 CAREF_1
+#define CAREF_050 CAREF_2
+#define CAREF_VT CAREF_3
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_dac12_h
+#define __msp430_headers_dac12_h
+
+/* dac12.h
+ *
+ * mspgcc project: MSP430 device headers
+ * DAC12 module header
+ *
+ * (c) 2002 by Steve Udnerwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: dac12.h,v 1.5 2004/11/03 14:29:10 coppice Exp $
+ */
+
+/* Switches: __msp430_have_dac12_op_amp */
+
+#define DAC12_0CTL_ 0x01C0 /* DAC12 control 0 */
+sfrw(DAC12_0CTL,DAC12_0CTL_);
+#define DAC12_1CTL_ 0x01C2 /* DAC12 control 1 */
+sfrw(DAC12_1CTL,DAC12_1CTL_);
+#define DAC12_0DAT_ 0x01C8 /* DAC12 data 0 */
+sfrw(DAC12_0DAT,DAC12_0DAT_);
+#define DAC12_1DAT_ 0x01CA /* DAC12 data 1 */
+sfrw(DAC12_1DAT,DAC12_1DAT_);
+
+#define DAC12GRP 0x0001 /* DAC12 group */
+#define DAC12ENC 0x0002 /* DAC12 enable conversion */
+#define DAC12IFG 0x0004 /* DAC12 interrupt flag */
+#define DAC12IE 0x0008 /* DAC12 interrupt enable */
+#define DAC12DF 0x0010 /* DAC12 data format */
+#define DAC12AMP0 0x0020 /* DAC12 amplifier bit 0 */
+#define DAC12AMP1 0x0040 /* DAC12 amplifier bit 1 */
+#define DAC12AMP2 0x0080 /* DAC12 amplifier bit 2 */
+#define DAC12IR 0x0100 /* DAC12 input reference and output range */
+#define DAC12CALON 0x0200 /* DAC12 calibration */
+#define DAC12LSEL0 0x0400 /* DAC12 load select bit 0 */
+#define DAC12LSEL1 0x0800 /* DAC12 load select bit 1 */
+#define DAC12RES 0x1000 /* DAC12 resolution */
+#define DAC12SREF0 0x2000 /* DAC12 reference bit 0 */
+#define DAC12SREF1 0x4000 /* DAC12 reference bit 1 */
+#if defined(__msp430_have_dac12_op_amp)
+#define DAC12OPS 0x8000 /* DAC12 Operation Amp. */
+#endif
+
+#define DAC12AMP_0 (0<<5) /* DAC12 amplifier 0: off, 3-state */
+#define DAC12AMP_1 (1<<5) /* DAC12 amplifier 1: off, off */
+#define DAC12AMP_2 (2<<5) /* DAC12 amplifier 2: low, low */
+#define DAC12AMP_3 (3<<5) /* DAC12 amplifier 3: low, medium */
+#define DAC12AMP_4 (4<<5) /* DAC12 amplifier 4: low, high */
+#define DAC12AMP_5 (5<<5) /* DAC12 amplifier 5: medium, medium */
+#define DAC12AMP_6 (6<<5) /* DAC12 amplifier 6: medium, high */
+#define DAC12AMP_7 (7<<5) /* DAC12 amplifier 7: high, high */
+
+#define DAC12LSEL_0 (0<<10) /* DAC12 load select 0: direct */
+#define DAC12LSEL_1 (1<<10) /* DAC12 load select 1: latched with DAT */
+#define DAC12LSEL_2 (2<<10) /* DAC12 load select 2: latched with pos. Timer_A3.OUT1 */
+#define DAC12LSEL_3 (3<<10) /* DAC12 load select 3: latched with pos. Timer_B7.OUT1 */
+
+#define DAC12SREF_0 (0<<13) /* DAC12 reference 0: Vref+ */
+#define DAC12SREF_1 (1<<13) /* DAC12 reference 1: Vref+ */
+#define DAC12SREF_2 (2<<13) /* DAC12 reference 2: Veref+ */
+#define DAC12SREF_3 (3<<13) /* DAC12 reference 3: Veref+ */
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_dma_h
+#define __msp430_headers_dma_h
+
+/* dma12.h
+ *
+ * mspgcc project: MSP430 device headers
+ * DMA module header
+ *
+ * (c) 2002 by Steve Udnerwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: dma.h,v 1.7 2007/07/11 17:38:19 coppice Exp $
+ */
+
+/* Switches: none */
+
+#define DMACTL0_ 0x0122 /* DMA module control 0 */
+sfrw(DMACTL0,DMACTL0_);
+#define DMACTL1_ 0x0124 /* DMA module control 1 */
+sfrw(DMACTL1, DMACTL1_);
+
+#if defined(__MSP430_HAS_DMA_3__)
+#define DMA0CTL_ 0x01E0 /* DMA channel 0 control */
+sfrw(DMA0CTL, DMA0CTL_);
+#define DMA0SA_ 0x01E2 /* DMA channel 0 source address */
+sfrw(DMA0SA, DMA0SA_);
+#define DMA0DA_ 0x01E4 /* DMA channel 0 destination address */
+sfrw(DMA0DA, DMA0DA_);
+#define DMA0SZ_ 0x01E6 /* DMA channel 0 transfer size */
+sfrw(DMA0SZ, DMA0SZ_);
+
+#define DMA1CTL_ 0x01E8 /* DMA channel 1 control */
+sfrw(DMA1CTL, DMA1CTL_);
+#define DMA1SA_ 0x01EA /* DMA channel 1 source address */
+sfrw(DMA1SA, DMA1SA_);
+#define DMA1DA_ 0x01EC /* DMA channel 1 destination address */
+sfrw(DMA1DA, DMA1DA_);
+#define DMA1SZ_ 0x01EE /* DMA channel 1 transfer size */
+sfrw(DMA1SZ, DMA1SZ_);
+
+#define DMA2CTL_ 0x01F0 /* DMA channel 2 control */
+sfrw(DMA2CTL, DMA2CTL_);
+#define DMA2SA_ 0x01F2 /* DMA channel 2 source address */
+sfrw(DMA2SA, DMA2SA_);
+#define DMA2DA_ 0x01F4 /* DMA channel 2 destination address */
+sfrw(DMA2DA, DMA2DA_);
+#define DMA2SZ_ 0x01F6 /* DMA channel 2 transfer size */
+sfrw(DMA2SZ, DMA2SZ_);
+#endif
+
+#if defined(__MSP430_HAS_DMAX_3__)
+#define DMA0CTL_ 0x01D0 /* DMA channel 0 control */
+sfrw(DMA0CTL, DMA0CTL_);
+#define DMA0SA_ 0x01D2 /* DMA channel 0 source address */
+sfra(DMA0SA, DMA0SA_);
+#define DMA0SAL_ 0x01D2 /* DMA channel 0 source address */
+sfrw(DMA0SAL, DMA0SAL_);
+#define DMA0DA_ 0x01D6 /* DMA channel 0 destination address */
+sfra(DMA0DA, DMA0DA_);
+#define DMA0DAL_ 0x01D6 /* DMA channel 0 destination address */
+sfrw(DMA0DAL, DMA0DAL_);
+#define DMA0SZ_ 0x01DA /* DMA channel 0 transfer size */
+sfrw(DMA0SZ, DMA0SZ_);
+
+#define DMA1CTL_ 0x01DC /* DMA channel 1 control */
+sfrw(DMA1CTL, DMA1CTL_);
+#define DMA1SA_ 0x01DE /* DMA channel 1 source address */
+sfra(DMA1SA, DMA1SA_);
+#define DMA1SAL_ 0x01DE /* DMA channel 1 source address */
+sfrw(DMA1SAL, DMA1SAL_);
+#define DMA1DA_ 0x01E2 /* DMA channel 1 destination address */
+sfrw(DMA1DA, DMA1DA_);
+#define DMA1DAL_ 0x01E2 /* DMA channel 1 destination address */
+sfrw(DMA1DAL, DMA1DAL_);
+#define DMA1SZ_ 0x01E6 /* DMA channel 1 transfer size */
+sfrw(DMA1SZ, DMA1SZ_);
+
+#define DMA2CTL_ 0x01E8 /* DMA channel 2 control */
+sfrw(DMA2CTL, DMA2CTL_);
+#define DMA2SA_ 0x01EA /* DMA channel 2 source address */
+sfra(DMA2SA, DMA2SA_);
+#define DMA2SAL_ 0x01EA /* DMA channel 2 source address */
+sfrw(DMA2SAL, DMA2SAL_);
+#define DMA2DA_ 0x01EE /* DMA channel 2 destination address */
+sfra(DMA2DA, DMA2DA_);
+#define DMA2DAL_ 0x01EE /* DMA channel 2 destination address */
+sfrw(DMA2DAL, DMA2DAL_);
+#define DMA2SZ_ 0x01F2 /* DMA channel 2 transfer size */
+sfrw(DMA2SZ, DMA2SZ_);
+#endif
+
+#define SREF_0 (0<<4)
+#define SREF_1 (1<<4)
+#define SREF_2 (2<<4)
+#define SREF_3 (3<<4)
+#define SREF_4 (4<<4)
+#define SREF_5 (5<<4)
+#define SREF_6 (6<<4)
+#define SREF_7 (7<<4)
+#define EOS 0x80
+
+#define DMA0TSEL0 0x0001 /* DMA channel 0 transfer select bit 0 */
+#define DMA0TSEL1 0x0002 /* DMA channel 0 transfer select bit 1 */
+#define DMA0TSEL2 0x0004 /* DMA channel 0 transfer select bit 2 */
+#define DMA0TSEL3 0x0008 /* DMA channel 0 transfer select bit 3 */
+#define DMA1TSEL0 0x0010 /* DMA channel 1 transfer select bit 0 */
+#define DMA1TSEL1 0x0020 /* DMA channel 1 transfer select bit 1 */
+#define DMA1TSEL2 0x0040 /* DMA channel 1 transfer select bit 2 */
+#define DMA1TSEL3 0x0080 /* DMA channel 1 transfer select bit 3 */
+#define DMA2TSEL0 0x0100 /* DMA channel 2 transfer select bit 0 */
+#define DMA2TSEL1 0x0200 /* DMA channel 2 transfer select bit 1 */
+#define DMA2TSEL2 0x0400 /* DMA channel 2 transfer select bit 2 */
+#define DMA2TSEL3 0x0800 /* DMA channel 2 transfer select bit 3 */
+
+#define DMA0TSEL_0 (0<<0) /* DMA channel 0 transfer select 0: DMA_REQ */
+#define DMA0TSEL_1 (1<<0) /* DMA channel 0 transfer select 1: Timer_A CCRIFG.2 */
+#define DMA0TSEL_2 (2<<0) /* DMA channel 0 transfer select 2: Timer_B CCRIFG.2 */
+#define DMA0TSEL_3 (3<<0) /* DMA channel 0 transfer select 3: I2C receive */
+#define DMA0TSEL_4 (4<<0) /* DMA channel 0 transfer select 4: I2C transmit */
+#define DMA0TSEL_5 (5<<0) /* DMA channel 0 transfer select 5: DAC12.0IFG */
+#define DMA0TSEL_6 (6<<0) /* DMA channel 0 transfer select 6: ADC12 (ADC12IFG) */
+#define DMA0TSEL_7 (7<<0) /* DMA channel 0 transfer select 7: Timer_A (TACCR0.IFG) */
+#define DMA0TSEL_8 (8<<0) /* DMA channel 0 transfer select 8: Timer_B (TBCCR0.IFG) */
+#define DMA0TSEL_9 (9<<0) /* DMA channel 0 transfer select 9: UART1 receive */
+#define DMA0TSEL_10 (10<<0) /* DMA channel 0 transfer select 10: UART1 transmit */
+#define DMA0TSEL_11 (11<<0) /* DMA channel 0 transfer select 11: Multiplier ready */
+#define DMA0TSEL_14 (14<<0) /* DMA channel 0 transfer select 14: previous DMA channel DMA2IFG */
+#define DMA0TSEL_15 (15<<0) /* DMA channel 0 transfer select 15: DMAE0 */
+
+#define DMA1TSEL_0 (0<<4) /* DMA channel 1 transfer select 0: DMA_REQ */
+#define DMA1TSEL_1 (1<<4) /* DMA channel 1 transfer select 1: Timer_A CCRIFG.2 */
+#define DMA1TSEL_2 (2<<4) /* DMA channel 1 transfer select 2: Timer_B CCRIFG.2 */
+#define DMA1TSEL_3 (3<<4) /* DMA channel 1 transfer select 3: I2C receive */
+#define DMA1TSEL_4 (4<<4) /* DMA channel 1 transfer select 4: I2C transmit */
+#define DMA1TSEL_5 (5<<4) /* DMA channel 1 transfer select 5: DAC12.0IFG */
+#define DMA1TSEL_6 (6<<4) /* DMA channel 1 transfer select 6: ADC12 (ADC12IFG) */
+#define DMA1TSEL_7 (7<<4) /* DMA channel 1 transfer select 7: Timer_A (TACCR0.IFG) */
+#define DMA1TSEL_8 (8<<4) /* DMA channel 1 transfer select 8: Timer_B (TBCCR0.IFG) */
+#define DMA1TSEL_9 (9<<4) /* DMA channel 1 transfer select 9: UART1 receive */
+#define DMA1TSEL_10 (10<<4) /* DMA channel 1 transfer select 10: UART1 transmit */
+#define DMA1TSEL_11 (11<<4) /* DMA channel 1 transfer select 11: Multiplier ready */
+#define DMA1TSEL_14 (14<<4) /* DMA channel 1 transfer select 14: previous DMA channel DMA0IFG */
+#define DMA1TSEL_15 (15<<4) /* DMA channel 1 transfer select 15: DMAE0 */
+
+#define DMA2TSEL_0 (0<<8) /* DMA channel 2 transfer select 0: DMA_REQ */
+#define DMA2TSEL_1 (1<<8) /* DMA channel 2 transfer select 1: Timer_A CCRIFG.2 */
+#define DMA2TSEL_2 (2<<8) /* DMA channel 2 transfer select 2: Timer_B CCRIFG.2 */
+#define DMA2TSEL_3 (3<<8) /* DMA channel 2 transfer select 3: I2C receive */
+#define DMA2TSEL_4 (4<<8) /* DMA channel 2 transfer select 4: I2C transmit */
+#define DMA2TSEL_5 (5<<8) /* DMA channel 2 transfer select 5: DAC12.0IFG */
+#define DMA2TSEL_6 (6<<8) /* DMA channel 2 transfer select 6: ADC12 (ADC12IFG) */
+#define DMA2TSEL_7 (7<<8) /* DMA channel 2 transfer select 7: Timer_A (TACCR0.IFG) */
+#define DMA2TSEL_8 (8<<8) /* DMA channel 2 transfer select 8: Timer_B (TBCCR0.IFG) */
+#define DMA2TSEL_9 (9<<8) /* DMA channel 2 transfer select 9: UART1 receive */
+#define DMA2TSEL_10 (10<<8) /* DMA channel 2 transfer select 10: UART1 transmit */
+#define DMA2TSEL_11 (11<<8) /* DMA channel 2 transfer select 11: Multiplier ready */
+#define DMA2TSEL_14 (14<<8) /* DMA channel 2 transfer select 14: previous DMA channel DMA1IFG */
+#define DMA2TSEL_15 (15<<8) /* DMA channel 2 transfer select 15: DMAE0 */
+
+#define ENNMI 0x0001 /* Enable NMI interruption of DMA */
+#define ROUNDROBIN 0x0002 /* Round-Robin DMA channel priorities */
+#define DMAONFETCH 0x0004 /* DMA transfer on instruction fetch */
+
+#define DMAREQ 0x0001 /* Initiate DMA transfer with DMATSEL */
+#define DMAABORT 0x0002 /* DMA transfer aborted by NMI */
+#define DMAIE 0x0004 /* DMA interrupt enable */
+#define DMAIFG 0x0008 /* DMA interrupt flag */
+#define DMAEN 0x0010 /* DMA enable */
+#define DMALEVEL 0x0020 /* DMA level sensitive trigger select */
+#define DMASRCBYTE 0x0040 /* DMA source byte */
+#define DMADSTBYTE 0x0080 /* DMA destination byte */
+#define DMASRCINCR0 0x0100 /* DMA source increment bit 0 */
+#define DMASRCINCR1 0x0200 /* DMA source increment bit 1 */
+#define DMADSTINCR0 0x0400 /* DMA destination increment bit 0 */
+#define DMADSTINCR1 0x0800 /* DMA destination increment bit 1 */
+#define DMADT0 0x1000 /* DMA transfer mode bit 0 */
+#define DMADT1 0x2000 /* DMA transfer mode bit 1 */
+#define DMADT2 0x4000 /* DMA transfer mode bit 2 */
+
+#define DMASWDW (0<<6) /* DMA transfer: source word to destination word */
+#define DMASBDW (1<<6) /* DMA transfer: source byte to destination word */
+#define DMASWDB (2<<6) /* DMA transfer: source word to destination byte */
+#define DMASBDB (3<<6) /* DMA transfer: source byte to destination byte */
+
+#define DMASRCINCR_0 (0<<8) /* DMA source increment 0: source address unchanged */
+#define DMASRCINCR_1 (1<<8) /* DMA source increment 1: source address unchanged */
+#define DMASRCINCR_2 (2<<8) /* DMA source increment 2: source address decremented */
+#define DMASRCINCR_3 (3<<8) /* DMA source increment 3: source address incremented */
+
+#define DMADSTINCR_0 (0<<10) /* DMA destination increment 0: destination address unchanged */
+#define DMADSTINCR_1 (1<<10) /* DMA destination increment 1: destination address unchanged */
+#define DMADSTINCR_2 (2<<10) /* DMA destination increment 2: destination address decremented */
+#define DMADSTINCR_3 (3<<10) /* DMA destination increment 3: destination address incremented */
+
+#define DMADT_0 (0<<12) /* DMA transfer mode 0: single */
+#define DMADT_1 (1<<12) /* DMA transfer mode 1: block */
+#define DMADT_2 (2<<12) /* DMA transfer mode 2: interleaved */
+#define DMADT_3 (3<<12) /* DMA transfer mode 3: interleaved */
+#define DMADT_4 (4<<12) /* DMA transfer mode 4: single, repeat */
+#define DMADT_5 (5<<12) /* DMA transfer mode 5: block, repeat */
+#define DMADT_6 (6<<12) /* DMA transfer mode 6: interleaved, repeat */
+#define DMADT_7 (7<<12) /* DMA transfer mode 7: interleaved, repeat */
+
+
+/* Aliases by mspgcc */
+#define DMADT_SINGLE (0<<12) /* DMA transfer mode 0: single */
+#define DMADT_BLOCK (1<<12) /* DMA transfer mode 1: block */
+#define DMADT_INTERLEAVED (2<<12) /* DMA transfer mode 2: interleaved */
+//~ #define DMADT_3 (3<<12) /* DMA transfer mode 3: interleaved */
+#define DMADT_SINGLEREPEAT (4<<12) /* DMA transfer mode 4: single, repeat */
+#define DMADT_BLOCKREPEAT (5<<12) /* DMA transfer mode 5: block, repeat */
+#define DMADT_INTERLEAVEDREPEAT (6<<12) /* DMA transfer mode 6: interleaved, repeat */
+//~ #define DMADT_7 (7<<12) /* DMA transfer mode 7: interleaved, repeat */
+
+#define DMA0TSEL_DMA_REQ (0<<0) /* DMA channel 0 transfer select 0: DMA_REQ */
+#define DMA0TSEL_TACCR2 (1<<0) /* DMA channel 0 transfer select 1: Timer_A CCRIFG.2 */
+#define DMA0TSEL_TBCCR2 (2<<0) /* DMA channel 0 transfer select 2: Timer_B CCRIFG.2 */
+#define DMA0TSEL_I2CRX (3<<0) /* DMA channel 0 transfer select 3: I2C receive */
+#define DMA0TSEL_I2CTX (4<<0) /* DMA channel 0 transfer select 4: I2C transmit */
+#define DMA0TSEL_DAC12 (5<<0) /* DMA channel 0 transfer select 5: DAC12.0IFG */
+#define DMA0TSEL_ADC12 (6<<0) /* DMA channel 0 transfer select 6: ADC12 (ADC12IFG) */
+#define DMA0TSEL_TACCR0 (7<<0) /* DMA channel 0 transfer select 7: Timer_A (TACCR0.IFG) */
+#define DMA0TSEL_TBCCR0 (8<<0) /* DMA channel 0 transfer select 8: Timer_B (TBCCR0.IFG) */
+#define DMA0TSEL_USART1RX (9<<0) /* DMA channel 0 transfer select 9: UART1 receive */
+#define DMA0TSEL_USART1TX (10<<0) /* DMA channel 0 transfer select 10: UART1 transmit */
+#define DMA0TSEL_MUL (11<<0) /* DMA channel 0 transfer select 11: Multiplier ready */
+//~ #define DMA0TSEL_14 (14<<0) /* DMA channel 0 transfer select 14: previous DMA channel DMA2IFG */
+//~ #define DMA0TSEL_15 (15<<0) /* DMA channel 0 transfer select 15: DMAE0 */
+
+#define DMA1TSEL_DMA_REQ (0<<4) /* DMA channel 1 transfer select 0: DMA_REQ */
+#define DMA1TSEL_TACCR2 (1<<4) /* DMA channel 1 transfer select 1: Timer_A CCRIFG.2 */
+#define DMA1TSEL_TBCCR2 (2<<4) /* DMA channel 1 transfer select 2: Timer_B CCRIFG.2 */
+#define DMA1TSEL_I2CRX (3<<4) /* DMA channel 1 transfer select 3: I2C receive */
+#define DMA1TSEL_I2CTX (4<<4) /* DMA channel 1 transfer select 4: I2C transmit */
+#define DMA1TSEL_DAC12 (5<<4) /* DMA channel 1 transfer select 5: DAC12.0IFG */
+#define DMA1TSEL_ADC12 (6<<4) /* DMA channel 1 transfer select 6: ADC12 (ADC12IFG) */
+#define DMA1TSEL_TACCR0 (7<<4) /* DMA channel 1 transfer select 7: Timer_A (TACCR0.IFG) */
+#define DMA1TSEL_TBCCR0 (8<<4) /* DMA channel 1 transfer select 8: Timer_B (TBCCR0.IFG) */
+#define DMA1TSEL_USART1RX (9<<4) /* DMA channel 1 transfer select 9: UART1 receive */
+#define DMA1TSEL_USART1TX (10<<4) /* DMA channel 1 transfer select 10: UART1 transmit */
+#define DMA1TSEL_MUL (11<<4) /* DMA channel 1 transfer select 11: Multiplier ready */
+//~ #define DMA1TSEL_14 (14<<4) /* DMA channel 1 transfer select 14: previous DMA channel DMA0IFG */
+//~ #define DMA1TSEL_15 (15<<4) /* DMA channel 1 transfer select 15: DMAE0 */
+
+#define DMA2TSEL_DMA_REQ (0<<8) /* DMA channel 2 transfer select 0: DMA_REQ */
+#define DMA2TSEL_TACCR2 (1<<8) /* DMA channel 2 transfer select 1: Timer_A CCRIFG.2 */
+#define DMA2TSEL_TBCCR2 (2<<8) /* DMA channel 2 transfer select 2: Timer_B CCRIFG.2 */
+#define DMA2TSEL_I2CRX (3<<8) /* DMA channel 2 transfer select 3: I2C receive */
+#define DMA2TSEL_I2CTX (4<<8) /* DMA channel 2 transfer select 4: I2C transmit */
+#define DMA2TSEL_DAC12 (5<<8) /* DMA channel 2 transfer select 5: DAC12.0IFG */
+#define DMA2TSEL_ADC12 (6<<8) /* DMA channel 2 transfer select 6: ADC12 (ADC12IFG) */
+#define DMA2TSEL_TACCR0 (7<<8) /* DMA channel 2 transfer select 7: Timer_A (TACCR0.IFG) */
+#define DMA2TSEL_TBCCR0 (8<<8) /* DMA channel 2 transfer select 8: Timer_B (TBCCR0.IFG) */
+#define DMA2TSEL_USART1RX (9<<8) /* DMA channel 2 transfer select 9: UART1 receive */
+#define DMA2TSEL_USART1TX (10<<8) /* DMA channel 2 transfer select 10: UART1 transmit */
+#define DMA2TSEL_MUL (11<<8) /* DMA channel 2 transfer select 11: Multiplier ready */
+//~ #define DMA2TSEL_14 (14<<8) /* DMA channel 2 transfer select 14: previous DMA channel DMA1IFG */
+//~ #define DMA2TSEL_15 (15<<8) /* DMA channel 2 transfer select 15: DMAE0 */
+
+#endif
--- /dev/null
+
+#ifndef __msp430_headers_eprom_h
+#define __msp430_headers_eprom_h
+
+/* eprom.h
+ *
+ * mspgcc project: MSP430 device headers
+ * EPROM control registers
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: eprom.h,v 1.1 2002/03/20 01:54:44 data Exp $
+ */
+
+/* Switches: none */
+
+#define EPCTL_ 0x0054 /* EPROM Control */
+sfrb (EPCTL,EPCTL_);
+#define EPEXE 0x01
+#define EPVPPS 0x02
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_esp430e_h
+#define __msp430_headers_esp430e_h
+
+/* esp430e.h
+ *
+ * mspgcc project: MSP430 device headers
+ * ESP module header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: esp430e.h,v 1.5 2006/12/26 10:33:14 coppice Exp $
+ */
+
+/* Switches: none */
+
+#define ESPCTL_ 0x0150 /* ESP430 Control Register */
+sfrw(ESPCTL, ESPCTL_);
+#define MBCTL_ 0x0152 /* Mailbox Control Register */
+sfrw(MBCTL, MBCTL_);
+#define MBIN0_ 0x0154 /* Incoming Mailbox 0 Register */
+sfrw(MBIN0, MBIN0_);
+#define MBIN1_ 0x0156 /* Incoming Mailbox 1 Register */
+sfrw(MBIN1, MBIN1_);
+#define MBOUT0_ 0x0158 /* Outgoing Mailbox 0 Register */
+sfrw(MBOUT0, MBOUT0_);
+#define MBOUT1_ 0x015A /* Outgoing Mailbox 1 Register */
+sfrw(MBOUT1, MBOUT1_);
+
+#define RET0_ 0x01C0 /* ESP430 Return Value 0 */
+sfrw(RET0, RET0_);
+#define RET1_ 0x01C2 /* ESP430 Return Value 1 */
+sfrw(RET1, RET1_);
+#define RET2_ 0x01C4 /* ESP430 Return Value 2 */
+sfrw(RET2, RET2_);
+#define RET3_ 0x01C6 /* ESP430 Return Value 3 */
+sfrw(RET3, RET3_);
+#define RET4_ 0x01C8 /* ESP430 Return Value 4 */
+sfrw(RET4, RET4_);
+#define RET5_ 0x01CA /* ESP430 Return Value 5 */
+sfrw(RET5, RET5_);
+#define RET6_ 0x01CC /* ESP430 Return Value 6 */
+sfrw(RET6, RET6_);
+#define RET7_ 0x01CE /* ESP430 Return Value 7 */
+sfrw(RET7, RET7_);
+#define RET8_ 0x01D0 /* ESP430 Return Value 8 */
+sfrw(RET8, RET8_);
+#define RET9_ 0x01D2 /* ESP430 Return Value 9 */
+sfrw(RET9, RET9_);
+#define RET10_ 0x01D4 /* ESP430 Return Value 10 */
+sfrw(RET10, RET10_);
+#define RET11_ 0x01D6 /* ESP430 Return Value 11 */
+sfrw(RET11, RET11_);
+#define RET12_ 0x01D8 /* ESP430 Return Value 12 */
+sfrw(RET12, RET12_);
+#define RET13_ 0x01DA /* ESP430 Return Value 13 */
+sfrw(RET13, RET13_);
+#define RET14_ 0x01DC /* ESP430 Return Value 14 */
+sfrw(RET14, RET14_);
+#define RET15_ 0x01DE /* ESP430 Return Value 15 */
+sfrw(RET15, RET15_);
+#define RET16_ 0x01E0 /* ESP430 Return Value 16 */
+sfrw(RET16, RET16_);
+#define RET17_ 0x01E2 /* ESP430 Return Value 17 */
+sfrw(RET17, RET17_);
+#define RET18_ 0x01E4 /* ESP430 Return Value 18 */
+sfrw(RET18, RET18_);
+#define RET19_ 0x01E6 /* ESP430 Return Value 19 */
+sfrw(RET19, RET19_);
+#define RET20_ 0x01E8 /* ESP430 Return Value 20 */
+sfrw(RET20, RET20_);
+#define RET21_ 0x01EA /* ESP430 Return Value 21 */
+sfrw(RET21, RET21_);
+#define RET22_ 0x01EC /* ESP430 Return Value 22 */
+sfrw(RET22, RET22_);
+#define RET23_ 0x01EE /* ESP430 Return Value 23 */
+sfrw(RET23, RET23_);
+#define RET24_ 0x01F0 /* ESP430 Return Value 24 */
+sfrw(RET24, RET24_);
+#define RET25_ 0x01F2 /* ESP430 Return Value 25 */
+sfrw(RET25, RET25_);
+#define RET26_ 0x01F4 /* ESP430 Return Value 26 */
+sfrw(RET26, RET26_);
+#define RET27_ 0x01F6 /* ESP430 Return Value 27 */
+sfrw(RET27, RET27_);
+#define RET28_ 0x01F8 /* ESP430 Return Value 28 */
+sfrw(RET28, RET28_);
+#define RET29_ 0x01FA /* ESP430 Return Value 29 */
+sfrw(RET29, RET29_);
+#define RET30_ 0x01FC /* ESP430 Return Value 30 */
+sfrw(RET30, RET30_);
+#define RET31_ 0x01FE /* ESP430 Return Value 31 */
+sfrw(RET31, RET31_);
+
+#define ESP430_STAT0 RET0 /* STATUS0 of ESP430 */
+#define ESP430_STAT1 RET1 /* STATUS1 of ESP430 */
+#define WAVEFSV1 RET2 /* Waveform Sample V1 offset corrected*/
+#define WAVEFSI1 RET5 /* Waveform Sample I1 offset corrected*/
+#define WAVEFSI2 RET6 /* Waveform Sample I2 offset corrected*/
+#define ACTENERGY1_LO RET8 /* Active energy I1 Low Word */
+#define ACTENERGY1_HI RET9 /* Active energy I1 High Word */
+#define ACTENERGY2_LO RET10 /* Active energy I2 Low Word */
+#define ACTENERGY2_HI RET11 /* Active energy I2 High Word*/
+#define REACTENERGY_LO RET12 /* Reactive energy Low Word */
+#define REACTENERGY_HI RET13 /* Reactive energy High Word */
+#define APPENERGY_LO RET14 /* Apparent energy Low Word */
+#define APPENERGY_HI RET15 /* Apparent energy High Word */
+#define ACTENSPER1_LO RET16 /* Active energy I1 for last mains period Low Word */
+#define ACTENSPER1_HI RET17 /* Active energy I1 for last mains period High Word */
+#define ACTENSPER2_LO RET18 /* Active energy I2 for last mains period Low Word */
+#define ACTENSPER2_HI RET19 /* Active energy I2 for last mains period High Word */
+#define POWERFCT RET20 /* Power factor */
+#define CAPIND RET21 /* Power factor: neg: inductive pos: cap. (LowByte)*/
+#define MAINSPERIOD RET22 /* Mains period */
+#define V1RMS RET23 /* Voltage RMS V1 value last second */
+#define IRMS_LO RET24 /* Current RMS value last second I1 I2 Low Word */
+#define IRMS_HI RET25 /* Current RMS value last second I1 I2 High Word */
+#define VPEAK RET26 /* Voltage V1 absolute peak value */
+#define IPEAK RET27 /* Current absolute peak value I1 I2 */
+#define LINECYCLCNT_LO RET28 /* Line cycle counter Low Word */
+#define LINECYCLCNT_HI RET29 /* Line cycle counter High Word */
+#define NMBMEAS_LO RET30 /* Number of Measurements for CPU signal Low Word */
+#define NMBMEAS_HI RET31 /* Number of Measurements for CPU signal High Word */
+
+/* ESPCTL */
+#define ESPEN (0x0001) /* ESP430 Module enable */
+#define ESPSUSP (0x0002) /* ESP430 Module suspend */
+#define IREQ (0x0004) /* NOT supported by current ESP430 Software */
+
+/* RET0 - Status0 Flags */
+#define WFSRDYFG (0x0001) /* New waveform Samples ready Flag */
+#define I2GTI1FG (0x0002) /* Current I2 greater then I1 Flag */
+#define ILREACHEDFG (0x0004) /* Interrupt level reached Flag */
+#define ENRDYFG (0x0008) /* New Energy values ready Flag */
+#define ZXLDFG (0x0010) /* Zero Crossing of V1 Flag (leading edge) */
+#define ZXTRFG (0x0020) /* Zero Crossing of V1 Flag (trailing edge) */
+#define CALRDYFG (0x0040) /* Calibration values ready Flag */
+#define TAMPFG (0x0080) /* Tampering Occured Flag */
+#define NEGENFG (0x0100) /* Negativ Energy Flag */
+#define VDROPFG (0x0200) /* Voltage drop occured Flag */
+#define VPEAKFG (0x0400) /* Voltage exceed VPeak level Flag */
+#define I1PEAKFG (0x0800) /* Current exceed I1Peak level Flag */
+#define I2PEAKFG (0x1000) /* Current exceed I2Peak level Flag */
+//#define RESERVED (0x8000) /* Reserved */
+//#define RESERVED (0x8000) /* Reserved */
+#define ACTIVEFG (0x8000) /* Measurement or Calibration running Flag */
+
+/* MBCTL */
+#define IN0IFG (0x0001) /* Incoming Mail 0 Interrupt Flag */
+#define IN1IFG (0x0002) /* Incoming Mail 1 Interrupt Flag */
+#define OUT0FG (0x0004) /* Outgoing Mail 0 Flag */
+#define OUT1FG (0x0008) /* Outgoing Mail 1 Flag */
+#define IN0IE (0x0010) /* Incoming Mail 0 Interrupt Enable */
+#define IN1IE (0x0020) /* Incoming Mail 1 Interrupt Enable */
+#define CLR0OFF (0x0040) /* Switch off automatic clear of IN0IFG */
+#define CLR1OFF (0x0080) /* Switch off automatic clear of IN1IFG */
+#define OUT0IFG (0x0100) /* Outgoing Mail 0 Interrupt Flag */
+#define OUT1IFG (0x0200) /* Outgoing Mail 1 Interrupt Flag */
+#define OUT0IE (0x0400) /* Outgoing Mail 0 Interrupt Enable */
+#define OUT1IE (0x0800) /* Outgoing Mail 1 Interrupt Enable */
+
+/* Messages to ESP */
+#define mRESET (0x0001) /* Restart ESP430 Software */
+#define mSET_MODE (0x0003) /* Set Operation Mode for ESP430 Software */
+#define mCLR_EVENT (0x0005) /* Clear Flags for ESP430 Software */
+#define mINIT (0x0007) /* Initialize ESP430 Software */
+#define mTEMP (0x0009) /* Request Temp. Measurement from ESP430 Software */
+#define mSWVERSION (0x000B) /* Request software version of ESP430 */
+#define mREAD_PARAM (0x000D) /* Request to read the parameter with no. "Parameter No." */
+#define mREAD_I2 (0x000F) /* Request to read the I2 channel (only if not used) */
+
+#define mSET_CTRL0 (0x0200) /* Set Control Register 0 */
+#define mSET_CTRL1 (0x0202) /* Set Control Register 1 */
+#define mSET_EVENT (0x0204) /* Set which Evenets should cause an message */
+#define mSET_PHASECORR1 (0x0206) /* Set Phase Correction fo I1 */
+#define mSET_PHASECORR2 (0x0208) /* Set Phase Correction fo I2 */
+#define mSET_V1OFFSET (0x020A) /* Set Offset for V1 */
+#define mSET_I1OFFSET (0x020C) /* Set Offset for I1 */
+#define mSET_I2OFFSET (0x020E) /* Set Offset for I2 */
+#define mSET_ADAPTI1 (0x0210) /* Set Adaption factor for I1 */
+#define mSET_ADAPTI2 (0x0212) /* Set Adaption factor for I2 */
+#define mSET_GAINCORR1 (0x0214) /* Set Gain Correction for Power P1 */
+#define mSET_POFFSET1_LO (0x0216) /* Set Power Offset for Power P1 */
+#define mSET_POFFSET1_HI (0x0218) /* Set Power Offset for Power P1 */
+#define mSET_GAINCORR2 (0x021A) /* Set Gain Correction for Power P2 */
+#define mSET_POFFSET2_LO (0x021C) /* Set Power Offset for Power P2 */
+#define mSET_POFFSET2_HI (0x021E) /* Set Power Offset for Power P2 */
+#define mSET_INTRPTLEVL_LO (0x0220) /* Set Interrupt Level */
+#define mSET_INTRPTLEVL_HI (0x0222) /* Set Interrupt Level */
+#define mSET_CALCYCLCNT (0x0224) /* Set number of main cycles for calibration */
+#define mSET_STARTCURR_FRAC (0x0226) /* Set start current */
+#define mSET_STARTCURR_INT (0x0228) /* Set start current */
+#define mSET_NOMFREQ (0x022A) /* Set nominal main frequency */
+#define mSET_VDROPCYCLS (0x022C) /* Set cylces for VDrop detection */
+#define mSET_RATIOTAMP (0x022E) /* Set ratio for tamper detection */
+#define mSET_ITAMP (0x0230) /* Set minimum current for tamper detection */
+#define mSET_VDROPLEVEL (0x0232) /* Set level for VDrop detection */
+#define mSET_VPEAKLEVEL (0x0234) /* Set level for VPeak detection */
+#define mSET_IPEAKLEVEL (0x0236) /* Set level for IPeak detection */
+#define mSET_DCREMPER (0x0238) /* Set number of periods for DC-removal */
+
+/* Flags for mSET_CTRL0 */
+#define CURR_I2 (0x0001) /* 0: No I2 path, only I1 path is used */
+ /* 1: I2 path implemented (CT, dc-tol CT or shunt) */
+#define CURR_I1 (0x0002) /* 0: Current transformer, dc-tol CT or shunt */
+ /* 1: Rogowski coil (not yet implemented) */
+#define MB (0x0004) /* Intrpt to CPU: 0: energy level 1: #measurements */
+#define NE0 (0x0008) /* Neg. energy treatment: 00: clear neg. energy */
+#define NE1 (0x0010) /* 01: use absolute energy 10: use energy as it is */
+#define DCREM_V1 (0x0020) /* DC removal for V1: 0: off 1: on */
+#define DCREM_I1 (0x0040) /* DC removal for I1: 0: off 1: on */
+#define DCREM_I2 (0x0080) /* DC removal for I2: 0: off 1: on */
+
+/* Messages from ESP */
+#define mEVENT (0x0001) /* Event Status Flag for ESP430 Software */
+#define mTEMPRDY (0x0003) /* Temperature measurement completed and in MBIN1 */
+#define mSWRDY (0x0005) /* Software version in MBIN1 */
+#define mPARAMRDY (0x0007) /* Parameter requested by mREAD_PARAM returned in MBIN1 */
+#define mPARAMSET (0x0009) /* Parameter has been set */
+#define mI2RDY (0x000B) /* I2 value ready */
+
+/* EVENT: Event Message Enable Bits */
+#define WFSRDYME (0x0001) /* New waveform Samples ready */
+#define I2GTI1ME (0x0002) /* Current I2 greater then I1 */
+#define ILREACHEDME (0x0004) /* Interrupt level reached */
+#define ENRDYME (0x0008) /* New Energy values ready */
+#define ZXLDME (0x0010) /* Zero Crossing of V1 (leading edge) */
+#define ZXTRME (0x0020) /* Zero Crossing of V1 (trailing edge) */
+#define CALRDYME (0x0040) /* Calibration values ready */
+#define TAMPME (0x0080) /* Tampering Occured */
+#define NEGENME (0x0100) /* Negativ Energy */
+#define VDROPME (0x0200) /* Voltage drop occured */
+#define VPEAKME (0x0400) /* Voltage exceed VPeak level */
+#define I1PEAKME (0x0800) /* Current exceed I1Peak level */
+#define I2PEAKME (0x1000) /* Current exceed I2Peak level */
+//#define RESERVED (0x8000) /* Reserved */
+//#define RESERVED (0x8000) /* Reserved */
+#define ACTIVEME (0x8000) /* Measurement of Calibration running */
+
+
+/* ESP Modes */
+#define modeIDLE (0x0000) /* Set Mode: Idle Mode */
+#define modeCALIBRATION (0x0002) /* Set Mode: Calibration Mode */
+#define modeMEASURE (0x0004) /* Set Mode: Measure Mode */
+#define modeRESET (0x0006) /* Set Mode: Reset and Restart the ESP430 module */
+#define modeINIT (0x0008) /* Set Mode: Initialize ESP430 module */
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_flash_h
+#define __msp430_headers_flash_h
+
+/* flash.h
+ *
+ * mspgcc project: MSP430 device headers
+ * FLASH control registers
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: flash.h,v 1.5 2005/08/17 14:28:46 coppice Exp $
+ */
+
+/* Switches:
+__MSP430_HAS_FLASH2__
+*/
+
+#define FCTL1_ 0x0128 /* FLASH Control 1 */
+sfrw (FCTL1,FCTL1_);
+#define FCTL2_ 0x012A /* FLASH Control 2 */
+sfrw (FCTL2,FCTL2_);
+#define FCTL3_ 0x012C /* FLASH Control 3 */
+sfrw (FCTL3,FCTL3_);
+
+#define FRKEY 0x9600 /* Flash key returned by read */
+#define FWKEY 0xA500 /* Flash key for write */
+#define FXKEY 0x3300 /* for use with XOR instruction */
+
+#define ERASE 0x0002 /* Enable bit for flash segment erase */
+#define MERAS 0x0004 /* Enable bit for flash mass erase */
+#if defined(__MSP430_HAS_FLASH2__)
+#define EEI 0x0008 /* Enable Erase Interrupts */
+#define EEIEX 0x0010 /* Enable Emergency Interrupt Exit */
+#endif
+#define WRT 0x0040 /* Enable bit for flash write */
+#define BLKWRT 0x0080 /* Enable bit for flash segment write */
+#define SEGWRT 0x0080 /* old definition */ /* Enable bit for Flash segment write */
+
+#define FN0 0x0001 /* Divide flash clock by: 2^0 */
+#define FN1 0x0002 /* Divide flash clock by: 2^1 */
+#define FN2 0x0004 /* Divide flash clock by: 2^2 */
+#define FN3 0x0008 /* Divide flash clock by: 2^3 */
+#define FN4 0x0010 /* Divide flash clock by: 2^4 */
+#define FN5 0x0020 /* Divide flash clock by: 2^5 */
+#define FSSEL0 0x0040 /* Flash clock select 0 */ /* to distinguish from UART SSELx */
+#define FSSEL1 0x0080 /* Flash clock select 1 */
+
+#define FSSEL_0 0x0000 /* Flash clock select: 0 - ACLK */
+#define FSSEL_1 0x0040 /* Flash clock select: 1 - MCLK */
+#define FSSEL_2 0x0080 /* Flash clock select: 2 - SMCLK */
+#define FSSEL_3 0x00C0 /* Flash clock select: 3 - SMCLK */
+
+#define BUSY 0x0001 /* Flash busy: 1 */
+#define KEYV 0x0002 /* Flash Key violation flag */
+#define ACCVIFG 0x0004 /* Flash Access violation flag */
+#define WAIT 0x0008 /* Wait flag for segment write */
+#define LOCK 0x0010 /* Lock bit: 1 - Flash is locked (read only) */
+#define EMEX 0x0020 /* Flash Emergency Exit */
+#if defined(__MSP430_HAS_FLASH2__)
+#define LOCKA 0x0040 /* Segment A Lock bit: read = 1 - Segment is locked (read only) */
+#define FAIL 0x0080 /* Last Program or Erase failed */
+#endif
+
+/* Aliases by mspgcc */
+#define FSSEL_ACLK FSSEL_0
+#define FSSEL_MCLK FSSEL_1
+#define FSSEL_SMCLK FSSEL_2
+/*#define FSSEL_SMCLK FSSEL_3*/
+
+#endif
--- /dev/null
+#include <msp430/iostructures.h>
+
+#if !defined(__msp430_headers_gpio_h)
+#define __msp430_headers_gpio_h
+
+/* gpio.h
+ *
+ * mspgcc project: MSP430 device headers
+ * GPIO module header
+ *
+ * 2008-06-04 - TonyB (tony.borries@gmail.com)
+ * - for msp430x2618 (and possibly others)
+ * - define __MSP430_HAS_PORT7_R__ and __MSP430_HAS_PORT7_R__
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: gpio.h,v 1.7 2008/06/16 23:22:19 cliechti Exp $
+ */
+
+/* Switches:
+
+__MSP430_HAS_PORT0__ - if device has port 0
+__MSP430_HAS_PORT1__ - if device has port 1
+__MSP430_HAS_PORT1_R__ - if device has port 1 with pull-downs
+__MSP430_HAS_PORT2__ - if device has port 2
+__MSP430_HAS_PORT2_R__ - if device has port 2 with pull-downs
+__MSP430_HAS_PORT3__ - if device has port 3
+__MSP430_HAS_PORT3_R__ - if device has port 3 with pull-downs
+__MSP430_HAS_PORT4__ - if device has port 4
+__MSP430_HAS_PORT4_R__ - if device has port 4 with pull-downs
+__MSP430_HAS_PORT5__ - if device has port 5
+__MSP430_HAS_PORT5_R__ - if device has port 5 with pull-downs
+__MSP430_HAS_PORT6__ - if device has port 6
+__MSP430_HAS_PORT6_R__ - if device has port 6 with pull-downs
+__MSP430_HAS_PORT7__ - if device has port 7
+__MSP430_HAS_PORT7_R__ - if device has port 7 with pull-downs
+__MSP430_HAS_PORT8__ - if device has port 8
+__MSP430_HAS_PORT8_R__ - if device has port 8 with pull-downs
+__MSP430_HAS_PORTA__ - if device has port A (16 bit view of ports 7 & 8)
+__MSP430_HAS_PORT9__ - if device has port 9
+__MSP430_HAS_PORT10__ - if device has port 10
+__MSP430_HAS_PORTB__ - if device has port B (16 bit view of ports 9 & 10)
+
+Note: these only make sense if the port itself is present. Also note that
+the port resistor enable registers for ports 3-6 overlap with port 0 registers,
+so any device that has these resistors will not have port 0.
+*/
+
+#if defined(__MSP430_HAS_PORT0__)
+#define P0IN_ 0x0010 /* Port 0 Input */
+sfrb(P0IN, P0IN_);
+#define P0IN_0 0x01
+#define P0IN_1 0x02
+#define P0IN_2 0x04
+#define P0IN_3 0x08
+#define P0IN_4 0x10
+#define P0IN_5 0x20
+#define P0IN_6 0x40
+#define P0IN_7 0x80
+
+#define P0OUT_ 0x0011 /* Port 0 Output */
+sfrb(P0OUT, P0OUT_);
+#define P0OUT_0 0x01
+#define P0OUT_1 0x02
+#define P0OUT_2 0x04
+#define P0OUT_3 0x08
+#define P0OUT_4 0x10
+#define P0OUT_5 0x20
+#define P0OUT_6 0x40
+#define P0OUT_7 0x80
+
+#define P0DIR_ 0x0012 /* Port 0 Direction */
+sfrb(P0DIR, P0DIR_);
+#define P0DIR_0 0x01
+#define P0DIR_1 0x02
+#define P0DIR_2 0x04
+#define P0DIR_3 0x08
+#define P0DIR_4 0x10
+#define P0DIR_5 0x20
+#define P0DIR_6 0x40
+#define P0DIR_7 0x80
+
+#define P0IFG_ 0x0013 /* Port 0 Interrupt Flag */
+sfrb(P0IFG, P0IFG_);
+/* These two bits are defined in Interrupt Flag 1 */
+/* #define P0IFG_0 0x01 */
+/* #define P0IFG_1 0x02 */
+#define P0IFG_2 0x04
+#define P0IFG_3 0x08
+#define P0IFG_4 0x10
+#define P0IFG_5 0x20
+#define P0IFG_6 0x40
+#define P0IFG_7 0x80
+
+#define P0IES_ 0x0014 /* Port 0 Interrupt Edge Select */
+sfrb(P0IES, P0IES_);
+#define P0IES_0 0x01
+#define P0IES_1 0x02
+#define P0IES_2 0x04
+#define P0IES_3 0x08
+#define P0IES_4 0x10
+#define P0IES_5 0x20
+#define P0IES_6 0x40
+#define P0IES_7 0x80
+
+#define P0IE_ 0x0015 /* Port 0 Interrupt Enable */
+sfrb(P0IE, P0IE_);
+/* These two bits are defined in Interrupt Enable 1 */
+/* #define P0IE_0 0x01 */
+/* #define P0IE_1 0x02 */
+#define P0IE_2 0x04
+#define P0IE_3 0x08
+#define P0IE_4 0x10
+#define P0IE_5 0x20
+#define P0IE_6 0x40
+#define P0IE_7 0x80
+#endif
+
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
+#define P1IN_ 0x0020 /* Port 1 Input */
+sfrb(P1IN, P1IN_);
+#define P1OUT_ 0x0021 /* Port 1 Output */
+sfrb(P1OUT, P1OUT_);
+#define P1DIR_ 0x0022 /* Port 1 Direction */
+sfrb(P1DIR, P1DIR_);
+#define P1IFG_ 0x0023 /* Port 1 Interrupt Flag */
+sfrb(P1IFG, P1IFG_);
+#define P1IES_ 0x0024 /* Port 1 Interrupt Edge Select */
+sfrb(P1IES, P1IES_);
+#define P1IE_ 0x0025 /* Port 1 Interrupt Enable */
+sfrb(P1IE, P1IE_);
+#define P1SEL_ 0x0026 /* Port 1 Selection */
+sfrb(P1SEL, P1SEL_);
+#if defined(__MSP430_HAS_PORT1_R__)
+#define P1REN_ 0x0027 /* Port 1 Resistor enable */
+sfrb(P1REN, P1REN_);
+#endif
+#endif
+
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
+#define P2IN_ 0x0028 /* Port 2 Input */
+sfrb(P2IN, P2IN_);
+#define P2OUT_ 0x0029 /* Port 2 Output */
+sfrb(P2OUT, P2OUT_);
+#define P2DIR_ 0x002A /* Port 2 Direction */
+sfrb(P2DIR, P2DIR_);
+#define P2IFG_ 0x002B /* Port 2 Interrupt Flag */
+sfrb(P2IFG, P2IFG_);
+#define P2IES_ 0x002C /* Port 2 Interrupt Edge Select */
+sfrb(P2IES, P2IES_);
+#define P2IE_ 0x002D /* Port 2 Interrupt Enable */
+sfrb(P2IE, P2IE_);
+#define P2SEL_ 0x002E /* Port 2 Selection */
+sfrb(P2SEL, P2SEL_);
+#if defined(__MSP430_HAS_PORT2_R__)
+#define P2REN_ 0x002F /* Port 2 Resistor enable */
+sfrb(P2REN, P2REN_);
+#endif
+#endif
+
+#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
+#define P3IN_ 0x0018 /* Port 3 Input */
+sfrb(P3IN, P3IN_);
+#define P3OUT_ 0x0019 /* Port 3 Output */
+sfrb(P3OUT, P3OUT_);
+#define P3DIR_ 0x001A /* Port 3 Direction */
+sfrb(P3DIR, P3DIR_);
+#define P3SEL_ 0x001B /* Port 3 Selection */
+sfrb(P3SEL, P3SEL_);
+#if defined(__MSP430_HAS_PORT3_R__)
+#define P3REN_ 0x0010 /* Port 3 Resistor enable */
+sfrb(P3REN, P3REN_);
+#endif
+#endif
+
+#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
+#define P4IN_ 0x001C /* Port 4 Input */
+sfrb(P4IN, P4IN_);
+#define P4OUT_ 0x001D /* Port 4 Output */
+sfrb(P4OUT, P4OUT_);
+#define P4DIR_ 0x001E /* Port 4 Direction */
+sfrb(P4DIR, P4DIR_);
+#define P4SEL_ 0x001F /* Port 4 Selection */
+sfrb(P4SEL, P4SEL_);
+#if defined(__MSP430_HAS_PORT4_R__)
+#define P4REN_ 0x0011 /* Port 4 Resistor enable */
+sfrb(P4REN, P4REN_);
+#endif
+#endif
+
+#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
+#define P5IN_ 0x0030 /* Port 5 Input */
+sfrb(P5IN, P5IN_);
+#define P5OUT_ 0x0031 /* Port 5 Output */
+sfrb(P5OUT, P5OUT_);
+#define P5DIR_ 0x0032 /* Port 5 Direction */
+sfrb(P5DIR, P5DIR_);
+#define P5SEL_ 0x0033 /* Port 5 Selection */
+sfrb(P5SEL, P5SEL_);
+#if defined(__MSP430_HAS_PORT5_R__)
+#define P5REN_ 0x0012 /* Port 5 Resistor enable */
+sfrb(P5REN, P5REN_);
+#endif
+#endif
+
+#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
+#define P6IN_ 0x0034 /* Port 6 Input */
+sfrb(P6IN, P6IN_);
+#define P6OUT_ 0x0035 /* Port 6 Output */
+sfrb(P6OUT, P6OUT_);
+#define P6DIR_ 0x0036 /* Port 6 Direction */
+sfrb(P6DIR, P6DIR_);
+#define P6SEL_ 0x0037 /* Port 6 Selection */
+sfrb(P6SEL, P6SEL_);
+#if defined(__MSP430_HAS_PORT6_R__)
+#define P6REN_ 0x0013 /* Port 6 Resistor enable */
+sfrb(P6REN, P6REN_);
+#endif
+#endif
+
+#if defined(__MSP430_HAS_PORT7__) || defined(__MSP430_HAS_PORT7_R__)
+#define P7IN_ 0x0038 /* Port 7 Input */
+sfrb(P7IN, P7IN_);
+#define P7OUT_ 0x003A /* Port 7 Output */
+sfrb(P7OUT, P7OUT_);
+#define P7DIR_ 0x003C /* Port 7 Direction */
+sfrb(P7DIR, P7DIR_);
+#define P7SEL_ 0x003E /* Port 7 Selection */
+sfrb(P7SEL, P7SEL_);
+#if defined(__MSP430_HAS_PORT7_R__)
+#define P7REN_ 0x0014 /* Port 7 Resistor enable */
+sfrb(P7REN, P7REN_);
+#endif
+#endif
+
+#if defined(__MSP430_HAS_PORT8__) || defined(__MSP430_HAS_PORT8_R__)
+#define P8IN_ 0x0039 /* Port 8 Input */
+sfrb(P8IN, P8IN_);
+#define P8OUT_ 0x003B /* Port 8 Output */
+sfrb(P8OUT, P8OUT_);
+#define P8DIR_ 0x003D /* Port 8 Direction */
+sfrb(P8DIR, P8DIR_);
+#define P8SEL_ 0x003F /* Port 8 Selection */
+sfrb(P8SEL, P8SEL_);
+#if defined(__MSP430_HAS_PORT8_R__)
+#define P8REN_ 0x0015 /* Port 8 Resistor enable */
+sfrb(P8REN, P8REN_);
+#endif
+#endif
+
+#if defined(__MSP430_HAS_PORTA__)
+#define PAIN_ 0x0038 /* Port A Input */
+sfrb(PAIN, PAIN_);
+#endif
+
+#if defined(__MSP430_HAS_PORT9__)
+#define P9IN_ 0x0008 /* Port 9 Input */
+sfrb(P9IN, P9IN_);
+#define P9OUT_ 0x000A /* Port 9 Output */
+sfrb(P9OUT, P9OUT_);
+#define P9DIR_ 0x000C /* Port 9 Direction */
+sfrb(P9DIR, P9DIR_);
+#define P9SEL_ 0x000E /* Port 9 Selection */
+sfrb(P9SEL, P9SEL_);
+#endif
+
+#if defined(__MSP430_HAS_PORT10__)
+#define P10IN_ 0x0009 /* Port 10 Input */
+sfrb(P10IN, P10IN_);
+#define P10OUT_ 0x000B /* Port 10 Output */
+sfrb(P10OUT, P10OUT_);
+#define P10DIR_ 0x000D /* Port 10 Direction */
+sfrb(P10DIR, P10DIR_);
+#define P10SEL_ 0x000F /* Port 10 Selection */
+sfrb(P10SEL, P10SEL_);
+#endif
+
+#if defined(__MSP430_HAS_PORTB__)
+#define PBIN_ 0x0008 /* Port B Input */
+sfrb(PBIN, PBIN_);
+#endif
+
+#endif
--- /dev/null
+/*
+ * $Id: iostructures.h,v 1.10 2006/04/11 08:01:55 cliechti Exp $
+ */
+#ifndef _GNU_ASSEMBLER_
+
+#ifndef __IOSTRUCTURES_H__
+#define __IOSTRUCTURES_H__
+
+/*
+ * This declares some usefull structures
+ * which describe IO ports.
+ * (c) 2002, 2003 diwil@mail.ru
+ */
+
+#ifdef MSP430_BITFIELDS_UNSIGNED
+#define __MSP430_UNS__
+#else
+#define __MSP430_UNS__ unsigned
+#endif
+
+#ifndef __MSP430_PORT_INIT_
+#define __VOLATILE volatile
+#else
+#define __VOLATILE
+#endif
+
+typedef union port {
+ __VOLATILE __MSP430_UNS__ char reg_p;
+ __VOLATILE struct {
+ __MSP430_UNS__ char __p0:1,
+ __p1:1,
+ __p2:1,
+ __p3:1,
+ __p4:1,
+ __p5:1,
+ __p6:1,
+ __p7:1;
+ } __pin;
+} __attribute__ ((packed)) ioregister_t;
+
+#undef __MSP430_UNS__
+
+#define pin0 __pin.__p0
+#define pin1 __pin.__p1
+#define pin2 __pin.__p2
+#define pin3 __pin.__p3
+#define pin4 __pin.__p4
+#define pin5 __pin.__p5
+#define pin6 __pin.__p6
+#define pin7 __pin.__p7
+
+#define inport in.reg_p
+#define outport out.reg_p
+#define dirport dir.reg_p
+#define ifgport ifg.reg_p
+#define iesport ies.reg_p
+#define ieport ie.reg_p
+#define selport sel.reg_p
+
+#define IO_DIRPIN_INPUT 0 /* direction input */
+#define IO_DIRPIN_OUTPUT 1 /* direction output */
+
+#define IO_DIRPORT_INPUT 0
+#define IO_DIRPORT_OUTPUT 0xff
+
+#define IO_IESPIN_RISING 0 /* interrupt edge on low-to-high transition (front edge, rising edge) */
+#define IO_IESPIN_FALLING 1 /* -"- -"- high-to-low */
+
+#define IO_IESPORT_RISING 0
+#define IO_IESPORT_FALLING 0xff
+
+#define IO_IRQPIN_DISABLE 0 /* interrupt request disabled */
+#define IO_IRQPIN_ENABLE 1 /* -"- -"- enabled*/
+
+#define IO_IRQPORT_DISABLE 0
+#define IO_IRQPORT_ENABLE 0xff
+
+#define IO_PINPIN_SELECT 0 /* pin 'pin' function select */
+#define IO_ALTPIN_SELECT 1 /* alternative function select */
+
+#define IO_PINPORT_SELECT 0
+#define IO_ALTPORT_SELECT 0xff
+
+
+#ifdef __cplusplus
+#define __MSP430_EXTERN__ extern "C"
+#else
+#define __MSP430_EXTERN__
+#endif //__cplusplus
+
+/****************************************************************/
+#if defined(__MSP430_HAS_PORT0__)
+struct port0_t {
+ ioregister_t in; /* Input */
+ ioregister_t out; /* Output */
+ ioregister_t dir; /* Direction */
+ ioregister_t ifg; /* Interrupt Flag */
+ ioregister_t ies; /* Interrupt Edge Select */
+ ioregister_t ie; /* Interrupt Enable */
+};
+
+__MSP430_EXTERN__ struct port0_t port0 asm("0x0010");
+#endif
+
+/****************************************************************/
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT2__) \
+ || defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__)
+struct port_full_t {
+ ioregister_t in; /* Input */
+ ioregister_t out; /* Output */
+ ioregister_t dir; /* Direction */
+ ioregister_t ifg; /* Interrupt Flag */
+ ioregister_t ies; /* Interrupt Edge Select */
+ ioregister_t ie; /* Interrupt Enable */
+ ioregister_t sel; /* Selection */
+#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__)
+ ioregister_t ren; /* Pull up or down resistor enable */
+#endif
+};
+#endif
+
+#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT4__) \
+ || defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT6__) \
+ || defined(__MSP430_HAS_PORT3_R__) || defined(__MSP430_HAS_PORT4_R__) \
+ || defined(__MSP430_HAS_PORT5_R__) || defined(__MSP430_HAS_PORT6_R__)
+struct port_simple_t {
+ ioregister_t in; /* Input */
+ ioregister_t out; /* Output */
+ ioregister_t dir; /* Direction */
+ ioregister_t sel; /* Selection */
+};
+#endif
+
+/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
+__MSP430_EXTERN__ struct port_full_t port1 asm("0x0020");
+#endif
+
+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
+__MSP430_EXTERN__ struct port_full_t port2 asm("0x0028");
+#endif
+
+#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
+__MSP430_EXTERN__ struct port_simple_t port3 asm("0x0018");
+#endif
+
+#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
+__MSP430_EXTERN__ struct port_simple_t port4 asm("0x001c");
+#endif
+
+#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
+__MSP430_EXTERN__ struct port_simple_t port5 asm("0x0030");
+#endif
+
+#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
+__MSP430_EXTERN__ struct port_simple_t port6 asm("0x0034");
+#endif
+
+#undef __MSP430_EXTERN__
+
+#ifdef __MSP430_PORT_INIT_
+#undef __VOLATILE
+#endif
+
+
+#endif /* __IOSTRUCTURES_H__ */
+
+#endif /* GNU_ASSEMBLER */
+
--- /dev/null
+#ifndef __msp430_headers_lcd_h
+#define __msp430_headers_lcd_h
+
+/* lcd.h
+ *
+ * mspgcc project: MSP430 device headers
+ * LCD module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: lcd.h,v 1.6 2005/03/11 15:49:50 coppice Exp $
+ */
+
+/* Switches:
+
+LCD_BASE - base address of LCD module
+__msp430_have_lcdlowr - if LCD controller supports the LCDLOWR bit
+__msp430_have_lcd_16_20 - if LCD controller supports memory locations 16 to 20
+
+*/
+
+#define LCDCTL_ LCD_BASE /* LCD control */
+sfrb(LCDCTL,LCDCTL_);
+
+/* the names of the mode bits are different from the spec */
+#define LCDON 0x01
+#if defined(__msp430_have_lcdlowr)
+#define LCDLOWR 0x02
+#endif
+#define LCDSON 0x04
+#define LCDMX0 0x08
+#define LCDMX1 0x10
+#define LCDP0 0x20
+#define LCDP1 0x40
+#define LCDP2 0x80
+/* Display modes coded with Bits 2-4 */
+#define LCDSTATIC (LCDSON)
+#define LCD2MUX (LCDMX0|LCDSON)
+#define LCD3MUX (LCDMX1|LCDSON)
+#define LCD4MUX (LCDMX1|LCDMX0|LCDSON)
+/* Group select code with Bits 5-7 Seg.lines */
+#define LCDSG0 0x00 /* --------- */
+#define LCDSG0_1 (LCDP0) /* S0 - S15 */
+#define LCDSG0_2 (LCDP1) /* S0 - S19 */
+#define LCDSG0_3 (LCDP1|LCDP0) /* S0 - S23 */
+#define LCDSG0_4 (LCDP2) /* S0 - S27 */
+#define LCDSG0_5 (LCDP2|LCDP0) /* S0 - S31 */
+#define LCDSG0_6 (LCDP2|LCDP1) /* S0 - S35 */
+#define LCDSG0_7 (LCDP2|LCDP1|LCDP0) /* S0 - S39 */
+
+/* NOTE: YOU CAN ONLY USE THE 'S' OR 'G' DECLARATIONS FOR A COMMAND */
+/* MOV #LCDSG0_3+LCDOG2_7,&LCDCTL ACTUALLY MEANS MOV #LCDP1,&LCDCTL! */
+#define LCDOG1_7 0x00 /* --------- */
+#define LCDOG2_7 (LCDP0) /* S0 - S15 */
+#define LCDOG3_7 (LCDP1) /* S0 - S19 */
+#define LCDOG4_7 (LCDP1|LCDP0) /* S0 - S23 */
+#define LCDOG5_7 (LCDP2) /* S0 - S27 */
+#define LCDOG6_7 (LCDP2|LCDP0) /* S0 - S31 */
+#define LCDOG7 (LCDP2|LCDP1) /* S0 - S35 */
+#define LCDOGOFF (LCDP2|LCDP1|LCDP0) /* S0 - S39 */
+
+#define LCDMEM_ LCD_BASE+1 /* LCD memory */
+#if defined(_GNU_ASSEMBLER_)
+#define LCDMEM LCDMEM_ /* LCD memory (for assembler) */
+#else
+#define LCDMEM ((char*) LCDMEM_) /* LCD memory (for C) */
+#endif
+#define LCDM1_ LCDMEM_ /* LCD memory 1 */
+sfrb(LCDM1,LCDM1_);
+#define LCDM2_ LCD_BASE+0x2 /* LCD memory 2 */
+sfrb(LCDM2,LCDM2_);
+#define LCDM3_ LCD_BASE+0x3 /* LCD memory 3 */
+sfrb(LCDM3,LCDM3_);
+#define LCDM4_ LCD_BASE+0x4 /* LCD memory 4 */
+sfrb(LCDM4,LCDM4_);
+#define LCDM5_ LCD_BASE+0x5 /* LCD memory 5 */
+sfrb(LCDM5,LCDM5_);
+#define LCDM6_ LCD_BASE+0x6 /* LCD memory 6 */
+sfrb(LCDM6,LCDM6_);
+#define LCDM7_ LCD_BASE+0x7 /* LCD memory 7 */
+sfrb(LCDM7,LCDM7_);
+#define LCDM8_ LCD_BASE+0x8 /* LCD memory 8 */
+sfrb(LCDM8,LCDM8_);
+#define LCDM9_ LCD_BASE+0x9 /* LCD memory 9 */
+sfrb(LCDM9,LCDM9_);
+#define LCDM10_ LCD_BASE+0xA /* LCD memory 10 */
+sfrb(LCDM10,LCDM10_);
+#define LCDM11_ LCD_BASE+0xB /* LCD memory 11 */
+sfrb(LCDM11,LCDM11_);
+#define LCDM12_ LCD_BASE+0xC /* LCD memory 12 */
+sfrb(LCDM12,LCDM12_);
+#define LCDM13_ LCD_BASE+0xD /* LCD memory 13 */
+sfrb(LCDM13,LCDM13_);
+#define LCDM14_ LCD_BASE+0xE /* LCD memory 14 */
+sfrb(LCDM14,LCDM14_);
+#define LCDM15_ LCD_BASE+0xF /* LCD memory 15 */
+sfrb(LCDM15,LCDM15_);
+
+#define LCDMA_ LCDM10_ /* LCD memory A */
+sfrb(LCDMA,LCDMA_);
+#define LCDMB_ LCDM11_ /* LCD memory B */
+sfrb(LCDMB,LCDMB_);
+#define LCDMC_ LCDM12_ /* LCD memory C */
+sfrb(LCDMC,LCDMC_);
+#define LCDMD_ LCDM13_ /* LCD memory D */
+sfrb(LCDMD,LCDMD_);
+#define LCDME_ LCDM14_ /* LCD memory E */
+sfrb(LCDME,LCDME_);
+#define LCDMF_ LCDM15_ /* LCD memory F */
+sfrb(LCDMF,LCDMF_);
+
+#if defined(__msp430_have_lcd_16_20)
+#define LCDM16_ LCD_BASE+0x10 /* LCD memory 16 */
+sfrb(LCDM16,LCDM16_);
+#define LCDM17_ LCD_BASE+0x11 /* LCD memory 17 */
+sfrb(LCDM17,LCDM17_);
+#define LCDM18_ LCD_BASE+0x12 /* LCD memory 18 */
+sfrb(LCDM18,LCDM18_);
+#define LCDM19_ LCD_BASE+0x13 /* LCD memory 19 */
+sfrb(LCDM19,LCDM19_);
+#define LCDM20_ LCD_BASE+0x14 /* LCD memory 20 */
+sfrb(LCDM20,LCDM20_);
+#endif
+
+#endif
--- /dev/null
+#if !defined(__msp430_headers_lcd_a_h)
+#define __msp430_headers_lcd_a_h
+
+/* lcd_a.h
+ *
+ * mspgcc project: MSP430 device headers
+ * LCD_A module header
+ *
+ * (c) 2005 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: lcd_a.h,v 1.3 2006/01/25 16:39:10 coppice Exp $
+ */
+
+/* Switches: none */
+
+#define LCDACTL_ 0x0090 /* LCD_A Control Register */
+sfrb(LCDACTL, LCDACTL_);
+#define LCDON 0x01
+#define LCDSON 0x04
+#define LCDMX0 0x08
+#define LCDMX1 0x10
+#define LCDFREQ0 0x20
+#define LCDFREQ1 0x40
+#define LCDFREQ2 0x80
+
+/* Display modes coded with Bits 2-4 */
+#define LCDSTATIC (LCDSON)
+#define LCD2MUX (LCDMX0|LCDSON)
+#define LCD3MUX (LCDMX1|LCDSON)
+#define LCD4MUX (LCDMX1|LCDMX0|LCDSON)
+
+/* Frequency select code with Bits 5-7 */
+#define LCDFREQ_32 (0<<5) /* LCD Freq: ACLK divided by 32 */
+#define LCDFREQ_64 (1<<5) /* LCD Freq: ACLK divided by 64 */
+#define LCDFREQ_96 (2<<5) /* LCD Freq: ACLK divided by 96 */
+#define LCDFREQ_128 (3<<5) /* LCD Freq: ACLK divided by 128 */
+#define LCDFREQ_192 (4<<5) /* LCD Freq: ACLK divided by 192 */
+#define LCDFREQ_256 (5<<5) /* LCD Freq: ACLK divided by 256 */
+#define LCDFREQ_384 (6<<5) /* LCD Freq: ACLK divided by 384 */
+#define LCDFREQ_512 (7<<5) /* LCD Freq: ACLK divided by 512 */
+
+#define LCDAPCTL0_ 0x00AC /* LCD_A Port Control Register 0 */
+sfrb(LCDAPCTL0, LCDAPCTL0_);
+#define LCDS0 0x01 /* LCD Segment 0 to 3 Enable. */
+#define LCDS4 0x02 /* LCD Segment 4 to 7 Enable. */
+#define LCDS8 0x04 /* LCD Segment 8 to 11 Enable. */
+#define LCDS12 0x08 /* LCD Segment 12 to 15 Enable. */
+#define LCDS16 0x10 /* LCD Segment 16 to 19 Enable. */
+#define LCDS20 0x20 /* LCD Segment 20 to 23 Enable. */
+#define LCDS24 0x40 /* LCD Segment 24 to 27 Enable. */
+#define LCDS28 0x80 /* LCD Segment 28 to 31 Enable. */
+
+#define LCDAPCTL1_ 0x00AD /* LCD_A Port Control Register 1 */
+sfrb(LCDAPCTL1, LCDAPCTL1_);
+#define LCDS32 0x01 /* LCD Segment 32 to 35 Enable. */
+#define LCDS36 0x02 /* LCD Segment 36 to 39 Enable. */
+
+#define LCDAVCTL0_ 0x00AE /* LCD_A Voltage Control Register 0 */
+sfrb(LCDAVCTL0, LCDAVCTL0_);
+#define LCD2B 0x01 /* Selects 1/2 bias. */
+#define VLCDREF0 0x02 /* Selects reference voltage for regulated charge pump: 0 */
+#define VLCDREF1 0x04 /* Selects reference voltage for regulated charge pump: 1 */
+#define LCDCPEN 0x08 /* LCD Voltage Charge Pump Enable. */
+#define VLCDEXT 0x10 /* Select external source for VLCD. */
+#define LCDREXT 0x20 /* Selects external connections for LCD mid voltages. */
+#define LCDR03EXT 0x40 /* Selects external connection for lowest LCD voltage. */
+
+/* Reference voltage source select for the regulated charge pump */
+#define VLCDREF_0 (0<<1) /* Internal */
+#define VLCDREF_1 (1<<1) /* External */
+#define VLCDREF_2 (2<<1) /* Reserved */
+#define VLCDREF_3 (3<<1) /* Reserved */
+
+#define LCDAVCTL1_ 0x00AF /* LCD_A Voltage Control Register 1 */
+sfrb(LCDAVCTL1, LCDAVCTL1_);
+#define VLCD0 0x02 /* VLCD select: 0 */
+#define VLCD1 0x04 /* VLCD select: 1 */
+#define VLCD2 0x08 /* VLCD select: 2 */
+#define VLCD3 0x10 /* VLCD select: 3 */
+
+/* Charge pump voltage selections */
+#define VLCD_0 (0<<1) /* Charge pump disabled */
+#define VLCD_1 (1<<1) /* VLCD = 2.60V */
+#define VLCD_2 (2<<1) /* VLCD = 2.66V */
+#define VLCD_3 (3<<1) /* VLCD = 2.72V */
+#define VLCD_4 (4<<1) /* VLCD = 2.78V */
+#define VLCD_5 (5<<1) /* VLCD = 2.84V */
+#define VLCD_6 (6<<1) /* VLCD = 2.90V */
+#define VLCD_7 (7<<1) /* VLCD = 2.96V */
+#define VLCD_8 (8<<1) /* VLCD = 3.02V */
+#define VLCD_9 (9<<1) /* VLCD = 3.08V */
+#define VLCD_10 (10<<1) /* VLCD = 3.14V */
+#define VLCD_11 (11<<1) /* VLCD = 3.20V */
+#define VLCD_12 (12<<1) /* VLCD = 3.26V */
+#define VLCD_13 (12<<1) /* VLCD = 3.32V */
+#define VLCD_14 (13<<1) /* VLCD = 3.38V */
+#define VLCD_15 (15<<1) /* VLCD = 3.44V */
+
+#define VLCD_DISABLED (0<<1) /* Charge pump disabled */
+#define VLCD_2_60 (1<<1) /* VLCD = 2.60V */
+#define VLCD_2_66 (2<<1) /* VLCD = 2.66V */
+#define VLCD_2_72 (3<<1) /* VLCD = 2.72V */
+#define VLCD_2_78 (4<<1) /* VLCD = 2.78V */
+#define VLCD_2_84 (5<<1) /* VLCD = 2.84V */
+#define VLCD_2_90 (6<<1) /* VLCD = 2.90V */
+#define VLCD_2_96 (7<<1) /* VLCD = 2.96V */
+#define VLCD_3_02 (8<<1) /* VLCD = 3.02V */
+#define VLCD_3_08 (9<<1) /* VLCD = 3.08V */
+#define VLCD_3_14 (10<<1) /* VLCD = 3.14V */
+#define VLCD_3_20 (11<<1) /* VLCD = 3.20V */
+#define VLCD_3_26 (12<<1) /* VLCD = 3.26V */
+#define VLCD_3_32 (12<<1) /* VLCD = 3.32V */
+#define VLCD_3_38 (13<<1) /* VLCD = 3.38V */
+#define VLCD_3_44 (15<<1) /* VLCD = 3.44V */
+
+#define LCDMEM_ LCD_BASE+1 /* LCD memory */
+#ifdef _GNU_ASSEMBLER_
+#define LCDMEM LCDMEM_ /* LCD memory (for assembler) */
+#else
+#define LCDMEM ((char*) LCDMEM_) /* LCD memory (for C) */
+#endif
+#define LCDM1_ LCDMEM_ /* LCD memory 1 */
+sfrb(LCDM1,LCDM1_);
+#define LCDM2_ LCD_BASE+0x2 /* LCD memory 2 */
+sfrb(LCDM2,LCDM2_);
+#define LCDM3_ LCD_BASE+0x3 /* LCD memory 3 */
+sfrb(LCDM3,LCDM3_);
+#define LCDM4_ LCD_BASE+0x4 /* LCD memory 4 */
+sfrb(LCDM4,LCDM4_);
+#define LCDM5_ LCD_BASE+0x5 /* LCD memory 5 */
+sfrb(LCDM5,LCDM5_);
+#define LCDM6_ LCD_BASE+0x6 /* LCD memory 6 */
+sfrb(LCDM6,LCDM6_);
+#define LCDM7_ LCD_BASE+0x7 /* LCD memory 7 */
+sfrb(LCDM7,LCDM7_);
+#define LCDM8_ LCD_BASE+0x8 /* LCD memory 8 */
+sfrb(LCDM8,LCDM8_);
+#define LCDM9_ LCD_BASE+0x9 /* LCD memory 9 */
+sfrb(LCDM9,LCDM9_);
+#define LCDM10_ LCD_BASE+0xA /* LCD memory 10 */
+sfrb(LCDM10,LCDM10_);
+#define LCDM11_ LCD_BASE+0xB /* LCD memory 11 */
+sfrb(LCDM11,LCDM11_);
+#define LCDM12_ LCD_BASE+0xC /* LCD memory 12 */
+sfrb(LCDM12,LCDM12_);
+#define LCDM13_ LCD_BASE+0xD /* LCD memory 13 */
+sfrb(LCDM13,LCDM13_);
+#define LCDM14_ LCD_BASE+0xE /* LCD memory 14 */
+sfrb(LCDM14,LCDM14_);
+#define LCDM15_ LCD_BASE+0xF /* LCD memory 15 */
+sfrb(LCDM15,LCDM15_);
+
+#define LCDMA_ LCDM10_ /* LCD memory A */
+sfrb(LCDMA,LCDMA_);
+#define LCDMB_ LCDM11_ /* LCD memory B */
+sfrb(LCDMB,LCDMB_);
+#define LCDMC_ LCDM12_ /* LCD memory C */
+sfrb(LCDMC,LCDMC_);
+#define LCDMD_ LCDM13_ /* LCD memory D */
+sfrb(LCDMD,LCDMD_);
+#define LCDME_ LCDM14_ /* LCD memory E */
+sfrb(LCDME,LCDME_);
+#define LCDMF_ LCDM15_ /* LCD memory F */
+sfrb(LCDMF,LCDMF_);
+
+#if defined(__msp430_have_lcd_16_20)
+#define LCDM16_ LCD_BASE+0x10 /* LCD memory 16 */
+sfrb(LCDM16,LCDM16_);
+#define LCDM17_ LCD_BASE+0x11 /* LCD memory 17 */
+sfrb(LCDM17,LCDM17_);
+#define LCDM18_ LCD_BASE+0x12 /* LCD memory 18 */
+sfrb(LCDM18,LCDM18_);
+#define LCDM19_ LCD_BASE+0x13 /* LCD memory 19 */
+sfrb(LCDM19,LCDM19_);
+#define LCDM20_ LCD_BASE+0x14 /* LCD memory 20 */
+sfrb(LCDM20,LCDM20_);
+#endif
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_mpy_h
+#define __msp430_headers_mpy_h
+
+/* mpy.h
+ *
+ * mspgcc project: MSP430 device headers
+ * Hardware multiplier
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: mpy.h,v 1.2 2002/12/28 06:52:37 coppice Exp $
+ */
+
+/* Switches: none */
+
+#define MPY_ 0x0130 /* Multiply Unsigned/Operand 1 */
+sfrw(MPY,MPY_);
+#define MPYS_ 0x0132 /* Multiply Signed/Operand 1 */
+sfrw(MPYS,MPYS_);
+#define MAC_ 0x0134 /* Multiply Unsigned and Accumulate/Operand 1 */
+sfrw(MAC,MAC_);
+#define MACS_ 0x0136 /* Multiply Signed and Accumulate/Operand 1 */
+sfrw(MACS,MACS_);
+#define OP2_ 0x0138 /* Operand 2 */
+sfrw(OP2,OP2_);
+#define RESLO_ 0x013A /* Result Low Word */
+sfrw(RESLO,RESLO_);
+#define RESHI_ 0x013C /* Result High Word */
+sfrw(RESHI,RESHI_);
+#define SUMEXT_ 0x013E /* Sum Extend */
+sfrw(SUMEXT,SUMEXT_);
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_opamp_h
+#define __msp430_headers_opamp_h
+
+/* opamp.h
+ *
+ * mspgcc project: MSP430 device headers
+ * Operational amplifier module header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: opamp.h,v 1.6 2007/09/18 12:37:02 coppice Exp $
+ */
+
+/* Switches:
+__msp430_have_opamp_1
+__msp430_have_opamp_2
+__msp430_have_opamp_feedback_taps
+__msp430_have_opamp_switches
+__msp430_have_opamp_output_select
+__msp430_have_opamp_rail_to_rail
+__msp430_have_opamp_offset_cal
+*/
+
+#define OA0CTL0_ 0x00C0 /* OA0 Control register 0 */
+sfrb(OA0CTL0, OA0CTL0_);
+#define OA0CTL1_ 0x00C1 /* OA0 Control register 1 */
+sfrb(OA0CTL1, OA0CTL1_);
+
+#if defined(__msp430_have_opamp_1)
+#define OA1CTL0_ 0x00C2 /* OA1 Control register 0 */
+sfrb(OA1CTL0, OA1CTL0_);
+#define OA1CTL1_ 0x00C3 /* OA1 Control register 1 */
+sfrb(OA1CTL1, OA1CTL1_);
+#endif
+
+#if defined(__msp430_have_opamp_2)
+#define OA2CTL0_ 0x00C4 /* OA2 Control register 0 */
+sfrb(OA2CTL0, OA2CTL0_);
+#define OA2CTL1_ 0x00C5 /* OA2 Control register 1 */
+sfrb(OA2CTL1, OA2CTL1_);
+#endif
+
+#if defined(__msp430_have_opamp_switches)
+#define SWCTL_ 0x00CF /* OA Analog Switches Control Register */
+sfrb(SWCTL, SWCTL_)
+#endif
+
+#if defined(__msp430_have_opamp_output_select)
+#define OAADC0 0x01 /* OAx output to ADC12 input channel select 0 */
+#define OAADC1 0x02 /* OAx output to ADC12 input channel select 1 */
+#endif
+#define OAPM0 0x04 /* OAx Power mode select 0 */
+#define OAPM1 0x08 /* OAx Power mode select 1 */
+#define OAP0 0x10 /* OAx Inverting input select 0 */
+#define OAP1 0x20 /* OAx Inverting input select 1 */
+#define OAN0 0x40 /* OAx Non-inverting input select 0 */
+#define OAN1 0x80 /* OAx Non-inverting input select 1 */
+
+#define OAPM_0 (0<<2) /* OAx Power mode select: off */
+#define OAPM_1 (1<<2) /* OAx Power mode select: slow */
+#define OAPM_2 (2<<2) /* OAx Power mode select: medium */
+#define OAPM_3 (3<<2) /* OAx Power mode select: fast */
+#define OAP_0 (0<<4) /* OAx Inverting input select 00 */
+#define OAP_1 (1<<4) /* OAx Inverting input select 01 */
+#define OAP_2 (2<<4) /* OAx Inverting input select 10 */
+#define OAP_3 (3<<4) /* OAx Inverting input select 11 */
+#define OAN_0 (0<<6) /* OAx Non-inverting input select 00 */
+#define OAN_1 (1<<6) /* OAx Non-inverting input select 01 */
+#define OAN_2 (2<<6) /* OAx Non-inverting input select 10 */
+#define OAN_3 (3<<6) /* OAx Non-inverting input select 11 */
+
+#if defined(__msp430_have_opamp_rail_to_rail)
+#define OARRIP 0x01 /* OAx Rail-to-Rail Input off */
+#endif
+#if defined(__msp430_have_opamp_offset_cal)
+#define OACAL 0x02 /* OAx Offset Calibration */
+#endif
+#define OAFC0 0x04 /* OAx Function control 0 */
+#define OAFC1 0x08 /* OAx Function control 1 */
+#define OAFC2 0x10 /* OAx Function control 2 */
+#if defined(__msp430_have_opamp_feedback_taps)
+#define OAFBR0 0x20 /* OAx Feedback resistor select 0 */
+#define OAFBR1 0x40 /* OAx Feedback resistor select 1 */
+#define OAFBR2 0x80 /* OAx Feedback resistor select 2 */
+#endif
+
+#define OAFC_0 (0<<2) /* OAx Function: Gen. Purpose */
+#define OAFC_1 (1<<2) /* OAx Function: Comparing */
+#define OAFC_2 (2<<2) /* OAx Function: Reserved */
+#define OAFC_3 (3<<2) /* OAx Function: Differential */
+#define OAFC_4 (4<<2) /* OAx Function: Non-Inverting, PGA */
+#define OAFC_5 (5<<2) /* OAx Function: Reserved */
+#define OAFC_6 (6<<2) /* OAx Function: Inverting */
+#define OAFC_7 (7<<2) /* OAx Function: Differential */
+
+#if defined(__msp430_have_opamp_feedback_taps)
+#define OAFBR_0 (0<<5) /* OAx Feedback resistor: Tap 0 */
+#define OAFBR_1 (1<<5) /* OAx Feedback resistor: Tap 1 */
+#define OAFBR_2 (2<<5) /* OAx Feedback resistor: Tap 2 */
+#define OAFBR_3 (3<<5) /* OAx Feedback resistor: Tap 3 */
+#define OAFBR_4 (4<<5) /* OAx Feedback resistor: Tap 4 */
+#define OAFBR_5 (5<<5) /* OAx Feedback resistor: Tap 5 */
+#define OAFBR_6 (6<<5) /* OAx Feedback resistor: Tap 6 */
+#define OAFBR_7 (7<<5) /* OAx Feedback resistor: Tap 7 */
+#endif
+
+#if defined(__msp430_have_opamp_switches)
+#define SWCTL0 0x01 /* OA Analog Switch Control 0 */
+#define SWCTL1 0x02 /* OA Analog Switch Control 1 */
+#define SWCTL2 0x04 /* OA Analog Switch Control 2 */
+#define SWCTL3 0x08 /* OA Analog Switch Control 3 */
+#define SWCTL4 0x10 /* OA Analog Switch Control 4 */
+#define SWCTL5 0x20 /* OA Analog Switch Control 5 */
+#define SWCTL6 0x40 /* OA Analog Switch Control 6 */
+#define SWCTL7 0x80 /* OA Analog Switch Control 7 */
+#endif
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_scanif_h
+#define __msp430_headers_scanif_h
+
+/* scanif.h
+ *
+ * mspgcc project: MSP430 device headers
+ * Scan interface module header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: scanif.h,v 1.2 2004/04/05 14:05:46 coppice Exp $
+ */
+
+/* Switches: none */
+
+#define SIFDEBUG_ 0x01B0 /* SIF, Debug Register */
+sfrw(SIFDEBUG, SIFDEBUG_);
+#define SIFCNT_ 0x01B2 /* SIF, Counter1/2 */
+sfrw(SIFCNT, SIFCNT_);
+#define SIFTPSMV_ 0x01B4 /* SIF, Processing State Machine */
+sfrw(SIFTPSMV, SIFTPSMV_);
+#define SIFCTL0_ 0x01B6 /* SIF, Control Register 0 */
+sfrw(SIFCTL0, SIFCTL0_);
+#define SIFCTL1_ 0x01B8 /* SIF, Control Register 1 */
+sfrw(SIFCTL1, SIFCTL1_);
+#define SIFCTL2_ 0x01BA /* SIF, Control Register 2 */
+sfrw(SIFCTL2, SIFCTL2_);
+#define SIFCTL3_ 0x01BC /* SIF, Control Register 3 */
+sfrw(SIFCTL3, SIFCTL3_);
+#define SIFCTL4_ 0x01BE /* SIF, Control Register 4 */
+sfrw(SIFCTL4, SIFCTL4_);
+#define SIFDACR0_ 0x01C0 /* SIF, Digital to Analog Conv. 0 */
+sfrw(SIFDACR0, SIFDACR0_);
+#define SIFDACR1_ 0x01C2 /* SIF, Digital to Analog Conv. 1 */
+sfrw(SIFDACR1, SIFDACR1_);
+#define SIFDACR2_ 0x01C4 /* SIF, Digital to Analog Conv. 2 */
+sfrw(SIFDACR2, SIFDACR2_);
+#define SIFDACR3_ 0x01C6 /* SIF, Digital to Analog Conv. 3 */
+sfrw(SIFDACR3, SIFDACR3_);
+#define SIFDACR4_ 0x01C8 /* SIF, Digital to Analog Conv. 4 */
+sfrw(SIFDACR4, SIFDACR4_);
+#define SIFDACR5_ 0x01CA /* SIF, Digital to Analog Conv. 5 */
+sfrw(SIFDACR5, SIFDACR5_);
+#define SIFDACR6_ 0x01CC /* SIF, Digital to Analog Conv. 6 */
+sfrw(SIFDACR6, SIFDACR6_);
+#define SIFDACR7_ 0x01CE /* SIF, Digital to Analog Conv. 7 */
+sfrw(SIFDACR7, SIFDACR7_);
+
+#define SIFTSM_ 0x01D0 /* SIF, Timing State Machine 0 */
+#ifdef _GNU_ASSEMBLER_
+#define SIFTSM SIFTSM_ /* SIF, Timing State Machine (for assembler) */
+#else
+#define SIFTSM ((char*) SIFTSM_) /* SIF, Timing State Machine (for C) */
+#endif
+#define SIFTSM0_ 0x01D0 /* SIF, Timing State Machine 0 */
+sfrw(SIFTSM0, SIFTSM0_);
+#define SIFTSM1_ 0x01D2 /* SIF, Timing State Machine 1 */
+sfrw(SIFTSM1, SIFTSM1_);
+#define SIFTSM2_ 0x01D4 /* SIF, Timing State Machine 2 */
+sfrw(SIFTSM2, SIFTSM2_);
+#define SIFTSM3_ 0x01D6 /* SIF, Timing State Machine 3 */
+sfrw(SIFTSM3, SIFTSM3_);
+#define SIFTSM4_ 0x01D8 /* SIF, Timing State Machine 4 */
+sfrw(SIFTSM4, SIFTSM4_);
+#define SIFTSM5_ 0x01DA /* SIF, Timing State Machine 5 */
+sfrw(SIFTSM5, SIFTSM5_);
+#define SIFTSM6_ 0x01DC /* SIF, Timing State Machine 6 */
+sfrw(SIFTSM6, SIFTSM6_);
+#define SIFTSM7_ 0x01DE /* SIF, Timing State Machine 7 */
+sfrw(SIFTSM7, SIFTSM7_);
+#define SIFTSM8_ 0x01E0 /* SIF, Timing State Machine 8 */
+sfrw(SIFTSM8, SIFTSM8_);
+#define SIFTSM9_ 0x01E2 /* SIF, Timing State Machine 9 */
+sfrw(SIFTSM9, SIFTSM9_);
+#define SIFTSM10_ 0x01E4 /* SIF, Timing State Machine 10 */
+sfrw(SIFTSM10, SIFTSM10_);
+#define SIFTSM11_ 0x01E6 /* SIF, Timing State Machine 11 */
+sfrw(SIFTSM11, SIFTSM11_);
+#define SIFTSM12_ 0x01E8 /* SIF, Timing State Machine 12 */
+sfrw(SIFTSM12, SIFTSM12_);
+#define SIFTSM13_ 0x01EA /* SIF, Timing State Machine 13 */
+sfrw(SIFTSM13, SIFTSM13_);
+#define SIFTSM14_ 0x01EC /* SIF, Timing State Machine 14 */
+sfrw(SIFTSM14, SIFTSM14_);
+#define SIFTSM15_ 0x01EE /* SIF, Timing State Machine 15 */
+sfrw(SIFTSM15, SIFTSM15_);
+#define SIFTSM16_ 0x01F0 /* SIF, Timing State Machine 16 */
+sfrw(SIFTSM16, SIFTSM16_);
+#define SIFTSM17_ 0x01F2 /* SIF, Timing State Machine 17 */
+sfrw(SIFTSM17, SIFTSM17_);
+#define SIFTSM18_ 0x01F4 /* SIF, Timing State Machine 18 */
+sfrw(SIFTSM18, SIFTSM18_);
+#define SIFTSM19_ 0x01F6 /* SIF, Timing State Machine 19 */
+sfrw(SIFTSM19, SIFTSM19_);
+#define SIFTSM20_ 0x01F8 /* SIF, Timing State Machine 20 */
+sfrw(SIFTSM20, SIFTSM20_);
+#define SIFTSM21_ 0x01FA /* SIF, Timing State Machine 21 */
+sfrw(SIFTSM21, SIFTSM21_);
+#define SIFTSM22_ 0x01FC /* SIF, Timing State Machine 22 */
+sfrw(SIFTSM22, SIFTSM22_);
+#define SIFTSM23_ 0x01FE /* SIF, Timing State Machine 23 */
+sfrw(SIFTSM23, SIFTSM23_);
+
+/* SIFCTL1 */
+#define SIFEN (0x0001) /* SIF Enable */
+#define SIFTESTD (0x0002) /* SIF 0:Normal / 1:Test Mode */
+#define SIFIFG0 (0x0004) /* SIF Interrupt Flag 0 */
+#define SIFIFG1 (0x0008) /* SIF Interrupt Flag 1 */
+#define SIFIFG2 (0x0010) /* SIF Interrupt Flag 2 */
+#define SIFIFG3 (0x0020) /* SIF Interrupt Flag 3 */
+#define SIFIFG4 (0x0040) /* SIF Interrupt Flag 4 */
+#define SIFIFG5 (0x0080) /* SIF Interrupt Flag 5 */
+#define SIFIFG6 (0x0100) /* SIF Interrupt Flag 6 */
+#define SIFIE0 (0x0200) /* SIF Interrupt Enable 0 */
+#define SIFIE1 (0x0400) /* SIF Interrupt Enable 1 */
+#define SIFIE2 (0x0800) /* SIF Interrupt Enable 2 */
+#define SIFIE3 (0x1000) /* SIF Interrupt Enable 3 */
+#define SIFIE4 (0x2000) /* SIF Interrupt Enable 4 */
+#define SIFIE5 (0x4000) /* SIF Interrupt Enable 5 */
+#define SIFIE6 (0x8000) /* SIF Interrupt Enable 6 */
+
+/* SIFCTL2 */
+#define SIFTCH0OUT (0x0001) /* SIF TCH0 result */
+#define SIFTCH1OUT (0x0002) /* SIF TCH1 result */
+#define SIFTCH00 (0x0004) /* SIF 1. Channel select 0 */
+#define SIFTCH01 (0x0008) /* SIF 1. Channel select 1 */
+#define SIFTCH10 (0x0010) /* SIF 2. Channel select 0 */
+#define SIFTCH11 (0x0020) /* SIF 2. Channel select 1 */
+#define SIFTEN (0x0040) /* SIF Enable Transistors */
+#define SIFSH (0x0080) /* SIF Sample on/off */
+#define SIFVCC2 (0x0100) /* SIF VCC/2 Generator off/on */
+#define SIFVSS (0x0200) /* SIF Select Terminal for sample Cap. */
+#define SIFCACI3 (0x0400) /* SIF Selection of SIFCI3 */
+#define SIFCI3SEL (0x0800) /* SIF Select CI3 Source */
+#define SIFCAX (0x1000) /* SIF Select CA Source */
+#define SIFCAINV (0x2000) /* SIF Invert CA Output 0:off/1:on */
+#define SIFCAON (0x4000) /* SIF Switch CA on */
+#define SIFDACON (0x8000) /* SIF Switch DAC on */
+
+/* SIFCTL3 */
+#define SIF0OUT (0x0001) /* SIF Sensor 0 Out */
+#define SIF1OUT (0x0002) /* SIF Sensor 1 Out */
+#define SIF2OUT (0x0004) /* SIF Sensor 2 Out */
+#define SIF3OUT (0x0008) /* SIF Sensor 3 Out */
+#define SIFIFGSET0 (0x0010) /* SIF SIFIFG0 level select */
+#define SIFIFGSET1 (0x0020) /* SIF SIFIFG1 level select */
+#define SIFIFGSET2 (0x0040) /* SIF SIFIFG2 level select */
+#define SIFCS (0x0080) /* SIF Capture Select */
+#define SIFIS10 (0x0100) /* SIF Input Select SIFCNT1.0 */
+#define SIFIS11 (0x0200) /* SIF Input Select SIFCNT1.1 */
+#define SIFIS20 (0x0400) /* SIF Input Select SIFCNT2.0 */
+#define SIFIS21 (0x0800) /* SIF Input Select SIFCNT2.1 */
+#define SIFIS30 (0x1000) /* SIF Input Select SIFCNT3.0 */
+#define SIFIS31 (0x2000) /* SIF Input Select SIFCNT3.1 */
+#define SIFIS40 (0x4000) /* SIF Input Select SIFCNT4.0 */
+#define SIFIS41 (0x8000) /* SIF Input Select SIFCNT4.1 */
+
+#define SIFIS1_0 (0x0000) /* SIF Input Select SIFCNT1 0 */
+#define SIFIS1_1 (0x0100) /* SIF Input Select SIFCNT1 1 */
+#define SIFIS1_2 (0x0200) /* SIF Input Select SIFCNT1 2 */
+#define SIFIS1_3 (0x0300) /* SIF Input Select SIFCNT1 3 */
+#define SIFIS2_0 (0x0000) /* SIF Input Select SIFCNT2 0 */
+#define SIFIS2_1 (0x0400) /* SIF Input Select SIFCNT2 1 */
+#define SIFIS2_2 (0x0800) /* SIF Input Select SIFCNT2 2 */
+#define SIFIS2_3 (0x0C00) /* SIF Input Select SIFCNT2 3 */
+#define SIFIS3_0 (0x0000) /* SIF Input Select SIFCNT3 0 */
+#define SIFIS3_1 (0x1000) /* SIF Input Select SIFCNT3 1 */
+#define SIFIS3_2 (0x2000) /* SIF Input Select SIFCNT3 2 */
+#define SIFIS3_3 (0x3000) /* SIF Input Select SIFCNT3 3 */
+#define SIFIS4_0 (0x0000) /* SIF Input Select SIFCNT4 0 */
+#define SIFIS4_1 (0x4000) /* SIF Input Select SIFCNT4 1 */
+#define SIFIS4_2 (0x8000) /* SIF Input Select SIFCNT4 2 */
+#define SIFIS4_3 (0xC000) /* SIF Input Select SIFCNT4 3 */
+
+/* SIFCTL4 */
+#define SIFDIV10 (0x0001) /* SIF Clock Divider 1.0 */
+#define SIFDIV11 (0x0002) /* SIF Clock Divider 1.1 */
+#define SIFDIV20 (0x0004) /* SIF Clock Divider 2.0 */
+#define SIFDIV21 (0x0008) /* SIF Clock Divider 2.1 */
+#define SIFDIV30 (0x0010) /* SIF Clock Divider 3.0 */
+#define SIFDIV31 (0x0020) /* SIF Clock Divider 3.1 */
+#define SIFDIV32 (0x0040) /* SIF Clock Divider 3.2 */
+#define SIFDIV33 (0x0080) /* SIF Clock Divider 3.3 */
+#define SIFDIV34 (0x0100) /* SIF Clock Divider 3.4 */
+#define SIFDIV35 (0x0200) /* SIF Clock Divider 3.5 */
+#define SIFQ6EN (0x0400) /* SIF Feedback 6 Enable */
+#define SIFQ7EN (0x0800) /* SIF Feedback 7 Enable */
+#define SIFCNT1ENP (0x1000) /* SIF Enable SIFCNT1 up count */
+#define SIFCNT1ENM (0x2000) /* SIF Enable SIFCNT1 down count */
+#define SIFCNT2EN (0x4000) /* SIF Enable SIFCNT2 count */
+#define SIFCNTRST (0x8000) /* SIF Enable Counter Reset on Read */
+
+#define SIFDIV1_1 (0x0000) /* SIF Clock Divider 1: /1 */
+#define SIFDIV1_2 (0x0001) /* SIF Clock Divider 1: /2 */
+#define SIFDIV1_4 (0x0002) /* SIF Clock Divider 1: /4 */
+#define SIFDIV1_8 (0x0003) /* SIF Clock Divider 1: /8 */
+#define SIFDIV2_1 (0x0000) /* SIF Clock Divider 2: /1 */
+#define SIFDIV2_2 (0x0004) /* SIF Clock Divider 2: /2 */
+#define SIFDIV2_4 (0x0008) /* SIF Clock Divider 2: /4 */
+#define SIFDIV2_8 (0x000C) /* SIF Clock Divider 2: /8 */
+
+#define SIFDIV3_1 (0x0000) /* SIF Clock Divider 3: /1 */
+#define SIFDIV3_3 (0x0010) /* SIF Clock Divider 3: /3 */
+#define SIFDIV3_5 (0x0020) /* SIF Clock Divider 3: /5 */
+#define SIFDIV3_7 (0x0030) /* SIF Clock Divider 3: /7 */
+#define SIFDIV3_9 (0x0040) /* SIF Clock Divider 3: /9 */
+#define SIFDIV3_11 (0x0050) /* SIF Clock Divider 3: /11 */
+#define SIFDIV3_13 (0x0060) /* SIF Clock Divider 3: /13 */
+#define SIFDIV3_15 (0x0070) /* SIF Clock Divider 3: /15 */
+#define SIFDIV3_21 (0x00B0) /* SIF Clock Divider 3: /21 */
+#define SIFDIV3_25 (0x0120) /* SIF Clock Divider 3: /25 */
+#define SIFDIV3_27 (0x00C0) /* SIF Clock Divider 3: /27 */
+#define SIFDIV3_33 (0x00E0) /* SIF Clock Divider 3: /33 */
+#define SIFDIV3_35 (0x00D0) /* SIF Clock Divider 3: /35 */
+#define SIFDIV3_39 (0x00E0) /* SIF Clock Divider 3: /39 */
+#define SIFDIV3_45 (0x00F0) /* SIF Clock Divider 3: /45 */
+#define SIFDIV3_49 (0x01B0) /* SIF Clock Divider 3: /49 */
+#define SIFDIV3_55 (0x0150) /* SIF Clock Divider 3: /55 */
+#define SIFDIV3_63 (0x01C0) /* SIF Clock Divider 3: /63 */
+#define SIFDIV3_65 (0x0160) /* SIF Clock Divider 3: /65 */
+#define SIFDIV3_75 (0x0170) /* SIF Clock Divider 3: /75 */
+#define SIFDIV3_77 (0x01D0) /* SIF Clock Divider 3: /77 */
+#define SIFDIV3_81 (0x0240) /* SIF Clock Divider 3: /81 */
+#define SIFDIV3_91 (0x01E0) /* SIF Clock Divider 3: /91 */
+#define SIFDIV3_99 (0x0250) /* SIF Clock Divider 3: /99 */
+#define SIFDIV3_105 (0x01F0) /* SIF Clock Divider 3: /105 */
+#define SIFDIV3_117 (0x0260) /* SIF Clock Divider 3: /117 */
+#define SIFDIV3_121 (0x02D0) /* SIF Clock Divider 3: /121 */
+#define SIFDIV3_135 (0x01F0) /* SIF Clock Divider 3: /135 */
+#define SIFDIV3_143 (0x02E0) /* SIF Clock Divider 3: /143 */
+#define SIFDIV3_165 (0x02F0) /* SIF Clock Divider 3: /165 */
+#define SIFDIV3_169 (0x0360) /* SIF Clock Divider 3: /169 */
+#define SIFDIV3_195 (0x0370) /* SIF Clock Divider 3: /195 */
+#define SIFDIV3_225 (0x03F0) /* SIF Clock Divider 3: /225 */
+
+/* SIFCTL5 */
+#define SIFCLKEN (0x0001) /* SIF 0:SMCLK for SIFCLK / 1:SIFCLKG for SIFCLK */
+#define SIFCLKGON (0x0002) /* SIF Switch SIFCLKG on */
+#define SIFFNOM (0x0004) /* SIF Select Nominal Frequ. 0:4MHz / 1:1MHz */
+#define SIFCLKFQ0 (0x0008) /* SIF Clock Generator frequency adjust 0 */
+#define SIFCLKFQ1 (0x0010) /* SIF Clock Generator frequency adjust 1 */
+#define SIFCLKFQ2 (0x0020) /* SIF Clock Generator frequency adjust 2 */
+#define SIFCLKFQ3 (0x0040) /* SIF Clock Generator frequency adjust 3 */
+#define SIFTSMRP (0x0080) /* SIF Timing State Machine Repeat mode */
+#define SIFCNT30 (0x0100) /* SIF Counter 3.0 */
+#define SIFCNT31 (0x0200) /* SIF Counter 3.1 */
+#define SIFCNT32 (0x0400) /* SIF Counter 3.2 */
+#define SIFCNT33 (0x0800) /* SIF Counter 3.3 */
+#define SIFCNT34 (0x1000) /* SIF Counter 3.4 */
+#define SIFCNT35 (0x2000) /* SIF Counter 3.5 */
+#define SIFCNT36 (0x4000) /* SIF Counter 3.6 */
+#define SIFCNT37 (0x8000) /* SIF Counter 3.7 */
+
+/* SIFTSM */
+#define SIFTSMCH0 (0x0001) /* SIF Select channel for tsm: 0 */
+#define SIFTSMCH1 (0x0002) /* SIF Select channel for tsm: 1 */
+#define SIFTSMLCOFF (0x0004) /* SIF Switch LC off */
+#define SIFTSMEX (0x0008) /* SIF */
+#define SIFTSMCA (0x0010) /* SIF */
+#define SIFTSMCLKON (0x0020) /* SIF */
+#define SIFTSMRSON (0x0040) /* SIF */
+#define SIFTSMTESTS1 (0x0080) /* SIF */
+#define SIFTSMDAC (0x0100) /* SIF */
+#define SIFTSMSTOP (0x0200) /* SIF */
+#define SIFTSMACLK (0x0400) /* SIF */
+#define SIFTSMREPEAT0 (0x0800) /* SIF */
+#define SIFTSMREPEAT1 (0x1000) /* SIF */
+#define SIFTSMREPEAT2 (0x2000) /* SIF */
+#define SIFTSMREPEAT3 (0x4000) /* SIF */
+#define SIFTSMREPEAT4 (0x8000) /* SIF */
+
+#endif
--- /dev/null
+#if !defined(__msp430_headers_sd16_h__)
+#define __msp430_headers_sd16_h__
+
+/* sd16.h
+ *
+ * mspgcc project: MSP430 device headers
+ * Sigma Delta 16 module header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: sd16.h,v 1.8 2006/12/26 10:33:14 coppice Exp $
+ */
+
+/* Switches:
+
+__msp430_have_sd16a - the SD16 is the "A" type
+__msp430_have_sd16_1
+__msp430_have_sd16_2
+*/
+
+#define SD16CTL_ 0x0100 /* Sigma Delta ADC 16 Control Register */
+sfrw(SD16CTL, SD16CTL_);
+#define SD16IV_ 0x0110 /* SD16 Interrupt Vector Register */
+sfrw(SD16IV, SD16IV_);
+
+#if defined(__msp430_have_sd16a)
+#define SD16AE_ 0x00B7 /* SD16 Analog Input Enable Register */
+sfrb(SD16AE, SD16AE_);
+#else
+#define SD16CONF0_ 0x00B7 /* SD16 Internal Configuration Register 0 */
+sfrb(SD16CONF0, SD16CONF0_);
+#define SD16CONF1_ 0x00BF /* SD16 Internal Configuration Register 1 */
+sfrb(SD16CONF1, SD16CONF1_);
+ /* Please use only the recommended settings */
+#endif
+
+#define SD16INCTL0_ 0x00B0 /* SD16 Input Control Register Channel 0 */
+sfrb(SD16INCTL0, SD16INCTL0_);
+#define SD16PRE0_ 0x00B8 /* SD16 Preload Register Channel 0 */
+sfrb(SD16PRE0, SD16PRE0_);
+#define SD16CCTL0_ 0x0102 /* SD16 Channel 0 Control Register */
+sfrw(SD16CCTL0, SD16CCTL0_);
+#define SD16MEM0_ 0x0112 /* SD16 Channel 0 Conversion Memory */
+sfrw(SD16MEM0, SD16MEM0_);
+
+#if defined(__msp430_have_sd16_1)
+#define SD16INCTL1_ 0x00B1 /* SD16 Input Control Register Channel 1 */
+sfrb(SD16INCTL1, SD16INCTL1_);
+#define SD16PRE1_ 0x00B9 /* SD16 Preload Register Channel 1 */
+sfrb(SD16PRE1, SD16PRE1_);
+#define SD16CCTL1_ 0x0104 /* SD16 Channel 1 Control Register */
+sfrw(SD16CCTL1, SD16CCTL1_);
+#define SD16MEM1_ 0x0114 /* SD16 Channel 1 Conversion Memory */
+sfrw(SD16MEM1, SD16MEM1_);
+#endif
+
+#if defined(__msp430_have_sd16_2)
+#define SD16INCTL2_ 0x00B2 /* SD16 Input Control Register Channel 2 */
+sfrb(SD16INCTL2, SD16INCTL2_);
+#define SD16PRE2_ 0x00BA /* SD16 Preload Register Channel 2 */
+sfrb(SD16PRE2, SD16PRE2_);
+#define SD16CCTL2_ 0x0106 /* SD16 Channel 2 Control Register */
+sfrw(SD16CCTL2, SD16CCTL2_);
+#define SD16MEM2_ 0x0116 /* SD16 Channel 2 Conversion Memory */
+sfrw(SD16MEM2, SD16MEM2_);
+#endif
+
+#if defined(__msp430_have_sd16a)
+/* SD16AE */
+#define SD16AE0 0x0001 /* SD16 External Input Enable 0 */
+#define SD16AE1 0x0002 /* SD16 External Input Enable 1 */
+#define SD16AE2 0x0004 /* SD16 External Input Enable 2 */
+#define SD16AE3 0x0008 /* SD16 External Input Enable 3 */
+#define SD16AE4 0x0010 /* SD16 External Input Enable 4 */
+#define SD16AE5 0x0020 /* SD16 External Input Enable 5 */
+#define SD16AE6 0x0040 /* SD16 External Input Enable 6 */
+#define SD16AE7 0x0080 /* SD16 External Input Enable 7 */
+#endif
+
+/* SD16INCTLx - AFEINCTLx */
+#define SD16INCH0 0x0001 /* SD16 Input Channel select 0 */
+#define SD16INCH1 0x0002 /* SD16 Input Channel select 1 */
+#define SD16INCH2 0x0004 /* SD16 Input Channel select 2 */
+#define SD16GAIN0 0x0008 /* AFE Input Pre-Amplifier Gain Select 0 */
+#define SD16GAIN1 0x0010 /* AFE Input Pre-Amplifier Gain Select 1 */
+#define SD16GAIN2 0x0020 /* AFE Input Pre-Amplifier Gain Select 2 */
+#define SD16INTDLY0 0x0040 /* SD16 Interrupt Delay after 1.Conversion 0 */
+#define SD16INTDLY1 0x0080 /* SD16 Interrupt Delay after 1.Conversion 1 */
+
+#define SD16GAIN_1 (0<<3) /* AFE Input Pre-Amplifier Gain Select *1 */
+#define SD16GAIN_2 (1<<3) /* AFE Input Pre-Amplifier Gain Select *2 */
+#define SD16GAIN_4 (2<<3) /* AFE Input Pre-Amplifier Gain Select *4 */
+#define SD16GAIN_8 (3<<3) /* AFE Input Pre-Amplifier Gain Select *8 */
+#define SD16GAIN_16 (4<<3) /* AFE Input Pre-Amplifier Gain Select *16 */
+#define SD16GAIN_32 (5<<3) /* AFE Input Pre-Amplifier Gain Select *32 */
+
+#define SD16INCH_0 (0<<0) /* SD16 Input Channel select input */
+#define SD16INCH_1 (1<<0) /* SD16 Input Channel select input */
+#define SD16INCH_2 (2<<0) /* SD16 Input Channel select input */
+#define SD16INCH_3 (3<<0) /* SD16 Input Channel select input */
+#define SD16INCH_4 (4<<0) /* SD16 Input Channel select input */
+#define SD16INCH_5 (5<<0) /* SD16 Input Channel select input */
+#define SD16INCH_6 (6<<0) /* SD16 Input Channel select Temp */
+#define SD16INCH_7 (7<<0) /* SD16 Input Channel select Offset */
+
+#define SD16INTDLY_0 (0<<6) /* SD16 Interrupt Delay: Int. after 4th conversion */
+#define SD16INTDLY_1 (1<<6) /* SD16 Interrupt Delay: Int. after 3rd conversion */
+#define SD16INTDLY_2 (2<<6) /* SD16 Interrupt Delay: Int. after 2nd conversion */
+#define SD16INTDLY_3 (3<<6) /* SD16 Interrupt Delay: Int. after 1st conversion */
+
+/* SD16CTL - AFECTL */
+#define SD16OVIE 0x0002 /* Overflow Interupt Enable */
+#define SD16REFON 0x0004 /* Switch internal Reference on */
+#define SD16VMIDON 0x0008 /* Switch Vmid Buffer on */
+#define SD16SSEL0 0x0010 /* SD16 Clock Source Select 0 */
+#define SD16SSEL1 0x0020 /* SD16 Clock Source Select 1 */
+#define SD16DIV0 0x0040 /* SD16 Clock Divider Select 0 */
+#define SD16DIV1 0x0080 /* SD16 Clock Divider Select 1 */
+#define SD16LP 0x0100 /* SD16 Low Power Mode Enable */
+#if defined(__msp430_have_sd16a)
+#define SD16XDIV0 0x0200 /* SD16 2.Clock Divider Select 0 */
+#define SD16XDIV1 0x0400 /* SD16 2.Clock Divider Select 1 */
+//#define SD16XDIV2 0x0800) /* SD16 2.Clock Divider Select 2 */
+#endif
+
+#define SD16DIV_0 (0x0000) /* SD16 Clock Divider Select /1 */
+#define SD16DIV_1 (SD16DIV0) /* SD16 Clock Divider Select /2 */
+#define SD16DIV_2 (SD16DIV1) /* SD16 Clock Divider Select /4 */
+#define SD16DIV_3 (SD16DIV0|SD16DIV1) /* SD16 Clock Divider Select /8 */
+
+#if defined(__msp430_have_sd16a)
+#define SD16XDIV_0 (0x0000) /* SD16 2.Clock Divider Select /1 */
+#define SD16XDIV_1 (SD16XDIV0) /* SD16 2.Clock Divider Select /3 */
+#define SD16XDIV_2 (SD16XDIV1) /* SD16 2.Clock Divider Select /16 */
+#define SD16XDIV_3 (SD16XDIV0|SD16XDIV1) /* SD16 2.Clock Divider Select /48 */
+#endif
+
+#define SD16SSEL_0 (0x0000) /* AFE Clock Source Select MCLK */
+#define SD16SSEL_1 (SD16SSEL0) /* AFE Clock Source Select SMCLK */
+#define SD16SSEL_2 (SD16SSEL1) /* AFE Clock Source Select ACLK */
+#define SD16SSEL_3 (SD16SSEL0|SD16SSEL1) /* AFE Clock Source Select TACLK */
+
+/* SD16CCTLx - AFECCTLx */
+#define SD16GRP 0x0001 /* Grouping of Channels: 0:Off/1:On */
+#define SD16SC 0x0002 /* Start Conversion */
+#define SD16IFG 0x0004 /* SD16 Channel x Interrupt Flag */
+#define SD16IE 0x0008 /* SD16 Channel x Interrupt Enable */
+#define SD16DF 0x0010 /* SD16 Channel x Data Format: 0:Unipolar/1:Bipolar */
+#define SD16OVIFG 0x0020 /* SD16 Channel x Overflow Interrupt Flag */
+#define SD16LSBACC 0x0040 /* SD16 Channel x Access LSB of ADC */
+#define SD16LSBTOG 0x0080 /* SD16 Channel x Toggle LSB Output of ADC */
+#define SD16OSR0 0x0100 /* SD16 Channel x OverSampling Ratio 0 */
+#define SD16OSR1 0x0200 /* SD16 Channel x OverSampling Ratio 1 */
+#define SD16SNGL 0x0400 /* SD16 Channel x Single Conversion On/Off */
+#if defined(__msp430_have_sd16a)
+#define SD16XOSR 0x0800 /* SD16 Channel x Extended OverSampling Ratio */
+#define SD16UNI 0x1000 /* SD16 Channel x Bipolar(0) / Unipolar(1) Mode */
+#define SD16BUF0 0x2000 /* SD16 Channel x High Impedance Input Buffer Select: 0 */
+#define SD16BUF1 0x4000 /* SD16 Channel x High Impedance Input Buffer Select: 1 */
+#define SD16BUFG 0x8000 /* SD16 Channel x Buffer Gain 0:Gain=1 / 1:Gain=2 */
+#endif
+
+#if defined(__msp430_have_sd16a)
+#define SD16OSR_1024 (SD16XOSR|SD16OSR0) /* SD16 Channel x OverSampling Ratio 1024 */
+#define SD16OSR_512 (SD16XOSR) /* SD16 Channel x OverSampling Ratio 512 */
+#endif
+#define SD16OSR_256 (0<<8) /* SD16 Channel x OverSampling Ratio 256 */
+#define SD16OSR_128 (1<<8) /* SD16 Channel x OverSampling Ratio 128 */
+#define SD16OSR_64 (2<<8) /* SD16 Channel x OverSampling Ratio 64 */
+#define SD16OSR_32 (3<<8) /* SD16 Channel x OverSampling Ratio 32 */
+
+#if defined(__msp430_have_sd16a)
+#define SD16BUF_0 (0<<13) /* SD16 High Imp. Input Buffer: Disabled */
+#define SD16BUF_1 (1<<13) /* SD16 High Imp. Input Buffer: Slow */
+#define SD16BUF_2 (2<<13) /* SD16 High Imp. Input Buffer: Meduim */
+#define SD16BUF_3 (3<<13) /* SD16 High Imp. Input Buffer: Fast */
+#endif
+
+#if !defined(__msp430_have_sd16a)
+#define AFEINCTL0 SD16INCTL0 /* SD16 Input Control Register Channel 0 */
+#define AFEINCTL1 SD16INCTL1 /* SD16 Input Control Register Channel 1 */
+#define AFEINCTL2 SD16INCTL2 /* SD16 Input Control Register Channel 2 */
+#define AFECTL SD16CTL /* SD16 Control Register */
+#define AFECCTL0 SD16CCTL0 /* SD16 Channel 0 Control Register */
+#define AFECCTL1 SD16CCTL1 /* SD16 Channel 1 Control Register */
+#define AFECCTL2 SD16CCTL02 /* SD16 Channel 2 Control Register */
+#endif
+
+
+/* Aliases by mspgcc */
+#define SD16DIV_DIV1 SD16DIV_0 /* SD16 Clock Divider Select /1 */
+#define SD16DIV_DIV2 SD16DIV_1 /* SD16 Clock Divider Select /2 */
+#define SD16DIV_DIV4 SD16DIV_2 /* SD16 Clock Divider Select /4 */
+#define SD16DIV_DIV8 SD16DIV_3 /* SD16 Clock Divider Select /8 */
+
+#if defined(__msp430_have_sd16a)
+#define SD16XDIV_DIV1 SD16XDIV_0 /* SD16 2.Clock Divider Select /1 */
+#define SD16XDIV_DIV2 SD16XDIV_1 /* SD16 2.Clock Divider Select /3 */
+#define SD16XDIV_DIV4 SD16XDIV_2 /* SD16 2.Clock Divider Select /16 */
+#define SD16XDIV_DIV8 SD16XDIV_3 /* SD16 2.Clock Divider Select /48 */
+#endif
+
+#define SD16SSEL_MCLK SD16SSEL_0 /* AFE Clock Source Select MCLK */
+#define SD16SSEL_SMCLK SD16SSEL_1 /* AFE Clock Source Select SMCLK */
+#define SD16SSEL_ACLK SD16SSEL_2 /* AFE Clock Source Select ACLK */
+#define SD16SSEL_TACLK SD16SSEL_3 /* AFE Clock Source Select TACLK */
+
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_slopeadc_h
+#define __msp430_headers_slopeadc_h
+
+/* slopeadc.h
+ *
+ * mspgcc project: MSP430 device headers
+ * Slope ADC header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: slopeadc.h,v 1.2 2002/12/28 06:52:18 coppice Exp $
+ */
+
+/* Switches: none */
+
+#define AIN_ 0x0110 /* ADC Input */
+sfrw(AIN,AIN_);
+#define AEN_ 0x0112 /* ADC Input Enable */
+sfrw(AEN,AEN_);
+
+#define ACTL_ 0x0114 /* ADC Control */
+sfrw(ACTL,ACTL_);
+/* the names of the mode bits are different from the spec */
+#define ADSOC 0x0001
+#define ADSVCC 0x0002
+#define ADIN0 0x0004
+#define ADIN1 0x0008
+#define ADIN2 0x0010
+#define ADINOFF 0x0020
+#define ADCSRC0 0x0040
+#define ADCSRC1 0x0080
+#define ADCSRCOFF 0x0100
+#define ADRNG0 0x0200
+#define ADRNG1 0x0400
+#define ADAUTO 0x0800
+#define ADPD 0x1000
+/* Channel select coded with Bits 2-5 */
+#define ADIN_A0 0 /* (default) */
+#define ADIN_A1 (ADIN0)
+#define ADIN_A2 (ADIN1)
+#define ADIN_A3 (ADIN1|ADIN0)
+#define ADIN_A4 (ADIN2)
+#define ADIN_A5 (ADIN2|ADIN0)
+#define ADIN_A6 (ADIN2|ADIN1)
+#define ADIN_A7 (ADIN2|ADIN1|ADIN0)
+/* Current source output select coded with Bits 6-8 */
+#define ADCSRC_A0 0 /* (default) */
+#define ADCSRC_A1 (ADCSRC0)
+#define ADCSRC_A2 (ADCSRC1)
+#define ADCSRC_A3 (ADCSRC1|ADCSRC0)
+/* Range select coded with Bits 9-11 */
+#define ADRNG_A 0 /* 0<=Vin<1/4Vref (default) */
+#define ADRNG_B (ADRNG0) /* 1/4 Vref<=Vin<1/2 Vref */
+#define ADRNG_C (ADRNG1) /* 1/2 Vref<=Vin<3/4 Vref */
+#define ADRNG_D (ADRNG1|ADRNG0) /* 3/4 Vref<=Vin<1 Vref */
+#define ADRNG_AUTO (ADAUTO) /* 0<=Vin<1 Vref auto detect range */
+
+/* DATA REGISTER ADDRESS */
+#define ADAT_ 0x0118 /* ADC Data */
+sfrw(ADAT,ADAT_);
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_svs_h
+#define __msp430_headers_svs_h
+
+/* svs.h
+ *
+ * mspgcc project: MSP430 device headers
+ * Supply voltage supervisor
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: svs.h,v 1.6 2005/08/17 14:28:46 coppice Exp $
+ */
+
+/* Switches: __msp430_has_svs_at_0x55
+ __msp430_has_non_variable_svs_threshold */
+
+#if defined(__msp430_has_svs_at_0x55)
+#define SVSCTL_ 0x0055 /* SVS Control */
+#else
+#define SVSCTL_ 0x0056 /* SVS Control */
+#endif
+sfrb(SVSCTL,SVSCTL_);
+#define SVSFG 0x01
+#define SVSOP 0x02
+#define SVSON 0x04
+#define PORON 0x08
+#define VLDOFF 0x00
+#define VLDON 0x10
+#define VLD_1_8V 0x10
+
+/* Some additional defines to round out the definitions in the same style
+ as other peripherals. These are not in TI's header. */
+#define VLD0 (1<<4)
+#define VLD1 (2<<4)
+#define VLD2 (4<<4)
+#define VLD3 (8<<4)
+
+#if !defined(__msp430_has_non_variable_svs_threshold)
+#define VLD_OFF (0<<4)
+#define VLD_1 (1<<4)
+#define VLD_2 (2<<4)
+#define VLD_3 (3<<4)
+#define VLD_4 (4<<4)
+#define VLD_5 (5<<4)
+#define VLD_6 (6<<4)
+#define VLD_7 (7<<4)
+#define VLD_8 (8<<4)
+#define VLD_9 (9<<4)
+#define VLD_10 (10<<4)
+#define VLD_11 (11<<4)
+#define VLD_12 (12<<4)
+#define VLD_13 (13<<4)
+#define VLD_14 (14<<4)
+#define VLD_EXT (15<<4)
+#endif
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_system_clock_h
+#define __msp430_headers_system_clock_h
+
+/* system_clock.h
+ *
+ * mspgcc project: MSP430 device headers
+ * SYSTEM_CLOCK module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: system_clock.h,v 1.7 2006/06/07 13:01:30 coppice Exp $
+ */
+
+/* Switches:
+
+__MSP430_HAS_FLL__ - if device has the original FLL
+__MSP430_HAS_FLLPLUS__ - if device has both an FLL+ and a Xtal oscillator 2
+__MSP430_HAS_FLLPLUS_SMALL__- if device has the smaller FLL+
+
+*/
+
+#define SCFI0_ 0x0050 /* System Clock Frequency Integrator 0 */
+sfrb(SCFI0,SCFI0_);
+#define FN_2 0x04
+#define FN_3 0x08
+#define FN_4 0x10
+#if defined(__MSP430_HAS_FLLPLUS__) || defined(__MSP430_HAS_FLLPLUS_SMALL__)
+#define FN_8 0x20 /* fDCOCLK = 10*fNominal */
+#define FLLD0 0x40 /* Loop Divider Bit : 0 */
+#define FLLD1 0x80 /* Loop Divider Bit : 1 */
+
+#define FLLD_1 0 /* Multiply Selected Loop Freq. By 1 */
+#define FLLD_2 (FLLD0) /* Multiply Selected Loop Freq. By 2 */
+#define FLLD_4 (FLLD1) /* Multiply Selected Loop Freq. By 4 */
+#define FLLD_8 (FLLD1|FLLD0) /* Multiply Selected Loop Freq. By 8 */
+#endif
+
+#define SCFI1_ 0x0051 /* System Clock Frequency Integrator 1 */
+sfrb(SCFI1,SCFI1_);
+#define SCFQCTL_ 0x0052 /* System Clock Frequency Control */
+sfrb(SCFQCTL,SCFQCTL_);
+/* System clock frequency values fMCLK coded with Bits 0-6 in SCFQCTL */
+/* #define SCFQ_32K 0x00 fMCLK=1*fACLK only a range from */
+/* #define SCFQ_64K 0x01 fMCLK=2*fACLK 3+1 to 127+1 is possible */
+#define SCFQ_128K 0x03 /* fMCLK=4*fACLK */
+#define SCFQ_256K 0x07 /* fMCLK=8*fACLK */
+#define SCFQ_512K 0x0F /* fMCLK=16*fACLK */
+#define SCFQ_1M 0x1F /* fMCLK=32*fACLK */
+#define SCFQ_2M 0x3F /* fMCLK=64*fACLK */
+#define SCFQ_4M 0x7F /* fMCLK=128*fACLK not possible for ICE */
+
+#if defined(__MSP430_HAS_FLLPLUS__) || defined(__MSP430_HAS_FLLPLUS_SMALL__)
+
+#define SCFQ_M 0x80 /* Modulation Disable */
+
+#define FLL_CTL0_ 0x0053 /* FLL+ Control 0 */
+sfrb(FLL_CTL0,FLL_CTL0_);
+#define DCOF 0x01 /* DCO Fault Flag */
+#define LFOF 0x02 /* Low Frequency Oscillator Fault Flag */
+#define XT1OF 0x04 /* High Frequency Oscillator Fault Flag */
+#if defined(__MSP430_HAS_FLLPLUS__)
+#define XT2OF 0x08 /* XT2 Oscillator Fault Flag */
+#endif
+#define XCAP0PF 0x00 /* XIN Cap = XOUT Cap = 0pf */
+#define XCAP10PF 0x10 /* XIN Cap = XOUT Cap = 10pf */
+#define XCAP14PF 0x20 /* XIN Cap = XOUT Cap = 14pf */
+#define XCAP18PF 0x30 /* XIN Cap = XOUT Cap = 18pf */
+#define XTS_FLL 0x40 /* 1: Selects high-freq. oscillator */
+#define DCOPLUS 0x80 /* DCO+ Enable */
+
+#define FLL_CTL1_ 0x0054 /* FLL+ Control 1 */
+sfrb(FLL_CTL1,FLL_CTL1_);
+#define FLL_DIV0 0x01 /* FLL+ Divide Px.x/ACLK 0 */
+#define FLL_DIV1 0x02 /* FLL+ Divide Px.x/ACLK 1 */
+
+#define FLL_DIV_1 0x00 /* FLL+ Divide Px.x/ACLK By 1 */
+#define FLL_DIV_2 0x01 /* FLL+ Divide Px.x/ACLK By 2 */
+#define FLL_DIV_4 0x02 /* FLL+ Divide Px.x/ACLK By 4 */
+#define FLL_DIV_8 0x03 /* FLL+ Divide Px.x/ACLK By 8 */
+
+#if defined(__MSP430_HAS_FLLPLUS__)
+#define SELS 0x04 /* Peripheral Module Clock Source (0: DCO, 1: XT2) */
+#define SELM0 0x08 /* MCLK Source Select 0 */
+#define SELM1 0x10 /* MCLK Source Select 1 */
+#define XT2OFF 0x20 /* High Frequency Oscillator 2 (XT2) disable */
+
+#define SELM_DCO 0x00 /* Select DCO for CPU MCLK */
+#define SELM_XT2 0x10 /* Select XT2 for CPU MCLK */
+#define SELM_A 0x18 /* Select A (from LFXT1) for CPU MCLK */
+#define SMCLKOFF 0x40 /* Peripheral Module Clock (SMCLK) disable */
+#endif
+
+#else
+
+#define CBCTL_ 0x0053 /* Crystal Buffer Control *** WRITE-ONLY *** */
+sfrb(CBCTL,CBCTL_);
+#define CBE 0x01
+#define CBSEL0 0x02
+#define CBSEL1 0x04
+/* Source select of frequency at output pin XBUF coded with Bits 1-2 in CBCTL */
+#define CBSEL_ACLK 0 /* source is ACLK (default after POR) */
+#define CBSEL_ACLK_DIV2 (CBSEL0) /* source is ACLK/2 */
+#define CBSEL_ACLK_DIV4 (CBSEL1) /* source is ACLK/4 */
+#define CBSEL_MCLK (CBSEL1|CBSEL0) /* source is MCLK */
+
+#endif
+
+/* INTERRUPT CONTROL BITS */
+/* These two bits are defined in the Special Function Registers */
+/* #define OFIFG 0x02 */
+/* #define OFIE 0x02 */
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_timer8_h
+#define __msp430_headers_timer8_h
+
+/* timer8.h
+ *
+ * mspgcc project: MSP430 device headers
+ * 8 bit timer
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: timer8.h,v 1.2 2002/12/28 06:51:02 coppice Exp $
+ */
+
+/* Switches: none */
+
+#define TCCTL_ 0x0042 /* Timer/Counter Control */
+sfrb(TCCTL,TCCTL_);
+/* The bit names have been prefixed with "TC" */
+#define TCRXD 0x01
+#define TCTXD 0x02
+#define TCRXACT 0x04
+#define TCENCNT 0x08
+#define TCTXE 0x10
+#define TCISCTL 0x20
+#define TCSSEL0 0x40
+#define TCSSEL1 0x80
+/* Source select of clock input coded with Bits 6-7 */
+#define TCSSEL_P01 0 /* source is signal at pin P0.1 (default) */
+#define TCSSEL_ACLK (TCSSEL0) /* source is ACLK */
+#define TCSSEL_MCLK (TCSSEL1) /* source is MCLK */
+#define TCSSEL_P01_MCLK (TCSSEL1|TCSSEL0) /* source is signal pin P0.1 .AND. MCLK */
+
+#define TCPLD 0x0043
+#define TCDAT 0x0044
+
+#endif
--- /dev/null
+#if !defined(__msp430_headers_timera_h__)
+#define __msp430_headers_timera_h__
+
+/* timera.h
+ *
+ * mspgcc project: MSP430 device headers
+ * TIMERA module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: timera.h,v 1.13 2006/04/19 20:09:52 cliechti Exp $
+ */
+
+/* Switches:
+
+__MSP430_HAS_TA2__ - if the device has a timer0 A with 2 channels
+__MSP430_HAS_TA3__ - if the device has a timer0 A with 3 channels
+__MSP430_HAS_T1A5__ - if the device has a timer1 A, as well as timer0 A
+
+*/
+
+#if defined(__MSP430_HAS_TA2__) || defined(__MSP430_HAS_TA3__)
+#define TA0IV_ 0x012E /* Timer A 0 Interrupt Vector Word */
+sfrw (TA0IV,TA0IV_);
+#define TA0CTL_ 0x0160 /* Timer A 0 Control */
+sfrw (TA0CTL,TA0CTL_);
+#define TA0R_ 0x0170 /* Timer A 0 */
+sfrw (TA0R,TA0R_);
+
+#define TA0CCTL0_ 0x0162 /* Timer A 0 Capture/Compare Control 0 */
+sfrw (TA0CCTL0,TA0CCTL0_);
+#define TA0CCTL1_ 0x0164 /* Timer A 0 Capture/Compare Control 1 */
+sfrw (TA0CCTL1,TA0CCTL1_);
+#define TA0CCR0_ 0x0172 /* Timer A 0 Capture/Compare 0 */
+sfrw (TA0CCR0,TA0CCR0_);
+#define TA0CCR1_ 0x0174 /* Timer A 0 Capture/Compare 1 */
+sfrw (TA0CCR1,TA0CCR1_);
+
+/* Alternate register names */
+#define TAIV TA0IV
+#define TAIV_ TA0IV_
+#define TACTL TA0CTL
+#define TACTL_ TA0CTL_
+#define TAR TA0R
+#define TAR_ TA0R_
+
+#define TACCTL0 TA0CCTL0
+#define TACCTL0_ TA0CCTL0_
+#define TACCTL1 TA0CCTL1
+#define TACCTL1_ TA0CCTL1_
+#define TACCR0 TA0CCR0
+#define TACCR0_ TA0CCR0_
+#define TACCR1 TA0CCR1
+#define TACCR1_ TA0CCR1_
+
+/* Further alternate register names */
+#define CCTL0 TA0CCTL0
+#define CCTL0_ TA0CCTL0_
+#define CCTL1 TA0CCTL1
+#define CCTL1_ TA0CCTL1_
+#define CCR0 TA0CCR0
+#define CCR0_ TA0CCR0_
+#define CCR1 TA0CCR1
+#define CCR1_ TA0CCR1_
+#endif
+
+#if defined(__MSP430_HAS_TA3__)
+#define TA0CCTL2_ 0x0166 /* Timer A 0 Capture/Compare Control 2 */
+sfrw (TA0CCTL2,TA0CCTL2_);
+#define TA0CCR2_ 0x0176 /* Timer A 0 Capture/Compare 2 */
+sfrw (TA0CCR2,TA0CCR2_);
+
+/* Alternate register names */
+#define TACCTL2 TA0CCTL2
+#define TACCTL2_ TA0CCTL2_
+#define TACCR2 TA0CCR2
+#define TACCR2_ TA0CCR2_
+
+/* Further alternate register names */
+#define CCTL2 TA0CCTL2
+#define CCTL2_ TA0CCTL2_
+#define CCR2 TA0CCR2
+#define CCR2_ TA0CCR2_
+#endif
+
+#if defined(__MSP430_HAS_T1A5__)
+#define TA1IV_ 0x011E /* Timer A 1 Interrupt Vector Word */
+sfrw (TA1IV, TA1IV_);
+#define TA1CTL_ 0x0180 /* Timer A 1 Control */
+sfrw (TA1CTL, TA1CTL_);
+#define TA1CCTL0_ 0x0182 /* Timer A 1 Capture/Compare Control 0 */
+sfrw (TA1CCTL0, TA1CCTL0_);
+#define TA1CCTL1_ 0x0184 /* Timer A 1 Capture/Compare Control 1 */
+sfrw (TA1CCTL1, TA1CCTL1_);
+#define TA1CCTL2_ 0x0186 /* Timer A 1 Capture/Compare Control 2 */
+sfrw (TA1CCTL2, TA1CCTL2_);
+#define TA1CCTL3_ 0x0188 /* Timer A 1 Capture/Compare Control 3 */
+sfrw (TA1CCTL3, TA1CCTL3_);
+#define TA1CCTL4_ 0x018A /* Timer A 1 Capture/Compare Control 4 */
+sfrw (TA1CCTL4, TA1CCTL4_);
+#define TAR1_ 0x0190 /* Timer A 1 */
+sfrw (TAR1, TAR1_);
+#define TA1CCR0_ 0x0192 /* Timer A 1 Capture/Compare 0 */
+sfrw (TA1CCR0, TA1CCR0_);
+#define TA1CCR1_ 0x0194 /* Timer A 1 Capture/Compare 1 */
+sfrw (TA1CCR1, TA1CCR1_);
+#define TA1CCR2_ 0x0196 /* Timer A 1 Capture/Compare 2 */
+sfrw (TA1CCR2, TA1CCR2_);
+#define TA1CCR3_ 0x0198 /* Timer A 1 Capture/Compare 3 */
+sfrw (TA1CCR3, TA1CCR3_);
+#define TA1CCR4_ 0x019A /* Timer A 1 Capture/Compare 4 */
+sfrw (TA1CCR4, TA1CCR4_);
+#endif
+
+#if !defined(_GNU_ASSEMBLER_)
+/* Structured declaration */
+typedef struct {
+ volatile unsigned
+ taifg:1,
+ taie:1,
+ taclr:1,
+ dummy:1,
+ tamc:2,
+ taid:2,
+ tassel:2;
+} __attribute__ ((packed)) tactl_t;
+
+typedef struct {
+ volatile unsigned
+ ccifg:1,
+ cov:1,
+ out:1,
+ cci:1,
+ ccie:1,
+ outmod:3,
+ cap:1,
+ dummy:1,
+ scci:1,
+ scs:1,
+ ccis:2,
+ cm:2;
+} __attribute__ ((packed)) tacctl_t;
+
+/* The timer A declaration itself */
+struct timera_t {
+ tactl_t ctl;
+ tacctl_t cctl0;
+ tacctl_t cctl1;
+ tacctl_t cctl2;
+ volatile unsigned dummy[4]; /* Pad to the next group of registers */
+ volatile unsigned tar;
+ volatile unsigned taccr0;
+ volatile unsigned taccr1;
+ volatile unsigned taccr2;
+};
+#ifdef __cplusplus
+extern "C" struct timera_t timera asm("0x0160");
+#else //__cplusplus
+struct timera_t timera asm("0x0160");
+#endif //__cplusplus
+
+#if defined(__MSP430_HAS_T1A5__)
+/* The timer A1 declaration itself */
+struct timera1_t {
+ tactl_t ctl;
+ tacctl_t cctl0;
+ tacctl_t cctl1;
+ tacctl_t cctl2;
+ tacctl_t cctl3;
+ tacctl_t cctl4;
+ volatile unsigned dummy[2]; /* Pad to the next group of registers */
+ volatile unsigned tar;
+ volatile unsigned taccr0;
+ volatile unsigned taccr1;
+ volatile unsigned taccr2;
+ volatile unsigned taccr3;
+ volatile unsigned taccr4;
+};
+#ifdef __cplusplus
+extern "C" struct timera1_t timera1 asm("0x0180");
+#else //__cplusplus
+struct timera1_t timera1 asm("0x0180");
+#endif //__cplusplus
+
+#endif
+#endif
+
+#define TASSEL2 0x0400 /* unused */ /* to distinguish from UART SSELx */
+#define TASSEL1 0x0200 /* Timer A clock source select 1 */
+#define TASSEL0 0x0100 /* Timer A clock source select 0 */
+#define ID1 0x0080 /* Timer A clock input divider 1 */
+#define ID0 0x0040 /* Timer A clock input divider 0 */
+#define MC1 0x0020 /* Timer A mode control 1 */
+#define MC0 0x0010 /* Timer A mode control 0 */
+#define TACLR 0x0004 /* Timer A counter clear */
+#define TAIE 0x0002 /* Timer A counter interrupt enable */
+#define TAIFG 0x0001 /* Timer A counter interrupt flag */
+
+#define MC_0 (0<<4) /* Timer A mode control: 0 - Stop */
+#define MC_1 (1<<4) /* Timer A mode control: 1 - Up to CCR0 */
+#define MC_2 (2<<4) /* Timer A mode control: 2 - Continous up */
+#define MC_3 (3<<4) /* Timer A mode control: 3 - Up/Down */
+#define ID_0 (0<<6) /* Timer A input divider: 0 - /1 */
+#define ID_1 (1<<6) /* Timer A input divider: 1 - /2 */
+#define ID_2 (2<<6) /* Timer A input divider: 2 - /4 */
+#define ID_3 (3<<6) /* Timer A input divider: 3 - /8 */
+#define TASSEL_0 (0<<8) /* Timer A clock source select: 0 - TACLK */
+#define TASSEL_1 (1<<8) /* Timer A clock source select: 1 - ACLK */
+#define TASSEL_2 (2<<8) /* Timer A clock source select: 2 - SMCLK */
+#define TASSEL_3 (3<<8) /* Timer A clock source select: 3 - INCLK */
+
+#define CM1 0x8000 /* Capture mode 1 */
+#define CM0 0x4000 /* Capture mode 0 */
+#define CCIS1 0x2000 /* Capture input select 1 */
+#define CCIS0 0x1000 /* Capture input select 0 */
+#define SCS 0x0800 /* Capture sychronize */
+#define SCCI 0x0400 /* Latched capture signal (read) */
+#define CAP 0x0100 /* Capture mode: 1 /Compare mode : 0 */
+#define OUTMOD2 0x0080 /* Output mode 2 */
+#define OUTMOD1 0x0040 /* Output mode 1 */
+#define OUTMOD0 0x0020 /* Output mode 0 */
+#define CCIE 0x0010 /* Capture/compare interrupt enable */
+#define CCI 0x0008 /* Capture input signal (read) */
+#define OUT 0x0004 /* PWM Output signal if output mode 0 */
+#define COV 0x0002 /* Capture/compare overflow flag */
+#define CCIFG 0x0001 /* Capture/compare interrupt flag */
+
+#define OUTMOD_0 (0<<5) /* PWM output mode: 0 - output only */
+#define OUTMOD_1 (1<<5) /* PWM output mode: 1 - set */
+#define OUTMOD_2 (2<<5) /* PWM output mode: 2 - PWM toggle/reset */
+#define OUTMOD_3 (3<<5) /* PWM output mode: 3 - PWM set/reset */
+#define OUTMOD_4 (4<<5) /* PWM output mode: 4 - toggle */
+#define OUTMOD_5 (5<<5) /* PWM output mode: 5 - Reset */
+#define OUTMOD_6 (6<<5) /* PWM output mode: 6 - PWM toggle/set */
+#define OUTMOD_7 (7<<5) /* PWM output mode: 7 - PWM reset/set */
+#define CCIS_0 (0<<12) /* Capture input select: 0 - CCIxA */
+#define CCIS_1 (1<<12) /* Capture input select: 1 - CCIxB */
+#define CCIS_2 (2<<12) /* Capture input select: 2 - GND */
+#define CCIS_3 (3<<12) /* Capture input select: 3 - Vcc */
+#define CM_0 (0<<14) /* Capture mode: 0 - disabled */
+#define CM_1 (1<<14) /* Capture mode: 1 - pos. edge */
+#define CM_2 (2<<14) /* Capture mode: 1 - neg. edge */
+#define CM_3 (3<<14) /* Capture mode: 1 - both edges */
+
+/* Aliases by mspgcc */
+#define MC_STOP MC_0
+#define MC_UPTO_CCR0 MC_1
+#define MC_CONT MC_2
+#define MC_UPDOWN MC_3
+
+#define ID_DIV1 ID_0
+#define ID_DIV2 ID_1
+#define ID_DIV4 ID_2
+#define ID_DIV8 ID_3
+
+#define TASSEL_TACLK TASSEL_0
+#define TASSEL_ACLK TASSEL_1
+#define TASSEL_SMCLK TASSEL_2
+#define TASSEL_INCLK TASSEL_3
+
+#define OUTMOD_OUT OUTMOD_0
+#define OUTMOD_SET OUTMOD_1
+#define OUTMOD_TOGGLE_RESET OUTMOD_2
+#define OUTMOD_SET_RESET OUTMOD_3
+#define OUTMOD_TOGGLE OUTMOD_4
+#define OUTMOD_RESET OUTMOD_5
+#define OUTMOD_TOGGLE_SET OUTMOD_6
+#define OUTMOD_RESET_SET OUTMOD_7
+
+#define CM_DISABLE CM_0
+#define CM_POS CM_1
+#define CM_NEG CM_2
+#define CM_BOTH CM_3
+
+/* TimerA IV names */
+#if defined(__MSP430_HAS_TA3__) || defined(__MSP430_HAS_TA2____)
+ #define TAIV_NONE 0x00 /* No interrupt pending */
+ #define TAIV_CCR1 0x02 /* Capture/compare 1 TACCR1 CCIFG Highest */
+ #if defined(__MSP430_HAS_TA3__)
+ #define TAIV_CCR2 0x04 /* Capture/compare 2 TACCR2 CCIFG */
+ #endif /*__MSP430_HAS_TA3__*/
+ #define TAIV_OVERFLOW 0x0A /* Timer overflow TAIFG Lowest */
+#endif /*__MSP430_HAS_TA3__ || __MSP430_HAS_TA2__*/
+
+#endif
--- /dev/null
+#if !defined(__msp430_headers_timerb_h__)
+#define __msp430_headers_timerb_h__
+
+/* timerb.h
+ *
+ * mspgcc project: MSP430 device headers
+ * TIMERB module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: timerb.h,v 1.11 2006/04/19 20:09:52 cliechti Exp $
+ */
+
+/* Switches:
+
+__MSP430_HAS_TB7__ - if timer B has 7 capture/compare registers (default is 3)
+
+*/
+
+#define TBIV_ 0x011E /* Timer B Interrupt Vector Word */
+sfrw(TBIV,TBIV_);
+#define TBCTL_ 0x0180 /* Timer B Control */
+sfrw(TBCTL,TBCTL_);
+#define TBR_ 0x0190 /* Timer B */
+sfrw(TBR,TBR_);
+
+#define TBCCTL0_ 0x0182 /* Timer B Capture/Compare Control 0 */
+sfrw(TBCCTL0,TBCCTL0_);
+#define TBCCTL1_ 0x0184 /* Timer B Capture/Compare Control 1 */
+sfrw(TBCCTL1,TBCCTL1_);
+#define TBCCTL2_ 0x0186 /* Timer B Capture/Compare Control 2 */
+sfrw(TBCCTL2,TBCCTL2_);
+#define TBCCR0_ 0x0192 /* Timer B Capture/Compare 0 */
+sfrw(TBCCR0,TBCCR0_);
+#define TBCCR1_ 0x0194 /* Timer B Capture/Compare 1 */
+sfrw(TBCCR1,TBCCR1_);
+#define TBCCR2_ 0x0196 /* Timer B Capture/Compare 2 */
+sfrw(TBCCR2,TBCCR2_);
+
+#if defined(__MSP430_HAS_TB7__)
+
+#define TBCCTL3_ 0x0188 /* Timer B Capture/Compare Control 3 */
+sfrw(TBCCTL3,TBCCTL3_);
+#define TBCCTL4_ 0x018A /* Timer B Capture/Compare Control 4 */
+sfrw(TBCCTL4,TBCCTL4_);
+#define TBCCTL5_ 0x018C /* Timer B Capture/Compare Control 5 */
+sfrw(TBCCTL5,TBCCTL5_);
+#define TBCCTL6_ 0x018E /* Timer B Capture/Compare Control 6 */
+sfrw(TBCCTL6,TBCCTL6_);
+#define TBCCR3_ 0x0198 /* Timer B Capture/Compare 3 */
+sfrw(TBCCR3,TBCCR3_);
+#define TBCCR4_ 0x019A /* Timer B Capture/Compare 4 */
+sfrw(TBCCR4,TBCCR4_);
+#define TBCCR5_ 0x019C /* Timer B Capture/Compare 5 */
+sfrw(TBCCR5,TBCCR5_);
+#define TBCCR6_ 0x019E /* Timer B Capture/Compare 6 */
+sfrw(TBCCR6,TBCCR6_);
+
+#endif
+
+#ifndef _GNU_ASSEMBLER_
+/* Structured declaration */
+typedef struct {
+ volatile unsigned
+ tbifg:1,
+ tbie:1,
+ tbclr:1,
+ dummy1:1,
+ tbmc:2,
+ tbid:2,
+ tbssel:2,
+ dummy2:1,
+ tbcntl:2,
+ tbclgrp:2;
+} __attribute__ ((packed)) tbctl_t;
+
+typedef struct {
+ volatile unsigned
+ ccifg:1,
+ cov:1,
+ out:1,
+ cci:1,
+ ccie:1,
+ outmod:3,
+ cap:1,
+ clld:2,
+ scs:1,
+ ccis:2,
+ cm:2;
+} __attribute__ ((packed)) tbcctl_t;
+
+/* The timer B declaration itself */
+struct timerb_t {
+ tbctl_t ctl;
+ tbcctl_t cctl0;
+ tbcctl_t cctl1;
+ tbcctl_t cctl2;
+#if defined(__MSP430_HAS_TB7__)
+ tbcctl_t cctl3;
+ tbcctl_t cctl4;
+ tbcctl_t cctl5;
+ tbcctl_t cctl6;
+#else
+ volatile unsigned dummy[4]; /* Pad to the next group of registers */
+#endif
+ volatile unsigned tbr;
+ volatile unsigned tbccr0;
+ volatile unsigned tbccr1;
+ volatile unsigned tbccr2;
+#if defined(__MSP430_HAS_TB7__)
+ volatile unsigned tbccr3;
+ volatile unsigned tbccr4;
+ volatile unsigned tbccr5;
+ volatile unsigned tbccr6;
+#endif
+};
+
+#ifdef __cplusplus
+extern "C" struct timerb_t timerb asm("0x0180");
+#else //__cplusplus
+struct timerb_t timerb asm("0x0180");
+#endif //__cplusplus
+
+#endif
+
+#define SHR1 0x4000 /* Timer B compare latch load group 1 */
+#define SHR0 0x2000 /* Timer B compare latch load group 0 */
+#define TBCLGRP1 0x4000 /* Timer B compare latch load group 1 */
+#define TBCLGRP0 0x2000 /* Timer B compare latch load group 0 */
+#define CNTL1 0x1000 /* Counter length 1 */
+#define CNTL0 0x0800 /* Counter length 0 */
+#define TBSSEL2 0x0400 /* unused */
+#define TBSSEL1 0x0200 /* Clock source 1 */
+#define TBSSEL0 0x0100 /* Clock source 0 */
+#define TBCLR 0x0004 /* Timer B counter clear */
+#define TBIE 0x0002 /* Timer B interrupt enable */
+#define TBIFG 0x0001 /* Timer B interrupt flag */
+
+#define TBSSEL_0 (0<<8) /* Clock source: TBCLK */
+#define TBSSEL_1 (1<<8) /* Clock source: ACLK */
+#define TBSSEL_2 (2<<8) /* Clock source: SMCLK */
+#define TBSSEL_3 (3<<8) /* Clock source: INCLK */
+#define CNTL_0 (0<<11) /* Counter length: 16 bit */
+#define CNTL_1 (1<<11) /* Counter length: 12 bit */
+#define CNTL_2 (2<<11) /* Counter length: 10 bit */
+#define CNTL_3 (3<<11) /* Counter length: 8 bit */
+#define SHR_0 (0<<13) /* Timer B Group: 0 - individually */
+#define SHR_1 (1<<13) /* Timer B Group: 1 - 3 groups (1-2, 3-4, 5-6) */
+#define SHR_2 (2<<13) /* Timer B Group: 2 - 2 groups (1-3, 4-6)*/
+#define SHR_3 (3<<13) /* Timer B Group: 3 - 1 group (all) */
+#define TBCLGRP_0 (0<<13) /* Timer B Group: 0 - individually */
+#define TBCLGRP_1 (1<<13) /* Timer B Group: 1 - 3 groups (1-2, 3-4, 5-6) */
+#define TBCLGRP_2 (2<<13) /* Timer B Group: 2 - 2 groups (1-3, 4-6)*/
+#define TBCLGRP_3 (3<<13) /* Timer B Group: 3 - 1 group (all) */
+
+/* Additional Timer B Control Register bits are defined in Timer A */
+
+#define SLSHR1 0x0400 /* Compare latch load source 1 */
+#define SLSHR0 0x0200 /* Compare latch load source 0 */
+#define CLLD1 0x0400 /* Compare latch load source 1 */
+#define CLLD0 0x0200 /* Compare latch load source 0 */
+
+#define SLSHR_0 (0<<9) /* Compare latch load source 0 - immediate */
+#define SLSHR_1 (1<<9) /* Compare latch load source 1 - TBR counts to 0 */
+#define SLSHR_2 (2<<9) /* Compare latch load source 2 - up/down */
+#define SLSHR_3 (3<<9) /* Compare latch load source 3 - TBR counts to TBCTL0 */
+
+#define CLLD_0 (0<<9) /* Compare latch load source 0 - immediate */
+#define CLLD_1 (1<<9) /* Compare latch load source 1 - TBR counts to 0 */
+#define CLLD_2 (2<<9) /* Compare latch load source 2 - up/down */
+#define CLLD_3 (3<<9) /* Compare latch load source 3 - TBR counts to TBCTL0 */
+
+/* Aliases by mspgcc */
+#define TBSSEL_TBCLK TBSSEL_0
+#define TBSSEL_ACLK TBSSEL_1
+#define TBSSEL_SMCLK TBSSEL_2
+#define TBSSEL_INCLK TBSSEL_3
+
+/* TimerB IV names */
+#define TBIV_NONE 0x00 /* No interrupt pending */
+#define TBIV_CCR1 0x02 /* Capture/compare 1 TBCCR1 CCIFG Highest */
+#define TBIV_CCR2 0x04 /* Capture/compare 2 TBCCR2 CCIFG */
+#if defined(__MSP430_HAS_TB7__)
+ #define TBIV_CCR3 0x06 /* Capture/compare 3 TBCCR3 CCIFG */
+ #define TBIV_CCR4 0x08 /* Capture/compare 4 TBCCR4 CCIFG */
+ #define TBIV_CCR5 0x0A /* Capture/compare 5 TBCCR5 CCIFG */
+ #define TBIV_CCR6 0x0C /* Capture/compare 6 TBCCR6 CCIFG */
+#endif /*__MSP430_HAS_TB7__B7*/
+#define TBIV_OVERFLOW 0x0E /* Timer overflow TBIFG Lowest */
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_timerport_h
+#define __msp430_headers_timerport_h
+
+/* timerport.h
+ *
+ * mspgcc project: MSP430 device headers
+ * Timer / IO port module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: timerport.h,v 1.2 2002/12/28 06:50:18 coppice Exp $
+ */
+
+/* Switches: none */
+
+#define TPCTL_ 0x004B /* Timer/Port Control */
+sfrb(TPCTL,TPCTL_);
+#define EN1FG 0x01
+#define RC1FG 0x02
+#define RC2FG 0x04
+#define EN1 0x08
+#define ENA 0x10
+#define ENB 0x20
+#define TPSSEL0 0x40
+#define TPSSEL1 0x80
+/* The EN1 signal of TPCNT1 is coded with with Bits 3-5 in TPCTL */
+#define TPCNT1_EN_OFF 0 /* TPCNT1 is disabled */
+#define TPCNT1_EN_ON ENA /* " is enabled */
+#define TPCNT1_EN_nTPIN5 ENB /* " is enabled with ~TPIN.5 */
+#define TPCNT1_EN_TPIN5 (TPSSEL0|ENB) /* " is enabled with TPIN.5 */
+#define TPCNT1_EN_nCIN (ENB|ENA) /* " is enabled with ~CIN */
+#define TPCNT1_EN_CIN (TPSSEL0|ENB|ENA) /* " is enabled with CIN */
+
+/* Source select of clock input coded with Bits 6-7 in TPCTL */
+#define TPSSEL_CLK1_CIN 0 /* CLK1 source is signal at CIN (default) */
+#define TPSSEL_CLK1_ACLK TPSSEL0 /* CLK1 source is ACLK */
+#define TPSSEL_CLK1_MCLK TPSSEL1 /* CLK1 source is MCLK */
+
+/* DATA REGISTER ADDRESSES */
+#define TPCNT1_ 0x004C /* Timer/Port Counter 1 */
+sfrb(TPCNT1,TPCNT1_);
+#define TPCNT2_ 0x004D /* Timer/Port Counter 2 */
+sfrb(TPCNT2,TPCNT2_);
+
+#define TPD_ 0x004E /* Timer/Port Data */
+sfrb(TPD,TPD_);
+#define TPD_0 0x01
+#define TPD_1 0x02
+#define TPD_2 0x04
+#define TPD_3 0x08
+#define TPD_4 0x10
+#define TPD_5 0x20
+#define CPON 0x40
+#define B16 0x80
+
+#define TPE_ 0x004F /* Timer/Port Enable */
+sfrb(TPE,TPE_);
+#define TPE_0 0x01
+#define TPE_1 0x02
+#define TPE_2 0x04
+#define TPE_3 0x08
+#define TPE_4 0x10
+#define TPE_5 0x20
+#define TPSSEL2 0x40
+#define TPSSEL3 0x80
+/* Source select of clock input coded with Bits 6-7 in TPE
+ NOTE: If the control bit B16 in TPD is set, TPSSEL2/3
+ are 'don't care' and the clock source of counter
+ TPCNT2 is the same as of the counter TPCNT1. */
+#define TPSSEL_CLK2_TPIN5 0 /* CLK2 source is signal TPIN.5 (default) */
+#define TPSSEL_CLK2_ACLK TPSSEL2 /* CLK2 source is ACLK */
+#define TPSSEL_CLK2_MCLK TPSSEL3 /* CLK2 source is MCLK */
+#define TPSSEL_CLK2_OFF (TPSSEL3|TPSSEL2) /* CLK2 source is disabled */
+
+#endif
--- /dev/null
+#ifndef __msp430_headers_usart_h
+#define __msp430_headers_usart_h
+
+/* usart.h
+ *
+ * mspgcc project: MSP430 device headers
+ * USART module header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: usart.h,v 1.12 2007/02/16 13:07:23 cliechti Exp $
+ */
+
+/* Switches:
+
+__MSP430_HAS_I2C__ - if device has USART0 with I2C feature
+__MSP430_HAS_UART1__ - if device has USART1
+
+*/
+
+/* -------- Common USART bit definitions */
+
+#define PENA 0x80 /* UCTL */
+#define PEV 0x40
+#define SPB 0x20 /* to distinguish from stackpointer SP */
+#define CHAR 0x10
+#define LISTEN 0x08 /* Loopback */
+#define SYNC 0x04 /* USART synchronous/asynchronous */
+#define MM 0x02
+#define SWRST 0x01
+
+#define CKPH 0x80 /* UTCTL */
+#define CKPL 0x40
+#define SSEL1 0x20
+#define SSEL0 0x10
+#define URXSE 0x08
+#define TXWAKE 0x04
+#define STC 0x02
+#define TXEPT 0x01
+
+#define FE 0x80 /* URCTL */
+#define PE 0x40
+#define OE 0x20
+#define BRK 0x10
+#define URXEIE 0x08
+#define URXWIE 0x04
+#define RXWAKE 0x02
+#define RXERR 0x01
+
+/* Aliases by mspgcc */
+#define SSEL_0 0x00 /* UCLKI */
+#define SSEL_1 0x10 /* ACLK */
+#define SSEL_2 0x20 /* SMCLK */
+#define SSEL_3 0x30 /* SMCLK */
+
+#define SSEL_UCLKI SSEL_0
+#define SSEL_ACLK SSEL_1
+#define SSEL_SMCLK SSEL_2
+/*#define SSEL_SMCLK SSEL_3*/
+
+#if defined(__MSP430_HAS_UART0__)
+/*UART0 ME/IE/IFG is different on F12x and F13x/F14x devices.
+ With these defines, the right sfrs are choosen automaticaly.
+ These defines should only be used with bit set and clear
+ instructions as the real ME/IE/IFG sfrs might be modified
+ somewhere else too!
+ e.g.:
+ ME1 = ME1_INIT; //enable all other modules first
+ ME2 = ME2_INIT; //enable all other modules first
+ U0ME |= UTXE0|URXE0; //and then the USART0
+*/
+#if defined(__msp430x12x) || defined(__msp430x12x2)
+ #define U0ME ME2 /* RX and TX module enable */
+ #define U0IE IE2 /* RX and TX interrupt of UART0 */
+ #define U0IFG IFG2 /* RX and TX interrupt flags of UART0 */
+#else /* not a __msp430x12x or __msp430x12x2 */
+ #define U0ME ME1 /* RX and TX module enable */
+ #define U0IE IE1 /* RX and TX interrupt of UART0 */
+ #define U0IFG IFG1 /* RX and TX interrupt flags of UART0 */
+#endif
+#endif /*__MSP430_HAS_UART0__*/
+
+/* UART1 aliases for consistency with UART0 */
+#if defined(__MSP430_HAS_UART1__)
+ #define U1ME ME2 /* RX and TX module enable */
+ #define U1IE IE2 /* RX and TX interrupt of UART1 */
+ #define U1IFG IFG2 /* RX and TX interrupt flags of UART1 */
+#endif
+
+
+#if defined(__MSP430_HAS_UART0__)
+
+/* -------- USART 0 */
+
+#define U0CTL_ 0x0070 /* UART 0 Control */
+sfrb(U0CTL, U0CTL_);
+#define U0TCTL_ 0x0071 /* UART 0 Transmit Control */
+sfrb(U0TCTL, U0TCTL_);
+#define U0RCTL_ 0x0072 /* UART 0 Receive Control */
+sfrb(U0RCTL, U0RCTL_);
+#define U0MCTL_ 0x0073 /* UART 0 Modulation Control */
+sfrb(U0MCTL, U0MCTL_);
+#define U0BR0_ 0x0074 /* UART 0 Baud Rate 0 */
+sfrb(U0BR0, U0BR0_);
+#define U0BR1_ 0x0075 /* UART 0 Baud Rate 1 */
+sfrb(U0BR1, U0BR1_);
+#define U0RXBUF_ 0x0076 /* UART 0 Receive Buffer */
+sfrb(U0RXBUF, U0RXBUF_);
+#define U0TXBUF_ 0x0077 /* UART 0 Transmit Buffer */
+sfrb(U0TXBUF, U0TXBUF_);
+
+/* Alternate register names */
+
+#define UCTL_ 0x0070 /* UART Control */
+sfrb(UCTL, UCTL_);
+#define UTCTL_ 0x0071 /* UART Transmit Control */
+sfrb(UTCTL, UTCTL_);
+#define URCTL_ 0x0072 /* UART Receive Control */
+sfrb(URCTL, URCTL_);
+#define UMCTL_ 0x0073 /* UART Modulation Control */
+sfrb(UMCTL, UMCTL_);
+#define UBR0_ 0x0074 /* UART Baud Rate 0 */
+sfrb(UBR0, UBR0_);
+#define UBR1_ 0x0075 /* UART Buad Rate 1 */
+sfrb(UBR1, UBR1_);
+#define RXBUF_ 0x0076 /* UART Receive Buffer */
+sfrb(RXBUF, RXBUF_);
+#define TXBUF_ 0x0077 /* UART Transmit Buffer */
+sfrb(TXBUF, TXBUF_);
+
+#define UCTL0_ 0x0070 /* UART 0 Control */
+sfrb(UCTL0, UCTL0_);
+#define UTCTL0_ 0x0071 /* UART 0 Transmit Control */
+sfrb(UTCTL0, UTCTL0_);
+#define URCTL0_ 0x0072 /* UART 0 Receive Control */
+sfrb(URCTL0, URCTL0_);
+#define UMCTL0_ 0x0073 /* UART 0 Modulation Control */
+sfrb(UMCTL0, UMCTL0_);
+#define UBR00_ 0x0074 /* UART 0 Baud Rate 0 */
+sfrb(UBR00, UBR00_);
+#define UBR10_ 0x0075 /* UART 0 Baud Rate 1 */
+sfrb(UBR10, UBR10_);
+#define RXBUF0_ 0x0076 /* UART 0 Receive Buffer */
+sfrb(RXBUF0, RXBUF0_);
+#define TXBUF0_ 0x0077 /* UART 0 Transmit Buffer */
+sfrb(TXBUF0, TXBUF0_);
+
+#define UCTL_0_ 0x0070 /* UART 0 Control */
+sfrb(UCTL_0, UCTL_0_);
+#define UTCTL_0_ 0x0071 /* UART 0 Transmit Control */
+sfrb(UTCTL_0, UTCTL_0_);
+#define URCTL_0_ 0x0072 /* UART 0 Receive Control */
+sfrb(URCTL_0, URCTL_0_);
+#define UMCTL_0_ 0x0073 /* UART 0 Modulation Control */
+sfrb(UMCTL_0, UMCTL_0_);
+#define UBR0_0_ 0x0074 /* UART 0 Baud Rate 0 */
+sfrb(UBR0_0, UBR0_0_);
+#define UBR1_0_ 0x0075 /* UART 0 Baud Rate 1 */
+sfrb(UBR1_0, UBR1_0_);
+#define RXBUF_0_ 0x0076 /* UART 0 Receive Buffer */
+sfrb(RXBUF_0, RXBUF_0_);
+#define TXBUF_0_ 0x0077 /* UART 0 Transmit Buffer */
+sfrb(TXBUF_0, TXBUF_0_);
+
+#if defined(__MSP430_HAS_I2C__)
+
+/* USART 0 Control */
+#define RXDMAEN 0x80 /* Receive DMA enable */
+#define TXDMAEN 0x40 /* Transmit DMA enable */
+#define I2C 0x20 /* USART I2C */
+#define XA 0x10 /* I2C extended addressing */
+/* LISTEN - as for non I2C version */
+/* SYNC - as for non I2C version */
+#define MST 0x02 /* I2C master */
+#define I2CEN 0x01 /* I2C enable */
+
+#define STTIE 0x80 /* Start condition */
+#define GCIE 0x40 /* General call */
+#define TXRDYIE 0x20 /* Transmit ready (transmit register empty) */
+#define RXRDYIE 0x10 /* Receive ready (data received) */
+#define ARDYIE 0x08 /* Access ready (operation complete) */
+#define OAIE 0x04 /* Own address */
+#define NACKIE 0x02 /* No acknowledge */
+#define ALIE 0x01 /* Arbitration lost */
+
+#define STTIFG 0x80 /* Start condition */
+#define GCIFG 0x40 /* General call */
+#define TXRDYIFG 0x20 /* Transmit ready (transmit register empty) */
+#define RXRDYIFG 0x10 /* Receive ready (data received) */
+#define ARDYIFG 0x08 /* Access ready (operation complete) */
+#define OAIFG 0x04 /* Own address */
+#define NACKIFG 0x02 /* No acknowledge */
+#define ALIFG 0x01 /* Arbitration lost */
+
+#define I2CWORD 0x80 /* Word data mode */
+#define I2CRM 0x40 /* Repeat mode */
+#define I2CSSEL1 0x20 /* Clock select bit 1 */
+#define I2CSSEL0 0x10 /* Clock select bit 0 */
+#define I2CTRX 0x08 /* Transmit */
+#define I2CSTB 0x04 /* Start byte mode */
+#define I2CSTP 0x02 /* Stop bit */
+#define I2CSTT 0x01 /* Start bit */
+
+#define I2CSSEL_0 (0<<4) /* I2C clock select 0: UCLK */
+#define I2CSSEL_1 (1<<4) /* I2C clock select 1: ACLK */
+#define I2CSSEL_2 (2<<4) /* I2C clock select 2: SMCLK */
+#define I2CSSEL_3 (3<<4) /* I2C clock select 3: SMCLK */
+
+#define I2CMM_0 0 /* Master mode 0 */
+#define I2CMM_1 (SST) /* Master mode 1 */
+#define I2CMM_2 (STP|SST) /* Master mode 2 */
+#define I2CMM_3 (RM|STT) /* Master mode 3 */
+#define I2CMM_4 (STP) /* Master mode 4 */
+
+#define I2CBUSY 0x20 /* I2C module not idle */
+#define I2CSCLLOW 0x10 /* SCL being held low */
+#define I2CSBD 0x08 /* Received byte */
+#define I2CTXUDF 0x04 /* Transmit underflow */
+#define I2CRXOVR 0x02 /* Receiver overrun */
+#define I2CBB 0x01 /* Bus busy */
+
+
+#define I2CIV_NONE 0x00 /* I2C interrupt vector: No interrupt pending */
+#define I2CIV_AL 0x02 /* I2C interrupt vector: Arbitration lost (ALIFG) */
+#define I2CIV_NACK 0x04 /* I2C interrupt vector: No acknowledge (NACKIFG) */
+#define I2CIV_OA 0x06 /* I2C interrupt vector: Own address (OAIFG) */
+#define I2CIV_ARDY 0x08 /* I2C interrupt vector: Access ready (ARDYIFG) */
+#define I2CIV_RXRDY 0x0A /* I2C interrupt vector: Receive ready (RXRDYIFG) */
+#define I2CIV_TXRDY 0x0C /* I2C interrupt vector: Transmit ready (TXRDYIFG) */
+#define I2CIV_GC 0x0E /* I2C interrupt vector: General call (GCIFG) */
+#define I2CIV_STT 0x10 /* I2C interrupt vector: Start condition (STTIFG) */
+
+#define I2CIE_ 0x0050 /* I2C interrupt enable */
+sfrb(I2CIE, I2CIE_);
+#define I2CIFG_ 0x0051 /* I2C interrupt flag */
+sfrb(I2CIFG, I2CIFG_);
+#define I2CNDAT_ 0x0052 /* I2C data count */
+sfrb(I2CNDAT, I2CNDAT_);
+#define I2CTCTL_ 0x0071 /* I2C transfer control */
+sfrb(I2CTCTL, I2CTCTL_);
+#define I2CDCTL_ 0x0072 /* I2C data control */
+sfrb(I2CDCTL, I2CDCTL_);
+#define I2CPSC_ 0x0073 /* I2C PSC */
+sfrb(I2CPSC, I2CPSC_);
+#define I2CSCLH_ 0x0074 /* I2C SCLH */
+sfrb(I2CSCLH, I2CSCLH_);
+#define I2CSCLL_ 0x0075 /* I2C SCLL */
+sfrb(I2CSCLL, I2CSCLL_);
+#define I2CDRB_ 0x0076 /* I2C data for byte access */
+sfrb(I2CDRB, I2CDRB_);
+#define I2CDRW_ 0x0076 /* I2C data for word access */
+sfrw(I2CDRW, I2CDRW_);
+#define I2COA_ 0x0118 /* I2C own address */
+sfrw(I2COA, I2COA_);
+#define I2CSA_ 0x011A /* I2C slave address */
+sfrw(I2CSA, I2CSA_);
+#define I2CIV_ 0x011C /* I2C interrupt vector */
+sfrw(I2CIV, I2CIV_);
+
+/* Backwards compatibility to older versions of the header file.
+ Please consider using the new name I2CDRB.
+ */
+#define I2CDR_ 0x0076 /* I2C data for byte access */
+sfrb(I2CDR, I2CDR_);
+
+/* Aliases by mspgcc */
+#define I2CSSEL_UCLK I2CSSEL_0 /* I2C clock select 0: UCLK */
+#define I2CSSEL_ACLK I2CSSEL_1 /* I2C clock select 1: ACLK */
+#define I2CSSEL_SMCLK I2CSSEL_2 /* I2C clock select 2: SMCLK */
+//~ #define I2CSSEL_SMCLK I2CSSEL_3 /* I2C clock select 3: SMCLK */
+
+#endif /* __MSP430_HAS_I2C__ */
+#endif /*__MSP430_HAS_UART0__*/
+
+#if defined(__MSP430_HAS_UART1__)
+
+/* -------- USART1 */
+
+#define U1CTL_ 0x0078 /* UART 1 Control */
+sfrb(U1CTL, U1CTL_);
+#define U1TCTL_ 0x0079 /* UART 1 Transmit Control */
+sfrb(U1TCTL, U1TCTL_);
+#define U1RCTL_ 0x007A /* UART 1 Receive Control */
+sfrb(U1RCTL, U1RCTL_);
+#define U1MCTL_ 0x007B /* UART 1 Modulation Control */
+sfrb(U1MCTL, U1MCTL_);
+#define U1BR0_ 0x007C /* UART 1 Baud Rate 0 */
+sfrb(U1BR0, U1BR0_);
+#define U1BR1_ 0x007D /* UART 1 Baud Rate 1 */
+sfrb(U1BR1, U1BR1_);
+#define U1RXBUF_ 0x007E /* UART 1 Receive Buffer */
+sfrb(U1RXBUF, U1RXBUF_);
+#define U1TXBUF_ 0x007F /* UART 1 Transmit Buffer */
+sfrb(U1TXBUF, U1TXBUF_);
+
+#define UCTL1_ 0x0078 /* UART 1 Control */
+sfrb(UCTL1, UCTL1_);
+#define UTCTL1_ 0x0079 /* UART 1 Transmit Control */
+sfrb(UTCTL1, UTCTL1_);
+#define URCTL1_ 0x007A /* UART 1 Receive Control */
+sfrb(URCTL1, URCTL1_);
+#define UMCTL1_ 0x007B /* UART 1 Modulation Control */
+sfrb(UMCTL1, UMCTL1_);
+#define UBR01_ 0x007C /* UART 1 Baud Rate 0 */
+sfrb(UBR01, UBR01_);
+#define UBR11_ 0x007D /* UART 1 Baud Rate 1 */
+sfrb(UBR11, UBR11_);
+#define RXBUF1_ 0x007E /* UART 1 Receive Buffer */
+sfrb(RXBUF1, RXBUF1_);
+#define TXBUF1_ 0x007F /* UART 1 Transmit Buffer */
+sfrb(TXBUF1, TXBUF1_);
+
+#define UCTL_1_ 0x0078 /* UART 1 Control */
+sfrb(UCTL_1, UCTL_1_);
+#define UTCTL_1_ 0x0079 /* UART 1 Transmit Control */
+sfrb(UTCTL_1, UTCTL_1_);
+#define URCTL_1_ 0x007A /* UART 1 Receive Control */
+sfrb(URCTL_1, URCTL_1_);
+#define UMCTL_1_ 0x007B /* UART 1 Modulation Control */
+sfrb(UMCTL_1, UMCTL_1_);
+#define UBR0_1_ 0x007C /* UART 1 Baud Rate 0 */
+sfrb(UBR0_1, UBR0_1_);
+#define UBR1_1_ 0x007D /* UART 1 Baud Rate 1 */
+sfrb(UBR1_1, UBR1_1_);
+#define RXBUF_1_ 0x007E /* UART 1 Receive Buffer */
+sfrb(RXBUF_1, RXBUF_1_);
+#define TXBUF_1_ 0x007F /* UART 1 Transmit Buffer */
+sfrb(TXBUF_1, TXBUF_1_);
+
+#endif /* __MSP430_HAS_UART1__ */
+
+#endif
--- /dev/null
+#if !defined(__msp430_headers_usci_h__)
+#define __msp430_headers_usci_h__
+
+/* usi.h
+ *
+ * mspgcc project: MSP430 device headers
+ * USCI module header
+ *
+ * (c) 2006 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: usci.h,v 1.6 2008/06/18 22:25:52 cliechti Exp $
+ *
+ * 2008-02-05 - modifications by G.Lemm <msp430@daqtix.com>
+ * - added UC1IE and UC1IFG registers
+ * - added UC*1*IE and UC*1*IFG bit definitions
+ */
+
+/* Switches:
+
+__MSP430_HAS_USCI1__ - if device has USCI1
+
+*/
+
+#define USIPE7 (0x80) /* USI Port Enable Px.7 */
+#define USIPE6 (0x40) /* USI Port Enable Px.6 */
+#define USIPE5 (0x20) /* USI Port Enable Px.5 */
+#define USILSB (0x10) /* USI LSB first 1:LSB / 0:MSB */
+#define USIMST (0x08) /* USI Master Select 0:Slave / 1:Master */
+#define USIGE (0x04) /* USI General Output Enable Latch */
+#define USIOE (0x02) /* USI Output Enable */
+#define USISWRST (0x01) /* USI Software Reset */
+
+#define USICKPH (0x80) /* USI Sync. Mode: Clock Phase */
+#define USII2C (0x40) /* USI I2C Mode */
+#define USISTTIE (0x20) /* USI START Condition interrupt enable */
+#define USIIE (0x10) /* USI Counter Interrupt enable */
+#define USIAL (0x08) /* USI Arbitration Lost */
+#define USISTP (0x04) /* USI STOP Condition received */
+#define USISTTIFG (0x02) /* USI START Condition interrupt Flag */
+#define USIIFG (0x01) /* USI Counter Interrupt Flag */
+
+#define USIDIV2 (0x80) /* USI Clock Divider 2 */
+#define USIDIV1 (0x40) /* USI Clock Divider 1 */
+#define USIDIV0 (0x20) /* USI Clock Divider 0 */
+#define USISSEL2 (0x10) /* USI Clock Source Select 2 */
+#define USISSEL1 (0x08) /* USI Clock Source Select 1 */
+#define USISSEL0 (0x04) /* USI Clock Source Select 0 */
+#define USICKPL (0x02) /* USI Clock Polarity 0:Inactive=Low / 1:Inactive=High */
+#define USISWCLK (0x01) /* USI Software Clock */
+
+#define USIDIV_0 (0x00) /* USI Clock Divider: 0 */
+#define USIDIV_1 (0x20) /* USI Clock Divider: 1 */
+#define USIDIV_2 (0x40) /* USI Clock Divider: 2 */
+#define USIDIV_3 (0x60) /* USI Clock Divider: 3 */
+#define USIDIV_4 (0x80) /* USI Clock Divider: 4 */
+#define USIDIV_5 (0xA0) /* USI Clock Divider: 5 */
+#define USIDIV_6 (0xC0) /* USI Clock Divider: 6 */
+#define USIDIV_7 (0xE0) /* USI Clock Divider: 7 */
+
+#define USISSEL_0 (0x00) /* USI Clock Source: 0 */
+#define USISSEL_1 (0x04) /* USI Clock Source: 1 */
+#define USISSEL_2 (0x08) /* USI Clock Source: 2 */
+#define USISSEL_3 (0x0C) /* USI Clock Source: 3 */
+#define USISSEL_4 (0x10) /* USI Clock Source: 4 */
+#define USISSEL_5 (0x14) /* USI Clock Source: 5 */
+#define USISSEL_6 (0x18) /* USI Clock Source: 6 */
+#define USISSEL_7 (0x1C) /* USI Clock Source: 7 */
+
+#define USISCLREL (0x80) /* USI SCL Released */
+#define USI16B (0x40) /* USI 16 Bit Shift Register Enable */
+#define USIFGDC (0x20) /* USI Interrupt Flag don't clear */
+#define USICNT4 (0x10) /* USI Bit Count 4 */
+#define USICNT3 (0x08) /* USI Bit Count 3 */
+#define USICNT2 (0x04) /* USI Bit Count 2 */
+#define USICNT1 (0x02) /* USI Bit Count 1 */
+#define USICNT0 (0x01) /* USI Bit Count 0 */
+
+// UART-Mode Bits
+#define UCPEN (0x80) /* Async. Mode: Parity enable */
+#define UCPAR (0x40) /* Async. Mode: Parity 0:odd / 1:even */
+#define UCMSB (0x20) /* Async. Mode: MSB first 0:LSB / 1:MSB */
+#define UC7BIT (0x10) /* Async. Mode: Data Bits 0:8-bits / 1:7-bits */
+#define UCSPB (0x08) /* Async. Mode: Stop Bits 0:one / 1: two */
+#define UCMODE1 (0x04) /* Async. Mode: USCI Mode 1 */
+#define UCMODE0 (0x02) /* Async. Mode: USCI Mode 0 */
+#define UCSYNC (0x01) /* Sync-Mode 0:UART-Mode / 1:SPI-Mode */
+
+// SPI-Mode Bits
+#define UCCKPH (0x80) /* Sync. Mode: Clock Phase */
+#define UCCKPL (0x40) /* Sync. Mode: Clock Polarity */
+#define UCMST (0x08) /* Sync. Mode: Master Select */
+
+// I2C-Mode Bits
+#define UCA10 (0x80) /* 10-bit Address Mode */
+#define UCSLA10 (0x40) /* 10-bit Slave Address Mode */
+#define UCMM (0x20) /* Multi-Master Environment */
+//#define res (0x10) /* reserved */
+#define UCMODE_0 (0<<1) /* Sync. Mode: USCI Mode: 0 */
+#define UCMODE_1 (1<<1) /* Sync. Mode: USCI Mode: 1 */
+#define UCMODE_2 (2<<1) /* Sync. Mode: USCI Mode: 2 */
+#define UCMODE_3 (3<<1) /* Sync. Mode: USCI Mode: 3 */
+
+// UART-Mode Bits
+#define UCSSEL1 (0x80) /* USCI 0 Clock Source Select 1 */
+#define UCSSEL0 (0x40) /* USCI 0 Clock Source Select 0 */
+#define UCRXEIE (0x20) /* RX Error interrupt enable */
+#define UCBRKIE (0x10) /* Break interrupt enable */
+#define UCDORM (0x08) /* Dormant (Sleep) Mode */
+#define UCTXADDR (0x04) /* Send next Data as Address */
+#define UCTXBRK (0x02) /* Send next Data as Break */
+#define UCSWRST (0x01) /* USCI Software Reset */
+
+// SPI-Mode Bits
+//#define res (0x20) /* reserved */
+//#define res (0x10) /* reserved */
+//#define res (0x08) /* reserved */
+//#define res (0x04) /* reserved */
+//#define res (0x02) /* reserved */
+
+// I2C-Mode Bits
+//#define res (0x20) /* reserved */
+#define UCTR (0x10) /* Transmit/Receive Select/Flag */
+#define UCTXNACK (0x08) /* Transmit NACK */
+#define UCTXSTP (0x04) /* Transmit STOP */
+#define UCTXSTT (0x02) /* Transmit START */
+#define UCSSEL_0 (0<<6) /* USCI 0 Clock Source: 0 */
+#define UCSSEL_1 (1<<6) /* USCI 0 Clock Source: 1 */
+#define UCSSEL_2 (2<<6) /* USCI 0 Clock Source: 2 */
+#define UCSSEL_3 (3<<6) /* USCI 0 Clock Source: 3 */
+
+#define UCBRF3 (0x80) /* USCI First Stage Modulation Select 3 */
+#define UCBRF2 (0x40) /* USCI First Stage Modulation Select 2 */
+#define UCBRF1 (0x20) /* USCI First Stage Modulation Select 1 */
+#define UCBRF0 (0x10) /* USCI First Stage Modulation Select 0 */
+#define UCBRS2 (0x08) /* USCI Second Stage Modulation Select 2 */
+#define UCBRS1 (0x04) /* USCI Second Stage Modulation Select 1 */
+#define UCBRS0 (0x02) /* USCI Second Stage Modulation Select 0 */
+#define UCOS16 (0x01) /* USCI 16-times Oversampling enable */
+
+#define UCBRF_0 (0x0<<4) /* USCI First Stage Modulation: 0 */
+#define UCBRF_1 (0x1<<4) /* USCI First Stage Modulation: 1 */
+#define UCBRF_2 (0x2<<4) /* USCI First Stage Modulation: 2 */
+#define UCBRF_3 (0x3<<4) /* USCI First Stage Modulation: 3 */
+#define UCBRF_4 (0x4<<4) /* USCI First Stage Modulation: 4 */
+#define UCBRF_5 (0x5<<4) /* USCI First Stage Modulation: 5 */
+#define UCBRF_6 (0x6<<4) /* USCI First Stage Modulation: 6 */
+#define UCBRF_7 (0x7<<4) /* USCI First Stage Modulation: 7 */
+#define UCBRF_8 (0x8<<4) /* USCI First Stage Modulation: 8 */
+#define UCBRF_9 (0x9<<4) /* USCI First Stage Modulation: 9 */
+#define UCBRF_10 (0xA<<4) /* USCI First Stage Modulation: A */
+#define UCBRF_11 (0xB<<4) /* USCI First Stage Modulation: B */
+#define UCBRF_12 (0xC<<4) /* USCI First Stage Modulation: C */
+#define UCBRF_13 (0xD<<4) /* USCI First Stage Modulation: D */
+#define UCBRF_14 (0xE<<4) /* USCI First Stage Modulation: E */
+#define UCBRF_15 (0xF<<4) /* USCI First Stage Modulation: F */
+
+#define UCBRS_0 (0<<1) /* USCI Second Stage Modulation: 0 */
+#define UCBRS_1 (1<<1) /* USCI Second Stage Modulation: 1 */
+#define UCBRS_2 (2<<1) /* USCI Second Stage Modulation: 2 */
+#define UCBRS_3 (3<<1) /* USCI Second Stage Modulation: 3 */
+#define UCBRS_4 (4<<1) /* USCI Second Stage Modulation: 4 */
+#define UCBRS_5 (5<<1) /* USCI Second Stage Modulation: 5 */
+#define UCBRS_6 (6<<1) /* USCI Second Stage Modulation: 6 */
+#define UCBRS_7 (7<<1) /* USCI Second Stage Modulation: 7 */
+
+#define UCLISTEN (0x80) /* USCI Listen mode */
+#define UCFE (0x40) /* USCI Frame Error Flag */
+#define UCOE (0x20) /* USCI Overrun Error Flag */
+#define UCPE (0x10) /* USCI Parity Error Flag */
+#define UCBRK (0x08) /* USCI Break received */
+#define UCRXERR (0x04) /* USCI RX Error Flag */
+#define UCADDR (0x02) /* USCI Address received Flag */
+#define UCBUSY (0x01) /* USCI Busy Flag */
+#define UCIDLE (0x02) /* USCI Idle line detected Flag */
+
+//#define res (0x80) /* reserved */
+//#define res (0x40) /* reserved */
+//#define res (0x20) /* reserved */
+//#define res (0x10) /* reserved */
+#define UCNACKIE (0x08) /* NACK Condition interrupt enable */
+#define UCSTPIE (0x04) /* STOP Condition interrupt enable */
+#define UCSTTIE (0x02) /* START Condition interrupt enable */
+#define UCALIE (0x01) /* Arbitration Lost interrupt enable */
+
+#define UCSCLLOW (0x40) /* SCL low */
+#define UCGC (0x20) /* General Call address received Flag */
+#define UCBBUSY (0x10) /* Bus Busy Flag */
+#define UCNACKIFG (0x08) /* NAK Condition interrupt Flag */
+#define UCSTPIFG (0x04) /* STOP Condition interrupt Flag */
+#define UCSTTIFG (0x02) /* START Condition interrupt Flag */
+#define UCALIFG (0x01) /* Arbitration Lost interrupt Flag */
+
+#define UCIRTXPL5 (0x80) /* IRDA Transmit Pulse Length 5 */
+#define UCIRTXPL4 (0x40) /* IRDA Transmit Pulse Length 4 */
+#define UCIRTXPL3 (0x20) /* IRDA Transmit Pulse Length 3 */
+#define UCIRTXPL2 (0x10) /* IRDA Transmit Pulse Length 2 */
+#define UCIRTXPL1 (0x08) /* IRDA Transmit Pulse Length 1 */
+#define UCIRTXPL0 (0x04) /* IRDA Transmit Pulse Length 0 */
+#define UCIRTXCLK (0x02) /* IRDA Transmit Pulse Clock Select */
+#define UCIREN (0x01) /* IRDA Encoder/Decoder enable */
+
+#define UCIRRXFL5 (0x80) /* IRDA Receive Filter Length 5 */
+#define UCIRRXFL4 (0x40) /* IRDA Receive Filter Length 4 */
+#define UCIRRXFL3 (0x20) /* IRDA Receive Filter Length 3 */
+#define UCIRRXFL2 (0x10) /* IRDA Receive Filter Length 2 */
+#define UCIRRXFL1 (0x08) /* IRDA Receive Filter Length 1 */
+#define UCIRRXFL0 (0x04) /* IRDA Receive Filter Length 0 */
+#define UCIRRXPL (0x02) /* IRDA Receive Input Polarity */
+#define UCIRRXFE (0x01) /* IRDA Receive Filter enable */
+
+//#define res (0x80) /* reserved */
+//#define res (0x40) /* reserved */
+#define UCDELIM1 (0x20) /* Break Sync Delimiter 1 */
+#define UCDELIM0 (0x10) /* Break Sync Delimiter 0 */
+#define UCSTOE (0x08) /* Sync-Field Timeout error */
+#define UCBTOE (0x04) /* Break Timeout error */
+//#define res (0x02) /* reserved */
+#define UCABDEN (0x01) /* Auto Baud Rate detect enable */
+
+#define UCGCEN (0x8000) /* I2C General Call enable */
+#define UCOA9 (0x0200) /* I2C Own Address 9 */
+#define UCOA8 (0x0100) /* I2C Own Address 8 */
+#define UCOA7 (0x0080) /* I2C Own Address 7 */
+#define UCOA6 (0x0040) /* I2C Own Address 6 */
+#define UCOA5 (0x0020) /* I2C Own Address 5 */
+#define UCOA4 (0x0010) /* I2C Own Address 4 */
+#define UCOA3 (0x0008) /* I2C Own Address 3 */
+#define UCOA2 (0x0004) /* I2C Own Address 2 */
+#define UCOA1 (0x0002) /* I2C Own Address 1 */
+#define UCOA0 (0x0001) /* I2C Own Address 0 */
+
+#define UCSA9 (0x0200) /* I2C Slave Address 9 */
+#define UCSA8 (0x0100) /* I2C Slave Address 8 */
+#define UCSA7 (0x0080) /* I2C Slave Address 7 */
+#define UCSA6 (0x0040) /* I2C Slave Address 6 */
+#define UCSA5 (0x0020) /* I2C Slave Address 5 */
+#define UCSA4 (0x0010) /* I2C Slave Address 4 */
+#define UCSA3 (0x0008) /* I2C Slave Address 3 */
+#define UCSA2 (0x0004) /* I2C Slave Address 2 */
+#define UCSA1 (0x0002) /* I2C Slave Address 1 */
+#define UCSA0 (0x0001) /* I2C Slave Address 0 */
+
+/* Aliases by mspgcc */
+#define UCSSEL_UCLKI UCSSEL_0
+#define UCSSEL_ACLK UCSSEL_1
+#define UCSSEL_SMCLK UCSSEL_2
+
+/* -------- USCI0 */
+
+#define UCA0CTL0_ 0x0060 /* USCI A0 Control Register 0 */
+sfrb(UCA0CTL0, UCA0CTL0_);
+#define UCA0CTL1_ 0x0061 /* USCI A0 Control Register 1 */
+sfrb(UCA0CTL1, UCA0CTL1_);
+#define UCA0BR0_ 0x0062 /* USCI A0 Baud Rate 0 */
+sfrb(UCA0BR0, UCA0BR0_);
+#define UCA0BR1_ 0x0063 /* USCI A0 Baud Rate 1 */
+sfrb(UCA0BR1, UCA0BR1_);
+#define UCA0MCTL_ 0x0064 /* USCI A0 Modulation Control */
+sfrb(UCA0MCTL, UCA0MCTL_);
+#define UCA0STAT_ 0x0065 /* USCI A0 Status Register */
+sfrb(UCA0STAT, UCA0STAT_);
+#define UCA0RXBUF_ 0x0066 /* USCI A0 Receive Buffer */
+/*READ_ONLY*/ sfrb(UCA0RXBUF, UCA0RXBUF_);
+#define UCA0TXBUF_ 0x0067 /* USCI A0 Transmit Buffer */
+sfrb(UCA0TXBUF, UCA0TXBUF_);
+#define UCA0ABCTL_ 0x005D /* USCI A0 Auto baud/LIN Control */
+sfrb(UCA0ABCTL, UCA0ABCTL_);
+#define UCA0IRTCTL_ 0x005E /* USCI A0 IrDA Transmit Control */
+sfrb(UCA0IRTCTL, UCA0IRTCTL_);
+#define UCA0IRRCTL_ 0x005F /* USCI A0 IrDA Receive Control */
+sfrb(UCA0IRRCTL, UCA0IRRCTL_);
+
+#define UCB0CTL0_ 0x0068 /* USCI B0 Control Register 0 */
+sfrb(UCB0CTL0, UCB0CTL0_);
+#define UCB0CTL1_ 0x0069 /* USCI B0 Control Register 1 */
+sfrb(UCB0CTL1, UCB0CTL1_);
+#define UCB0BR0_ 0x006A /* USCI B0 Baud Rate 0 */
+sfrb(UCB0BR0, UCB0BR0_);
+#define UCB0BR1_ 0x006B /* USCI B0 Baud Rate 1 */
+sfrb(UCB0BR1, UCB0BR1_);
+#define UCB0I2CIE_ 0x006C /* USCI B0 I2C Interrupt Enable Register */
+sfrb(UCB0I2CIE, UCB0I2CIE_);
+#define UCB0STAT_ 0x006D /* USCI B0 Status Register */
+sfrb(UCB0STAT, UCB0STAT_);
+#define UCB0RXBUF_ 0x006E /* USCI B0 Receive Buffer */
+/*READ_ONLY*/ sfrb(UCB0RXBUF, UCB0RXBUF_);
+#define UCB0TXBUF_ 0x006F /* USCI B0 Transmit Buffer */
+sfrb(UCB0TXBUF, UCB0TXBUF_);
+#define UCB0I2COA_ 0x0118 /* USCI B0 I2C Own Address */
+sfrw(UCB0I2COA, UCB0I2COA_);
+#define UCB0I2CSA_ 0x011A /* USCI B0 I2C Slave Address */
+sfrw(UCB0I2CSA, UCB0I2CSA_);
+
+#if defined(__MSP430_HAS_USCI1__)
+
+/* -------- USCI1 */
+
+#define UCA1CTL0_ 0x00D0 /* USCI A1 Control Register 0 */
+sfrb(UCA1CTL0, UCA1CTL0_);
+#define UCA1CTL1_ 0x00D1 /* USCI A1 Control Register 1 */
+sfrb(UCA1CTL1, UCA1CTL1_);
+#define UCA1BR0_ 0x00D2 /* USCI A1 Baud Rate 0 */
+sfrb(UCA1BR0, UCA1BR0_);
+#define UCA1BR1_ 0x00D3 /* USCI A1 Baud Rate 1 */
+sfrb(UCA1BR1, UCA1BR1_);
+#define UCA1MCTL_ 0x00D4 /* USCI A1 Modulation Control */
+sfrb(UCA1MCTL, UCA1MCTL_);
+#define UCA1STAT_ 0x00D5 /* USCI A1 Status Register */
+sfrb(UCA1STAT, UCA1STAT_);
+#define UCA1RXBUF_ 0x00D6 /* USCI A1 Receive Buffer */
+/*READ_ONLY*/ sfrb(UCA1RXBUF, UCA1RXBUF_);
+#define UCA1TXBUF_ 0x00D7 /* USCI A1 Transmit Buffer */
+sfrb(UCA1TXBUF, UCA1TXBUF_);
+#define UCA1ABCTL_ 0x00CD /* USCI A1 Auto baud/LIN Control */
+sfrb(UCA1ABCTL, UCA1ABCTL_);
+#define UCA1IRTCTL_ 0x00CE /* USCI A1 IrDA Transmit Control */
+sfrb(UCA1IRTCTL, UCA1IRTCTL_);
+#define UCA1IRRCTL_ 0x00CF /* USCI A1 IrDA Receive Control */
+sfrb(UCA1IRRCTL, UCA1IRRCTL_);
+
+#define UCB1CTL0_ 0x00D8 /* USCI B1 Control Register 0 */
+sfrb(UCB1CTL0, UCB1CTL0_);
+#define UCB1CTL1_ 0x00D9 /* USCI B1 Control Register 1 */
+sfrb(UCB1CTL1, UCB1CTL1_);
+#define UCB1BR0_ 0x00DA /* USCI B1 Baud Rate 0 */
+sfrb(UCB1BR0, UCB1BR0_);
+#define UCB1BR1_ 0x00DB /* USCI B1 Baud Rate 1 */
+sfrb(UCB1BR1, UCB1BR1_);
+#define UCB1I2CIE_ 0x00DC /* USCI B1 I2C Interrupt Enable Register */
+sfrb(UCB1I2CIE, UCB1I2CIE_);
+#define UCB1STAT_ 0x00DD /* USCI B1 Status Register */
+sfrb(UCB1STAT, UCB1STAT_);
+#define UCB1RXBUF_ 0x00DE /* USCI B1 Receive Buffer */
+/*READ_ONLY*/ sfrb(UCB1RXBUF, UCB1RXBUF_);
+#define UCB1TXBUF_ 0x00DF /* USCI B1 Transmit Buffer */
+sfrb(UCB1TXBUF, UCB1TXBUF_);
+#define UCB1I2COA_ 0x017C /* USCI B1 I2C Own Address */
+sfrw(UCB1I2COA, UCB1I2COA_);
+#define UCB1I2CSA_ 0x017E /* USCI B1 I2C Slave Address */
+sfrw(UCB1I2CSA, UCB1I2CSA_);
+
+#define UC1IE_ 0x0006 /* USCI A1/B1 Interrupt enable register */
+sfrb(UC1IE, UC1IE_);
+#define UC1IFG_ 0x0007 /* USCI A1/B1 Interrupt flag register */
+sfrb(UC1IFG, UC1IFG_);
+
+#define UCA1RXIE (1<<0)
+#define UCA1TXIE (1<<1)
+#define UCB1RXIE (1<<2)
+#define UCB1TXIE (1<<3)
+
+#define UCA1RXIFG (1<<0)
+#define UCA1TXIFG (1<<1)
+#define UCB1RXIFG (1<<2)
+#define UCB1TXIFG (1<<3)
+#endif /* __MSP430_HAS_USCI1__ */
+
+#endif
--- /dev/null
+#if !defined(__msp430_headers_usi_h__)
+#define __msp430_headers_usi_h__
+
+/* usi.h
+ *
+ * mspgcc project: MSP430 device headers
+ * USI module header
+ *
+ * (c) 2005 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: usi.h,v 1.4 2007/08/20 13:02:33 coppice Exp $
+ */
+
+/* Switches:
+
+*/
+
+#define USICTL0_ 0x0078 /* USI Control Register 0 */
+sfrb(USICTL0, USICTL0_);
+#define USICTL1_ 0x0079 /* USI Control Register 1 */
+sfrb(USICTL1, USICTL1_);
+#define USICKCTL_ 0x007A /* USI Clock Control Register */
+sfrb(USICKCTL, USICKCTL_);
+#define USICNT_ 0x007B /* USI Bit Counter Register */
+sfrb(USICNT, USICNT_);
+#define USISRL_ 0x007C /* USI Low Byte Shift Register */
+sfrb(USISRL, USISRL_);
+#define USISRH_ 0x007D /* USI High Byte Shift Register */
+sfrb(USISRH, USISRH_);
+#define USICTL_ 0x0078 /* USI Control Register */
+sfrw(USICTL, USICTL_);
+
+#define USICCTL_ 0x007A /* USI Clock and Counter Control Register */
+sfrw(USICCTL, USICCTL_);
+
+#define USISR_ 0x007C /* USI Shift Register */
+sfrw(USISR, USISR_);
+
+#define USIPE7 (0x80) /* USI Port Enable Px.7 */
+#define USIPE6 (0x40) /* USI Port Enable Px.6 */
+#define USIPE5 (0x20) /* USI Port Enable Px.5 */
+#define USILSB (0x10) /* USI LSB first 1:LSB / 0:MSB */
+#define USIMST (0x08) /* USI Master Select 0:Slave / 1:Master */
+#define USIGE (0x04) /* USI General Output Enable Latch */
+#define USIOE (0x02) /* USI Output Enable */
+#define USISWRST (0x01) /* USI Software Reset */
+
+#define USICKPH (0x80) /* USI Sync. Mode: Clock Phase */
+#define USII2C (0x40) /* USI I2C Mode */
+#define USISTTIE (0x20) /* USI START Condition interrupt enable */
+#define USIIE (0x10) /* USI Counter Interrupt enable */
+#define USIAL (0x08) /* USI Arbitration Lost */
+#define USISTP (0x04) /* USI STOP Condition received */
+#define USISTTIFG (0x02) /* USI START Condition interrupt Flag */
+#define USIIFG (0x01) /* USI Counter Interrupt Flag */
+
+#define USIDIV2 (0x80) /* USI Clock Divider 2 */
+#define USIDIV1 (0x40) /* USI Clock Divider 1 */
+#define USIDIV0 (0x20) /* USI Clock Divider 0 */
+#define USISSEL2 (0x10) /* USI Clock Source Select 2 */
+#define USISSEL1 (0x08) /* USI Clock Source Select 1 */
+#define USISSEL0 (0x04) /* USI Clock Source Select 0 */
+#define USICKPL (0x02) /* USI Clock Polarity 0:Inactive=Low / 1:Inactive=High */
+#define USISWCLK (0x01) /* USI Software Clock */
+
+#define USIDIV_0 (0x00) /* USI Clock Divider: 0 Divide by 1 */
+#define USIDIV_1 (0x20) /* USI Clock Divider: 1 Divide by 2 */
+#define USIDIV_2 (0x40) /* USI Clock Divider: 2 Divide by 4 */
+#define USIDIV_3 (0x60) /* USI Clock Divider: 3 Divide by 8 */
+#define USIDIV_4 (0x80) /* USI Clock Divider: 4 Divide by 16 */
+#define USIDIV_5 (0xA0) /* USI Clock Divider: 5 Divide by 32 */
+#define USIDIV_6 (0xC0) /* USI Clock Divider: 6 Divide by 64 */
+#define USIDIV_7 (0xE0) /* USI Clock Divider: 7 Divide by 128 */
+
+#define USISSEL_0 (0x00) /* USI Clock Source: 0 SCLK */
+#define USISSEL_1 (0x04) /* USI Clock Source: 1 ACLK */
+#define USISSEL_2 (0x08) /* USI Clock Source: 2 SMCLK */
+#define USISSEL_3 (0x0C) /* USI Clock Source: 3 SMCLK */
+#define USISSEL_4 (0x10) /* USI Clock Source: 4 USISWCLK bit*/
+#define USISSEL_5 (0x14) /* USI Clock Source: 5 TACCR0 */
+#define USISSEL_6 (0x18) /* USI Clock Source: 6 TACCR1 */
+#define USISSEL_7 (0x1C) /* USI Clock Source: 7 TACCR2 */
+
+#define USISCLREL (0x80) /* USI SCL Released */
+#define USI16B (0x40) /* USI 16 Bit Shift Register Enable */
+#define USIIFGCC (0x20) /* USI Interrupt Flag Clear Control */
+#define USICNT4 (0x10) /* USI Bit Count 4 */
+#define USICNT3 (0x08) /* USI Bit Count 3 */
+#define USICNT2 (0x04) /* USI Bit Count 2 */
+#define USICNT1 (0x02) /* USI Bit Count 1 */
+#define USICNT0 (0x01) /* USI Bit Count 0 */
+
+/* Aliases by mspgcc */
+#define USIDIV_DIV1 USIDIV_0 /* USI Clock Divider: 0 Divide by 1 */
+#define USIDIV_DIV2 USIDIV_1 /* USI Clock Divider: 1 Divide by 2 */
+#define USIDIV_DIV4 USIDIV_2 /* USI Clock Divider: 2 Divide by 4 */
+#define USIDIV_DIV8 USIDIV_3 /* USI Clock Divider: 3 Divide by 8 */
+#define USIDIV_DIV16 USIDIV_4 /* USI Clock Divider: 4 Divide by 16 */
+#define USIDIV_DIV32 USIDIV_5 /* USI Clock Divider: 5 Divide by 32 */
+#define USIDIV_DIV64 USIDIV_6 /* USI Clock Divider: 6 Divide by 64 */
+#define USIDIV_DIV128 USIDIV_7 /* USI Clock Divider: 7 Divide by 128 */
+
+#define USISSEL_SCLK USISSEL_0 /* USI Clock Source: 0 SCLK */
+#define USISSEL_ACLK USISSEL_1 /* USI Clock Source: 1 ACLK */
+#define USISSEL_SMCLK USISSEL_2 /* USI Clock Source: 2 SMCLK */
+//~ #define USISSEL_3 USISSEL_3 /* USI Clock Source: 3 SMCLK */
+#define USISSEL_USISWCLK USISSEL_4 /* USI Clock Source: 4 USISWCLK bit*/
+#define USISSEL_TACCR0 USISSEL_5 /* USI Clock Source: 5 TACCR0 */
+#define USISSEL_TACCR1 USISSEL_6 /* USI Clock Source: 6 TACCR1 */
+#define USISSEL_TACCR2 USISSEL_7 /* USI Clock Source: 7 TACCR2 */
+
+#endif
--- /dev/null
+#ifndef __msp430x11x
+#define __msp430x11x
+
+/* msp430x11x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x11x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x11x.h,v 1.6 2005/08/17 14:28:45 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_EPROM__
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x11x */
--- /dev/null
+#ifndef __msp430x11x1
+#define __msp430x11x1
+
+/* msp430x11x1.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x11x1 family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x11x1.h,v 1.6 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x11x1 */
+
--- /dev/null
+#ifndef __msp430x11x2
+#define __msp430x11x2
+
+/* msp430x11x2.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x11x2 family header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x11x2.h,v 1.3 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_ADC10__
+
+#include <msp430/gpio.h>
+#include <msp430/timera.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/adc10.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE0 (1<<0)
+#define UTXIE0 (1<<1)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG0 (1<<0)
+#define UTXIFG0 (1<<1)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE0 (1<<0)
+#define USPIE0 (1<<0)
+#define UTXE0 (1<<1)
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define ADC10_VECTOR 10 /* 0xFFEA ADC 10 */
+#define USART0TX_VECTOR 12 /* 0xFFEC USART 0 Transmit */
+#define USART0RX_VECTOR 14 /* 0xFFEE USART 0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+
+#endif /* #ifndef __msp430x11x2 */
--- /dev/null
+#ifndef __msp430x12x
+#define __msp430x12x
+
+/* msp430x12x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x12x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x12x.h,v 1.8 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+
+#include <msp430/usart.h>
+#include <msp430/gpio.h>
+#include <msp430/timera.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE0 (1<<0)
+#define UTXIE0 (1<<1)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG0 (1<<0)
+#define UTXIFG0 (1<<1)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE0 (1<<0)
+#define USPIE0 (1<<0)
+#define UTXE0 (1<<1)
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define USART0TX_VECTOR 12 /* 0xFFEC USART 0 Transmit */
+#define USART0RX_VECTOR 14 /* 0xFFEE USART 0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+
+#endif /* #ifndef __msp430x12x */
--- /dev/null
+#ifndef __msp430x12x2
+#define __msp430x12x2
+
+/* msp430x12x2.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x12x2 family header
+ *
+ * (c) 2002 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x12x2.h,v 1.5 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_ADC10__
+
+#include <msp430/usart.h>
+#include <msp430/gpio.h>
+#include <msp430/timera.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/adc10.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE0 (1<<0)
+#define UTXIE0 (1<<1)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG0 (1<<0)
+#define UTXIFG0 (1<<1)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE0 (1<<0)
+#define USPIE0 (1<<0)
+#define UTXE0 (1<<1)
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define ADC10_VECTOR 10 /* 0xFFEA ADC 10 */
+#define USART0TX_VECTOR 12 /* 0xFFEC USART 0 Transmit */
+#define USART0RX_VECTOR 14 /* 0xFFEE USART 0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+
+#endif /* #ifndef __msp430x12x2 */
--- /dev/null
+#ifndef __msp430x13x
+#define __msp430x13x
+
+/* msp430x13x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x13x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x13x.h,v 1.10 2005/10/18 13:29:21 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+#define __MSP430_HAS_ADC12__
+
+#include <msp430/usart.h>
+#include <msp430/basic_clock.h>
+#include <msp430/gpio.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+#include <msp430/adc12.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE1 (1<<4)
+#define UTXIE1 (1<<5)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG1 (1<<4)
+#define UTXIFG1 (1<<5)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE1 (1<<4)
+#define USPIE1 (1<<4)
+#define UTXE1 (1<<5)
+
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define ADC12_VECTOR 14 /* 0xFFEE ADC */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B 1-2 */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B 0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define ADC_VECTOR ADC12_VECTOR
+
+#endif /* #ifndef __msp430x13x */
--- /dev/null
+#ifndef __msp430x13x1
+#define __msp430x13x1
+
+/* msp430x13x1.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x13x1 family header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x13x1.h,v 1.3 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+
+#include <msp430/usart.h>
+#include <msp430/basic_clock.h>
+#include <msp430/gpio.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE1 (1<<4)
+#define UTXIE1 (1<<5)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG1 (1<<4)
+#define UTXIFG1 (1<<5)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE1 (1<<4)
+#define USPIE1 (1<<4)
+#define UTXE1 (1<<5)
+
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B 1-2 */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B 0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+
+#endif /* #ifndef __msp430x13x1 */
--- /dev/null
+#ifndef __msp430x14x
+#define __msp430x14x
+
+/* msp430x14x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x14x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x14x.h,v 1.9 2005/10/18 13:29:21 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_UART1__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+#define __MSP430_HAS_ADC12__
+
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/usart.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+#include <msp430/adc12.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE1 (1<<4)
+#define UTXIE1 (1<<5)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG1 (1<<4)
+#define UTXIFG1 (1<<5)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE1 (1<<4)
+#define USPIE1 (1<<4)
+#define UTXE1 (1<<5)
+
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define USART1TX_VECTOR 4 /* 0xFFE4 USART 1 Transmit */
+#define USART1RX_VECTOR 6 /* 0xFFE6 USART 1 Receive */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define ADC12_VECTOR 14 /* 0xFFEE ADC */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B 1-7 */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B 0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define UART1TX_VECTOR USART1TX_VECTOR
+#define UART1RX_VECTOR USART1RX_VECTOR
+#define ADC_VECTOR ADC12_VECTOR
+
+#endif /* #ifndef __msp430x14x */
--- /dev/null
+#ifndef __msp430x14x1
+#define __msp430x14x1
+
+/* msp430x14x1.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x14x1 family header
+ *
+ * (c) 2003 by Steve Underwood <stveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x14x1.h,v 1.3 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_UART1__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/usart.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE1 (1<<4)
+#define UTXIE1 (1<<5)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG1 (1<<4)
+#define UTXIFG1 (1<<5)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE1 (1<<4)
+#define USPIE1 (1<<4)
+#define UTXE1 (1<<5)
+
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define USART1TX_VECTOR 4 /* 0xFFE4 USART 1 Transmit */
+#define USART1RX_VECTOR 6 /* 0xFFE6 USART 1 Receive */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B 1-7 */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B 0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define UART1TX_VECTOR USART1TX_VECTOR
+#define UART1RX_VECTOR USART1RX_VECTOR
+
+#endif /* #ifndef __msp430x14x1 */
--- /dev/null
+#ifndef __msp430x15x
+#define __msp430x15x
+
+/* msp430x15x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x15x family header
+ *
+ * (c) 2002 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x15x.h,v 1.6 2005/10/18 13:29:21 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_I2C__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+#define __MSP430_HAS_ADC12__
+#define __MSP430_HAS_DAC12_3__
+#define __MSP430_HAS_DMA_3__
+
+#define __msp430_has_svs_at_0x55
+
+#include <msp430/gpio.h>
+#include <msp430/usart.h>
+#include <msp430/svs.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/basic_clock.h>
+#include <msp430/adc12.h>
+#include <msp430/dac12.h>
+#include <msp430/dma.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define DACDMA_VECTOR 0 /* 0xFFE0 DAC12/DMA */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define ADC12_VECTOR 14 /* 0xFFEE ADC */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive, I2C tx/rx */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define ADC_VECTOR ADC12_VECTOR
+
+#endif /* #ifndef __msp430x15x */
--- /dev/null
+#if !defined(__msp430x16x)
+#define __msp430x16x
+
+/* msp430x16x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x16x family header
+ *
+ * (c) 2002 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x16x.h,v 1.7 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_UART1__
+#define __MSP430_HAS_I2C__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_BASIC_CLOCK__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+#define __MSP430_HAS_ADC12__
+#define __MSP430_HAS_DAC12_3__
+#define __MSP430_HAS_DMA_3__
+
+#define __msp430_has_svs_at_0x55
+
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/usart.h>
+#include <msp430/svs.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/basic_clock.h>
+#include <msp430/adc12.h>
+#include <msp430/dac12.h>
+#include <msp430/dma.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE1 (1<<4)
+#define UTXIE1 (1<<5)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG1 (1<<4)
+#define UTXIFG1 (1<<5)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE1 (1<<4)
+#define USPIE1 (1<<4)
+#define UTXE1 (1<<5)
+
+#define DACDMA_VECTOR 0 /* 0xFFE0 DAC12/DMA */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define USART1TX_VECTOR 4 /* 0xFFF4 USART 1 Transmit */
+#define USART1RX_VECTOR 6 /* 0xFFF6 USART 1 Receive */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define ADC12_VECTOR 14 /* 0xFFEE ADC */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive, I2C tx/rx */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define UART1TX_VECTOR USART1TX_VECTOR
+#define UART1RX_VECTOR USART1RX_VECTOR
+#define ADC_VECTOR ADC12_VECTOR
+
+#endif /* #ifndef __msp430x16x */
--- /dev/null
+#if !defined(__msp430x20x1)
+#define __msp430x20x1
+
+/* msp430x20x1.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x20x1 family header
+ *
+ * (c) 2005 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x20x1.h,v 1.5 2006/11/16 01:19:37 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_TA2__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_CAPLUS__
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x20x1 */
--- /dev/null
+#if !defined(__msp430x20x2)
+#define __msp430x20x2
+
+/* msp430x20x2.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x20x2 family header
+ *
+ * (c) 2005 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x20x2.h,v 1.5 2006/11/16 01:19:37 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_TA2__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_ADC10__
+#define __MSP430_HAS_USI__
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/adc10.h>
+#include <msp430/usi.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define USI_VECTOR 8 /* 0xFFE8 USI */
+#define ADC10_VECTOR 10 /* 0xFFEA ADC10 */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x20x2 */
--- /dev/null
+#ifndef __msp430x20x3
+#define __msp430x20x3
+
+/* msp430x20x3.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x20x3 family header
+ *
+ * (c) 2005 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x20x3.h,v 1.5 2006/11/16 01:19:37 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_TA2__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_SD16_1__
+#define __MSP430_HAS_USI__
+
+#define __msp430_have_sd16a
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/sd16.h>
+#include <msp430/usi.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define USI_VECTOR 8 /* 0xFFE8 USI */
+#define SD16_VECTOR 10 /* 0xFFEA Sigma Delta ADC */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x20x3 */
--- /dev/null
+#ifndef __msp430x21x1
+#define __msp430x21x1
+
+/* msp430x21x1.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x11x1 family header
+ *
+ * (c) 2005 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x21x1.h,v 1.6 2008/06/18 00:54:02 cliechti Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_CAPLUS__
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define BSLSKEY_ 0xFFDE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+#endif /* #ifndef __msp430x21x1 */
+
--- /dev/null
+#ifndef __msp430x22x2
+#define __msp430x22x2
+
+/* msp430x22x2.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x22x2 family header
+ *
+ * (c) 2007 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x22x2.h,v 1.2 2008/06/18 00:54:02 cliechti Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_ADC10__
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_PORT3_R__
+#define __MSP430_HAS_PORT4_R__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_USCI__
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/gpio.h>
+#include <msp430/adc10.h>
+#include <msp430/usci.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1, IE1_);
+#define WDTIE (1<<0) /* Watchdog Interrupt Enable */
+#define OFIE (1<<1) /* Osc. Fault Interrupt Enable */
+#define NMIIE (1<<4) /* NMI Interrupt Enable */
+#define ACCVIE (1<<5) /* Flash Access Violation Interrupt Enable */
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1, IFG1_);
+#define WDTIFG (1<<0) /* Watchdog Interrupt Flag */
+#define OFIFG (1<<1) /* Osc. Fault Interrupt Flag */
+#define PORIFG (1<<2) /* Power On Interrupt Flag */
+#define RSTIFG (1<<3) /* Reset Interrupt Flag */
+#define NMIIFG (1<<4) /* NMI Interrupt Flag */
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2, IE2_);
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define ADC10_VECTOR 10 /* 0xFFEA ADC10 */
+#define USCIAB0TX_VECTOR 12 /* 0xFFEC USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR 14 /* 0xFFEE USCI A0/B0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define BSLSKEY_ 0xFFDE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+#endif /* #ifndef __msp430x22x2 */
--- /dev/null
+#ifndef __msp430x22x4
+#define __msp430x22x4
+
+/* msp430x22x4.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x22x4 family header
+ *
+ * (c) 2005 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x22x4.h,v 1.7 2008/06/18 00:54:02 cliechti Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_ADC10__
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_PORT3_R__
+#define __MSP430_HAS_PORT4_R__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_OA_2__
+#define __MSP430_HAS_USCI__
+
+#define __msp430_have_opamp_1
+#define __msp430_have_opamp_output_select
+#define __msp430_have_adc10ae2
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/gpio.h>
+#include <msp430/adc10.h>
+#include <msp430/opamp.h>
+#include <msp430/usci.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1, IE1_);
+#define WDTIE (1<<0) /* Watchdog Interrupt Enable */
+#define OFIE (1<<1) /* Osc. Fault Interrupt Enable */
+#define NMIIE (1<<4) /* NMI Interrupt Enable */
+#define ACCVIE (1<<5) /* Flash Access Violation Interrupt Enable */
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1, IFG1_);
+#define WDTIFG (1<<0) /* Watchdog Interrupt Flag */
+#define OFIFG (1<<1) /* Osc. Fault Interrupt Flag */
+#define PORIFG (1<<2) /* Power On Interrupt Flag */
+#define RSTIFG (1<<3) /* Reset Interrupt Flag */
+#define NMIIFG (1<<4) /* NMI Interrupt Flag */
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2, IE2_);
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define ADC10_VECTOR 10 /* 0xFFEA ADC10 */
+#define USCIAB0TX_VECTOR 12 /* 0xFFEC USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR 14 /* 0xFFEE USCI A0/B0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define BSLSKEY_ 0xFFDE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+#endif /* #ifndef __msp430x22x4 */
+
--- /dev/null
+#ifndef __msp430x23x
+#define __msp430x23x
+
+/* msp430x23x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x23x family header
+ *
+ * (c) 2007 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x23x.h,v 1.1 2008/06/18 00:04:40 cliechti Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_PORT3_R__
+#define __MSP430_HAS_PORT4_R__
+#define __MSP430_HAS_PORT5_R__
+#define __MSP430_HAS_PORT6_R__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_USCI__
+#define __MSP430_HAS_CAPLUS__
+#define __MSP430_HAS_MPY__
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/gpio.h>
+#include <msp430/usci.h>
+#include <msp430/compa.h>
+#include <msp430/mpy.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1, IE1_);
+#define WDTIE (1<<0) /* Watchdog Interrupt Enable */
+#define OFIE (1<<1) /* Osc. Fault Interrupt Enable */
+#define NMIIE (1<<4) /* NMI Interrupt Enable */
+#define ACCVIE (1<<5) /* Flash Access Violation Interrupt Enable */
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1, IFG1_);
+#define WDTIFG (1<<0) /* Watchdog Interrupt Flag */
+#define OFIFG (1<<1) /* Osc. Fault Interrupt Flag */
+#define PORIFG (1<<2) /* Power On Interrupt Flag */
+#define RSTIFG (1<<3) /* Reset Interrupt Flag */
+#define NMIIFG (1<<4) /* NMI Interrupt Flag */
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2, IE2_);
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define USCIAB1TX_VECTOR 0 /* 0xFFE0 USCI A1/B1 Transmit */
+#define USCIAB1RX_VECTOR 2 /* 0xFFE2 USCI A1/B1 Receive */
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define RESERVED20_VECTOR 8 /* 0xFFE8 Reserved Int. Vector 20 */
+#define ADC12_VECTOR 10 /* 0xFFEA ADC */
+#define USCIAB0TX_VECTOR 12 /* 0xFFEC USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR 14 /* 0xFFEE USCI A0/B0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-6, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define ADC_VECTOR ADC12_VECTOR /* alias */
+
+#define BSLSKEY_ 0xFFDE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+
+#endif /* #ifndef __msp430x22x2 */
--- /dev/null
+#ifndef __msp430x23x0
+#define __msp430x23x0
+
+/* msp430x23x0.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x23x0 family header
+ *
+ * (c) 2007 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x23x0.h,v 1.3 2008/06/18 00:54:03 cliechti Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_PORT3_R__
+#define __MSP430_HAS_PORT4_R__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_USCI__
+#define __MSP430_HAS_CAPLUS__
+#define __MSP430_HAS_MPY__
+
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/eprom.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/gpio.h>
+#include <msp430/usci.h>
+#include <msp430/compa.h>
+#include <msp430/mpy.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1, IE1_);
+#define WDTIE (1<<0) /* Watchdog Interrupt Enable */
+#define OFIE (1<<1) /* Osc. Fault Interrupt Enable */
+#define NMIIE (1<<4) /* NMI Interrupt Enable */
+#define ACCVIE (1<<5) /* Flash Access Violation Interrupt Enable */
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1, IFG1_);
+#define WDTIFG (1<<0) /* Watchdog Interrupt Flag */
+#define OFIFG (1<<1) /* Osc. Fault Interrupt Flag */
+#define PORIFG (1<<2) /* Power On Interrupt Flag */
+#define RSTIFG (1<<3) /* Reset Interrupt Flag */
+#define NMIIFG (1<<4) /* NMI Interrupt Flag */
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2, IE2_);
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define USCIAB0TX_VECTOR 12 /* 0xFFEC USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR 14 /* 0xFFEE USCI A0/B0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define BSLSKEY_ 0xFFDE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+#endif /* #ifndef __msp430x22x2 */
--- /dev/null
+#ifndef __msp430x241x
+#define __msp430x241x
+
+/* msp430x241x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x14x family header
+ *
+ * (c) 2007 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x241x.h,v 1.5 2008/06/18 22:25:51 cliechti Exp $
+ *
+ * 2008-03-06 - modifications by M Barnes
+ * - changed to 241x series, in line with patch by G. Lemm
+ *
+ * 2008-02-05 - modifications by G.Lemm <msp430@daqtix.com>
+ * - defined __DisableCalData to get rid of assembler errors
+ * - cut vector table to 32 byte length
+ * - added usci.h include
+ * - added __MSP430_HAS_USCI1__ define_
+ * - commented out usart.h (didn't take a close look if we still need it)
+ *
+ * 2008-05-22 cliechti
+ * - fix bugs with calibration data
+ * - took out __DisableCalData
+ */
+
+//~ #define __DisableCalData
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_PORT3_R__
+#define __MSP430_HAS_PORT4_R__
+#define __MSP430_HAS_PORT5_R__
+#define __MSP430_HAS_PORT6_R__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_USCI__
+#define __MSP430_HAS_USCI1__
+#define __MSP430_HAS_USCI_AB0__
+#define __MSP430_HAS_USCI_AB1__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_CAPLUS__
+#define __MSP430_HAS_ADC12__
+#define __MSP430_HAS_DAC12__
+#define __MSP430_HAS_DMA__
+
+
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/usci.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+#include <msp430/adc12.h>
+#include <msp430/dac12.h>
+#include <msp430/dma.h>
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define PORIFG (1<<2)
+#define RSTIFG (1<<3)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define UC0IE IE2
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UC0IFG IFG2
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+/* TLV Calibration Data Structure */
+#define TAG_DCO_30 0x01 /* Tag for DCO30 Calibration Data */
+#define TAG_ADC12_1 0x10 /* Tag for ADC12_1 Calibration Data */
+#define TAG_EMPTY 0xFE /* Tag for Empty Data Field in Calibration Data */
+
+
+#ifndef __DisableCalData
+#define TLV_CHECKSUM_ 0x10C0 /* TLV CHECK SUM */
+sfrw(TLV_CHECKSUM, TLV_CHECKSUM_);
+#define TLV_DCO_30_TAG_ 0x10F6 /* TLV TAG_DCO30 TAG */
+sfrb(TLV_DCO_30_TAG, TLV_DCO_30_TAG_);
+#define TLV_DCO_30_LEN_ 0x10F7 /* TLV TAG_DCO30 LEN */
+sfrb(TLV_DCO_30_LEN, TLV_DCO_30_LEN_);
+#define TLV_ADC12_1_TAG_ 0x10DA /* TLV ADC12_1 TAG */
+sfrb(TLV_ADC12_1_TAG, TLV_ADC12_1_TAG_);
+#define TLV_ADC12_1_LEN_ 0x10DB /* TLV ADC12_1 LEN */
+sfrb(TLV_ADC12_1_LEN, TLV_ADC12_1_LEN_);
+#endif
+
+#define CAL_ADC_25T85 0x0007 /* Index for 2.5V/85Deg Cal. Value */
+#define CAL_ADC_25T30 0x0006 /* Index for 2.5V/30Deg Cal. Value */
+#define CAL_ADC_25VREF_FACTOR 0x0005 /* Index for 2.5V Ref. Factor */
+#define CAL_ADC_15T85 0x0004 /* Index for 1.5V/85Deg Cal. Value */
+#define CAL_ADC_15T30 0x0003 /* Index for 1.5V/30Deg Cal. Value */
+#define CAL_ADC_15VREF_FACTOR 0x0002 /* Index for ADC 1.5V Ref. Factor */
+#define CAL_ADC_OFFSET 0x0001 /* Index for ADC Offset */
+#define CAL_ADC_GAIN_FACTOR 0x0000 /* Index for ADC Gain Factor */
+
+#define CAL_DCO_16MHZ 0x0000 /* Index for DCOCTL Calibration Data for 16MHz */
+#define CAL_BC1_16MHZ 0x0001 /* Index for BCSCTL1 Calibration Data for 16MHz */
+#define CAL_DCO_12MHZ 0x0002 /* Index for DCOCTL Calibration Data for 12MHz */
+#define CAL_BC1_12MHZ 0x0003 /* Index for BCSCTL1 Calibration Data for 12MHz */
+#define CAL_DCO_8MHZ 0x0004 /* Index for DCOCTL Calibration Data for 8MHz */
+#define CAL_BC1_8MHZ 0x0005 /* Index for BCSCTL1 Calibration Data for 8MHz */
+#define CAL_DCO_1MHZ 0x0006 /* Index for DCOCTL Calibration Data for 1MHz */
+#define CAL_BC1_1MHZ 0x0007 /* Index for BCSCTL1 Calibration Data for 1MHz */
+
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+#ifndef __DisableCalData
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+#endif /* #ifndef __DisableCalData */
+
+#define RESERVED0_VECTOR 0 /* 0xFFC0 Reserved Int. Vector 0 */
+#define RESERVED1_VECTOR 2 /* 0xFFC2 Reserved Int. Vector 1 */
+#define RESERVED2_VECTOR 4 /* 0xFFC4 Reserved Int. Vector 2 */
+#define RESERVED3_VECTOR 6 /* 0xFFC6 Reserved Int. Vector 3 */
+#define RESERVED4_VECTOR 8 /* 0xFFC8 Reserved Int. Vector 4 */
+#define RESERVED5_VECTOR 10 /* 0xFFCA Reserved Int. Vector 5 */
+#define RESERVED6_VECTOR 12 /* 0xFFCC Reserved Int. Vector 6 */
+#define RESERVED7_VECTOR 14 /* 0xFFCE Reserved Int. Vector 7 */
+#define RESERVED8_VECTOR 16 /* 0xFFD0 Reserved Int. Vector 8 */
+#define RESERVED9_VECTOR 18 /* 0xFFD2 Reserved Int. Vector 9 */
+#define RESERVED10_VECTOR 20 /* 0xFFD4 Reserved Int. Vector 10 */
+#define RESERVED11_VECTOR 22 /* 0xFFD6 Reserved Int. Vector 11 */
+#define RESERVED12_VECTOR 24 /* 0xFFD8 Reserved Int. Vector 12 */
+#define RESERVED13_VECTOR 26 /* 0xFFDA Reserved Int. Vector 13 */
+#define DAC12_VECTOR 28 /* 0xFFDC DAC12 Vector */
+#define DMA_VECTOR 30 /* 0xFFDE DMA Vector */
+#define USCIAB1TX_VECTOR 32 /* 0xFFE0 USCI A1/B1 Transmit */
+#define USCIAB1RX_VECTOR 34 /* 0xFFE2 USCI A1/B1 Receive */
+#define PORT1_VECTOR 36 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 38 /* 0xFFE6 Port 2 */
+#define RESERVED20_VECTOR 40 /* 0xFFE8 Reserved Int. Vector 20 */
+#define ADC12_VECTOR 42 /* 0xFFEA ADC */
+#define USCIAB0TX_VECTOR 44 /* 0xFFEC USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR 46 /* 0xFFEE USCI A0/B0 Receive */
+#define TIMERA1_VECTOR 48 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 50 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 52 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 54 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 56 /* 0xFFF8 Timer B CC1-6, TB */
+#define TIMERB0_VECTOR 58 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 60 /* 0xFFFC Non-maskable */
+
+#define ADC_VECTOR ADC12_VECTOR
+
+#define BSLSKEY_ 0xFFbE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+#endif /* #ifndef __msp430x241x */
--- /dev/null
+#ifndef __msp430x24x
+#define __msp430x24x
+
+/* msp430x24x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x14x family header
+ *
+ * (c) 2007 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x24x.h,v 1.6 2008/06/18 22:25:51 cliechti Exp $
+ *
+ * 2008-02-05 - modifications by G.Lemm <msp430@daqtix.com>
+ * - defined __DisableCalData to get rid of assembler errors
+ * - cut vector table to 32 byte length
+ * - added usci.h include
+ * - added __MSP430_HAS_USCI1__ define_
+ * - commented out usart.h (didn't take a close look if we still need it)
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_PORT3_R__
+#define __MSP430_HAS_PORT4_R__
+#define __MSP430_HAS_PORT5_R__
+#define __MSP430_HAS_PORT6_R__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_USCI__
+#define __MSP430_HAS_USCI1__
+#define __MSP430_HAS_USCI_AB0__
+#define __MSP430_HAS_USCI_AB1__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_CAPLUS__
+#define __MSP430_HAS_ADC12__
+
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/usci.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+#include <msp430/adc12.h>
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define PORIFG (1<<2)
+#define RSTIFG (1<<3)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define UC0IE IE2
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UC0IFG IFG2
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+/* TLV Calibration Data Structure */
+#define TAG_DCO_30 (0x01) /* Tag for DCO30 Calibration Data */
+#define TAG_ADC12_1 (0x10) /* Tag for ADC12_1 Calibration Data */
+#define TAG_EMPTY (0xFE) /* Tag for Empty Data Field in Calibration Data */
+
+#ifndef __DisableCalData
+#define TLV_CHECKSUM_ 0x10C0 /* TLV CHECK SUM */
+sfrw(TLV_CHECKSUM, TLV_CHECKSUM_);
+#define TLV_DCO_30_TAG_ 0x10F6 /* TLV TAG_DCO30 TAG */
+sfrb(TLV_DCO_30_TAG, TLV_DCO_30_TAG_);
+#define TLV_DCO_30_LEN_ 0x10F7 /* TLV TAG_DCO30 LEN */
+sfrb(TLV_DCO_30_LEN, TLV_DCO_30_LEN_);
+#define TLV_ADC12_1_TAG_ 0x10DA /* TLV ADC12_1 TAG */
+sfrb(TLV_ADC12_1_TAG, TLV_ADC12_1_TAG_);
+#define TLV_ADC12_1_LEN_ 0x10DB /* TLV ADC12_1 LEN */
+sfrb(TLV_ADC12_1_LEN, TLV_ADC12_1_LEN_);
+#endif
+
+#define CAL_ADC_25T85 (0x0007) /* Index for 2.5V/85Deg Cal. Value */
+#define CAL_ADC_25T30 (0x0006) /* Index for 2.5V/30Deg Cal. Value */
+#define CAL_ADC_25VREF_FACTOR (0x0005) /* Index for 2.5V Ref. Factor */
+#define CAL_ADC_15T85 (0x0004) /* Index for 1.5V/85Deg Cal. Value */
+#define CAL_ADC_15T30 (0x0003) /* Index for 1.5V/30Deg Cal. Value */
+#define CAL_ADC_15VREF_FACTOR (0x0002) /* Index for ADC 1.5V Ref. Factor */
+#define CAL_ADC_OFFSET (0x0001) /* Index for ADC Offset */
+#define CAL_ADC_GAIN_FACTOR (0x0000) /* Index for ADC Gain Factor */
+
+#define CAL_DCO_16MHZ (0x0000) /* Index for DCOCTL Calibration Data for 16MHz */
+#define CAL_BC1_16MHZ (0x0001) /* Index for BCSCTL1 Calibration Data for 16MHz */
+#define CAL_DCO_12MHZ (0x0002) /* Index for DCOCTL Calibration Data for 12MHz */
+#define CAL_BC1_12MHZ (0x0003) /* Index for BCSCTL1 Calibration Data for 12MHz */
+#define CAL_DCO_8MHZ (0x0004) /* Index for DCOCTL Calibration Data for 8MHz */
+#define CAL_BC1_8MHZ (0x0005) /* Index for BCSCTL1 Calibration Data for 8MHz */
+#define CAL_DCO_1MHZ (0x0006) /* Index for DCOCTL Calibration Data for 1MHz */
+#define CAL_BC1_1MHZ (0x0007) /* Index for BCSCTL1 Calibration Data for 1MHz */
+
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define USCIAB1TX_VECTOR 0 /* 0xFFE0 USCI A1/B1 Transmit */
+#define USCIAB1RX_VECTOR 2 /* 0xFFE2 USCI A1/B1 Receive */
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define RESERVED20_VECTOR 8 /* 0xFFE8 Reserved Int. Vector 20 */
+#define ADC12_VECTOR 10 /* 0xFFEA ADC */
+#define USCIAB0TX_VECTOR 12 /* 0xFFEC USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR 14 /* 0xFFEE USCI A0/B0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-6, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define ADC_VECTOR ADC12_VECTOR /* alias */
+
+#define BSLSKEY_ 0xFFDE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+#endif /* #ifndef __msp430x24x */
--- /dev/null
+#ifndef __msp430x24x1
+#define __msp430x24x1
+
+/* msp430x24x1.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x24x family header
+ *
+ * (c) 2007 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x24x1.h,v 1.6 2008/06/18 22:25:52 cliechti Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_PORT3_R__
+#define __MSP430_HAS_PORT4_R__
+#define __MSP430_HAS_PORT5_R__
+#define __MSP430_HAS_PORT6_R__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_USCI__
+#define __MSP430_HAS_USCI1__
+#define __MSP430_HAS_USCI_AB0__
+#define __MSP430_HAS_USCI_AB1__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_CAPLUS__
+
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/usci.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define PORIFG (1<<2)
+#define RSTIFG (1<<3)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define UC0IE IE2
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UC0IFG IFG2
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+/* TLV Calibration Data Structure */
+#define TAG_DCO_30 (0x01) /* Tag for DCO30 Calibration Data */
+#define TAG_ADC12_1 (0x10) /* Tag for ADC12_1 Calibration Data */
+#define TAG_EMPTY (0xFE) /* Tag for Empty Data Field in Calibration Data */
+
+#ifndef __DisableCalData
+#define TLV_CHECKSUM_ 0x10C0 /* TLV CHECK SUM */
+sfrw(TLV_CHECKSUM, TLV_CHECKSUM_);
+#define TLV_DCO_30_TAG_ 0x10F6 /* TLV TAG_DCO30 TAG */
+sfrb(TLV_DCO_30_TAG, TLV_DCO_30_TAG_);
+#define TLV_DCO_30_LEN_ 0x10F7 /* TLV TAG_DCO30 LEN */
+sfrb(TLV_DCO_30_LEN, TLV_DCO_30_LEN_);
+#endif
+
+#define CAL_DCO_16MHZ (0x0000) /* Index for DCOCTL Calibration Data for 16MHz */
+#define CAL_BC1_16MHZ (0x0001) /* Index for BCSCTL1 Calibration Data for 16MHz */
+#define CAL_DCO_12MHZ (0x0002) /* Index for DCOCTL Calibration Data for 12MHz */
+#define CAL_BC1_12MHZ (0x0003) /* Index for BCSCTL1 Calibration Data for 12MHz */
+#define CAL_DCO_8MHZ (0x0004) /* Index for DCOCTL Calibration Data for 8MHz */
+#define CAL_BC1_8MHZ (0x0005) /* Index for BCSCTL1 Calibration Data for 8MHz */
+#define CAL_DCO_1MHZ (0x0006) /* Index for DCOCTL Calibration Data for 1MHz */
+#define CAL_BC1_1MHZ (0x0007) /* Index for BCSCTL1 Calibration Data for 1MHz */
+
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define USCIAB1TX_VECTOR 0 /* 0xFFE0 USCI A1/B1 Transmit */
+#define USCIAB1RX_VECTOR 2 /* 0xFFE2 USCI A1/B1 Receive */
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define RESERVED20_VECTOR 8 /* 0xFFE8 Reserved Int. Vector 20 */
+#define RESERVED21_VECTOR 10 /* 0xFFEA Reserved Int. Vector 21 */
+#define USCIAB0TX_VECTOR 12 /* 0xFFEC USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR 14 /* 0xFFEE USCI A0/B0 Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-6, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define BSLSKEY_ 0xFFDE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+#endif /* #ifndef __msp430x24x1 */
--- /dev/null
+#if !defined(__msp430x261x)
+#define __msp430x261x
+
+/* msp430x261x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x14x family header
+ *
+ * (c) 2007 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * 2008-06-04 - TonyB (tony.borries@gmail.com)
+ * - Defined __MSP430_HAS_PORT7_R__ and __MSP430_HAS_PORT8_R__
+ *
+ * 2008-03-05 - modifications by MB <mbarnes@inf.ed.ac.uk>, based on msp430x24x.h (G.Lemm) and original msp430x24x (Steve Underwood).
+ * - defined __DisableCalData to get rid of assembler errors
+ * - added usci.h include
+ * - added __MSP430_HAS_USCI1__ define_
+ * - commented out usart.h (didn't take a close look if we still need it)
+ *
+ * 2008-05-22 cliechti
+ * - fix bugs with calibration data
+ * - took out __DisableCalData
+ */
+
+#include <iomacros.h>
+
+//~ #define __DisableCalData
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT1_R__
+#define __MSP430_HAS_PORT2_R__
+#define __MSP430_HAS_PORT3_R__
+#define __MSP430_HAS_PORT4_R__
+#define __MSP430_HAS_PORT5_R__
+#define __MSP430_HAS_PORT6_R__
+#define __MSP430_HAS_PORT7_R__
+#define __MSP430_HAS_PORT8_R__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_USCI__
+#define __MSP430_HAS_USCI1__
+#define __MSP430_HAS_USCI_AB0__
+#define __MSP430_HAS_USCI_AB1__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_BC2__
+#define __MSP430_HAS_FLASH2__
+#define __MSP430_HAS_CAPLUS__
+#define __MSP430_HAS_ADC12__
+#define __MSP430_HAS_DMAX_3__
+#define __MSP430_HAS_DAC12__
+
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/usci.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/basic_clock.h>
+#include <msp430/flash.h>
+#include <msp430/compa.h>
+#include <msp430/adc12.h>
+#include <msp430/dac12.h>
+#include <msp430/dma.h>
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define PORIFG (1<<2)
+#define RSTIFG (1<<3)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define UC0IE IE2
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UC0IFG IFG2
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+/* TLV Calibration Data Structure */
+#define TAG_DCO_30 0x01 /* Tag for DCO30 Calibration Data */
+#define TAG_ADC12_1 0x10 /* Tag for ADC12_1 Calibration Data */
+#define TAG_EMPTY 0xFE /* Tag for Empty Data Field in Calibration Data */
+
+#ifndef __DisableCalData
+#define TLV_CHECKSUM_ 0x10C0 /* TLV CHECK SUM */
+sfrw(TLV_CHECKSUM, TLV_CHECKSUM_);
+#define TLV_DCO_30_TAG_ 0x10F6 /* TLV TAG_DCO30 TAG */
+sfrb(TLV_DCO_30_TAG, TLV_DCO_30_TAG_);
+#define TLV_DCO_30_LEN_ 0x10F7 /* TLV TAG_DCO30 LEN */
+sfrb(TLV_DCO_30_LEN, TLV_DCO_30_LEN_);
+#define TLV_ADC12_1_TAG_ 0x10DA /* TLV ADC12_1 TAG */
+sfrb(TLV_ADC12_1_TAG, TLV_ADC12_1_TAG_);
+#define TLV_ADC12_1_LEN_ 0x10DB /* TLV ADC12_1 LEN */
+sfrb(TLV_ADC12_1_LEN, TLV_ADC12_1_LEN_);
+#endif
+
+#define CAL_ADC_25T85 0x0007 /* Index for 2.5V/85Deg Cal. Value */
+#define CAL_ADC_25T30 0x0006 /* Index for 2.5V/30Deg Cal. Value */
+#define CAL_ADC_25VREF_FACTOR 0x0005 /* Index for 2.5V Ref. Factor */
+#define CAL_ADC_15T85 0x0004 /* Index for 1.5V/85Deg Cal. Value */
+#define CAL_ADC_15T30 0x0003 /* Index for 1.5V/30Deg Cal. Value */
+#define CAL_ADC_15VREF_FACTOR 0x0002 /* Index for ADC 1.5V Ref. Factor */
+#define CAL_ADC_OFFSET 0x0001 /* Index for ADC Offset */
+#define CAL_ADC_GAIN_FACTOR 0x0000 /* Index for ADC Gain Factor */
+
+#define CAL_DCO_16MHZ 0x0000 /* Index for DCOCTL Calibration Data for 16MHz */
+#define CAL_BC1_16MHZ 0x0001 /* Index for BCSCTL1 Calibration Data for 16MHz */
+#define CAL_DCO_12MHZ 0x0002 /* Index for DCOCTL Calibration Data for 12MHz */
+#define CAL_BC1_12MHZ 0x0003 /* Index for BCSCTL1 Calibration Data for 12MHz */
+#define CAL_DCO_8MHZ 0x0004 /* Index for DCOCTL Calibration Data for 8MHz */
+#define CAL_BC1_8MHZ 0x0005 /* Index for BCSCTL1 Calibration Data for 8MHz */
+#define CAL_DCO_1MHZ 0x0006 /* Index for DCOCTL Calibration Data for 1MHz */
+#define CAL_BC1_1MHZ 0x0007 /* Index for BCSCTL1 Calibration Data for 1MHz */
+
+
+/************************************************************
+* Calibration Data in Info Mem
+************************************************************/
+
+#ifndef __DisableCalData
+
+#define CALDCO_16MHZ_ 0x10F8 /* DCOCTL Calibration Data for 16MHz */
+sfrb(CALDCO_16MHZ, CALDCO_16MHZ_);
+#define CALBC1_16MHZ_ 0x10F9 /* BCSCTL1 Calibration Data for 16MHz */
+sfrb(CALBC1_16MHZ, CALBC1_16MHZ_);
+#define CALDCO_12MHZ_ 0x10FA /* DCOCTL Calibration Data for 12MHz */
+sfrb(CALDCO_12MHZ, CALDCO_12MHZ_);
+#define CALBC1_12MHZ_ 0x10FB /* BCSCTL1 Calibration Data for 12MHz */
+sfrb(CALBC1_12MHZ, CALBC1_12MHZ_);
+#define CALDCO_8MHZ_ 0x10FC /* DCOCTL Calibration Data for 8MHz */
+sfrb(CALDCO_8MHZ, CALDCO_8MHZ_);
+#define CALBC1_8MHZ_ 0x10FD /* BCSCTL1 Calibration Data for 8MHz */
+sfrb(CALBC1_8MHZ, CALBC1_8MHZ_);
+#define CALDCO_1MHZ_ 0x10FE /* DCOCTL Calibration Data for 1MHz */
+sfrb(CALDCO_1MHZ, CALDCO_1MHZ_);
+#define CALBC1_1MHZ_ 0x10FF /* BCSCTL1 Calibration Data for 1MHz */
+sfrb(CALBC1_1MHZ, CALBC1_1MHZ_);
+
+#endif /* #ifndef __DisableCalData */
+
+#define RESERVED0_VECTOR 0 /* 0xFFC0 Reserved Int. Vector 0 */
+#define RESERVED1_VECTOR 2 /* 0xFFC2 Reserved Int. Vector 1 */
+#define RESERVED2_VECTOR 4 /* 0xFFC4 Reserved Int. Vector 2 */
+#define RESERVED3_VECTOR 6 /* 0xFFC6 Reserved Int. Vector 3 */
+#define RESERVED4_VECTOR 8 /* 0xFFC8 Reserved Int. Vector 4 */
+#define RESERVED5_VECTOR 10 /* 0xFFCA Reserved Int. Vector 5 */
+#define RESERVED6_VECTOR 12 /* 0xFFCC Reserved Int. Vector 6 */
+#define RESERVED7_VECTOR 14 /* 0xFFCE Reserved Int. Vector 7 */
+#define RESERVED8_VECTOR 16 /* 0xFFD0 Reserved Int. Vector 8 */
+#define RESERVED9_VECTOR 18 /* 0xFFD2 Reserved Int. Vector 9 */
+#define RESERVED10_VECTOR 20 /* 0xFFD4 Reserved Int. Vector 10 */
+#define RESERVED11_VECTOR 22 /* 0xFFD6 Reserved Int. Vector 11 */
+#define RESERVED12_VECTOR 24 /* 0xFFD8 Reserved Int. Vector 12 */
+#define RESERVED13_VECTOR 26 /* 0xFFDA Reserved Int. Vector 13 */
+#define DAC12_VECTOR 28 /* 0xFFDC DAC12 Vector */
+#define DMA_VECTOR 30 /* 0xFFDE DMA Vector */
+#define USCIAB1TX_VECTOR 32 /* 0xFFE0 USCI A1/B1 Transmit */
+#define USCIAB1RX_VECTOR 34 /* 0xFFE2 USCI A1/B1 Receive */
+#define PORT1_VECTOR 36 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 38 /* 0xFFE6 Port 2 */
+#define RESERVED20_VECTOR 40 /* 0xFFE8 Reserved Int. Vector 20 */
+#define ADC12_VECTOR 42 /* 0xFFEA ADC */
+#define USCIAB0TX_VECTOR 44 /* 0xFFEC USCI A0/B0 Transmit */
+#define USCIAB0RX_VECTOR 46 /* 0xFFEE USCI A0/B0 Receive */
+#define TIMERA1_VECTOR 48 /* 0xFFF0 Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 50 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 52 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 54 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 56 /* 0xFFF8 Timer B CC1-6, TB */
+#define TIMERB0_VECTOR 58 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 60 /* 0xFFFC Non-maskable */
+
+
+#define ADC_VECTOR ADC12_VECTOR
+
+#define BSLSKEY_ 0xFFbE /* The address is used as bootstrap loader security key */
+#define BSLSKEY_DISABLE 0xAA55 /* Disables the BSL completely */
+#define BSLSKEY_NO_ERASE 0x0000 /* Disables the erasure of the flash if an invalid password is supplied */
+
+#endif /* #ifndef __msp430x261x */
--- /dev/null
+#ifndef __msp430x31x
+#define __msp430x31x
+
+/* msp430x31x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x31x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x31x.h,v 1.7 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT0__
+#define __MSP430_HAS_LCD__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLL__
+#define __MSP430_HAS_8BTC__
+#define __MSP430_HAS_TP__
+#define __MSP430_HAS_EPROM__
+
+#define LCD_BASE 0x30
+#define __msp430_have_lcdlowr
+
+#include <msp430/gpio.h>
+#include <msp430/lcd.h>
+#include <msp430/basic_timer.h>
+#include <msp430/eprom.h>
+#include <msp430/timer8.h>
+#include <msp430/timerport.h>
+#include <msp430/system_clock.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define P0IE_0 (1<<2)
+#define P0IE_1 (1<<3)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define P0IFG_0 (1<<2)
+#define P0IFG_1 (1<<3)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define TPIE (1<<2)
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define PORT0_VECTOR 0 /* 0xFFE0 Port 0 Bits 2-7 [Lowest Priority] */
+#define BASICTIMER_VECTOR 2 /* 0xFFE2 Basic Timer */
+#define TIMERPORT_VECTOR 10 /* 0xFFE8 Timer/Port */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define IO1_VECTOR 24 /* 0xFFF8 Dedicated IO (P0.1) */
+#define IO0_VECTOR 26 /* 0xFFFA Dedicated IO (P0.0) */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x31x */
--- /dev/null
+#ifndef __msp430x32x
+#define __msp430x32x
+
+/* msp430x32x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x11x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x32x.h,v 1.7 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT0__
+#define __MSP430_HAS_LCD__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLL__
+#define __MSP430_HAS_8BTC__
+#define __MSP430_HAS_TP__
+#define __MSP430_HAS_ADC14__
+#define __MSP430_HAS_EPROM__
+
+#define LCD_BASE 0x30
+#define __msp430_have_lcdlowr
+
+#include <msp430/gpio.h>
+#include <msp430/lcd.h>
+#include <msp430/basic_timer.h>
+#include <msp430/timer8.h>
+#include <msp430/timerport.h>
+#include <msp430/system_clock.h>
+#include <msp430/eprom.h>
+#include <msp430/slopeadc.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define P0IE_0 (1<<2)
+#define P0IE_1 (1<<3)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define P0IFG_0 (1<<2)
+#define P0IFG_1 (1<<3)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define ADIE (1<<2)
+#define TPIE (1<<3)
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define ADIFG (1<<2)
+#define BTIFG (1<<7)
+
+#define PORT0_VECTOR 0 /* 0xFFE0 Port 0 Bits 2-7 [Lowest Priority] */
+#define BASICTIMER_VECTOR 2 /* 0xFFE2 Basic Timer */
+#define TIMERPORT_VECTOR 8 /* 0xFFE8 Timer/Port */
+#define ADC_VECTOR 10 /* 0xFFEA ADC */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define IO1_VECTOR 24 /* 0xFFF8 Dedicated IO (P0.1) */
+#define IO0_VECTOR 26 /* 0xFFFA Dedicated IO (P0.0) */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x32x */
--- /dev/null
+#if !defined(__msp430x33x)
+#define __msp430x33x
+
+/* msp430x33x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x33x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x33x.h,v 1.8 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT0__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLL__
+#define __MSP430_HAS_LCD__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA5__
+#define __MSP430_HAS_8BTC__
+#define __MSP430_HAS_TP__
+#define __MSP430_HAS_EPROM__
+
+#define LCD_BASE 0x30
+#define __msp430_have_lcdlowr
+
+#include <msp430/gpio.h>
+#include <msp430/lcd.h>
+#include <msp430/basic_timer.h>
+#include <msp430/timer8.h>
+#include <msp430/timerport.h>
+#include <msp430/system_clock.h>
+#include <msp430/eprom.h>
+#include <msp430/mpy.h>
+#include <msp430/usart.h>
+#include <msp430/timera.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define P0IE_0 (1<<2)
+#define P0IE_1 (1<<3)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define P0IFG_0 (1<<2)
+#define P0IFG_1 (1<<3)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE (1<<0)
+#define UTXIE (1<<1)
+#define TPIE (1<<3)
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG (1<<0)
+#define UTXIFG (1<<1)
+#define BTIFG (1<<7)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE (1<<0)
+#define UTXE (1<<1)
+
+#define PORT0_VECTOR 0 /* 0xFFE0 Port 0 Bits 2-7 [Lowest Priority] */
+#define BASICTIMER_VECTOR 2 /* 0xFFE2 Basic Timer */
+#define PORT1_VECTOR 4 /* 0xFFE4 Port 1 */
+#define PORT2_VECTOR 6 /* 0xFFE6 Port 2 */
+#define TIMERPORT_VECTOR 8 /* 0xFFE8 Timer/Port */
+#define UARTTX_VECTOR 12 /* 0xFFEC UART Transmit */
+#define UARTRX_VECTOR 14 /* 0xFFEE UART Receive */
+#define TIMERA1_VECTOR 16 /* 0xFFF0 Timer A CC1-4, TA */
+#define TIMERA0_VECTOR 18 /* 0xFFF2 Timer A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define IO1_VECTOR 24 /* 0xFFF8 Dedicated IO (P0.1) */
+#define IO0_VECTOR 26 /* 0xFFFA Dedicated IO (P0.0) */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x33x */
--- /dev/null
+#ifndef __msp430x41x
+#define __msp430x41x
+
+/* msp430x41x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x41x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x41x.h,v 1.11 2006/06/07 13:01:30 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS_SMALL__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_LCD4__
+#define __MSP430_HAS_TA3__
+#if defined(__MSP430_415__) || defined(__MSP430_417__)
+#define __MSP430_HAS_T1A5__
+#endif
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+
+#if !(defined(__MSP430_415__) || defined(__MSP430_417__))
+#define __msp430_has_non_variable_svs_threshold
+#endif
+#define LCD_BASE 0x90
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMER0_A1_VECTOR 10 /* 0xFFEA Timer0_A CC1-2, TA */
+#define TIMER0_A0_VECTOR 12 /* 0xFFEC Timer0_A CC0 */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#if defined(__MSP430_415__) || defined(__MSP430_417__)
+#define TIMER1_A1_VECTOR 24 /* 0xFFEA Timer1_A CC1-2, TA */
+#define TIMER1_A0_VECTOR 26 /* 0xFFEC Timer1_A CC0 */
+#endif
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+/* Alternate names */
+#define TIMERA1_VECTOR TIMER0_A1_VECTOR
+#define TIMERA0_VECTOR TIMER0_A0_VECTOR
+
+#endif /* #ifndef __msp430x41x */
--- /dev/null
+#ifndef __msp430x42x
+#define __msp430x42x
+
+/* msp430x42x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x42x family header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x42x.h,v 1.3 2006/06/07 13:01:30 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS_SMALL__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_LCD4__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_SD16_3__
+
+#define __msp430_have_lcd_16_20
+#define LCD_BASE 0x90
+#define __msp430_have_sd16_1
+#define __msp430_have_sd16_2
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/usart.h>
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/sd16.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define SD16_VECTOR 24 /* 0xFFF8 Sigma Delta ADC */
+
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+
+#endif /* #ifndef __msp430x42x */
--- /dev/null
+#ifndef __msp430x42x0
+#define __msp430x42x0
+
+/* msp430x42x0.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x42x0 family header
+ *
+ * (c) 2005 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x42x0.h,v 1.5 2006/06/07 13:01:30 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS_SMALL__
+#define __MSP430_HAS_LCD_A__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_SD16_1__
+#define __MSP430_HAS_DAC12_1__
+
+#define __msp430_have_lcd_a
+#define __msp430_have_lcd_16_20
+#define LCD_BASE 0x90
+#define __msp430_have_sd16a
+#define __msp430_have_dac12_op_amp
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd_a.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/sd16.h>
+#include <msp430/dac12.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+
+#define WDTIFG (1<<0) /* Watchdog Interrupt Flag */
+#define OFIFG (1<<1) /* Osc. Fault Interrupt Flag */
+#define PORIFG (1<<2) /* Power On Interrupt Flag */
+#define RSTIFG (1<<3) /* Reset Interrupt Flag */
+#define NMIIFG (1<<4) /* NMI Interrupt Flag */
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+
+#define DAC12_VECTOR 6 /* 0xFFE6 DAC 12 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+
+#define SD16_VECTOR 24 /* 0xFFF8 Sigma Delta ADC */
+
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430x42x0 */
--- /dev/null
+#ifndef __msp430x43x
+#define __msp430x43x
+
+/* msp430x43x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x43x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x43x.h,v 1.9 2006/06/07 13:01:30 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_LCD4__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+#define __MSP430_HAS_ADC12__
+
+#define __msp430_have_lcd_16_20
+#define LCD_BASE 0x90
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/usart.h>
+#include <msp430/adc12.h>
+#include <msp430/gpio.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define ADC12_VECTOR 14 /* 0xFFEE ADC */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define ADC_VECTOR ADC12_VECTOR
+
+#endif /* #ifndef __msp430x43x */
--- /dev/null
+#if !defined(__msp430x44x)
+#define __msp430x44x
+
+/* msp430x44x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x44x family header
+ *
+ * (c) 2002 by M. P. Ashton <data@ieee.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430x44x.h,v 1.11 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_LCD4__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_UART1__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+#define __MSP430_HAS_ADC12__
+
+#define __msp430_have_usart1
+#define __msp430_have_lcd_16_20
+#define LCD_BASE 0x90
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/usart.h>
+#include <msp430/adc12.h>
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define URXIE1 (1<<4)
+#define UTXIE1 (1<<5)
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define URXIFG1 (1<<4)
+#define UTXIFG1 (1<<5)
+#define BTIFG (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define URXE1 (1<<4)
+#define USPIE1 (1<<4)
+#define UTXE1 (1<<5)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define USART1TX_VECTOR 4 /* 0xFFE4 USART 1 Transmit */
+#define USART1RX_VECTOR 6 /* 0xFFE6 USART 1 Receive */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define ADC12_VECTOR 14 /* 0xFFEE ADC */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define UART1TX_VECTOR USART1TX_VECTOR
+#define UART1RX_VECTOR USART1RX_VECTOR
+#define ADC_VECTOR ADC12_VECTOR
+
+#endif /* #ifndef __msp430x44x */
--- /dev/null
+#ifndef __msp430xE42x
+#define __msp430xE42x
+
+/* msp430xE42x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430xE42x family header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430xE42x.h,v 1.4 2005/08/17 14:28:46 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS_SMALL__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_LCD4__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_MPY__
+#define __MSP430_HAS_SD16_3__
+#define __MSP430_HAS_ESP430E__
+
+#define __msp430_have_lcd_16_20
+#define LCD_BASE 0x90
+#define __msp430_have_sd16_1
+#define __msp430_have_sd16_2
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/usart.h>
+#include <msp430/mpy.h>
+#include <msp430/gpio.h>
+#include <msp430/sd16.h>
+#include <msp430/esp430e.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define SD16_VECTOR 24 /* 0xFFF8 Sigma Delta ADC */
+#define ESP430_VECTOR 26 /* 0xFFFA ESP430 Mailbox */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+
+#endif /* #ifndef __msp430xE42x */
--- /dev/null
+#ifndef __msp430xG42x0
+#define __msp430xG42x0
+
+/* msp430xG42x0.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430x42x0 family header
+ *
+ * (c) 2007 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430xG42x0.h,v 1.1 2007/10/02 11:33:15 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS_SMALL__
+#define __MSP430_HAS_LCD_A__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_SD16_1__
+#define __MSP430_HAS_DAC12_1__
+#define __MSP430_HAS_OA_2__
+
+#define __msp430_have_lcd_a
+#define __msp430_have_lcd_16_20
+#define LCD_BASE 0x90
+#define __msp430_have_sd16a
+#define __msp430_have_dac12_op_amp
+#define __msp430_have_opamp_offset_cal
+#define __msp430_have_opamp_switches
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd_a.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/sd16.h>
+#include <msp430/dac12.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+
+#define WDTIFG (1<<0) /* Watchdog Interrupt Flag */
+#define OFIFG (1<<1) /* Osc. Fault Interrupt Flag */
+#define PORIFG (1<<2) /* Power On Interrupt Flag */
+#define RSTIFG (1<<3) /* Reset Interrupt Flag */
+#define NMIIFG (1<<4) /* NMI Interrupt Flag */
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+
+#define DAC12_VECTOR 6 /* 0xFFE6 DAC 12 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMERA1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMERA0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+
+#define SD16_VECTOR 24 /* 0xFFF8 Sigma Delta ADC */
+
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#endif /* #ifndef __msp430xG42x0 */
--- /dev/null
+#ifndef __msp430xG43x
+#define __msp430xG43x
+
+/* msp430xG43x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430xG43x family header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430xG43x.h,v 1.7 2006/06/07 13:01:30 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_LCD4__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB3__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+#define __MSP430_HAS_ADC12__
+#define __MSP430_HAS_DAC12_3__
+#define __MSP430_HAS_DMA_1__
+#define __MSP430_HAS_OA_3__
+
+#define __msp430_have_lcd_16_20
+#define __msp430_have_dac12_op_amp
+#define LCD_BASE 0x90
+#define __msp430_have_opamp_1
+#define __msp430_have_opamp_2
+#define __msp430_have_opamp_feedback_taps
+#define __msp430_have_opamp_output_select
+#define __msp430_have_opamp_rail_to_rail
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/usart.h>
+#include <msp430/adc12.h>
+#include <msp430/dac12.h>
+#include <msp430/dma.h>
+#include <msp430/gpio.h>
+#include <msp430/opamp.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+#define URXIE0 (1<<6)
+#define UTXIE0 (1<<7)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+#define URXIFG0 (1<<6)
+#define UTXIFG0 (1<<7)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+#define URXE0 (1<<6)
+#define USPIE0 (1<<6)
+#define UTXE0 (1<<7)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define DAC12_DMA_VECTOR 6 /* 0xFFE6 DAC 12 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMER0_A1_VECTOR 10 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMER0_A0_VECTOR 12 /* 0xFFEC Timer A CC0 */
+#define ADC12_VECTOR 14 /* 0xFFEE ADC */
+#define USART0TX_VECTOR 16 /* 0xFFF0 USART 0 Transmit */
+#define USART0RX_VECTOR 18 /* 0xFFF2 USART 0 Receive */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMERB1_VECTOR 24 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMERB0_VECTOR 26 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define TIMERA1_VECTOR TIMER0_A1_VECTOR
+#define TIMERA0_VECTOR TIMER0_A0_VECTOR
+#define ADC_VECTOR ADC12_VECTOR
+
+#endif /* #ifndef __msp430xG43x */
--- /dev/null
+#if !defined(__msp430xG461x)
+#define __msp430xG461x
+
+/* msp430xG461x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430xG461x family header
+ *
+ * (c) 2006 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430xG461x.h,v 1.8 2007/06/17 15:43:25 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_PORT7__
+#define __MSP430_HAS_PORT8__
+#define __MSP430_HAS_PORTA__
+#define __MSP430_HAS_PORT9__
+#define __MSP430_HAS_PORT10__
+#define __MSP430_HAS_PORTB__
+#define __MSP430_HAS_FLLPLUS__
+#define __MSP430_HAS_BT_RTC__
+#define __MSP430_HAS_LCD_A__
+#define __MSP430_HAS_UART0__
+#define __MSP430_HAS_USCI__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_TB7__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_CA__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_ADC12__
+#define __MSP430_HAS_DAC12__
+#define __MSP430_HAS_DMAX_3__
+#define __MSP430_HAS_OA_3__
+#define __MSP430_HAS_UART1__
+
+#define __msp430_have_lcd_16_20
+#define __msp430_have_dac12_op_amp
+#define LCD_BASE 0x90
+#define __msp430_have_opamp_1
+#define __msp430_have_opamp_2
+#define __msp430_have_opamp_feedback_taps
+#define __msp430_have_opamp_output_select
+#define __msp430_have_opamp_rail_to_rail
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd_a.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/timerb.h>
+#include <msp430/usart.h>
+#include <msp430/usci.h>
+#include <msp430/adc12.h>
+#include <msp430/dac12.h>
+#include <msp430/dma.h>
+#include <msp430/gpio.h>
+#include <msp430/opamp.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define UCA0RXIE (1<<0)
+#define UCA0TXIE (1<<1)
+#define UCB0RXIE (1<<2)
+#define UCB0TXIE (1<<3)
+#define URXIE1 (1<<4)
+#define UTXIE1 (1<<5)
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define UCA0RXIFG (1<<0)
+#define UCA0TXIFG (1<<1)
+#define UCB0RXIFG (1<<2)
+#define UCB0TXIFG (1<<3)
+#define URXIFG1 (1<<4)
+#define UTXIFG1 (1<<5)
+#define BTIFG (1<<7)
+
+#define ME1_ 0x0004 /* Module Enable 1 */
+sfrb(ME1,ME1_);
+
+#define ME2_ 0x0005 /* Module Enable 2 */
+sfrb(ME2,ME2_);
+#define USPIE1 (1<<4)
+#define URXE1 (1<<4)
+#define UTXE1 (1<<5)
+
+#define DAC12_VECTOR 28 /* 0xFFDC DAC 12 */
+#define DMA_VECTOR 30 /* 0xFFDE DMA */
+#define BASICTIMER_VECTOR 32 /* 0xFFE0 Basic Timer / RTC */
+#define PORT2_VECTOR 34 /* 0xFFE2 Port 2 */
+#define USART1TX_VECTOR 36 /* 0xFFE4 USART 1 Transmit */
+#define USART1RX_VECTOR 38 /* 0xFFE6 USART 1 Receive */
+#define PORT1_VECTOR 40 /* 0xFFE8 Port 1 */
+#define TIMER0_A1_VECTOR 42 /* 0xFFEA Timer A CC1-2, TA */
+#define TIMER0_A0_VECTOR 44 /* 0xFFEC Timer A CC0 */
+#define ADC12_VECTOR 46 /* 0xFFEE ADC */
+#define USCITX_VECTOR 48 /* 0xFFF0 USCI A0/B0 Transmit */
+#define USCIRX_VECTOR 50 /* 0xFFF2 USCI A0/B0 Receive */
+#define WDT_VECTOR 52 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 54 /* 0xFFF6 Comparator A */
+#define TIMER0_B1_VECTOR 56 /* 0xFFF8 Timer B CC1-2, TB */
+#define TIMER0_B0_VECTOR 58 /* 0xFFFA Timer B CC0 */
+#define NMI_VECTOR 60 /* 0xFFFC Non-maskable */
+
+#define UART0TX_VECTOR USART0TX_VECTOR
+#define UART0RX_VECTOR USART0RX_VECTOR
+#define TIMERA1_VECTOR TIMER0_A1_VECTOR
+#define TIMERA0_VECTOR TIMER0_A0_VECTOR
+#define TIMERB1_VECTOR TIMER0_B1_VECTOR
+#define TIMERB0_VECTOR TIMER0_B0_VECTOR
+
+#endif /* #ifndef __msp430xG461x */
--- /dev/null
+#if !defined(__msp430xW42x)
+#define __msp430xW42x
+
+/* msp430xW42x.h
+ *
+ * mspgcc project: MSP430 device headers
+ * MSP430xW42x family header
+ *
+ * (c) 2003 by Steve Underwood <steveu@coppice.org>
+ * Originally based in part on work by Texas Instruments Inc.
+ *
+ * $Id: msp430xW42x.h,v 1.6 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#include <iomacros.h>
+
+#define __MSP430_HAS_WDT__
+#define __MSP430_HAS_PORT1__
+#define __MSP430_HAS_PORT2__
+#define __MSP430_HAS_PORT3__
+#define __MSP430_HAS_PORT4__
+#define __MSP430_HAS_PORT5__
+#define __MSP430_HAS_PORT6__
+#define __MSP430_HAS_BT__
+#define __MSP430_HAS_FLLPLUS_SMALL__
+#define __MSP430_HAS_SVS__
+#define __MSP430_HAS_LCD4__
+#define __MSP430_HAS_TA3__
+#define __MSP430_HAS_T1A5__
+#define __MSP430_HAS_FLASH__
+#define __MSP430_HAS_COMPA__
+#define __MSP430_HAS_SCANIF__
+
+#define __msp430_have_lcd_16_20
+#define LCD_BASE 0x90
+
+#include <msp430/basic_timer.h>
+#include <msp430/system_clock.h>
+#include <msp430/svs.h>
+#include <msp430/lcd.h>
+#include <msp430/flash.h>
+#include <msp430/timera.h>
+#include <msp430/gpio.h>
+#include <msp430/scanif.h>
+#include <msp430/compa.h>
+
+#include <msp430/common.h>
+
+#define IE1_ 0x0000 /* Interrupt Enable 1 */
+sfrb(IE1,IE1_);
+#define WDTIE (1<<0)
+#define OFIE (1<<1)
+#define NMIIE (1<<4)
+#define ACCVIE (1<<5)
+
+#define IFG1_ 0x0002 /* Interrupt Flag 1 */
+sfrb(IFG1,IFG1_);
+#define WDTIFG (1<<0)
+#define OFIFG (1<<1)
+#define NMIIFG (1<<4)
+
+#define IE2_ 0x0001 /* Interrupt Enable 2 */
+sfrb(IE2,IE2_);
+#define BTIE (1<<7)
+
+#define IFG2_ 0x0003 /* Interrupt Flag 2 */
+sfrb(IFG2,IFG2_);
+#define BTIFG (1<<7)
+
+#define BASICTIMER_VECTOR 0 /* 0xFFE0 Basic Timer */
+#define PORT2_VECTOR 2 /* 0xFFE2 Port 2 */
+#define PORT1_VECTOR 8 /* 0xFFE8 Port 1 */
+#define TIMER0_A1_VECTOR 10 /* 0xFFEA Timer0_A CC1-2, TA */
+#define TIMER0_A0_VECTOR 12 /* 0xFFEC Timer0_A CC0 */
+#define SCANIF_VECTOR 18 /* 0xFFF2 Scan Inteface */
+#define WDT_VECTOR 20 /* 0xFFF4 Watchdog Timer */
+#define COMPARATORA_VECTOR 22 /* 0xFFF6 Comparator A */
+#define TIMER1_A1_VECTOR 24 /* 0xFFF8 Timer1_A CC1-4, TA1 */
+#define TIMER1_A0_VECTOR 26 /* 0xFFFA Timer1_A CC0 */
+#define NMI_VECTOR 28 /* 0xFFFC Non-maskable */
+
+/* Alternate Names */
+#define TIMERA1_VECTOR TIMER0_A1_VECTOR
+#define TIMERA0_VECTOR TIMER0_A0_VECTOR
+
+#endif /* #ifndef __msp430xW42x */
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: setjmp.h,v 1.4 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#if !defined(__SETJMP_H_)
+#define __SETJMP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif //__cplusplus
+
+#if defined(__MSP430X__) && defined(__MSP430X_LARGE__)
+/* r3 does not have to be saved */
+typedef struct
+{
+ uint32_t __j_pc; /* return address */
+ uint32_t __j_sp; /* r1 stack pointer */
+ uint32_t __j_sr; /* r2 status register */
+ uint32_t __j_r4;
+ uint32_t __j_r5;
+ uint32_t __j_r6;
+ uint32_t __j_r7;
+ uint32_t __j_r8;
+ uint32_t __j_r9;
+ uint32_t __j_r10;
+ uint32_t __j_r11;
+} jmp_buf[1]; /* size = 20 bytes */
+#else
+/* r3 does not have to be saved */
+typedef struct
+{
+ uint16_t __j_pc; /* return address */
+ uint16_t __j_sp; /* r1 stack pointer */
+ uint16_t __j_sr; /* r2 status register */
+ uint16_t __j_r4;
+ uint16_t __j_r5;
+ uint16_t __j_r6;
+ uint16_t __j_r7;
+ uint16_t __j_r8;
+ uint16_t __j_r9;
+ uint16_t __j_r10;
+ uint16_t __j_r11;
+} jmp_buf[1]; /* size = 20 bytes */
+#endif
+
+#ifndef __ATTR_NORETURN__
+#define __ATTR_NORETURN__ __attribute__((__noreturn__))
+#endif
+
+extern int setjmp(jmp_buf __jmpb);
+extern void longjmp(jmp_buf __jmpb, int __ret) __ATTR_NORETURN__;
+
+#ifdef __cplusplus
+}
+#endif //__cplusplus
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2001,2002 Dmitry Dicky diwil@eis.ru
+ * Chris Liechti cliechti@users.sourceforge.net
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: signal.h,v 1.15 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#if !defined(__SIGNAL_H_)
+#define __SIGNAL_H_
+
+#include <iomacros.h>
+
+#if defined(__MSP430X__)
+#define INTERRUPT_VECTOR_SLOTS 32
+#define RESET_VECTOR 62
+#else
+#define INTERRUPT_VECTOR_SLOTS 16
+#define RESET_VECTOR 30
+#endif
+
+#if !defined(_GNU_ASSEMBLER_)
+
+#define Interrupt(x) void __attribute__((interrupt (x)))
+#define INTERRUPT(x) void __attribute__((interrupt (x)))
+#define interrupt(x) void __attribute__((interrupt (x)))
+
+#define wakeup __attribute__((wakeup))
+#define Wakeup __attribute__((wakeup))
+#define WAKEUP __attribute__((wakeup))
+
+#define enablenested __attribute__((signal))
+#define EnableNested __attribute__((signal))
+#define ENABLENESTED __attribute__((signal))
+
+/* Enable/Disable interrupts */
+#define eint() __asm__ __volatile__("eint"::)
+#define dint() __asm__ __volatile__("dint"::)
+
+/* IAR compatibility functions */
+#define _EINT() eint()
+#define __enable_interrupt() eint()
+#define _DINT() dint()
+#define __disable_interrupt() dint()
+
+#define INTERRUPT_VECTORS \
+ void *InterruptVectors[INTERRUPT_VECTOR_SLOTS] __attribute__ ((section(".vectors")))
+
+/* Declare interrupt service routine with no interrupt vector assigned. */
+#define NOVECTOR 0xFF
+
+#define _RESET() void __attribute__ ((naked)) _reset_vector__(void)
+
+#define UNEXPECTED() interrupt (NOVECTOR) _unexpected_(void)
+
+#else /*_GNU_ASSEMBLER_ / assember definitions*/
+
+/* Double macro trick to achieve that the x gets expanded*/
+#define interrupt(x) xinterrupt(x)
+#define xinterrupt(x) vector_##x: .global vector_##x
+
+/* Direct generation of the labels is impossible, so just replace the dummy ones
+ with the real ones through those defs:*/
+#if INTERRUPT_VECTOR_SLOTS == 32
+#define vector_0 vector_ffc0
+#define vector_2 vector_ffc2
+#define vector_4 vector_ffc4
+#define vector_6 vector_ffc6
+#define vector_8 vector_ffc8
+#define vector_10 vector_ffca
+#define vector_12 vector_ffcc
+#define vector_14 vector_ffce
+#define vector_16 vector_ffd0
+#define vector_18 vector_ffd2
+#define vector_20 vector_ffd4
+#define vector_22 vector_ffd6
+#define vector_24 vector_ffd8
+#define vector_26 vector_ffda
+#define vector_28 vector_ffdc
+#define vector_30 vector_ffde
+#define vector_32 vector_ffe0
+#define vector_34 vector_ffe2
+#define vector_36 vector_ffe4
+#define vector_38 vector_ffe6
+#define vector_40 vector_ffe8
+#define vector_42 vector_ffea
+#define vector_44 vector_ffec
+#define vector_46 vector_ffee
+#define vector_48 vector_fff0
+#define vector_50 vector_fff2
+#define vector_52 vector_fff4
+#define vector_54 vector_fff6
+#define vector_56 vector_fff8
+#define vector_58 vector_fffa
+#define vector_60 vector_fffc
+#define vector_62 vector_fffe
+#else
+#define vector_0 vector_ffe0
+#define vector_2 vector_ffe2
+#define vector_4 vector_ffe4
+#define vector_6 vector_ffe6
+#define vector_8 vector_ffe8
+#define vector_10 vector_ffea
+#define vector_12 vector_ffec
+#define vector_14 vector_ffee
+#define vector_16 vector_fff0
+#define vector_18 vector_fff2
+#define vector_20 vector_fff4
+#define vector_22 vector_fff6
+#define vector_24 vector_fff8
+#define vector_26 vector_fffa
+#define vector_28 vector_fffc
+#define vector_30 vector_fffe
+#endif
+
+#endif /*_GNU_ASSEMBLER_*/
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2003 Steve Underwood <steveu@coppice.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: stdint.h,v 1.5 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#if !defined(__STDINT_H_)
+#define __STDINT_H_
+
+/*
+ * ISO C99: 7.18 Integer types <stdint.h>
+ */
+
+#ifndef __int8_t_defined
+#define __int8_t_defined
+typedef signed char int8_t;
+typedef int int16_t;
+typedef long int int32_t;
+__extension__ typedef long long int int64_t;
+
+typedef unsigned char uint8_t;
+typedef unsigned int uint16_t;
+typedef unsigned long int uint32_t;
+__extension__ typedef unsigned long long int uint64_t;
+# endif
+
+/* Small types. */
+
+/* Signed. */
+typedef signed char int_least8_t;
+typedef int int_least16_t;
+typedef long int int_least32_t;
+__extension__ typedef long long int int_least64_t;
+
+/* Unsigned. */
+typedef unsigned char uint_least8_t;
+typedef unsigned int uint_least16_t;
+typedef unsigned long int uint_least32_t;
+__extension__ typedef unsigned long long int uint_least64_t;
+
+
+/* Fast types. */
+
+/* Signed. */
+typedef signed char int_fast8_t;
+typedef int int_fast16_t;
+typedef long int int_fast32_t;
+__extension__ typedef long long int int_fast64_t;
+
+/* Unsigned. */
+typedef unsigned char uint_fast8_t;
+typedef unsigned int uint_fast16_t;
+typedef unsigned long int uint_fast32_t;
+__extension__ typedef unsigned long long int uint_fast64_t;
+
+
+/* Types for `void *' pointers. */
+#if !defined(__intptr_t_defined)
+#define __intptr_t_defined
+#if defined(__MSP430X__) && defined(__MSP430X_LARGE__)
+typedef int32_t intptr_t;
+typedef uint32_t uintptr_t;
+#else
+typedef int16_t intptr_t;
+typedef uint16_t uintptr_t;
+#endif
+#endif
+
+
+/* Largest integral types. */
+__extension__ typedef long long int intmax_t;
+__extension__ typedef unsigned long long int uintmax_t;
+
+
+/* The ISO C99 standard specifies that in C++ implementations these
+ macros should only be defined if explicitly requested. */
+#if !defined __cplusplus || defined __STDC_LIMIT_MACROS
+
+#define __INT64_C(c) c ## LL
+#define __UINT64_C(c) c ## ULL
+
+/* Limits of integral types. */
+
+/* Minimum of signed integral types. */
+#define INT8_MIN (-128)
+#define INT16_MIN (-32767-1)
+#define INT32_MIN (-2147483647-1)
+#define INT64_MIN (-__INT64_C(9223372036854775807)-1)
+/* Maximum of signed integral types. */
+#define INT8_MAX (127)
+#define INT16_MAX (32767)
+#define INT32_MAX (2147483647)
+#define INT64_MAX (__INT64_C(9223372036854775807))
+
+/* Maximum of unsigned integral types. */
+#define UINT8_MAX (255)
+#define UINT16_MAX (65535)
+#define UINT32_MAX (4294967295U)
+#define UINT64_MAX (__UINT64_C(18446744073709551615))
+
+
+/* Minimum of signed integral types having a minimum size. */
+#define INT_LEAST8_MIN (-128)
+#define INT_LEAST16_MIN (-32767-1)
+#define INT_LEAST32_MIN (-2147483647-1)
+#define INT_LEAST64_MIN (-__INT64_C(9223372036854775807)-1)
+/* Maximum of signed integral types having a minimum size. */
+#define INT_LEAST8_MAX (127)
+#define INT_LEAST16_MAX (32767)
+#define INT_LEAST32_MAX (2147483647)
+#define INT_LEAST64_MAX (__INT64_C(9223372036854775807))
+
+/* Maximum of unsigned integral types having a minimum size. */
+#define UINT_LEAST8_MAX (255)
+#define UINT_LEAST16_MAX (65535)
+#define UINT_LEAST32_MAX (4294967295U)
+#define UINT_LEAST64_MAX (__UINT64_C(18446744073709551615))
+
+
+/* Minimum of fast signed integral types having a minimum size. */
+#define INT_FAST8_MIN (-128)
+#define INT_FAST16_MIN (-32768)
+#define INT_FAST32_MIN (-2147483647-1)
+#define INT_FAST64_MIN (-__INT64_C(9223372036854775807)-1)
+/* Maximum of fast signed integral types having a minimum size. */
+#define INT_FAST8_MAX (127)
+#define INT_FAST16_MAX (32767)
+#define INT_FAST32_MAX (2147483647)
+#define INT_FAST64_MAX (__INT64_C(9223372036854775807))
+
+/* Maximum of fast unsigned integral types having a minimum size. */
+#define UINT_FAST8_MAX (255U)
+#define UINT_FAST16_MAX (65535U)
+#define UINT_FAST32_MAX (4294967295UL)
+#define UINT_FAST64_MAX (__UINT64_C(18446744073709551615))
+
+
+/* Values to test for integral types holding `void *' pointer. */
+#if defined(__MSP430X__) && defined(__MSP430X_LARGE__)
+#define INTPTR_MIN (-2147483647-1)
+#define INTPTR_MAX (2147483647)
+#define UINTPTR_MAX (4294967295UL)
+#else
+#define INTPTR_MIN (-32768)
+#define INTPTR_MAX (32767)
+#define UINTPTR_MAX (65535U)
+#endif
+
+/* Minimum for largest signed integral type. */
+#define INTMAX_MIN (-__INT64_C(9223372036854775807)-1)
+/* Maximum for largest signed integral type. */
+#define INTMAX_MAX (__INT64_C(9223372036854775807))
+
+/* Maximum for largest unsigned integral type. */
+#define UINTMAX_MAX (__UINT64_C(18446744073709551615))
+
+/* Limits of other integer types. */
+
+/* Limits of `ptrdiff_t' type. */
+#if defined(__MSP430X__) && defined(__MSP430X_LARGE__)
+#define PTRDIFF_MIN (-2147483647-1)
+#define PTRDIFF_MAX (2147483647)
+#else
+#define PTRDIFF_MIN (-32768)
+#define PTRDIFF_MAX (32767)
+#endif
+
+/* Limits of `sig_atomic_t'. */
+#define SIG_ATOMIC_MIN (-32768)
+#define SIG_ATOMIC_MAX (32767)
+
+/* Limit of `size_t' type. */
+#define SIZE_MAX (65535U)
+
+/* Limits of `wchar_t'. */
+#ifndef WCHAR_MIN
+/* These constants might also be defined in <wchar.h>. */
+#define WCHAR_MIN __WCHAR_MIN
+#define WCHAR_MAX __WCHAR_MAX
+#endif
+
+/* Limits of `wint_t'. */
+#define WINT_MIN (0U)
+#define WINT_MAX (65535U)
+
+#endif /* C++ && limit macros */
+
+/* The ISO C99 standard specifies that in C++ implementations these
+ should only be defined if explicitly requested. */
+#if !defined __cplusplus || defined __STDC_CONSTANT_MACROS
+
+/* Signed. */
+#define INT8_C(c) c
+#define INT16_C(c) c
+#define INT32_C(c) c
+#define INT64_C(c) c ## LL
+
+/* Unsigned. */
+#define UINT8_C(c) c ## U
+#define UINT16_C(c) c ## U
+#define UINT32_C(c) c ## U
+#define UINT64_C(c) c ## ULL
+
+/* Maximal type. */
+#define INTMAX_C(c) c ## LL
+#define UINTMAX_C(c) c ## ULL
+
+#endif /* C++ && constant macros */
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: stdio.h,v 1.9 2004/01/28 22:25:29 cliechti Exp $
+ */
+
+#ifndef _STDIO_H_
+#define _STDIO_H_
+
+#include <stddef.h>
+#include <sys/types.h>
+
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+#ifndef EOF
+# define EOF (-1)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif //__cplusplus
+
+int __attribute__((format (printf, 2, 3))) uprintf(int (*func)(int c), const char *fmt, ...);
+int __attribute__((format (printf, 3, 4))) snprintf (char *buf, size_t size, const char *fmt, ...);
+int __attribute__((format (printf, 2, 3))) sprintf (char *buf, const char *fmt, ...);
+int __attribute__((format (printf, 1, 2))) printf(const char *string, ...);
+int vuprintf(int (*func)(int c), const char *fmt0, va_list ap);
+int vsnprintf(char *dest, size_t maxlen, const char *string, va_list ap);
+int vsprintf(char *dest, const char *string, va_list ap);
+int vprintf(const char *string, va_list ap);
+
+int puts(const char *s);
+int putchar(int c); //has to be supplied by the user, but avoids useless warnings
+
+#ifdef __cplusplus
+}
+#endif //__cplusplus
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: stdlib.h,v 1.13 2008/06/03 13:16:57 cliechti Exp $
+ */
+
+#if !defined(__STDLIB_H_)
+#define __STDLIB_H_
+
+#include <stddef.h>
+#include <sys/types.h>
+
+#if !defined(__ATTR_CONST__)
+#define __ATTR_CONST__ __attribute__((__const__))
+#endif
+
+#if !defined(__ATTR_MALLOC__)
+#define __ATTR_MALLOC__ __attribute__((__malloc__))
+#endif
+
+#if !defined(__ATTR_NORETURN__)
+#define __ATTR_NORETURN__ __attribute__((__noreturn__))
+#endif
+
+#if !defined(__ATTR_PURE__)
+#define __ATTR_PURE__ __attribute__((__pure__))
+#endif
+
+#if !defined(exit)
+extern void exit(int) __asm__("__stop_progExec__") __ATTR_CONST__;
+#endif
+
+typedef struct
+{
+ int quot;
+ int rem;
+} div_t;
+
+extern div_t div(int num, int denom);
+
+typedef struct
+{
+ long quot;
+ long rem;
+} ldiv_t;
+
+extern ldiv_t ldiv(long num, long denom);
+
+extern __inline__ int abs(int __x) __ATTR_CONST__;
+extern __inline__ int abs(int __x)
+{
+ return (__x < 0) ? -__x : __x;
+}
+
+extern __inline__ long labs(long __x) __ATTR_CONST__;
+extern __inline__ long labs(long __x)
+{
+ return (__x < 0) ? -__x : __x;
+}
+
+long strtol(const char *, char **, int);
+unsigned long strtoul(const char *, char **, int);
+
+int atoi(const char *p);
+long atol(const char *p);
+char *itoa(int num, char *str, int radix);
+char *utoa(unsigned num, char *str, int radix);
+char *ltoa(long num, char *str, int radix);
+char *ultoa(unsigned long num, char *str, int radix);
+
+void *malloc(size_t size);
+void free(void *p);
+void *bsearch(const void *, const void *, size_t, size_t, register int (*compar)(const void *, const void *));
+
+void abort(void);
+
+#ifndef RAND_MAX
+#define RAND_MAX 0x7fffffffL
+#endif
+
+int rand(void);
+void srand(unsigned __seed);
+int rand_r(unsigned *__seed);
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: string.h,v 1.4 2006/11/15 14:34:57 coppice Exp $
+ */
+
+#if !defined(__STRING_H_)
+#define __STRING_H_
+
+#include <stddef.h>
+#include <sys/types.h>
+
+extern void *memccpy(void *, const void *, int, size_t);
+extern void *memchr(const void *, int, size_t);
+extern int memcmp(const void *, const void *, size_t);
+extern void *memcpy(void *, const void *, size_t);
+extern void *memmove(void *, const void *, size_t);
+extern void *memset(void *, int, size_t);
+extern char *strcat(char *, const char *);
+extern char *strchr(const char *, int);
+extern int strcmp(const char *, const char *);
+extern char *strcpy(char *, const char *);
+extern int strcasecmp(const char *, const char *);
+extern size_t strlen(const char *);
+extern char *strlwr(char *);
+extern char *strncat(char *, const char *, size_t);
+extern int strncmp(const char *, const char *, size_t);
+extern char *strncpy(char *, const char *, size_t) ;
+extern int strncasecmp(const char *, const char *, size_t);
+extern size_t strnlen(const char *, size_t);
+extern char *strrchr(const char *, int);
+extern char *strrev(char *);
+extern char *strstr(const char *, const char *);
+extern char *strupr(char *);
+extern int bcmp(const void *b1, const void *b2, size_t length);
+extern char *strsep(char **, const char *);
+extern void bcopy(const void *, void *, size_t);
+extern size_t strlcat(char *, const char *, size_t);
+extern void * memset(void *, int, size_t);
+extern void bzero(void *, size_t);
+extern size_t strlcpy(char *, const char *, size_t);
+extern char * strdup(const char *);
+extern void swab(const void *, void *, size_t);
+extern char * strtok_r(char *s, const char *delim, char **last);
+extern char * strtok(char *s, const char *delim);
+
+#endif /* _STRING_H_ */
--- /dev/null
+/* Provide support for both ANSI and non-ANSI environments. */
+
+/* Some ANSI environments are "broken" in the sense that __STDC__ cannot be
+ relied upon to have it's intended meaning. Therefore we must use our own
+ concoction: _HAVE_STDC. Always use _HAVE_STDC instead of __STDC__ in newlib
+ sources!
+
+ To get a strict ANSI C environment, define macro __STRICT_ANSI__. This will
+ "comment out" the non-ANSI parts of the ANSI header files (non-ANSI header
+ files aren't affected). */
+
+#ifndef _ANSIDECL_H_
+#define _ANSIDECL_H_
+
+#include <sys/config.h>
+
+/* First try to figure out whether we really are in an ANSI C environment. */
+/* FIXME: This probably needs some work. Perhaps sys/config.h can be
+ prevailed upon to give us a clue. */
+
+#ifdef __STDC__
+#define _HAVE_STDC
+#endif
+
+#ifdef _HAVE_STDC
+#define _PTR void *
+#define _AND ,
+#define _NOARGS void
+#define _CONST const
+#define _VOLATILE volatile
+#define _SIGNED signed
+#define _DOTS , ...
+#define _VOID void
+#ifdef __CYGWIN__
+#define _EXFUN(name, proto) __cdecl name proto
+#define _EXPARM(name, proto) (* __cdecl name) proto
+#else
+#define _EXFUN(name, proto) name proto
+#define _EXPARM(name, proto) (* name) proto
+#endif
+#define _DEFUN(name, arglist, args) name(args)
+#define _DEFUN_VOID(name) name(_NOARGS)
+#define _CAST_VOID (void)
+#ifndef _LONG_DOUBLE
+#define _LONG_DOUBLE long double
+#endif
+#ifndef _PARAMS
+#define _PARAMS(paramlist) paramlist
+#endif
+#else
+#define _PTR char *
+#define _AND ;
+#define _NOARGS
+#define _CONST
+#define _VOLATILE
+#define _SIGNED
+#define _DOTS
+#define _VOID void
+#define _EXFUN(name, proto) name()
+#define _DEFUN(name, arglist, args) name arglist args;
+#define _DEFUN_VOID(name) name()
+#define _CAST_VOID
+#define _LONG_DOUBLE double
+#ifndef _PARAMS
+#define _PARAMS(paramlist) ()
+#endif
+#endif
+
+/* Support gcc's __attribute__ facility. */
+
+#ifdef __GNUC__
+#define _ATTRIBUTE(attrs) __attribute__ (attrs)
+#else
+#define _ATTRIBUTE(attrs)
+#endif
+
+#endif /* _ANSIDECL_H_ */
--- /dev/null
+/* ANSI C namespace clean utility typedefs */
+
+/* This file defines various typedefs needed by the system calls that support
+ the C library. Basically, they're just the POSIX versions with an '_'
+ prepended. This file lives in the `sys' directory so targets can provide
+ their own if desired (or they can put target dependant conditionals here).
+*/
+
+#ifndef _SYS__TYPES_H
+#define _SYS__TYPES_H
+
+typedef long _off_t;
+typedef long _ssize_t;
+
+#endif /* _SYS__TYPES_H */
--- /dev/null
+/*
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _SYS_CDEFS_H_
+#define _SYS_CDEFS_H_
+
+#if defined(__cplusplus)
+#define __BEGIN_DECLS extern "C" {
+#define __END_DECLS }
+#else
+#define __BEGIN_DECLS
+#define __END_DECLS
+#endif
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+#if defined(__STDC__) || defined(__cplusplus)
+#define __P(protos) protos /* full-blown ANSI C */
+#define __CONCAT1(x,y) x ## y
+#define __CONCAT(x,y) __CONCAT1(x,y)
+#define __STRING(x) #x /* stringify without expanding x */
+#define __XSTRING(x) __STRING(x) /* expand x, then stringify */
+
+#define __const const /* define reserved names to standard */
+#define __signed signed
+#define __volatile volatile
+#if defined(__cplusplus)
+#define __inline inline /* convert to C++ keyword */
+#else
+#ifndef __GNUC__
+#define __inline /* delete GCC keyword */
+#endif /* !__GNUC__ */
+#endif /* !__cplusplus */
+
+#else /* !(__STDC__ || __cplusplus) */
+#define __P(protos) () /* traditional C preprocessor */
+#define __CONCAT(x,y) x/**/y
+#define __STRING(x) "x"
+
+#ifndef __GNUC__
+#define __const /* delete pseudo-ANSI C keywords */
+#define __inline
+#define __signed
+#define __volatile
+/*
+ * In non-ANSI C environments, new programs will want ANSI-only C keywords
+ * deleted from the program and old programs will want them left alone.
+ * When using a compiler other than gcc, programs using the ANSI C keywords
+ * const, inline etc. as normal identifiers should define -DNO_ANSI_KEYWORDS.
+ * When using "gcc -traditional", we assume that this is the intent; if
+ * __GNUC__ is defined but __STDC__ is not, we leave the new keywords alone.
+ */
+#ifndef NO_ANSI_KEYWORDS
+#define const /* delete ANSI C keywords */
+#define inline
+#define signed
+#define volatile
+#endif /* !NO_ANSI_KEYWORDS */
+#endif /* !__GNUC__ */
+#endif /* !(__STDC__ || __cplusplus) */
+
+#endif /* !_SYS_CDEFS_H_ */
--- /dev/null
+#ifndef __SYS_CONFIG_H__
+#define __SYS_CONFIG_H__
+
+/* exceptions first */
+/* ??? Why is much of this stuff duplicated with machine/ieeefp.h? */
+#if defined(__H8300__) || defined(__H8500__) || defined (__H8300H__) || defined(__W65__) || defined (__H8300S__)
+#define _FLOAT_ARG float
+#define __SMALL_BITFIELDS
+#define _DOUBLE_IS_32BITS
+#define __IEEE_BIG_ENDIAN
+/* ??? This conditional is true for the h8500 and the w65, defining H8300
+ in those cases probably isn't the right thing to do. */
+#define H8300 1
+#endif
+
+#ifdef __W65__
+#define _DOUBLE_IS_32BITS
+#define __SMALL_BITFIELDS
+#define __IEEE_BIG_ENDIAN
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX 32767
+#define UINT_MAX 65535
+
+#endif
+
+/* 16 bit integer machines */
+#if defined(__Z8001__) || defined(__Z8002__) || defined(__H8300__) || defined(__H8500__) || defined(__W65__) || defined (__H8300H__) || defined (__H8300S__) || defined (__mn10200__) || defined (__AVR__) || defined (__MSP430__)
+
+#ifndef INT_MAX
+#define INT_MAX 32767
+#endif
+#endif
+
+#if defined(__D10V__)
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX __INT_MAX__
+#define UINT_MAX (__INT_MAX__ * 2U + 1)
+#define _DOUBLE_IS_32BITS
+#define _POINTER_INT short
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef ___AM29K__
+#define _FLOAT_RET double
+#endif
+
+#ifdef __i386__
+#ifndef __unix__
+/* in other words, go32 */
+#define _FLOAT_RET double
+#endif
+#endif
+
+#ifdef __M32R__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __m68k__
+/* This is defined in machine/ieeefp.h; need to check is it redundant here? */
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __mn10300__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __mn10200__
+#define _DOUBLE_IS_32BITS
+#define __SMALL_BITFIELDS
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __MMIX__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __AVR__
+#define _DOUBLE_IS_32BITS
+#define __SMALL_BITFIELDS
+#define __IEEE_LITTLE_ENDIAN
+#define _POINTER_INT short
+#endif
+
+
+#ifdef __MSP430__
+#define _DOUBLE_IS_32BITS
+#define __SMALL_BITFIELDS
+#define __IEEE_LITTLE_ENDIAN
+#define _POINTER_INT short
+#endif
+
+
+#ifdef __TIC80__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __v850
+#define __IEEE_LITTLE_ENDIAN
+#define __ATTRIBUTE_IMPURE_PTR__ __attribute__((__sda__))
+#endif
+
+#ifdef __D30V__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+/* For the PowerPC eabi, force the _impure_ptr to be in .sdata */
+#if defined(__PPC__) && defined(_CALL_SYSV)
+#define __ATTRIBUTE_IMPURE_PTR__ __attribute__((__section__(".sdata")))
+#endif
+
+#ifdef __sparc__
+#ifdef __LITTLE_ENDIAN_DATA__
+#define __IEEE_LITTLE_ENDIAN
+#else
+#define __IEEE_BIG_ENDIAN
+#endif
+#endif
+
+#if INT_MAX == 32767
+typedef long int __int32_t;
+typedef unsigned long int __uint32_t;
+#else
+typedef int __int32_t;
+typedef unsigned int __uint32_t;
+#endif
+
+#ifndef _POINTER_INT
+#define _POINTER_INT long
+#endif
+
+#undef __RAND_MAX
+#if INT_MAX == 32767
+#define __RAND_MAX 32767
+#else
+#define __RAND_MAX 0x7fffffff
+#endif
+
+
+#if defined(__CYGWIN32__) || defined(__CYGWIN__)
+#define __FILENAME_MAX__ (260 - 1 /* NUL */)
+#define _READ_WRITE_RETURN_TYPE _ssize_t
+#if defined(__INSIDE_CYGWIN__) || defined(_COMPILING_NEWLIB)
+#define __IMPORT
+#else
+#define __IMPORT __declspec(dllimport)
+#endif
+#endif
+
+#if defined(__rtems__)
+#define __FILENAME_MAX__ 255
+#define _READ_WRITE_RETURN_TYPE _ssize_t
+#endif
+
+#ifndef __IMPORT
+#define __IMPORT
+#endif
+
+/* Define return type of read/write routines. In POSIX, the return type
+ for read()/write() is "ssize_t" but legacy newlib code has been using
+ "int" for some time. If not specified, "int" is defaulted. */
+#ifndef _READ_WRITE_RETURN_TYPE
+#define _READ_WRITE_RETURN_TYPE int
+#endif
+
+#endif /* __SYS_CONFIG_H__ */
--- /dev/null
+
+/* @(#)fdlibm.h 5.1 93/09/24 */
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+/* CYGNUS LOCAL: Include files. */
+#include <sys/config.h>
+#include <math.h>
+#include <sys/ieeefp.h>
+
+/* CYGNUS LOCAL: Default to XOPEN_MODE. */
+#define _XOPEN_MODE
+
+/* Most routines need to check whether a float is finite, infinite, or not a
+ number, and many need to know whether the result of an operation will
+ overflow. These conditions depend on whether the largest exponent is
+ used for NaNs & infinities, or whether it's used for finite numbers. The
+ macros below wrap up that kind of information:
+
+ FLT_UWORD_IS_FINITE(X)
+ True if a positive float with bitmask X is finite.
+
+ FLT_UWORD_IS_NAN(X)
+ True if a positive float with bitmask X is not a number.
+
+ FLT_UWORD_IS_INFINITE(X)
+ True if a positive float with bitmask X is +infinity.
+
+ FLT_UWORD_MAX
+ The bitmask of FLT_MAX.
+
+ FLT_UWORD_HALF_MAX
+ The bitmask of FLT_MAX/2.
+
+ FLT_UWORD_EXP_MAX
+ The bitmask of the largest finite exponent (129 if the largest
+ exponent is used for finite numbers, 128 otherwise).
+
+ FLT_UWORD_LOG_MAX
+ The bitmask of log(FLT_MAX), rounded down. This value is the largest
+ input that can be passed to exp() without producing overflow.
+
+ FLT_UWORD_LOG_2MAX
+ The bitmask of log(2*FLT_MAX), rounded down. This value is the
+ largest input than can be passed to cosh() without producing
+ overflow.
+
+ FLT_LARGEST_EXP
+ The largest biased exponent that can be used for finite numbers
+ (255 if the largest exponent is used for finite numbers, 254
+ otherwise) */
+
+#ifdef _FLT_LARGEST_EXPONENT_IS_NORMAL
+#define FLT_UWORD_IS_FINITE(x) 1
+#define FLT_UWORD_IS_NAN(x) 0
+#define FLT_UWORD_IS_INFINITE(x) 0
+#define FLT_UWORD_MAX 0x7fffffff
+#define FLT_UWORD_EXP_MAX 0x43010000
+#define FLT_UWORD_LOG_MAX 0x42b2d4fc
+#define FLT_UWORD_LOG_2MAX 0x42b437e0
+#define HUGE ((float)0X1.FFFFFEP128)
+#else
+#define FLT_UWORD_IS_FINITE(x) ((x)<0x7f800000L)
+#define FLT_UWORD_IS_NAN(x) ((x)>0x7f800000L)
+#define FLT_UWORD_IS_INFINITE(x) ((x)==0x7f800000L)
+#define FLT_UWORD_MAX 0x7f7fffffL
+#define FLT_UWORD_EXP_MAX 0x43000000L
+#define FLT_UWORD_LOG_MAX 0x42b17217L
+#define FLT_UWORD_LOG_2MAX 0x42b2d4fcL
+#ifndef HUGE
+#define HUGE ((float)3.40282346638528860e+38)
+#endif
+#endif
+#define FLT_UWORD_HALF_MAX (FLT_UWORD_MAX-(1L<<23))
+#define FLT_LARGEST_EXP (FLT_UWORD_MAX>>23)
+
+/* Many routines check for zero and subnormal numbers. Such things depend
+ on whether the target supports denormals or not:
+
+ FLT_UWORD_IS_ZERO(X)
+ True if a positive float with bitmask X is +0. Without denormals,
+ any float with a zero exponent is a +0 representation. With
+ denormals, the only +0 representation is a 0 bitmask.
+
+ FLT_UWORD_IS_SUBNORMAL(X)
+ True if a non-zero positive float with bitmask X is subnormal.
+ (Routines should check for zeros first.)
+
+ FLT_UWORD_MIN
+ The bitmask of the smallest float above +0. Call this number
+ REAL_FLT_MIN...
+
+ FLT_UWORD_EXP_MIN
+ The bitmask of the float representation of REAL_FLT_MIN's exponent.
+
+ FLT_UWORD_LOG_MIN
+ The bitmask of |log(REAL_FLT_MIN)|, rounding down.
+
+ FLT_SMALLEST_EXP
+ REAL_FLT_MIN's exponent - EXP_BIAS (1 if denormals are not supported,
+ -22 if they are).
+*/
+
+#ifdef _FLT_NO_DENORMALS
+#define FLT_UWORD_IS_ZERO(x) ((x)<0x00800000L)
+#define FLT_UWORD_IS_SUBNORMAL(x) 0
+#define FLT_UWORD_MIN 0x00800000
+#define FLT_UWORD_EXP_MIN 0x42fc0000
+#define FLT_UWORD_LOG_MIN 0x42aeac50
+#define FLT_SMALLEST_EXP 1
+#else
+#define FLT_UWORD_IS_ZERO(x) ((x)==0)
+#define FLT_UWORD_IS_SUBNORMAL(x) ((x)<0x00800000L)
+#define FLT_UWORD_MIN 0x00000001
+#define FLT_UWORD_EXP_MIN 0x43160000
+#define FLT_UWORD_LOG_MIN 0x42cff1b5
+#define FLT_SMALLEST_EXP -22
+#endif
+
+#ifdef __STDC__
+#define __P(p) p
+#else
+#define __P(p) ()
+#endif
+
+/*
+ * set X_TLOSS = pi*2**52, which is possibly defined in <values.h>
+ * (one may replace the following line by "#include <values.h>")
+ */
+
+#define X_TLOSS 1.41484755040568800000e+16
+
+/* Functions that are not documented, and are not in <math.h>. */
+
+extern double logb __P((double));
+#ifdef _SCALB_INT
+extern double scalb __P((double, int));
+#else
+extern double scalb __P((double, double));
+#endif
+extern double significand __P((double));
+
+/* ieee style elementary functions */
+extern double __ieee754_sqrt __P((double));
+extern double __ieee754_acos __P((double));
+extern double __ieee754_acosh __P((double));
+extern double __ieee754_log __P((double));
+extern double __ieee754_atanh __P((double));
+extern double __ieee754_asin __P((double));
+extern double __ieee754_atan2 __P((double,double));
+extern double __ieee754_exp __P((double));
+extern double __ieee754_cosh __P((double));
+extern double __ieee754_fmod __P((double,double));
+extern double __ieee754_pow __P((double,double));
+extern double __ieee754_lgamma_r __P((double,int *));
+extern double __ieee754_gamma_r __P((double,int *));
+extern double __ieee754_log10 __P((double));
+extern double __ieee754_sinh __P((double));
+extern double __ieee754_hypot __P((double,double));
+extern double __ieee754_j0 __P((double));
+extern double __ieee754_j1 __P((double));
+extern double __ieee754_y0 __P((double));
+extern double __ieee754_y1 __P((double));
+extern double __ieee754_jn __P((int,double));
+extern double __ieee754_yn __P((int,double));
+extern double __ieee754_remainder __P((double,double));
+extern __int32_t __ieee754_rem_pio2 __P((double,double*));
+#ifdef _SCALB_INT
+extern double __ieee754_scalb __P((double,int));
+#else
+extern double __ieee754_scalb __P((double,double));
+#endif
+
+/* fdlibm kernel function */
+extern double __kernel_standard __P((double,double,int));
+extern double __kernel_sin __P((double,double,int));
+extern double __kernel_cos __P((double,double));
+extern double __kernel_tan __P((double,double,int));
+extern int __kernel_rem_pio2 __P((double*,double*,int,int,int,const __int32_t*));
+
+/* Undocumented float functions. */
+extern float logbf __P((float));
+#ifdef _SCALB_INT
+extern float scalbf __P((float, int));
+#else
+extern float scalbf __P((float, float));
+#endif
+extern float significandf __P((float));
+
+/* ieee style elementary float functions */
+extern float __ieee754_sqrtf __P((float));
+extern float __ieee754_acosf __P((float));
+extern float __ieee754_acoshf __P((float));
+extern float __ieee754_logf __P((float));
+extern float __ieee754_atanhf __P((float));
+extern float __ieee754_asinf __P((float));
+extern float __ieee754_atan2f __P((float,float));
+extern float __ieee754_expf __P((float));
+extern float __ieee754_coshf __P((float));
+extern float __ieee754_fmodf __P((float,float));
+extern float __ieee754_powf __P((float,float));
+extern float __ieee754_lgammaf_r __P((float,int *));
+extern float __ieee754_gammaf_r __P((float,int *));
+extern float __ieee754_log10f __P((float));
+extern float __ieee754_sinhf __P((float));
+extern float __ieee754_hypotf __P((float,float));
+extern float __ieee754_j0f __P((float));
+extern float __ieee754_j1f __P((float));
+extern float __ieee754_y0f __P((float));
+extern float __ieee754_y1f __P((float));
+extern float __ieee754_jnf __P((int,float));
+extern float __ieee754_ynf __P((int,float));
+extern float __ieee754_remainderf __P((float,float));
+extern __int32_t __ieee754_rem_pio2f __P((float,float*));
+#ifdef _SCALB_INT
+extern float __ieee754_scalbf __P((float,int));
+#else
+extern float __ieee754_scalbf __P((float,float));
+#endif
+
+/* float versions of fdlibm kernel functions */
+extern float __kernel_sinf __P((float,float,int));
+extern float __kernel_cosf __P((float,float));
+extern float __kernel_tanf __P((float,float,int));
+extern int __kernel_rem_pio2f __P((float*,float*,int,int,int,const __int32_t*));
+
+/* The original code used statements like
+ n0 = ((*(int*)&one)>>29)^1; * index of high word *
+ ix0 = *(n0+(int*)&x); * high word of x *
+ ix1 = *((1-n0)+(int*)&x); * low word of x *
+ to dig two 32 bit words out of the 64 bit IEEE floating point
+ value. That is non-ANSI, and, moreover, the gcc instruction
+ scheduler gets it wrong. We instead use the following macros.
+ Unlike the original code, we determine the endianness at compile
+ time, not at run time; I don't see much benefit to selecting
+ endianness at run time. */
+
+#ifndef __IEEE_BIG_ENDIAN
+#ifndef __IEEE_LITTLE_ENDIAN
+ #error Must define endianness
+#endif
+#endif
+
+/* A union which permits us to convert between a double and two 32 bit
+ ints. */
+
+#ifdef __IEEE_BIG_ENDIAN
+
+typedef union
+{
+ double value;
+ struct
+ {
+ __uint32_t msw;
+ __uint32_t lsw;
+ } parts;
+} ieee_double_shape_type;
+
+#endif
+
+#ifdef __IEEE_LITTLE_ENDIAN
+
+typedef union
+{
+ double value;
+ struct
+ {
+ __uint32_t lsw;
+ __uint32_t msw;
+ } parts;
+} ieee_double_shape_type;
+
+#endif
+
+/* Get two 32 bit ints from a double. */
+
+#define EXTRACT_WORDS(ix0,ix1,d) \
+do { \
+ ieee_double_shape_type ew_u; \
+ ew_u.value = (d); \
+ (ix0) = ew_u.parts.msw; \
+ (ix1) = ew_u.parts.lsw; \
+} while (0)
+
+/* Get the more significant 32 bit int from a double. */
+
+#define GET_HIGH_WORD(i,d) \
+do { \
+ ieee_double_shape_type gh_u; \
+ gh_u.value = (d); \
+ (i) = gh_u.parts.msw; \
+} while (0)
+
+/* Get the less significant 32 bit int from a double. */
+
+#define GET_LOW_WORD(i,d) \
+do { \
+ ieee_double_shape_type gl_u; \
+ gl_u.value = (d); \
+ (i) = gl_u.parts.lsw; \
+} while (0)
+
+/* Set a double from two 32 bit ints. */
+
+#define INSERT_WORDS(d,ix0,ix1) \
+do { \
+ ieee_double_shape_type iw_u; \
+ iw_u.parts.msw = (ix0); \
+ iw_u.parts.lsw = (ix1); \
+ (d) = iw_u.value; \
+} while (0)
+
+/* Set the more significant 32 bits of a double from an int. */
+
+#define SET_HIGH_WORD(d,v) \
+do { \
+ ieee_double_shape_type sh_u; \
+ sh_u.value = (d); \
+ sh_u.parts.msw = (v); \
+ (d) = sh_u.value; \
+} while (0)
+
+/* Set the less significant 32 bits of a double from an int. */
+
+#define SET_LOW_WORD(d,v) \
+do { \
+ ieee_double_shape_type sl_u; \
+ sl_u.value = (d); \
+ sl_u.parts.lsw = (v); \
+ (d) = sl_u.value; \
+} while (0)
+
+/* A union which permits us to convert between a float and a 32 bit
+ int. */
+
+typedef union
+{
+ float value;
+ __uint32_t word;
+} ieee_float_shape_type;
+
+/* Get a 32 bit int from a float. */
+
+#define GET_FLOAT_WORD(i,d) \
+do { \
+ ieee_float_shape_type gf_u; \
+ gf_u.value = (d); \
+ (i) = gf_u.word; \
+} while (0)
+
+/* Set a float from a 32 bit int. */
+
+#define SET_FLOAT_WORD(d,i) \
+do { \
+ ieee_float_shape_type sf_u; \
+ sf_u.word = (i); \
+ (d) = sf_u.value; \
+} while (0)
--- /dev/null
+#ifndef __IEEE_BIG_ENDIAN
+#ifndef __IEEE_LITTLE_ENDIAN
+
+/* This file can define macros to choose variations of the IEEE float
+ format:
+
+ _FLT_LARGEST_EXPONENT_IS_NORMAL
+
+ Defined if the float format uses the largest exponent for finite
+ numbers rather than NaN and infinity representations. Such a
+ format cannot represent NaNs or infinities at all, but it's FLT_MAX
+ is twice the IEEE value.
+
+ _FLT_NO_DENORMALS
+
+ Defined if the float format does not support IEEE denormals. Every
+ float with a zero exponent is taken to be a zero representation.
+
+ ??? At the moment, there are no equivalent macros for doubles and
+ the macros are not fully supported by --enable-newlib-hw-fp. */
+
+#if defined(__arm__) || defined(__thumb__)
+/* ARM always has big-endian words. Within those words the byte ordering
+ will be big or little endian depending upon the target. */
+#define __IEEE_BIG_ENDIAN
+#ifdef __ARMEL__
+#define __IEEE_BYTES_LITTLE_ENDIAN
+#endif
+#endif
+
+#ifdef __hppa__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __sparc__
+#ifdef __LITTLE_ENDIAN_DATA__
+#define __IEEE_LITTLE_ENDIAN
+#else
+#define __IEEE_BIG_ENDIAN
+#endif
+#endif
+
+#if defined(__m68k__) || defined(__mc68000__)
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#if defined (__H8300__) || defined (__H8300H__) || defined (__H8300S__)
+#define __IEEE_BIG_ENDIAN
+#define __SMALL_BITFIELDS
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __H8500__
+#define __IEEE_BIG_ENDIAN
+#define __SMALL_BITFIELDS
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __sh__
+#ifdef __LITTLE_ENDIAN__
+#define __IEEE_LITTLE_ENDIAN
+#else
+#define __IEEE_BIG_ENDIAN
+#endif
+#if defined(__SH3E__) || defined(__SH4_SINGLE_ONLY__)
+#define _DOUBLE_IS_32BITS
+#endif
+#endif
+
+#ifdef _AM29K
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef _WIN32
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __i386__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __i960__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __M32R__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __TIC80__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __MIPSEL__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#ifdef __MIPSEB__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __MMIX__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+/* necv70 was __IEEE_LITTLE_ENDIAN. */
+
+#ifdef __W65__
+#define __IEEE_LITTLE_ENDIAN
+#define __SMALL_BITFIELDS
+#define _DOUBLE_IS_32BITS
+#endif
+
+#if defined(__Z8001__) || defined(__Z8002__)
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __m88k__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __mn10300__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __mn10200__
+#define __IEEE_LITTLE_ENDIAN
+#define __SMALL_BITFIELDS
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __v800
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __v850
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __D10V__
+#define __IEEE_BIG_ENDIAN
+#define _DOUBLE_IS_32BITS
+#define __SMALL_BITFIELDS
+#endif
+
+#ifdef __PPC__
+#if (defined(_BIG_ENDIAN) && _BIG_ENDIAN) || (defined(_AIX) && _AIX)
+#define __IEEE_BIG_ENDIAN
+#else
+#if (defined(_LITTLE_ENDIAN) && _LITTLE_ENDIAN) || (defined(__sun__) && __sun__) || (defined(_WIN32) && _WIN32)
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#endif
+#endif
+
+#ifdef __arc__
+#ifdef __big_endian__
+#define __IEEE_BIG_ENDIAN
+#else
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#endif
+
+#ifdef __fr30__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __mcore__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __ia64__
+#ifdef __BIG_ENDIAN__
+#define __IEEE_BIG_ENDIAN
+#else
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#endif
+
+#ifdef __AVR__
+#define __IEEE_LITTLE_ENDIAN
+#define __SMALL_BITFIELDS
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __MSP430__
+#define __IEEE_LITTLE_ENDIAN
+#define __SMALL_BITFIELDS
+#define _DOUBLE_IS_32BITS
+#endif
+
+
+#if defined(__or32__) || defined(__or1k__) || defined(__or16__)
+#define __IEEE_BIG_ENDIAN
+#endif
+
+
+#ifndef __IEEE_BIG_ENDIAN
+#ifndef __IEEE_LITTLE_ENDIAN
+#error Endianess not declared!!
+#endif /* not __IEEE_LITTLE_ENDIAN */
+#endif /* not __IEEE_BIG_ENDIAN */
+
+#endif /* not __IEEE_LITTLE_ENDIAN */
+#endif /* not __IEEE_BIG_ENDIAN */
+
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: inttypes.h,v 1.3 2003/12/15 15:34:09 coppice Exp $
+ */
+
+
+#ifndef __INTTYPES_H_
+#define __INTTYPES_H_
+
+#ifndef __int8_t_defined
+#define __int8_t_defined
+/* Use [u]intN_t if you need exactly N bits.
+ XXX - doesn't handle the -mint8 option. */
+
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+
+typedef int int16_t;
+typedef unsigned int uint16_t;
+
+typedef long int32_t;
+typedef unsigned long uint32_t;
+
+typedef long long int64_t;
+typedef unsigned long long uint64_t;
+#endif
+
+#ifndef __intptr_t_defined
+#define __intptr_t_defined
+typedef int16_t intptr_t;
+typedef uint16_t uintptr_t;
+#endif
+
+#define _MSP430_SIZE_T_ uint16_t
+
+#endif
--- /dev/null
+/* This header file provides the reentrancy. */
+
+/* WARNING: All identifiers here must begin with an underscore. This file is
+ included by stdio.h and others and we therefore must only use identifiers
+ in the namespace allotted to us. */
+
+#ifndef _SYS_REENT_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define _SYS_REENT_H_
+
+#include <sys/_ansi.h>
+#include <sys/_types.h>
+
+#ifndef __Long
+#if __LONG_MAX__ == 2147483647L
+#define __Long long
+typedef unsigned __Long __ULong;
+#elif __INT_MAX__ == 2147483647
+#define __Long int
+typedef unsigned __Long __ULong;
+#endif
+#endif
+
+#ifndef __Long
+#define __Long __int32_t
+typedef __uint32_t __ULong;
+#endif
+
+struct _glue
+{
+ struct _glue *_next;
+ int _niobs;
+ struct __sFILE *_iobs;
+};
+
+struct _Bigint
+{
+ struct _Bigint *_next;
+ int _k, _maxwds, _sign, _wds;
+ __ULong _x[1];
+};
+
+/* needed by reentrant structure */
+struct __tm
+{
+ int __tm_sec;
+ int __tm_min;
+ int __tm_hour;
+ int __tm_mday;
+ int __tm_mon;
+ int __tm_year;
+ int __tm_wday;
+ int __tm_yday;
+ int __tm_isdst;
+};
+
+/*
+ * atexit() support
+ */
+
+#define _ATEXIT_SIZE 32 /* must be at least 32 to guarantee ANSI conformance */
+
+struct _atexit {
+ struct _atexit *_next; /* next in list */
+ int _ind; /* next index in this table */
+ void (*_fns[_ATEXIT_SIZE])(void); /* the table itself */
+};
+
+/*
+ * Stdio buffers.
+ *
+ * This and __sFILE are defined here because we need them for struct _reent,
+ * but we don't want stdio.h included when stdlib.h is.
+ */
+
+struct __sbuf {
+ unsigned char *_base;
+ int _size;
+};
+
+/*
+ * We need fpos_t for the following, but it doesn't have a leading "_",
+ * so we use _fpos_t instead.
+ */
+
+typedef long _fpos_t; /* XXX must match off_t in <sys/types.h> */
+ /* (and must be `long' for now) */
+
+/*
+ * Stdio state variables.
+ *
+ * The following always hold:
+ *
+ * if (_flags&(__SLBF|__SWR)) == (__SLBF|__SWR),
+ * _lbfsize is -_bf._size, else _lbfsize is 0
+ * if _flags&__SRD, _w is 0
+ * if _flags&__SWR, _r is 0
+ *
+ * This ensures that the getc and putc macros (or inline functions) never
+ * try to write or read from a file that is in `read' or `write' mode.
+ * (Moreover, they can, and do, automatically switch from read mode to
+ * write mode, and back, on "r+" and "w+" files.)
+ *
+ * _lbfsize is used only to make the inline line-buffered output stream
+ * code as compact as possible.
+ *
+ * _ub, _up, and _ur are used when ungetc() pushes back more characters
+ * than fit in the current _bf, or when ungetc() pushes back a character
+ * that does not match the previous one in _bf. When this happens,
+ * _ub._base becomes non-nil (i.e., a stream has ungetc() data iff
+ * _ub._base!=NULL) and _up and _ur save the current values of _p and _r.
+ */
+
+struct __sFILE {
+ unsigned char *_p; /* current position in (some) buffer */
+ int _r; /* read space left for getc() */
+ int _w; /* write space left for putc() */
+ short _flags; /* flags, below; this FILE is free if 0 */
+ short _file; /* fileno, if Unix descriptor, else -1 */
+ struct __sbuf _bf; /* the buffer (at least 1 byte, if !NULL) */
+ int _lbfsize; /* 0 or -_bf._size, for inline putc */
+
+ /* operations */
+ _PTR _cookie; /* cookie passed to io functions */
+
+ _READ_WRITE_RETURN_TYPE _EXFUN((*_read),(_PTR _cookie, char *_buf, int _n));
+ _READ_WRITE_RETURN_TYPE _EXFUN((*_write),(_PTR _cookie, const char *_buf,
+ int _n));
+ _fpos_t _EXFUN((*_seek),(_PTR _cookie, _fpos_t _offset, int _whence));
+ int _EXFUN((*_close),(_PTR _cookie));
+
+ /* separate buffer for long sequences of ungetc() */
+ struct __sbuf _ub; /* ungetc buffer */
+ unsigned char *_up; /* saved _p when _p is doing ungetc data */
+ int _ur; /* saved _r when _r is counting ungetc data */
+
+ /* tricks to meet minimum requirements even when malloc() fails */
+ unsigned char _ubuf[3]; /* guarantee an ungetc() buffer */
+ unsigned char _nbuf[1]; /* guarantee a getc() buffer */
+
+ /* separate buffer for fgetline() when line crosses buffer boundary */
+ struct __sbuf _lb; /* buffer for fgetline() */
+
+ /* Unix stdio files get aligned to block boundaries on fseek() */
+ int _blksize; /* stat.st_blksize (may be != _bf._size) */
+ int _offset; /* current lseek offset */
+
+ struct _reent *_data;
+};
+
+/*
+ * rand48 family support
+ *
+ * Copyright (c) 1993 Martin Birgmeier
+ * All rights reserved.
+ *
+ * You may redistribute unmodified or modified versions of this source
+ * code provided that the above copyright notice and this and the
+ * following conditions are retained.
+ *
+ * This software is provided ``as is'', and comes with no warranties
+ * of any kind. I shall in no event be liable for anything that happens
+ * to anyone/anything when using this software.
+ */
+#define _RAND48_SEED_0 (0x330e)
+#define _RAND48_SEED_1 (0xabcd)
+#define _RAND48_SEED_2 (0x1234)
+#define _RAND48_MULT_0 (0xe66d)
+#define _RAND48_MULT_1 (0xdeec)
+#define _RAND48_MULT_2 (0x0005)
+#define _RAND48_ADD (0x000b)
+struct _rand48 {
+ unsigned short _seed[3];
+ unsigned short _mult[3];
+ unsigned short _add;
+};
+
+/*
+ * struct _reent
+ *
+ * This structure contains *all* globals needed by the library.
+ * It's raison d'etre is to facilitate threads by making all library routines
+ * reentrant. IE: All state information is contained here.
+ */
+
+struct _reent
+{
+ /* local copy of errno */
+ int _errno;
+
+ /* FILE is a big struct and may change over time. To try to achieve binary
+ compatibility with future versions, put stdin,stdout,stderr here.
+ These are pointers into member __sf defined below. */
+ struct __sFILE *_stdin, *_stdout, *_stderr;
+
+ int _inc; /* used by tmpnam */
+ char _emergency[25];
+
+ int _current_category; /* used by setlocale */
+ _CONST char *_current_locale;
+
+ int __sdidinit; /* 1 means stdio has been init'd */
+
+ void _EXFUN((*__cleanup),(struct _reent *));
+
+ /* used by mprec routines */
+ struct _Bigint *_result;
+ int _result_k;
+ struct _Bigint *_p5s;
+ struct _Bigint **_freelist;
+
+ /* used by some fp conversion routines */
+ int _cvtlen; /* should be size_t */
+ char *_cvtbuf;
+
+ union
+ {
+ struct
+ {
+ unsigned int _unused_rand;
+ char * _strtok_last;
+ char _asctime_buf[26];
+ struct __tm _localtime_buf;
+ int _gamma_signgam;
+ __extension__ unsigned long long _rand_next;
+ struct _rand48 _r48;
+ } _reent;
+ /* Two next two fields were once used by malloc. They are no longer
+ used. They are used to preserve the space used before so as to
+ allow addition of new reent fields and keep binary compatibility. */
+ struct
+ {
+#define _N_LISTS 30
+ unsigned char * _nextf[_N_LISTS];
+ unsigned int _nmalloc[_N_LISTS];
+ } _unused;
+ } _new;
+
+ /* atexit stuff */
+ struct _atexit *_atexit; /* points to head of LIFO stack */
+ struct _atexit _atexit0; /* one guaranteed table, required by ANSI */
+
+ /* signal info */
+ void (**(_sig_func))(int);
+
+ /* These are here last so that __sFILE can grow without changing the offsets
+ of the above members (on the off chance that future binary compatibility
+ would be broken otherwise). */
+ struct _glue __sglue; /* root of glue chain */
+ struct __sFILE __sf[3]; /* first three file descriptors */
+};
+
+#define _NULL 0
+
+#define _REENT_INIT(var) \
+ { 0, &var.__sf[0], &var.__sf[1], &var.__sf[2], 0, "", 0, "C", \
+ 0, _NULL, _NULL, 0, _NULL, _NULL, 0, _NULL, { {0, _NULL, "", \
+ { 0,0,0,0,0,0,0,0}, 0, 1, \
+ {{_RAND48_SEED_0, _RAND48_SEED_1, _RAND48_SEED_2}, \
+ {_RAND48_MULT_0, _RAND48_MULT_1, _RAND48_MULT_2}, _RAND48_ADD}} } }
+
+/*
+ * All references to struct _reent are via this pointer.
+ * Internally, newlib routines that need to reference it should use _REENT.
+ */
+
+#ifndef __ATTRIBUTE_IMPURE_PTR__
+#define __ATTRIBUTE_IMPURE_PTR__
+#endif
+
+extern struct _reent *_impure_ptr __ATTRIBUTE_IMPURE_PTR__;
+
+void _reclaim_reent _PARAMS ((struct _reent *));
+
+/* #define _REENT_ONLY define this to get only reentrant routines */
+
+#ifndef _REENT_ONLY
+#define _REENT _impure_ptr
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SYS_REENT_H_ */
--- /dev/null
+/*-
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _SYS_TYPES_H_
+#define _SYS_TYPES_H_
+
+#include <sys/cdefs.h>
+#include <sys/inttypes.h>
+
+/* Machine type dependent parameters. */
+
+typedef unsigned char u_char;
+typedef unsigned short u_short;
+typedef unsigned int u_int;
+typedef unsigned long u_long;
+typedef unsigned short ushort; /* Sys V compatibility */
+typedef unsigned int uint; /* Sys V compatibility */
+
+typedef uint8_t u_int8_t;
+typedef uint16_t u_int16_t;
+typedef uint32_t u_int32_t;
+typedef uint64_t u_int64_t;
+
+typedef u_int64_t u_quad_t; /* quads */
+typedef int64_t quad_t;
+typedef quad_t * qaddr_t;
+
+typedef char * caddr_t; /* core address */
+typedef __const char * c_caddr_t; /* core address, pointer to const */
+typedef __volatile char *v_caddr_t; /* core address, pointer to volatile */
+typedef u_int32_t fixpt_t; /* fixed point number */
+typedef u_int32_t gid_t; /* group id */
+typedef u_int32_t in_addr_t; /* base type for internet address */
+typedef u_int16_t in_port_t;
+typedef u_int32_t ino_t; /* inode number */
+typedef long key_t; /* IPC key (for Sys V IPC) */
+typedef u_int16_t mode_t; /* permissions */
+typedef u_int16_t nlink_t; /* link count */
+typedef quad_t rlim_t; /* resource limit */
+typedef int32_t segsz_t; /* segment size */
+typedef int32_t swblk_t; /* swap offset */
+typedef int32_t ufs_daddr_t;
+typedef int32_t ufs_time_t;
+typedef u_int32_t uid_t; /* user id */
+
+#endif /* !_SYS_TYPES_H_ */
--- /dev/null
+
+/*
+ * Copyright (c) 2003 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: unistd.h,v 1.2 2003/02/07 12:56:30 diwil Exp $
+ */
+
+#ifndef __UNISTD_H__
+#define __UNISTD_H__
+
+/* linker defined vars */
+extern int _etext;
+extern int __data_start;
+extern int _edata;
+extern int __bss_start;
+extern int __bss_end;
+extern int __stack;
+extern int __noinit_start;
+extern int __noinit_end;
+extern int __data_start_rom;
+extern int __noinit_start_rom;
+extern int __noinit_end_rom;
+
+
+/* init routines from libgcc */
+extern void __attribute__((__noreturn__)) _reset_vector__(void);
+extern void __attribute__((__noreturn__)) _copy_data_init__(void);
+extern void __attribute__((__noreturn__)) _clear_bss_init__(void);
+
+/* fill up sections. returns data size copied */
+extern int _init_section__(int section);
+
+#define MSP430_SECTION_BSS 0
+#define MSP430_SECTION_DATA 1
+#define MSP430_SECTION_NOINIT 2
+
+#endif
--- /dev/null
+#
+# MSP430 libc
+#
+# $Id: Makefile,v 1.47 2008/05/17 02:44:59 cliechti Exp $
+#
+VERSION = 20050812
+
+# installation prefix (set this if you don't install by hand)
+
+#prefix = /usr
+prefix = /usr/local/msp430
+
+# name of target architecture (used for conform naming)
+
+target = msp430
+
+prefix_target = ${prefix}/${target}
+bindir = ${prefix_target}/bin
+includedir = ${prefix_target}/include
+libdir = ${prefix_target}/lib
+
+srcdir = .
+
+CC = ${target}-gcc
+AS = ${target}-gcc -x assembler-with-cpp
+AR = ${target}-ar
+RM = rm
+MD = mkdir -p $@
+INSTALL = install -c -m644 $^/
+
+ASFLAGS = -Wa,-gstabs -D_GNU_ASSEMBLER_
+CFLAGS = -Wall -O2 -g
+
+# make sure we can find our header files (not the installed ones)
+
+ALL_ASFLAGS += -I$(srcdir)/../include -I$(srcdir) ${ASFLAGS}
+ALL_CFLAGS += -I$(srcdir)/../include -I$(srcdir) ${CFLAGS}
+
+opt_speed_cflags = -O2
+
+# further declaration...
+ifdef gnu
+ source_dirs = gnu
+else
+ source_dirs = bsd
+endif
+
+source_dirs =
+
+VPATH = $(addprefix $(srcdir)/, $(source_dirs))
+
+all: build-crt build-libc build-libm
+
+install: install-crt install-libc install-headers install-libm
+
+clean: clean-crt clean-libc clean-libm
+
+
+crt_all_objs = \
+ crt430x110.o crt430x112.o \
+ crt430x1101.o crt430x1111.o crt430x1121.o \
+ crt430x1122.o crt430x1132.o \
+ crt430x122.o crt430x123.o \
+ crt430x1222.o crt430x1232.o \
+ crt430x133.o crt430x135.o \
+ crt430x1331.o crt430x1351.o \
+ crt430x147.o crt430x148.o crt430x149.o \
+ crt430x1471.o crt430x1481.o crt430x1491.o \
+ crt430x155.o crt430x156.o crt430x157.o \
+ crt430x167.o crt430x168.o crt430x169.o crt430x1610.o crt430x1611.o crt430x1612.o \
+ crt430x2001.o crt430x2011.o \
+ crt430x2002.o crt430x2012.o \
+ crt430x2003.o crt430x2013.o \
+ crt430x2101.o crt430x2111.o crt430x2121.o crt430x2131.o \
+ crt430x2234.o crt430x2254.o crt430x2274.o \
+ crt430x247.o crt430x248.o crt430x249.o crt430x2410.o \
+ crt430x2471.o crt430x2481.o crt430x2491.o \
+ crt430x2416.o crt430x2417.o crt430x2418.o crt430x2419.o \
+ crt430x2616.o crt430x2617.o crt430x2618.o crt430x2619.o \
+ crt430x311.o crt430x312.o crt430x313.o crt430x314.o crt430x315.o \
+ crt430x323.o crt430x325.o crt430x336.o crt430x337.o \
+ crt430x412.o crt430x413.o crt430x415.o crt430x417.o \
+ crt430x423.o crt430x425.o crt430x427.o \
+ crt430x4250.o crt430x4260.o crt430x4270.o \
+ crt430xE423.o crt430xE425.o crt430xE427.o \
+ crt430xW423.o crt430xW425.o crt430xW427.o \
+ crt430xG437.o crt430xG438.o crt430xG439.o \
+ crt430x435.o crt430x436.o crt430x437.o \
+ crt430x447.o crt430x448.o crt430x449.o \
+ crt430xG4616.o crt430xG4617.o crt430xG4618.o crt430xG4619.o
+
+build-crt: ${crt_all_objs}
+
+# match by name
+
+${crt_all_objs}: crt%.o: gcrt0.S
+ ${AS} ${CPPFLAGS} -mmcu=msp$* ${ALL_ASFLAGS} -c $(ABSPATH)$< -o $@
+
+clean-crt:
+ ${RM} -f ${crt_all_objs}
+
+install-crt: ${crt_all_objs} ${libdir}
+ ${INSTALL}
+
+#--------------- a bit of libc
+
+libc_libs = msp1/libc.a msp2/libc.a
+
+libc_c_sources = abs.c atol.c bsearch.c errno.c labs.c \
+_init_section__.c malloc.c atoi.c strtol.c strtoul.c \
+sprintf.c snprintf.c vsprintf.c vsnprintf.c \
+printf.c vprintf.c vuprintf.c uprintf.c puts.c \
+rand.c itoa.c ltoa.c utoa.c ultoa.c
+
+libc_asm_sources = abort.S div.S exit.S ldiv.S setjmp.S
+
+libc_str_sources = \
+isascii.c memccpy.c strchr.c strncat.c swab.c \
+isblank.c memchr.c strcmp.c strncmp.c toascii.c \
+bcmp.c iscntrl.c memcmp.c strcpy.c strncpy.c tolower.c \
+bcopy.c isdigit.c memcpy.c strcspn.c strpbrk.c toupper.c \
+bzero.c islower.c memmove.c strdup.c strrchr.c \
+ffs.c isprint.c memset.c strlcat.c strsep.c \
+index.c isspace.c rindex.c strlcpy.c strspn.c \
+isalnum.c isupper.c strcasecmp.c strlen.c strstr.c \
+isalpha.c isxdigit.c strcat.c strncasecmp.c strtok.c \
+ispunct.c
+
+
+
+libc_msp430_ct_objs_1 = ${libc_c_sources:%.c=%.o}
+libc_msp430_ct_objs_2 = ${libc_c_sources:%.c=%.o}
+
+libc_msp430_asmt_objs_1 = ${libc_asm_sources:%.S=%.o}
+libc_msp430_asmt_objs_2 = ${libc_asm_sources:%.S=%.o}
+
+
+
+libc_msp430_c_objs_1 = $(addprefix msp1/, $(libc_msp430_ct_objs_1))
+libc_msp430_c_objs_2 = $(addprefix msp2/, $(libc_msp430_ct_objs_2))
+
+libc_msp430_S_objs_1 = $(addprefix msp1/, $(libc_msp430_asmt_objs_1))
+libc_msp430_S_objs_2 = $(addprefix msp2/, $(libc_msp430_asmt_objs_2))
+
+
+libc_msp430_objs_1 = ${libc_msp430_c_objs_1}
+libc_msp430_objs_2 = ${libc_msp430_c_objs_2}
+
+
+build-libc: mspdirs ${libc_libs}
+
+mspdirs:
+ mkdir -p msp1 msp2
+
+${libc_msp430_objs_1}: msp1/%.o: stdlib/%.c
+ ${CC} -c ${CPPFLAGS} ${ALL_CFLAGS} -mmcu=msp1 -c $(ABSPATH)$< -o $@
+
+${libc_msp430_objs_2}: msp2/%.o: stdlib/%.c
+ ${CC} -c ${CPPFLAGS} ${ALL_CFLAGS} -mmcu=msp2 -c $(ABSPATH)$< -o $@
+
+${libc_msp430_S_objs_1}: msp1/%.o: stdlib/%.S
+ ${AS} -D_GNU_ASSEMBLER_ -mmcu=msp1 -c $(ABSPATH)$< -o $@
+
+${libc_msp430_S_objs_2}: msp2/%.o: stdlib/%.S
+ ${AS} -D_GNU_ASSEMBLER_ -mmcu=msp2 -c $(ABSPATH)$< -o $@
+
+libc_msp430_cstr_objs_1 = ${libc_str_sources:%.c=%.o}
+libc_msp430_cstr_objs_2 = ${libc_str_sources:%.c=%.o}
+
+libc_msp430_str_objs_1 = $(addprefix msp1/, $(libc_msp430_cstr_objs_1))
+libc_msp430_str_objs_2 = $(addprefix msp2/, $(libc_msp430_cstr_objs_2))
+
+
+${libc_msp430_str_objs_1}: msp1/%.o: string/%.c
+ ${CC} -c ${CPPFLAGS} ${ALL_CFLAGS} -mmcu=msp1 -c $(ABSPATH)$< -o $@
+
+${libc_msp430_str_objs_2}: msp2/%.o: string/%.c
+ ${CC} -c ${CPPFLAGS} ${ALL_CFLAGS} -mmcu=msp2 -c $(ABSPATH)$< -o $@
+
+
+all_objs1 = ${libc_msp430_objs_1} ${libc_msp430_str_objs_1} ${libc_msp430_S_objs_1}
+all_objs2 = ${libc_msp430_objs_2} ${libc_msp430_str_objs_2} ${libc_msp430_S_objs_2}
+
+msp1/libc.a: ${all_objs1}
+ ${AR} rc $@ $?
+
+msp2/libc.a: ${all_objs2}
+ ${AR} rc $@ $?
+
+.PHONY: clean-libc
+clean-libc:
+ ${RM} -f msp1/libc.a msp2/libc.a msp1/*.o msp2/*.o
+
+install-libc: ins-msp1 ins-msp2 ins-lib
+
+ins-msp1: msp1/libc.a ${libdir}/msp1
+ ${INSTALL}
+
+ins-msp2: msp2/libc.a ${libdir}/msp2
+ ${INSTALL}
+
+ins-lib: msp1/libc.a ${libdir}
+ ${INSTALL}
+
+#--------------- headers ---------------
+
+install-headers: ins-hr ins-hs ins-msp430
+
+ins-hr: $(wildcard $(srcdir)/../include/*.h) ${includedir}
+ ${INSTALL}
+
+ins-hs: $(wildcard $(srcdir)/../include/sys/*.h) ${includedir}/sys
+ ${INSTALL}
+
+ins-msp430: $(wildcard $(srcdir)/../include/msp430/*.h) ${includedir}/msp430
+ ${INSTALL}
+
+fix-limits: $(wildcard $(srcdir)/../include/limits.h) ${includedir}/../../lib/gcc-lib/msp430/3.0/include
+ ${INSTALL}
+
+#--------------- directories ---------------
+libc_dirs = msp1 msp2
+install_lib_dirs = $(libdir) $(libdir)/msp1 $(libdir)/msp2
+
+$(libc_dirs) $(install_lib_dirs) $(includedir) $(includedir)/sys $(includedir)/msp430:
+ $(MD)
+
+
+#------------------------------------------------------------------------
+#------------------------------------------------------------------------
+#------------------------------------------------------------------------
+#------------------------------------------------------------------------
+#-------------- Math & FP libs ---------------
+
+math: build-libm
+
+
+basic_fp = divsf.c fixsfsi.c floatdisf.c gtsf.c mulsf.c \
+addsf.c eqsf.c fixunssfdi.c floatsisf.c lesf.c negsf.c \
+cmpsf.c fixsfdi.c fixunssfsi.c gesf.c ltsf.c subsf.c nesf.c
+
+fppfunc = ef_acos.c ef_hypot.c ef_remainder.c kf_sin.c sf_erf.c sf_isinf.c sf_rint.c \
+ef_acosh.c ef_j0.c ef_scalb.c kf_tan.c sf_expm1.c sf_isnan.c sf_scalbn.c \
+ef_asin.c ef_j1.c ef_sinh.c sf_asinh.c sf_fabs.c sf_ldexp.c sf_signif.c \
+ef_atan2.c ef_jn.c ef_sqrt.c sf_atan.c sf_finite.c sf_log1p.c sf_sin.c \
+ef_atanh.c ef_log.c erf_gamma.c sf_cbrt.c sf_floor.c sf_logb.c sf_tan.c \
+ef_cosh.c ef_log10.c erf_lgamma.c sf_ceil.c sf_frexp.c sf_modf.c sf_tanh.c \
+ef_exp.c ef_pow.c kf_cos.c sf_copysign.c sf_ilogb.c sf_nan.c \
+ef_fmod.c ef_rem_pio2.c kf_rem_pio2.c sf_cos.c sf_infinity.c sf_nextafter.c
+
+
+libm_libs = msp1/libm.a msp2/libm.a msp1/libfp.a msp2/libfp.a
+
+libm_msp430_fp_objs_1 = ${basic_fp:%.c=%.o}
+libm_msp430_fp_objs_2 = ${basic_fp:%.c=%.o}
+
+libm_msp430_fc_objs_1 = ${fppfunc:%.c=%.o}
+libm_msp430_fc_objs_2 = ${fppfunc:%.c=%.o}
+
+
+libm_msp430_c_objs_1 = $(addprefix msp1/, $(libm_msp430_fp_objs_1))
+libm_msp430_c_objs_2 = $(addprefix msp2/, $(libm_msp430_fp_objs_2))
+
+libm_msp430_cf_objs_1 = $(addprefix msp1/, $(libm_msp430_fc_objs_1))
+libm_msp430_cf_objs_2 = $(addprefix msp2/, $(libm_msp430_fc_objs_2))
+
+
+build-libm: ${libm_libs}
+
+${libm_msp430_c_objs_1}: msp1/%.o: libm/%.c
+ ${CC} -c ${CPPFLAGS} ${ALL_CFLAGS} -mmcu=msp1 -c $(ABSPATH)$< -o $@
+
+${libm_msp430_c_objs_2}: msp2/%.o: libm/%.c
+ ${CC} -c ${CPPFLAGS} ${ALL_CFLAGS} -mmcu=msp2 -c $(ABSPATH)$< -o $@
+
+
+${libm_msp430_cf_objs_1}: msp1/%.o: libm/%.c
+ ${CC} ${CPPFLAGS} -mmcu=msp1 ${ALL_CFLAGS} -c $(ABSPATH)$< -o $@
+
+${libm_msp430_cf_objs_2}: msp2/%.o: libm/%.c
+ ${CC} ${CPPFLAGS} -mmcu=msp2 ${ALL_CFLAGS} -c $(ABSPATH)$< -o $@
+
+
+allm_objs1 = ${libm_msp430_cf_objs_1}
+allm_objs2 = ${libm_msp430_cf_objs_2}
+
+msp1/libm.a: ${allm_objs1}
+ ${AR} rc $@ $?
+
+msp2/libm.a: ${allm_objs2}
+ ${AR} rc $@ $?
+
+msp1/libfp.a:${libm_msp430_c_objs_1}
+ ${AR} rc $@ $?
+
+msp2/libfp.a:${libm_msp430_c_objs_2}
+ ${AR} rc $@ $?
+
+install-libm: insm-msp1 insm-msp2 insm-lib
+
+insm-msp1: msp1/libm.a msp1/libfp.a ${libdir}/msp1
+ ${INSTALL}
+
+insm-msp2: msp2/libm.a msp2/libfp.a ${libdir}/msp2
+ ${INSTALL}
+
+insm-lib: msp1/libm.a ${libdir}
+ ${INSTALL}
+
+.PHONY: clean-libm
+clean-libm:
+ ${RM} -f msp1/libm.a msp2/libm.a msp1/libfp.a msp2/libfp.a msp1/*.o msp2/*.o
--- /dev/null
+/*-
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <stdlib.h>
+
+typedef int cmp_t(const void *, const void *);
+static char *med3(char *, char *, char *, cmp_t *);
+static void swapfunc(char *, char *, int);
+
+#define min(a, b) ((a) < (b) ? (a) : (b))
+
+/*
+ * Qsort routine from Bentley & McIlroy's "Engineering a Sort Function".
+ */
+#define swapcode(TYPE, parmi, parmj, n) { \
+ int i = (n) / sizeof (TYPE); \
+ register TYPE *pi = (TYPE *) (parmi); \
+ register TYPE *pj = (TYPE *) (parmj); \
+ do { \
+ register TYPE t = *pi; \
+ *pi++ = *pj; \
+ *pj++ = t; \
+ } while (--i > 0); \
+}
+
+static void
+swapfunc(a, b, n)
+ char *a, *b;
+ int n;
+{
+ swapcode(char, a, b, n)
+}
+
+#define swap(a, b) swapfunc(a, b, es)
+
+#define vecswap(a, b, n) if ((n) > 0) swapfunc(a, b, n)
+
+static char *
+med3(a, b, c, cmp)
+ char *a, *b, *c;
+ cmp_t *cmp;
+{
+ return cmp(a, b) < 0 ?
+ (cmp(b, c) < 0 ? b : (cmp(a, c) < 0 ? c : a ))
+ :(cmp(b, c) > 0 ? b : (cmp(a, c) < 0 ? a : c ));
+}
+
+void
+qsort(a, n, es, cmp)
+ void *a;
+ size_t n, es;
+ cmp_t *cmp;
+{
+ char *pa, *pb, *pc, *pd, *pl, *pm, *pn;
+ int d, r, swap_cnt;
+
+loop:
+ swap_cnt = 0;
+ if (n < 7) {
+ for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es)
+ for (pl = pm; pl > (char *)a && cmp(pl - es, pl) > 0;
+ pl -= es)
+ swap(pl, pl - es);
+ return;
+ }
+ pm = (char *)a + (n / 2) * es;
+ if (n > 7) {
+ pl = a;
+ pn = (char *)a + (n - 1) * es;
+ if (n > 40) {
+ d = (n / 8) * es;
+ pl = med3(pl, pl + d, pl + 2 * d, cmp);
+ pm = med3(pm - d, pm, pm + d, cmp);
+ pn = med3(pn - 2 * d, pn - d, pn, cmp);
+ }
+ pm = med3(pl, pm, pn, cmp);
+ }
+ swap(a, pm);
+ pa = pb = (char *)a + es;
+
+ pc = pd = (char *)a + (n - 1) * es;
+ for (;;) {
+ while (pb <= pc && (r = cmp(pb, a)) <= 0) {
+ if (r == 0) {
+ swap_cnt = 1;
+ swap(pa, pb);
+ pa += es;
+ }
+ pb += es;
+ }
+ while (pb <= pc && (r = cmp(pc, a)) >= 0) {
+ if (r == 0) {
+ swap_cnt = 1;
+ swap(pc, pd);
+ pd -= es;
+ }
+ pc -= es;
+ }
+ if (pb > pc)
+ break;
+ swap(pb, pc);
+ swap_cnt = 1;
+ pb += es;
+ pc -= es;
+ }
+ if (swap_cnt == 0) { /* Switch to insertion sort */
+ for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es)
+ for (pl = pm; pl > (char *)a && cmp(pl - es, pl) > 0;
+ pl -= es)
+ swap(pl, pl - es);
+ return;
+ }
+
+ pn = (char *)a + n * es;
+ r = min(pa - (char *)a, pb - pa);
+ vecswap(a, pb - r, r);
+ r = min(pd - pc, pn - pd - es);
+ vecswap(pb, pn - r, r);
+ if ((r = pb - pa) > es)
+ qsort(a, r / es, es, cmp);
+ if ((r = pd - pc) > es) {
+ /* Iterate rather than recurse to save stack space */
+ a = pn - r;
+ n = r / es;
+ goto loop;
+ }
+/* qsort(pn - r, r / es, es, cmp);*/
+}
+
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)strtol.c 8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+
+#include <limits.h>
+#include <ctype.h>
+#include <errno.h>
+#include <stdlib.h>
+
+
+/*
+ * Convert a string to a long integer.
+ *
+ * Ignores `locale' stuff. Assumes that the upper and lower case
+ * alphabets and digits are each contiguous.
+ */
+long
+strtol(nptr, endptr, base)
+ const char *nptr;
+ char **endptr;
+ register int base;
+{
+ register const char *s = nptr;
+ register unsigned long acc;
+ register unsigned char c;
+#if 0
+ register unsigned long cutoff;
+ register int cutlim;
+#else
+ ldiv_t cut;
+#define cutoff (cut.quot)
+#define cutlim ((int) cut.rem)
+#endif
+ register int neg = 0, any;
+
+ /*
+ * Skip white space and pick up leading +/- sign if any.
+ * If base is 0, allow 0x for hex and 0 for octal, else
+ * assume decimal; if base is already 16, allow 0x.
+ */
+ do {
+ c = *s++;
+ } while (isspace(c));
+ if (c == '-') {
+ neg = 1;
+ c = *s++;
+ } else if (c == '+')
+ c = *s++;
+ if ((base == 0 || base == 16) &&
+ c == '0' && (*s == 'x' || *s == 'X')) {
+ c = s[1];
+ s += 2;
+ base = 16;
+ }
+ if (base == 0)
+ base = c == '0' ? 8 : 10;
+
+ /*
+ * Compute the cutoff value between legal numbers and illegal
+ * numbers. That is the largest legal value, divided by the
+ * base. An input number that is greater than this value, if
+ * followed by a legal input character, is too big. One that
+ * is equal to this value may be valid or not; the limit
+ * between valid and invalid numbers is then based on the last
+ * digit. For instance, if the range for longs is
+ * [-2147483648..2147483647] and the input base is 10,
+ * cutoff will be set to 214748364 and cutlim to either
+ * 7 (neg==0) or 8 (neg==1), meaning that if we have accumulated
+ * a value > 214748364, or equal but the next digit is > 7 (or 8),
+ * the number is too big, and we will return a range error.
+ *
+ * Set any if any `digits' consumed; make it negative to indicate
+ * overflow.
+ */
+#if 0
+ cutoff = neg ? -(unsigned long)LONG_MIN : LONG_MAX;
+ cutlim = cutoff % (unsigned long)base;
+ cutoff /= (unsigned long)base;
+#else
+ cut = ldiv(neg ? -(unsigned long)LONG_MIN : LONG_MAX,
+ (unsigned long)base);
+#endif
+ for (acc = 0, any = 0;; c = *s++) {
+ if (!isascii(c))
+ break;
+ if (isdigit(c))
+ c -= '0';
+ else if (isalpha(c))
+ c -= isupper(c) ? 'A' - 10 : 'a' - 10;
+ else
+ break;
+ if (c >= base)
+ break;
+ if (any < 0 || acc > cutoff || (acc == cutoff && c > cutlim))
+ any = -1;
+ else {
+ any = 1;
+ acc *= base;
+ acc += c;
+ }
+ }
+ if (any < 0) {
+ acc = neg ? LONG_MIN : LONG_MAX;
+ errno = ERANGE;
+ } else if (neg)
+ acc = -acc;
+ if (endptr != 0)
+ *endptr = (char *)(any ? s - 1 : nptr);
+ return (acc);
+}
--- /dev/null
+/*
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)strtoul.c 8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+
+#include <limits.h>
+#include <ctype.h>
+#include <errno.h>
+#include <stdlib.h>
+
+/*
+ * Convert a string to an unsigned long integer.
+ *
+ * Ignores `locale' stuff. Assumes that the upper and lower case
+ * alphabets and digits are each contiguous.
+ */
+unsigned long
+strtoul(nptr, endptr, base)
+ const char *nptr;
+ char **endptr;
+ register int base;
+{
+ register const char *s = nptr;
+ register unsigned long acc;
+ register unsigned char c;
+#if 0
+ register unsigned long cutoff;
+ register int cutlim;
+#else
+ ldiv_t cut;
+#define cutoff (cut.quot)
+#define cutlim ((int) cut.rem)
+#endif
+ register int neg = 0, any;
+
+ /*
+ * See strtol for comments as to the logic used.
+ */
+ do {
+ c = *s++;
+ } while (isspace(c));
+ if (c == '-') {
+ neg = 1;
+ c = *s++;
+ } else if (c == '+')
+ c = *s++;
+ if ((base == 0 || base == 16) &&
+ c == '0' && (*s == 'x' || *s == 'X')) {
+ c = s[1];
+ s += 2;
+ base = 16;
+ }
+ if (base == 0)
+ base = c == '0' ? 8 : 10;
+#if 0
+ cutoff = (unsigned long)ULONG_MAX / (unsigned long)base;
+ cutlim = (unsigned long)ULONG_MAX % (unsigned long)base;
+#else
+ cut = ldiv((unsigned long)ULONG_MAX, (unsigned long)base);
+#endif
+ for (acc = 0, any = 0;; c = *s++) {
+ if (!isascii(c))
+ break;
+ if (isdigit(c))
+ c -= '0';
+ else if (isalpha(c))
+ c -= isupper(c) ? 'A' - 10 : 'a' - 10;
+ else
+ break;
+ if (c >= base)
+ break;
+ if (any < 0 || acc > cutoff || (acc == cutoff && c > cutlim))
+ any = -1;
+ else {
+ any = 1;
+ acc *= base;
+ acc += c;
+ }
+ }
+ if (any < 0) {
+ acc = ULONG_MAX;
+ errno = ERANGE;
+ } else if (neg)
+ acc = -acc;
+ if (endptr != 0)
+ *endptr = (char *)(any ? s - 1 : nptr);
+ return (acc);
+}
--- /dev/null
+/* Copyright (C) 2001 Dmitry Diky <diwil@mail.ru>
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+author gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file. (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+General Public License for more details. */
+
+
+;; -*- mode: asm -*-
+
+#include <io.h>
+
+/***************************************************************
+ * Interrupt Vectors:
+ * WARNING!!! All vectors must be defined here!!!
+ * User may not define its interrupt service routines!
+ ***************************************************************/
+
+ .weak _unexpected_
+ .global _unexpected_1_
+
+ .text
+ .p2align 1,0
+
+_unexpected_1_:
+ br #_unexpected_
+_unexpected_:
+ reti
+
+.section .vectors, "ax", @progbits
+
+.macro VEC name
+ .weak \name
+ .set \name, _unexpected_1_
+ .word \name
+.endm
+
+.global InterruptVectors
+ .type InterruptVectors, @object
+
+#if defined(__MSP430X__)
+ .size InterruptVectors, 0x40
+InterruptVectors:
+/* c0 */ VEC vector_ffc0
+/* c2 */ VEC vector_ffc2
+/* c4 */ VEC vector_ffc4
+/* c6 */ VEC vector_ffc6
+/* c8 */ VEC vector_ffc8
+/* ca */ VEC vector_ffca
+/* cc */ VEC vector_ffcc
+/* ce */ VEC vector_ffce
+/* d0 */ VEC vector_ffd0
+/* d2 */ VEC vector_ffd2
+/* d4 */ VEC vector_ffd4
+/* d6 */ VEC vector_ffd6
+/* d8 */ VEC vector_ffd8
+/* da */ VEC vector_ffda
+/* dc */ VEC vector_ffdc
+/* de */ VEC vector_ffde
+#else
+ .size InterruptVectors, 0x20
+InterruptVectors:
+#endif
+/* e0 */ VEC vector_ffe0
+/* e2 */ VEC vector_ffe2
+/* e4 */ VEC vector_ffe4
+/* e6 */ VEC vector_ffe6
+/* e8 */ VEC vector_ffe8
+/* ea */ VEC vector_ffea
+/* ec */ VEC vector_ffec
+/* ee */ VEC vector_ffee
+/* f0 */ VEC vector_fff0
+/* f2 */ VEC vector_fff2
+/* f4 */ VEC vector_fff4
+/* f6 */ VEC vector_fff6
+/* f8 */ VEC vector_fff8
+/* fa */ VEC vector_fffa
+/* fc */ VEC vector_fffc
+ .word _reset_vector__
+
+/* end of Interrupt vectors declarations */
--- /dev/null
+/* Copyright (C) 1991, 1992 Free Software Foundation, Inc.
+This file is part of the GNU C Library.
+Written by Douglas C. Schmidt (schmidt@ics.uci.edu).
+
+The GNU C Library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public License as
+published by the Free Software Foundation; either version 2 of the
+License, or (at your option) any later version.
+
+The GNU C Library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with the GNU C Library; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 675 Mass Ave,
+Cambridge, MA 02139, USA. */
+
+/* #include <ansidecl.h> */
+#include <stdlib.h>
+#include <string.h>
+
+#define __alloca __builtin_alloca
+#define _quicksort qsort
+
+/* Byte-wise swap two items of size SIZE. */
+#define SWAP(a, b, size) \
+ do \
+ { \
+ register size_t __size = (size); \
+ register char *__a = (a), *__b = (b); \
+ do \
+ { \
+ char __tmp = *__a; \
+ *__a++ = *__b; \
+ *__b++ = __tmp; \
+ } while (--__size > 0); \
+ } while (0)
+
+/* Discontinue quicksort algorithm when partition gets below this size.
+ This particular magic number was chosen to work best on a Sun 4/260. */
+#define MAX_THRESH 4
+
+/* Stack node declarations used to store unfulfilled partition obligations. */
+typedef struct
+ {
+ char *lo;
+ char *hi;
+ } stack_node;
+
+/* The next 4 #defines implement a very fast in-line stack abstraction. */
+#define STACK_SIZE (8 * sizeof(unsigned long int))
+#define PUSH(low, high) ((void) ((top->lo = (low)), (top->hi = (high)), ++top))
+#define POP(low, high) ((void) (--top, (low = top->lo), (high = top->hi)))
+#define STACK_NOT_EMPTY (stack < top)
+
+
+/* Order size using quicksort. This implementation incorporates
+ four optimizations discussed in Sedgewick:
+
+ 1. Non-recursive, using an explicit stack of pointer that store the
+ next array partition to sort. To save time, this maximum amount
+ of space required to store an array of MAX_INT is allocated on the
+ stack. Assuming a 32-bit integer, this needs only 32 *
+ sizeof(stack_node) == 136 bits. Pretty cheap, actually.
+
+ 2. Chose the pivot element using a median-of-three decision tree.
+ This reduces the probability of selecting a bad pivot value and
+ eliminates certain extraneous comparisons.
+
+ 3. Only quicksorts TOTAL_ELEMS / MAX_THRESH partitions, leaving
+ insertion sort to order the MAX_THRESH items within each partition.
+ This is a big win, since insertion sort is faster for small, mostly
+ sorted array segements.
+
+ 4. The larger of the two sub-partitions is always pushed onto the
+ stack first, with the algorithm then concentrating on the
+ smaller partition. This *guarantees* no more than log (n)
+ stack size is needed (actually O(1) in this case)! */
+
+void
+_quicksort (void *pbase, size_t total_elems, size_t size, __compar_fn_t cmp)
+{
+ register char *base_ptr = (char *) pbase;
+
+ /* Allocating SIZE bytes for a pivot buffer facilitates a better
+ algorithm below since we can do comparisons directly on the pivot. */
+ char *pivot_buffer = (char *) __alloca (size);
+ const size_t max_thresh = MAX_THRESH * size;
+
+ if (total_elems == 0)
+ /* Avoid lossage with unsigned arithmetic below. */
+ return;
+
+ if (total_elems > MAX_THRESH)
+ {
+ char *lo = base_ptr;
+ char *hi = &lo[size * (total_elems - 1)];
+ /* Largest size needed for 32-bit int!!! */
+ stack_node stack[STACK_SIZE];
+ stack_node *top = stack + 1;
+
+ while (STACK_NOT_EMPTY)
+ {
+ char *left_ptr;
+ char *right_ptr;
+
+ char *pivot = pivot_buffer;
+
+ /* Select median value from among LO, MID, and HI. Rearrange
+ LO and HI so the three values are sorted. This lowers the
+ probability of picking a pathological pivot value and
+ skips a comparison for both the LEFT_PTR and RIGHT_PTR. */
+
+ char *mid = lo + size * ((hi - lo) / size >> 1);
+
+ if ((*cmp)((void *) mid, (void *) lo) < 0)
+ SWAP(mid, lo, size);
+ if ((*cmp)((void *) hi, (void *) mid) < 0)
+ SWAP(mid, hi, size);
+ else
+ goto jump_over;
+ if ((*cmp)((void *) mid, (void *) lo) < 0)
+ SWAP(mid, lo, size);
+ jump_over:;
+ memcpy(pivot, mid, size);
+ pivot = pivot_buffer;
+
+ left_ptr = lo + size;
+ right_ptr = hi - size;
+
+ /* Here's the famous ``collapse the walls'' section of quicksort.
+ Gotta like those tight inner loops! They are the main reason
+ that this algorithm runs much faster than others. */
+ do
+ {
+ while ((*cmp)((void *) left_ptr, (void *) pivot) < 0)
+ left_ptr += size;
+
+ while ((*cmp)((void *) pivot, (void *) right_ptr) < 0)
+ right_ptr -= size;
+
+ if (left_ptr < right_ptr)
+ {
+ SWAP(left_ptr, right_ptr, size);
+ left_ptr += size;
+ right_ptr -= size;
+ }
+ else if (left_ptr == right_ptr)
+ {
+ left_ptr += size;
+ right_ptr -= size;
+ break;
+ }
+ }
+ while (left_ptr <= right_ptr);
+
+ /* Set up pointers for next iteration. First determine whether
+ left and right partitions are below the threshold size. If so,
+ ignore one or both. Otherwise, push the larger partition's
+ bounds on the stack and continue sorting the smaller one. */
+
+ if ((size_t) (right_ptr - lo) <= max_thresh)
+ {
+ if ((size_t) (hi - left_ptr) <= max_thresh)
+ /* Ignore both small partitions. */
+ POP(lo, hi);
+ else
+ /* Ignore small left partition. */
+ lo = left_ptr;
+ }
+ else if ((size_t) (hi - left_ptr) <= max_thresh)
+ /* Ignore small right partition. */
+ hi = right_ptr;
+ else if ((right_ptr - lo) > (hi - left_ptr))
+ {
+ /* Push larger left partition indices. */
+ PUSH(lo, right_ptr);
+ lo = left_ptr;
+ }
+ else
+ {
+ /* Push larger right partition indices. */
+ PUSH(left_ptr, hi);
+ hi = right_ptr;
+ }
+ }
+ }
+
+ /* Once the BASE_PTR array is partially sorted by quicksort the rest
+ is completely sorted using insertion sort, since this is efficient
+ for partitions below MAX_THRESH size. BASE_PTR points to the beginning
+ of the array to sort, and END_PTR points at the very last element in
+ the array (*not* one beyond it!). */
+
+#define min(x, y) ((x) < (y) ? (x) : (y))
+
+ {
+ char *const end_ptr = &base_ptr[size * (total_elems - 1)];
+ char *tmp_ptr = base_ptr;
+ char *thresh = min(end_ptr, base_ptr + max_thresh);
+ register char *run_ptr;
+
+ /* Find smallest element in first threshold and place it at the
+ array's beginning. This is the smallest array element,
+ and the operation speeds up insertion sort's inner loop. */
+
+ for (run_ptr = tmp_ptr + size; run_ptr <= thresh; run_ptr += size)
+ if ((*cmp)((void *) run_ptr, (void *) tmp_ptr) < 0)
+ tmp_ptr = run_ptr;
+
+ if (tmp_ptr != base_ptr)
+ SWAP(tmp_ptr, base_ptr, size);
+
+ /* Insertion sort, running from left-hand-side up to right-hand-side. */
+
+ run_ptr = base_ptr + size;
+ while ((run_ptr += size) <= end_ptr)
+ {
+ tmp_ptr = run_ptr - size;
+ while ((*cmp)((void *) run_ptr, (void *) tmp_ptr) < 0)
+ tmp_ptr -= size;
+
+ tmp_ptr += size;
+ if (tmp_ptr != run_ptr)
+ {
+ char *trav;
+
+ trav = run_ptr + size;
+ while (--trav >= run_ptr)
+ {
+ char c = *trav;
+ char *hi, *lo;
+
+ for (hi = lo = trav; (lo -= size) >= tmp_ptr; hi = lo)
+ *hi = *lo;
+ *hi = c;
+ }
+ }
+ }
+ }
+}
+
--- /dev/null
+/* Copyright (C) 1991, 1992 Free Software Foundation, Inc.
+This file is part of the GNU C Library.
+
+The GNU C Library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public License as
+published by the Free Software Foundation; either version 2 of the
+License, or (at your option) any later version.
+
+The GNU C Library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with the GNU C Library; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 675 Mass Ave,
+Cambridge, MA 02139, USA. */
+
+#include <ctype.h>
+#include <limits.h>
+#include <stddef.h>
+#include <stdlib.h>
+#include <errno.h>
+
+#ifndef UNSIGNED
+#define UNSIGNED 0
+#endif
+
+/* Convert NPTR to an `unsigned long int' or `long int' in base BASE.
+ If BASE is 0 the base is determined by the presence of a leading
+ zero, indicating octal or a leading "0x" or "0X", indicating hexadecimal.
+ If BASE is < 2 or > 36, it is reset to 10.
+ If ENDPTR is not NULL, a pointer to the character after the last
+ one converted is stored in *ENDPTR. */
+#if UNSIGNED
+unsigned long int
+#define strtol strtoul
+#else
+long int
+#endif
+strtol (__const char *nptr, char **endptr,
+ int inbase)
+{
+ int negative;
+#if 0
+ register unsigned long int cutoff;
+ register unsigned int cutlim;
+#endif
+ register unsigned long int i;
+ register const char *s;
+ register unsigned char c;
+ unsigned char base;
+ const char *save;
+ char overflow;
+ ldiv_t cutres;
+#define cutoff cutres.quot
+#define cutlim (int)cutres.rem
+
+ if (inbase < 0 || inbase == 1 || inbase > 36)
+ base = 10;
+ else
+ base = inbase;
+
+ s = nptr;
+
+ /* Skip white space. */
+ while (isblank(*s))
+ ++s;
+ if (*s == '\0')
+ goto noconv;
+
+ /* Check for a sign. */
+ negative = 0;
+ if (*s == '-')
+ {
+ ++negative;
+ ++s;
+ }
+ else if (*s == '+')
+ ++s;
+
+ if (base == 16 && s[0] == '0' && toupper(s[1]) == 'X')
+ s += 2;
+
+ /* If BASE is zero, figure it out ourselves. */
+ if (base == 0) {
+ if (*s == '0')
+ {
+ if (toupper(s[1]) == 'X')
+ {
+ s += 2;
+ base = 16;
+ }
+ else
+ base = 8;
+ }
+ else
+ base = 10;
+ }
+
+ /* Save the pointer so we can check later if anything happened. */
+ save = s;
+
+ cutres = ldiv (ULONG_MAX, (unsigned long int) base);
+
+ /*
+ cutoff = ULONG_MAX / (unsigned long int) base;
+ cutlim = ULONG_MAX % (unsigned long int) base;
+ */
+
+ overflow = 0;
+ i = 0;
+ for (c = *s; c != '\0'; c = *++s)
+ {
+ if (isdigit(c))
+ c -= '0';
+ else if (isalpha(c))
+ c = toupper(c) - 'A' + 10;
+ else
+ break;
+ if (c >= base)
+ break;
+ /* Check for overflow. */
+ if (i > cutoff || (i == cutoff && c > cutlim))
+ overflow = 1;
+ else
+ {
+ i *= (unsigned long int) base;
+ i += c;
+ }
+ }
+
+ /* Check if anything actually happened. */
+ if (s == save)
+ goto noconv;
+
+ /* Store in ENDPTR the address of one character
+ past the last character we converted. */
+ if (endptr != NULL)
+ *endptr = (char *) s;
+
+#if !UNSIGNED
+ /* Check for a value that is within the range of
+ `unsigned long int', but outside the range of `long int'. */
+ if (i > (negative ?
+ - (unsigned long int) LONG_MIN : (unsigned long int) LONG_MAX))
+ overflow = 1;
+#endif
+
+ if (overflow)
+ {
+ errno = ERANGE;
+#if UNSIGNED
+ return ULONG_MAX;
+#else
+ return negative ? LONG_MIN : LONG_MAX;
+#endif
+ }
+
+ /* Return the result of the appropriate sign. */
+ return (negative ? - i : i);
+
+ noconv:
+ /* There was no number to convert. */
+ if (endptr != NULL)
+ *endptr = (char *) nptr;
+ return 0L;
+}
+
--- /dev/null
+/* Copyright (C) 1991 Free Software Foundation, Inc.
+This file is part of the GNU C Library.
+
+The GNU C Library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public License as
+published by the Free Software Foundation; either version 2 of the
+License, or (at your option) any later version.
+
+The GNU C Library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with the GNU C Library; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 675 Mass Ave,
+Cambridge, MA 02139, USA. */
+
+#define UNSIGNED 1
+
+#include "strtol.c"
--- /dev/null
+2003-08-07 Chris Takahashi <ctakahashi (_at_) users.sourceforge.net>
+ Modified files:
+ subsf.c
+
+ * subsf.c: Optimized floating-point subtract function. Zero check handled
+ by __addsf3(). Tested using simu with the following cases:
+ waldorf.csc.calpoly.edu/~dstearns/SIM/Examples/FloatAdder/explain.html
+
+
+2003-08-07 Dmitry Diky <diwil@mail.ru>
+ * floatdisf.c: Fix function typo (prepend two leading '_')
+
+2003-08-06 4:45pm PST Chris Takahashi <ctakahashi (_at_) users.sourceforge.net>
+ Modified files:
+ divsf.c
+
+ Comment:
+ Did quick optimization on floating-point division; sped up sign
+ extraction.
+
+2003-08-06 Chris Takahashi <ctakahashi (_at_) users.sourceforge.net>
+ Modified files:
+ eqsf.c
+ gesf.c
+ gtsf.c
+ lesf.c
+ ltsf.c
+ nesf.c
+ cmpsf.c
+
+ Comment:
+ Fixed floating-point comparison. Preformed rudimentary functional
+ tests to confirm correctness.
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: addsf.c,v 1.3 2004/01/31 13:09:57 diwil Exp $
+ */
+
+
+/* TESTED withe SIMU */
+
+#define HIDDEN (1l << 23)
+
+#define MANT(fp) (((fp) & 0x7FFFFFl) | HIDDEN)
+
+long __addsf3 (long a1, long a2)
+{
+ register long mant1, mant2;
+ register int exp1, exp2;
+ register int sign;
+
+ if(!a1)
+ return a2;
+
+ if(!a2)
+ return a1;
+
+ exp1 = (a1>>16)&0x7f80;
+ exp2 = (a2>>16)&0x7f80;
+
+ exp1 >>= 7;
+ exp2 >>= 7;
+
+ if (exp1 > exp2 + 25) return a1;
+ if (exp2 > exp1 + 25) return a2;
+
+ sign = (a1>>16)&0x8000;
+ mant1 = MANT(a1);
+ mant1 <<= 6;
+ if(sign)
+ mant1 = -mant1;
+
+
+ sign = (a2>>16)&0x8000;
+ mant2 = MANT(a2);
+ mant2 <<= 6;
+ if(sign)
+ mant2 = -mant2;
+
+ if (exp1 > exp2)
+ mant2 >>= exp1 - exp2;
+ else
+ {
+ mant1 >>= exp2 - exp1;
+ exp1 = exp2;
+ }
+
+ mant1 += mant2;
+
+ /* from this point we do not need 'mant2' anymore.*/
+ if (mant1 < 0)
+ {
+ mant1 = -mant1;
+ sign = 0x8000;
+ }
+ else if (!mant1)
+ return 0l;
+ else
+ sign=0;
+
+ while (!(mant1 & 0xE0000000))
+ {
+ mant1 <<= 1;
+ exp1--;
+ }
+
+
+ if (mant1 & (1l << 30))
+ {
+ mant1 >>= 1;
+ exp1++;
+ }
+
+ mant1 += (mant1 & 0x40) ? 0x20 : 0x1F;
+ if (mant1 & (1l << 30))
+ {
+ mant1 >>= 1;
+ exp1++;
+ }
+
+ mant1 >>= 6;
+ mant1 &= ~HIDDEN;
+ exp1 <<= 7;
+ mant1 |= ((long)(sign | exp1) << 16);
+ return mant1;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: cmpsf.c,v 1.6 2004/05/28 10:11:47 diwil Exp $
+ */
+
+/* TESTED */
+
+int __cmpsf2(long a1, long a2)
+{
+#if 0
+ if(a1 == a2 ||
+ (((unsigned int )(a1>>16))&((unsigned int)(a2>>16))) == 0x8000)
+ return 0;
+#endif
+ if( !((a1|a2)&0x7ffffffful))
+ return 0;
+
+ if(a1<0 && a2<0)
+ {
+ a1 ^= 0x80000000;
+ a2 ^= 0x80000000;
+ if(a1<a2)
+ return 1;
+ return -1;
+ }
+
+ if(a1>a2) return 1;
+ return -1;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: divsf.c,v 1.8 2004/05/28 10:11:47 diwil Exp $
+ */
+
+/* TESTED */
+
+
+#define EXCESS 126
+#define SIGNBIT 0x80000000ul
+#define HIDDEN (1ul << 23)
+#define SIGN(fp) ((fp) & SIGNBIT)
+#define EXP(fp) (((fp) >> 23) & 0xFF)
+#define MANT(fp) (((fp) & 0x7FFFFFul) | HIDDEN)
+#define PACK(s,e,m) ((s) | ((e) << 23) | (m))
+
+
+
+long __divsf3 (long a1, long a2)
+{
+ register int exp; //asm("r11");
+ register int sign; //asm("r10");
+ register long mask;
+ register long result;
+ register int tmp;
+
+ /* sign = SIGN (fl1.l) ^ SIGN (fl2.l); */
+#if 0
+ __asm__ __volatile__ (
+ "mov %B2, %0 \n\t"
+ "and #0x8000, %0 \n\t"
+ "mov %B3, %1 \n\t"
+ "and #0x8000, %1 \n\t"
+ "xor %1, %0"
+ : "=r" (sign),
+ "=r" (tmp)
+ : "r" (a1),
+ "r" (a2)
+ );
+#endif
+ sign = ((a1^a2)>>16)&0x8000;
+ exp = 0x7f80 & (a1>>16);
+ tmp = 0x7f80 & (a2>>16);
+
+ exp += EXCESS<<7;
+ exp -= tmp;
+
+#if 0
+ __asm__ __volatile__ (
+ "mov %B1, %0 \n\t"
+ "xor %B2, %0 \n\t"
+ "and #0x8000, %0 \n\t"
+ : "=r" (sign)
+ : "r" (a1),
+ "r" (a2)
+ );
+
+ __asm__ __volatile__ (
+ "mov %B3, %0 \n\t"
+ "and #0x7f80, %0 \n\t"
+ "mov %B4, %1 \n\t"
+ "and #0x7f80, %1 \n\t"
+ "sub %1, %0 \n\t"
+ "add %2, %0 \n\t"
+ : "=r" (exp)
+ : "r" (tmp),
+ "i" (126<<7),
+ "r" (a1),
+ "r" (a2)
+ );
+#endif
+
+ a1 = MANT (a1);
+ a2 = MANT (a2);
+
+ /* divide by zero??? */
+ if(!a2)
+ {
+ /* return NaN or -NaN */
+ return (sign ? 0xFFFFFFFFul : 0x7FFFFFFFul);
+ }
+
+ /* numerator zero??? */
+ if(!a1)
+ return a1;
+
+
+ if(a1<a2)
+ {
+ a1 <<= 1;
+ exp -= 1<<7;
+ }
+
+ mask = 0x1000000ul;
+ result = 0ul;
+ __asm__ __volatile__ (";mask");
+ while (mask)
+ {
+ if(a1>=a2)
+ {
+ result |= mask;
+ a1 -= a2;
+ }
+ __asm__ __volatile__ (";nop");
+ a1 <<= 1;
+ mask >>= 1;
+ }
+ __asm__ __volatile__ (";round");
+ /* round */
+ result += 1;
+
+ /* normalize down */
+ /* exp++ */
+ exp += 1<<7;
+ result >>= 1;
+
+ result &= ~HIDDEN ;
+
+ /* pack up and go home */
+ result |= ((long)(sign | exp)<<16);
+#if 0
+ __asm__ __volatile__ (
+ ";pack\n\t"
+ "bis %2, %1 \n\t"
+ "bis %1, %B0 \n\t"
+ :
+ : "r" (result),
+ "r" (sign),
+ "r" (exp)
+ );
+#endif
+ return result;
+}
+
--- /dev/null
+/* ef_acos.c -- float version of e_acos.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+one = 1.0000000000e+00, /* 0x3F800000 */
+pi = 3.1415925026e+00, /* 0x40490fda */
+pio2_hi = 1.5707962513e+00, /* 0x3fc90fda */
+pio2_lo = 7.5497894159e-08, /* 0x33a22168 */
+pS0 = 1.6666667163e-01, /* 0x3e2aaaab */
+pS1 = -3.2556581497e-01, /* 0xbea6b090 */
+pS2 = 2.0121252537e-01, /* 0x3e4e0aa8 */
+pS3 = -4.0055535734e-02, /* 0xbd241146 */
+pS4 = 7.9153501429e-04, /* 0x3a4f7f04 */
+pS5 = 3.4793309169e-05, /* 0x3811ef08 */
+qS1 = -2.4033949375e+00, /* 0xc019d139 */
+qS2 = 2.0209457874e+00, /* 0x4001572d */
+qS3 = -6.8828397989e-01, /* 0xbf303361 */
+qS4 = 7.7038154006e-02; /* 0x3d9dc62e */
+
+#ifdef __STDC__
+ float __ieee754_acosf(float x)
+#else
+ float __ieee754_acosf(x)
+ float x;
+#endif
+{
+ float z,p,q,r,w,s,c,df;
+ __int32_t hx,ix;
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(ix==0x3f800000) { /* |x|==1 */
+ if(hx>0) return 0.0; /* acos(1) = 0 */
+ else return pi+(float)2.0*pio2_lo; /* acos(-1)= pi */
+ } else if(ix>0x3f800000) { /* |x| >= 1 */
+ return (x-x)/(x-x); /* acos(|x|>1) is NaN */
+ }
+ if(ix<0x3f000000) { /* |x| < 0.5 */
+ if(ix<=0x23000000) return pio2_hi+pio2_lo;/*if|x|<2**-57*/
+ z = x*x;
+ p = z*(pS0+z*(pS1+z*(pS2+z*(pS3+z*(pS4+z*pS5)))));
+ q = one+z*(qS1+z*(qS2+z*(qS3+z*qS4)));
+ r = p/q;
+ return pio2_hi - (x - (pio2_lo-x*r));
+ } else if (hx<0) { /* x < -0.5 */
+ z = (one+x)*(float)0.5;
+ p = z*(pS0+z*(pS1+z*(pS2+z*(pS3+z*(pS4+z*pS5)))));
+ q = one+z*(qS1+z*(qS2+z*(qS3+z*qS4)));
+ s = __ieee754_sqrtf(z);
+ r = p/q;
+ w = r*s-pio2_lo;
+ return pi - (float)2.0*(s+w);
+ } else { /* x > 0.5 */
+ __int32_t idf;
+ z = (one-x)*(float)0.5;
+ s = __ieee754_sqrtf(z);
+ df = s;
+ GET_FLOAT_WORD(idf,df);
+ SET_FLOAT_WORD(df,idf&0xfffff000);
+ c = (z-df*df)/(s+df);
+ p = z*(pS0+z*(pS1+z*(pS2+z*(pS3+z*(pS4+z*pS5)))));
+ q = one+z*(qS1+z*(qS2+z*(qS3+z*qS4)));
+ r = p/q;
+ w = r*s+c;
+ return (float)2.0*(df+w);
+ }
+}
+
+
+float acosf(float x)
+{
+ return __ieee754_acosf(x);
+}
+
+
+double acos(double x)
+{
+ return (double) __ieee754_acosf((float)x);
+}
+
+
--- /dev/null
+/* ef_acosh.c -- float version of e_acosh.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ *
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+one = 1.0,
+ln2 = 6.9314718246e-01; /* 0x3f317218 */
+
+#ifdef __STDC__
+ float __ieee754_acoshf(float x)
+#else
+ float __ieee754_acoshf(x)
+ float x;
+#endif
+{
+ float t;
+ __int32_t hx;
+ GET_FLOAT_WORD(hx,x);
+ if(hx<0x3f800000) { /* x < 1 */
+ return (x-x)/(x-x);
+ } else if(hx >=0x4d800000) { /* x > 2**28 */
+ if(!FLT_UWORD_IS_FINITE(hx)) { /* x is inf of NaN */
+ return x+x;
+ } else
+ return __ieee754_logf(x)+ln2; /* acosh(huge)=log(2x) */
+ } else if (hx==0x3f800000) {
+ return 0.0; /* acosh(1) = 0 */
+ } else if (hx > 0x40000000) { /* 2**28 > x > 2 */
+ t=x*x;
+ return __ieee754_logf((float)2.0*x-one/(x+__ieee754_sqrtf(t-one)));
+ } else { /* 1<x<2 */
+ t = x-one;
+ return log1pf(t+__ieee754_sqrtf((float)2.0*t+t*t));
+ }
+}
--- /dev/null
+/* ef_asin.c -- float version of e_asin.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+one = 1.0000000000e+00, /* 0x3F800000 */
+huge = 1.000e+30,
+pio2_hi = 1.57079637050628662109375f,
+pio2_lo = -4.37113900018624283e-8f,
+pio4_hi = 0.785398185253143310546875f,
+ /* coefficient for R(x^2) */
+pS0 = 1.6666667163e-01, /* 0x3e2aaaab */
+pS1 = -3.2556581497e-01, /* 0xbea6b090 */
+pS2 = 2.0121252537e-01, /* 0x3e4e0aa8 */
+pS3 = -4.0055535734e-02, /* 0xbd241146 */
+pS4 = 7.9153501429e-04, /* 0x3a4f7f04 */
+pS5 = 3.4793309169e-05, /* 0x3811ef08 */
+qS1 = -2.4033949375e+00, /* 0xc019d139 */
+qS2 = 2.0209457874e+00, /* 0x4001572d */
+qS3 = -6.8828397989e-01, /* 0xbf303361 */
+qS4 = 7.7038154006e-02; /* 0x3d9dc62e */
+
+#ifdef __STDC__
+ float __ieee754_asinf(float x)
+#else
+ float __ieee754_asinf(x)
+ float x;
+#endif
+{
+ float t,w,p,q,c,r,s;
+ __int32_t hx,ix;
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(ix==0x3f800000) {
+ /* asin(1)=+-pi/2 with inexact */
+ return x*pio2_hi+x*pio2_lo;
+ } else if(ix> 0x3f800000) { /* |x|>= 1 */
+ return (x-x)/(x-x); /* asin(|x|>1) is NaN */
+ } else if (ix<0x3f000000) { /* |x|<0.5 */
+ if(ix<0x32000000) { /* if |x| < 2**-27 */
+ if(huge+x>one) return x;/* return x with inexact if x!=0*/
+ } else {
+ t = x*x;
+ p = t*(pS0+t*(pS1+t*(pS2+t*(pS3+t*(pS4+t*pS5)))));
+ q = one+t*(qS1+t*(qS2+t*(qS3+t*qS4)));
+ w = p/q;
+ return x+x*w;
+ }
+ }
+ /* 1> |x|>= 0.5 */
+ w = one-fabsf(x);
+ t = w*(float)0.5;
+ p = t*(pS0+t*(pS1+t*(pS2+t*(pS3+t*(pS4+t*pS5)))));
+ q = one+t*(qS1+t*(qS2+t*(qS3+t*qS4)));
+ s = __ieee754_sqrtf(t);
+ if(ix>=0x3F79999A) { /* if |x| > 0.975 */
+ w = p/q;
+ t = pio2_hi-((float)2.0*(s+s*w)-pio2_lo);
+ } else {
+ __int32_t iw;
+ w = s;
+ GET_FLOAT_WORD(iw,w);
+ SET_FLOAT_WORD(w,iw&0xfffff000);
+ c = (t-w*w)/(s+w);
+ r = p/q;
+ p = (float)2.0*s*r-(pio2_lo-(float)2.0*c);
+ q = pio4_hi-(float)2.0*w;
+ t = pio4_hi-(p-q);
+ }
+ if(hx>0) return t; else return -t;
+}
+
+double asin(double x)
+{
+ return (double)__ieee754_asinf((float)x);
+}
+
+float asinf(float x)
+{
+ return __ieee754_asinf(x);
+}
+
--- /dev/null
+/* ef_atan2.c -- float version of e_atan2.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ *
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+tiny = 1.0e-30,
+zero = 0.0,
+pi_o_4 = 7.8539818525e-01, /* 0x3f490fdb */
+pi_o_2 = 1.5707963705e+00, /* 0x3fc90fdb */
+pi = 3.1415925026e+00, /* 0x40490fda */
+pi_lo = 1.5099578832e-07; /* 0x34222168 */
+
+#ifdef __STDC__
+ float __ieee754_atan2f(float y, float x)
+#else
+ float __ieee754_atan2f(y,x)
+ float y,x;
+#endif
+{
+ float z;
+ __int32_t k,m,hx,hy,ix,iy;
+
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ GET_FLOAT_WORD(hy,y);
+ iy = hy&0x7fffffff;
+ if(FLT_UWORD_IS_NAN(ix)||
+ FLT_UWORD_IS_NAN(iy)) /* x or y is NaN */
+ return x+y;
+ if(hx==0x3f800000) return atanf(y); /* x=1.0 */
+ m = ((hy>>31)&1)|((hx>>30)&2); /* 2*sign(x)+sign(y) */
+
+ /* when y = 0 */
+ if(FLT_UWORD_IS_ZERO(iy)) {
+ switch(m) {
+ case 0:
+ case 1: return y; /* atan(+-0,+anything)=+-0 */
+ case 2: return pi+tiny;/* atan(+0,-anything) = pi */
+ case 3: return -pi-tiny;/* atan(-0,-anything) =-pi */
+ }
+ }
+ /* when x = 0 */
+ if(FLT_UWORD_IS_ZERO(ix)) return (hy<0)? -pi_o_2-tiny: pi_o_2+tiny;
+
+ /* when x is INF */
+ if(FLT_UWORD_IS_INFINITE(ix)) {
+ if(FLT_UWORD_IS_INFINITE(iy)) {
+ switch(m) {
+ case 0: return pi_o_4+tiny;/* atan(+INF,+INF) */
+ case 1: return -pi_o_4-tiny;/* atan(-INF,+INF) */
+ case 2: return (float)3.0*pi_o_4+tiny;/*atan(+INF,-INF)*/
+ case 3: return (float)-3.0*pi_o_4-tiny;/*atan(-INF,-INF)*/
+ }
+ } else {
+ switch(m) {
+ case 0: return zero ; /* atan(+...,+INF) */
+ case 1: return -zero ; /* atan(-...,+INF) */
+ case 2: return pi+tiny ; /* atan(+...,-INF) */
+ case 3: return -pi-tiny ; /* atan(-...,-INF) */
+ }
+ }
+ }
+ /* when y is INF */
+ if(FLT_UWORD_IS_INFINITE(iy)) return (hy<0)? -pi_o_2-tiny: pi_o_2+tiny;
+
+ /* compute y/x */
+ k = (iy-ix)>>23;
+ if(k > 60) z=pi_o_2+(float)0.5*pi_lo; /* |y/x| > 2**60 */
+ else if(hx<0&&k<-60) z=0.0; /* |y|/x < -2**60 */
+ else z=atanf(fabsf(y/x)); /* safe to do y/x */
+ switch (m) {
+ case 0: return z ; /* atan(+,+) */
+ case 1: {
+ __uint32_t zh;
+ GET_FLOAT_WORD(zh,z);
+ SET_FLOAT_WORD(z,zh ^ 0x80000000);
+ }
+ return z ; /* atan(-,+) */
+ case 2: return pi-(z-pi_lo);/* atan(+,-) */
+ default: /* case 3 */
+ return (z-pi_lo)-pi;/* atan(-,-) */
+ }
+}
+
+
+float atan2f(float y, float x)
+{
+ return __ieee754_atan2f(y,x);
+}
+
+
+double atan2(double y, double x)
+{
+ return (double) __ieee754_atan2f((float)y,(float)x);
+}
+
--- /dev/null
+/* ef_atanh.c -- float version of e_atanh.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ *
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float one = 1.0, huge = 1e30;
+#else
+static float one = 1.0, huge = 1e30;
+#endif
+
+#ifdef __STDC__
+static const float zero = 0.0;
+#else
+static float zero = 0.0;
+#endif
+
+#ifdef __STDC__
+ float __ieee754_atanhf(float x)
+#else
+ float __ieee754_atanhf(x)
+ float x;
+#endif
+{
+ float t;
+ __int32_t hx,ix;
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if (ix>0x3f800000) /* |x|>1 */
+ return (x-x)/(x-x);
+ if(ix==0x3f800000)
+ return x/zero;
+ if(ix<0x31800000&&(huge+x)>zero) return x; /* x<2**-28 */
+ SET_FLOAT_WORD(x,ix);
+ if(ix<0x3f000000) { /* x < 0.5 */
+ t = x+x;
+ t = (float)0.5*log1pf(t+t*x/(one-x));
+ } else
+ t = (float)0.5*log1pf((x+x)/(one-x));
+ if(hx>=0) return t; else return -t;
+}
--- /dev/null
+/* ef_cosh.c -- float version of e_cosh.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __v810__
+#define const
+#endif
+
+#ifdef __STDC__
+static const float one = 1.0, half=0.5, huge = 1.0e30;
+#else
+static float one = 1.0, half=0.5, huge = 1.0e30;
+#endif
+
+#ifdef __STDC__
+ float __ieee754_coshf(float x)
+#else
+ float __ieee754_coshf(x)
+ float x;
+#endif
+{
+ float t,w;
+ __int32_t ix;
+
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+
+ /* x is INF or NaN */
+ if(!FLT_UWORD_IS_FINITE(ix)) return x*x;
+
+ /* |x| in [0,0.5*ln2], return 1+expm1(|x|)^2/(2*exp(|x|)) */
+ if(ix<0x3eb17218) {
+ t = expm1f(fabsf(x));
+ w = one+t;
+ if (ix<0x24000000) return w; /* cosh(tiny) = 1 */
+ return one+(t*t)/(w+w);
+ }
+
+ /* |x| in [0.5*ln2,22], return (exp(|x|)+1/exp(|x|)/2; */
+ if (ix < 0x41b00000) {
+ t = __ieee754_expf(fabsf(x));
+ return half*t+half/t;
+ }
+
+ /* |x| in [22, log(maxdouble)] return half*exp(|x|) */
+ if (ix <= FLT_UWORD_LOG_MAX)
+ return half*__ieee754_expf(fabsf(x));
+
+ /* |x| in [log(maxdouble), overflowthresold] */
+ if (ix <= FLT_UWORD_LOG_2MAX) {
+ w = __ieee754_expf(half*fabsf(x));
+ t = half*w;
+ return t*w;
+ }
+
+ /* |x| > overflowthresold, cosh(x) overflow */
+ return huge*huge;
+}
--- /dev/null
+/* ef_exp.c -- float version of e_exp.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __v810__
+#define const
+#endif
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+one = 1.0,
+halF[2] = {0.5,-0.5,},
+huge = 1.0e+30,
+twom100 = 7.8886090522e-31, /* 2**-100=0x0d800000 */
+ln2HI[2] ={ 6.9313812256e-01, /* 0x3f317180 */
+ -6.9313812256e-01,}, /* 0xbf317180 */
+ln2LO[2] ={ 9.0580006145e-06, /* 0x3717f7d1 */
+ -9.0580006145e-06,}, /* 0xb717f7d1 */
+invln2 = 1.4426950216e+00, /* 0x3fb8aa3b */
+P1 = 1.6666667163e-01, /* 0x3e2aaaab */
+P2 = -2.7777778450e-03, /* 0xbb360b61 */
+P3 = 6.6137559770e-05, /* 0x388ab355 */
+P4 = -1.6533901999e-06, /* 0xb5ddea0e */
+P5 = 4.1381369442e-08; /* 0x3331bb4c */
+
+
+
+
+#ifdef __STDC__
+ float __ieee754_expf(float x) /* default IEEE double exp */
+#else
+ float __ieee754_expf(x) /* default IEEE double exp */
+ float x;
+#endif
+{
+ float y,hi,lo,c,t;
+ __int32_t k,xsb,sx;
+ __uint32_t hx;
+
+ GET_FLOAT_WORD(sx,x);
+ xsb = (sx>>31)&1; /* sign bit of x */
+ hx = sx & 0x7fffffff; /* high word of |x| */
+
+ /* filter out non-finite argument */
+ if(FLT_UWORD_IS_NAN(hx))
+ return x+x; /* NaN */
+ if(FLT_UWORD_IS_INFINITE(hx))
+ return (xsb==0)? x:0.0; /* exp(+-inf)={inf,0} */
+ if(sx > FLT_UWORD_LOG_MAX)
+ return huge*huge; /* overflow */
+ if(sx < 0 && hx > FLT_UWORD_LOG_MIN)
+ return twom100*twom100; /* underflow */
+
+ /* argument reduction */
+ if(hx > 0x3eb17218) { /* if |x| > 0.5 ln2 */
+ if(hx < 0x3F851592) { /* and |x| < 1.5 ln2 */
+ hi = x-ln2HI[xsb]; lo=ln2LO[xsb]; k = 1-xsb-xsb;
+ } else {
+ k = invln2*x+halF[xsb];
+ t = k;
+ hi = x - t*ln2HI[0]; /* t*ln2HI is exact here */
+ lo = t*ln2LO[0];
+ }
+ x = hi - lo;
+ }
+ else if(hx < 0x31800000) { /* when |x|<2**-28 */
+ if(huge+x>one) return one+x;/* trigger inexact */
+ }
+ else k = 0;
+
+ /* x is now in primary range */
+ t = x*x;
+ c = x - t*(P1+t*(P2+t*(P3+t*(P4+t*P5))));
+ if(k==0) return one-((x*c)/(c-(float)2.0)-x);
+ else y = one-((lo-(x*c)/((float)2.0-c))-hi);
+ if(k >= -125) {
+ __uint32_t hy;
+ GET_FLOAT_WORD(hy,y);
+ SET_FLOAT_WORD(y,hy+(k<<23)); /* add k to y's exponent */
+ return y;
+ } else {
+ __uint32_t hy;
+ GET_FLOAT_WORD(hy,y);
+ SET_FLOAT_WORD(y,hy+((k+100)<<23)); /* add k to y's exponent */
+ return y*twom100;
+ }
+}
+
+
+float expf(float x)
+{
+ return __ieee754_expf(x);
+}
--- /dev/null
+/* ef_fmod.c -- float version of e_fmod.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+/*
+ * __ieee754_fmodf(x,y)
+ * Return x mod y in exact arithmetic
+ * Method: shift and subtract
+ */
+
+#include "fdlibm.h"
+
+
+float fmodf(float x, float y)
+{
+ return __ieee754_fmodf(x,y);
+}
+
+#ifdef __STDC__
+static const float one = 1.0, Zero[] = {0.0, -0.0,};
+#else
+static float one = 1.0, Zero[] = {0.0, -0.0,};
+#endif
+
+#ifdef __STDC__
+ float __ieee754_fmodf(float x, float y)
+#else
+ float __ieee754_fmodf(x,y)
+ float x,y ;
+#endif
+{
+ __int32_t n,hx,hy,hz,ix,iy,sx,i;
+
+ GET_FLOAT_WORD(hx,x);
+ GET_FLOAT_WORD(hy,y);
+ sx = hx&0x80000000; /* sign of x */
+ hx ^=sx; /* |x| */
+ hy &= 0x7fffffff; /* |y| */
+
+ /* purge off exception values */
+ if(FLT_UWORD_IS_ZERO(hy)||
+ !FLT_UWORD_IS_FINITE(hx)||
+ FLT_UWORD_IS_NAN(hy))
+ return (x*y)/(x*y);
+ if(hx<hy) return x; /* |x|<|y| return x */
+ if(hx==hy)
+ return Zero[(__uint32_t)sx>>31]; /* |x|=|y| return x*0*/
+
+ /* Note: y cannot be zero if we reach here. */
+
+ /* determine ix = ilogb(x) */
+ if(FLT_UWORD_IS_SUBNORMAL(hx)) { /* subnormal x */
+ for (ix = -126,i=(hx<<8); i>0; i<<=1) ix -=1;
+ } else ix = (hx>>23)-127;
+
+ /* determine iy = ilogb(y) */
+ if(FLT_UWORD_IS_SUBNORMAL(hy)) { /* subnormal y */
+ for (iy = -126,i=(hy<<8); i>=0; i<<=1) iy -=1;
+ } else iy = (hy>>23)-127;
+
+ /* set up {hx,lx}, {hy,ly} and align y to x */
+ if(ix >= -126)
+ hx = 0x00800000|(0x007fffff&hx);
+ else { /* subnormal x, shift x to normal */
+ n = -126-ix;
+ hx = hx<<n;
+ }
+ if(iy >= -126)
+ hy = 0x00800000|(0x007fffff&hy);
+ else { /* subnormal y, shift y to normal */
+ n = -126-iy;
+ hy = hy<<n;
+ }
+
+ /* fix point fmod */
+ n = ix - iy;
+ while(n--) {
+ hz=hx-hy;
+ if(hz<0){hx = hx+hx;}
+ else {
+ if(hz==0) /* return sign(x)*0 */
+ return Zero[(__uint32_t)sx>>31];
+ hx = hz+hz;
+ }
+ }
+ hz=hx-hy;
+ if(hz>=0) {hx=hz;}
+
+ /* convert back to floating value and restore the sign */
+ if(hx==0) /* return sign(x)*0 */
+ return Zero[(__uint32_t)sx>>31];
+ while(hx<0x00800000) { /* normalize x */
+ hx = hx+hx;
+ iy -= 1;
+ }
+ if(iy>= -126) { /* normalize output */
+ hx = ((hx-0x00800000)|((iy+127)<<23));
+ SET_FLOAT_WORD(x,hx|sx);
+ } else { /* subnormal output */
+ /* If denormals are not supported, this code will generate a
+ zero representation. */
+ n = -126 - iy;
+ hx >>= n;
+ SET_FLOAT_WORD(x,hx|sx);
+ x *= one; /* create necessary signal */
+ }
+ return x; /* exact output */
+}
--- /dev/null
+/* ef_hypot.c -- float version of e_hypot.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float __ieee754_hypotf(float x, float y)
+#else
+ float __ieee754_hypotf(x,y)
+ float x, y;
+#endif
+{
+ float a=x,b=y,t1,t2,y1,y2,w;
+ __int32_t j,k,ha,hb;
+
+ GET_FLOAT_WORD(ha,x);
+ ha &= 0x7fffffffL;
+ GET_FLOAT_WORD(hb,y);
+ hb &= 0x7fffffffL;
+ if(hb > ha) {a=y;b=x;j=ha; ha=hb;hb=j;} else {a=x;b=y;}
+ SET_FLOAT_WORD(a,ha); /* a <- |a| */
+ SET_FLOAT_WORD(b,hb); /* b <- |b| */
+ if((ha-hb)>0xf000000L) {return a+b;} /* x/y > 2**30 */
+ k=0;
+ if(ha > 0x58800000L) { /* a>2**50 */
+ if(!FLT_UWORD_IS_FINITE(ha)) { /* Inf or NaN */
+ w = a+b; /* for sNaN */
+ if(FLT_UWORD_IS_INFINITE(ha)) w = a;
+ if(FLT_UWORD_IS_INFINITE(hb)) w = b;
+ return w;
+ }
+ /* scale a and b by 2**-60 */
+ ha -= 0x5d800000L; hb -= 0x5d800000L; k += 60;
+ SET_FLOAT_WORD(a,ha);
+ SET_FLOAT_WORD(b,hb);
+ }
+ if(hb < 0x26800000L) { /* b < 2**-50 */
+ if(FLT_UWORD_IS_ZERO(hb)) {
+ return a;
+ } else if(FLT_UWORD_IS_SUBNORMAL(hb)) {
+ SET_FLOAT_WORD(t1,0x3f000000L); /* t1=2^126 */
+ b *= t1;
+ a *= t1;
+ k -= 126;
+ } else { /* scale a and b by 2^60 */
+ ha += 0x5d800000; /* a *= 2^60 */
+ hb += 0x5d800000; /* b *= 2^60 */
+ k -= 60;
+ SET_FLOAT_WORD(a,ha);
+ SET_FLOAT_WORD(b,hb);
+ }
+ }
+ /* medium size a and b */
+ w = a-b;
+ if (w>b) {
+ SET_FLOAT_WORD(t1,ha&0xfffff000L);
+ t2 = a-t1;
+ w = __ieee754_sqrtf(t1*t1-(b*(-b)-t2*(a+t1)));
+ } else {
+ a = a+a;
+ SET_FLOAT_WORD(y1,hb&0xfffff000L);
+ y2 = b - y1;
+ SET_FLOAT_WORD(t1,ha+0x00800000L);
+ t2 = a - t1;
+ w = __ieee754_sqrtf(t1*y1-(w*(-w)-(t1*y2+t2*b)));
+ }
+ if(k!=0) {
+ SET_FLOAT_WORD(t1,0x3f800000L+(k<<23));
+ return t1*w;
+ } else return w;
+}
--- /dev/null
+/* ef_j0.c -- float version of e_j0.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static float pzerof(float), qzerof(float);
+#else
+static float pzerof(), qzerof();
+#endif
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+huge = 1e30,
+one = 1.0,
+invsqrtpi= 5.6418961287e-01, /* 0x3f106ebb */
+tpi = 6.3661974669e-01, /* 0x3f22f983 */
+ /* R0/S0 on [0, 2.00] */
+R02 = 1.5625000000e-02, /* 0x3c800000 */
+R03 = -1.8997929874e-04, /* 0xb947352e */
+R04 = 1.8295404516e-06, /* 0x35f58e88 */
+R05 = -4.6183270541e-09, /* 0xb19eaf3c */
+S01 = 1.5619102865e-02, /* 0x3c7fe744 */
+S02 = 1.1692678527e-04, /* 0x38f53697 */
+S03 = 5.1354652442e-07, /* 0x3509daa6 */
+S04 = 1.1661400734e-09; /* 0x30a045e8 */
+
+#ifdef __STDC__
+static const float zero = 0.0;
+#else
+static float zero = 0.0;
+#endif
+
+#ifdef __STDC__
+ float __ieee754_j0f(float x)
+#else
+ float __ieee754_j0f(x)
+ float x;
+#endif
+{
+ float z, s,c,ss,cc,r,u,v;
+ __int32_t hx,ix;
+
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(!FLT_UWORD_IS_FINITE(ix)) return one/(x*x);
+ x = fabsf(x);
+ if(ix >= 0x40000000) { /* |x| >= 2.0 */
+ s = sinf(x);
+ c = cosf(x);
+ ss = s-c;
+ cc = s+c;
+ if(ix<=FLT_UWORD_HALF_MAX) { /* make sure x+x not overflow */
+ z = -cosf(x+x);
+ if ((s*c)<zero) cc = z/ss;
+ else ss = z/cc;
+ }
+ /*
+ * j0(x) = 1/sqrt(pi) * (P(0,x)*cc - Q(0,x)*ss) / sqrt(x)
+ * y0(x) = 1/sqrt(pi) * (P(0,x)*ss + Q(0,x)*cc) / sqrt(x)
+ */
+ if(ix>0x80000000) z = (invsqrtpi*cc)/__ieee754_sqrtf(x);
+ else {
+ u = pzerof(x); v = qzerof(x);
+ z = invsqrtpi*(u*cc-v*ss)/__ieee754_sqrtf(x);
+ }
+ return z;
+ }
+ if(ix<0x39000000) { /* |x| < 2**-13 */
+ if(huge+x>one) { /* raise inexact if x != 0 */
+ if(ix<0x32000000) return one; /* |x|<2**-27 */
+ else return one - (float)0.25*x*x;
+ }
+ }
+ z = x*x;
+ r = z*(R02+z*(R03+z*(R04+z*R05)));
+ s = one+z*(S01+z*(S02+z*(S03+z*S04)));
+ if(ix < 0x3F800000) { /* |x| < 1.00 */
+ return one + z*((float)-0.25+(r/s));
+ } else {
+ u = (float)0.5*x;
+ return((one+u)*(one-u)+z*(r/s));
+ }
+}
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+u00 = -7.3804296553e-02, /* 0xbd9726b5 */
+u01 = 1.7666645348e-01, /* 0x3e34e80d */
+u02 = -1.3818567619e-02, /* 0xbc626746 */
+u03 = 3.4745343146e-04, /* 0x39b62a69 */
+u04 = -3.8140706238e-06, /* 0xb67ff53c */
+u05 = 1.9559013964e-08, /* 0x32a802ba */
+u06 = -3.9820518410e-11, /* 0xae2f21eb */
+v01 = 1.2730483897e-02, /* 0x3c509385 */
+v02 = 7.6006865129e-05, /* 0x389f65e0 */
+v03 = 2.5915085189e-07, /* 0x348b216c */
+v04 = 4.4111031494e-10; /* 0x2ff280c2 */
+
+#ifdef __STDC__
+ float __ieee754_y0f(float x)
+#else
+ float __ieee754_y0f(x)
+ float x;
+#endif
+{
+ float z, s,c,ss,cc,u,v;
+ __int32_t hx,ix;
+
+ GET_FLOAT_WORD(hx,x);
+ ix = 0x7fffffff&hx;
+ /* Y0(NaN) is NaN, y0(-inf) is Nan, y0(inf) is 0 */
+ if(!FLT_UWORD_IS_FINITE(ix)) return one/(x+x*x);
+ if(FLT_UWORD_IS_ZERO(ix)) return -one/zero;
+ if(hx<0) return zero/zero;
+ if(ix >= 0x40000000) { /* |x| >= 2.0 */
+ /* y0(x) = sqrt(2/(pi*x))*(p0(x)*sin(x0)+q0(x)*cos(x0))
+ * where x0 = x-pi/4
+ * Better formula:
+ * cos(x0) = cos(x)cos(pi/4)+sin(x)sin(pi/4)
+ * = 1/sqrt(2) * (sin(x) + cos(x))
+ * sin(x0) = sin(x)cos(3pi/4)-cos(x)sin(3pi/4)
+ * = 1/sqrt(2) * (sin(x) - cos(x))
+ * To avoid cancellation, use
+ * sin(x) +- cos(x) = -cos(2x)/(sin(x) -+ cos(x))
+ * to compute the worse one.
+ */
+ s = sinf(x);
+ c = cosf(x);
+ ss = s-c;
+ cc = s+c;
+ /*
+ * j0(x) = 1/sqrt(pi) * (P(0,x)*cc - Q(0,x)*ss) / sqrt(x)
+ * y0(x) = 1/sqrt(pi) * (P(0,x)*ss + Q(0,x)*cc) / sqrt(x)
+ */
+ if(ix<=FLT_UWORD_HALF_MAX) { /* make sure x+x not overflow */
+ z = -cosf(x+x);
+ if ((s*c)<zero) cc = z/ss;
+ else ss = z/cc;
+ }
+ if(ix>0x80000000) z = (invsqrtpi*ss)/__ieee754_sqrtf(x);
+ else {
+ u = pzerof(x); v = qzerof(x);
+ z = invsqrtpi*(u*ss+v*cc)/__ieee754_sqrtf(x);
+ }
+ return z;
+ }
+ if(ix<=0x32000000) { /* x < 2**-27 */
+ return(u00 + tpi*__ieee754_logf(x));
+ }
+ z = x*x;
+ u = u00+z*(u01+z*(u02+z*(u03+z*(u04+z*(u05+z*u06)))));
+ v = one+z*(v01+z*(v02+z*(v03+z*v04)));
+ return(u/v + tpi*(__ieee754_j0f(x)*__ieee754_logf(x)));
+}
+
+/* The asymptotic expansions of pzero is
+ * 1 - 9/128 s^2 + 11025/98304 s^4 - ..., where s = 1/x.
+ * For x >= 2, We approximate pzero by
+ * pzero(x) = 1 + (R/S)
+ * where R = pR0 + pR1*s^2 + pR2*s^4 + ... + pR5*s^10
+ * S = 1 + pS0*s^2 + ... + pS4*s^10
+ * and
+ * | pzero(x)-1-R/S | <= 2 ** ( -60.26)
+ */
+#ifdef __STDC__
+static const float pR8[6] = { /* for x in [inf, 8]=1/[0,0.125] */
+#else
+static float pR8[6] = { /* for x in [inf, 8]=1/[0,0.125] */
+#endif
+ 0.0000000000e+00, /* 0x00000000 */
+ -7.0312500000e-02, /* 0xbd900000 */
+ -8.0816707611e+00, /* 0xc1014e86 */
+ -2.5706311035e+02, /* 0xc3808814 */
+ -2.4852163086e+03, /* 0xc51b5376 */
+ -5.2530439453e+03, /* 0xc5a4285a */
+};
+#ifdef __STDC__
+static const float pS8[5] = {
+#else
+static float pS8[5] = {
+#endif
+ 1.1653436279e+02, /* 0x42e91198 */
+ 3.8337448730e+03, /* 0x456f9beb */
+ 4.0597855469e+04, /* 0x471e95db */
+ 1.1675296875e+05, /* 0x47e4087c */
+ 4.7627726562e+04, /* 0x473a0bba */
+};
+#ifdef __STDC__
+static const float pR5[6] = { /* for x in [8,4.5454]=1/[0.125,0.22001] */
+#else
+static float pR5[6] = { /* for x in [8,4.5454]=1/[0.125,0.22001] */
+#endif
+ -1.1412546255e-11, /* 0xad48c58a */
+ -7.0312492549e-02, /* 0xbd8fffff */
+ -4.1596107483e+00, /* 0xc0851b88 */
+ -6.7674766541e+01, /* 0xc287597b */
+ -3.3123129272e+02, /* 0xc3a59d9b */
+ -3.4643338013e+02, /* 0xc3ad3779 */
+};
+#ifdef __STDC__
+static const float pS5[5] = {
+#else
+static float pS5[5] = {
+#endif
+ 6.0753936768e+01, /* 0x42730408 */
+ 1.0512523193e+03, /* 0x44836813 */
+ 5.9789707031e+03, /* 0x45bad7c4 */
+ 9.6254453125e+03, /* 0x461665c8 */
+ 2.4060581055e+03, /* 0x451660ee */
+};
+
+#ifdef __STDC__
+static const float pR3[6] = {/* for x in [4.547,2.8571]=1/[0.2199,0.35001] */
+#else
+static float pR3[6] = {/* for x in [4.547,2.8571]=1/[0.2199,0.35001] */
+#endif
+ -2.5470459075e-09, /* 0xb12f081b */
+ -7.0311963558e-02, /* 0xbd8fffb8 */
+ -2.4090321064e+00, /* 0xc01a2d95 */
+ -2.1965976715e+01, /* 0xc1afba52 */
+ -5.8079170227e+01, /* 0xc2685112 */
+ -3.1447946548e+01, /* 0xc1fb9565 */
+};
+#ifdef __STDC__
+static const float pS3[5] = {
+#else
+static float pS3[5] = {
+#endif
+ 3.5856033325e+01, /* 0x420f6c94 */
+ 3.6151397705e+02, /* 0x43b4c1ca */
+ 1.1936077881e+03, /* 0x44953373 */
+ 1.1279968262e+03, /* 0x448cffe6 */
+ 1.7358093262e+02, /* 0x432d94b8 */
+};
+
+#ifdef __STDC__
+static const float pR2[6] = {/* for x in [2.8570,2]=1/[0.3499,0.5] */
+#else
+static float pR2[6] = {/* for x in [2.8570,2]=1/[0.3499,0.5] */
+#endif
+ -8.8753431271e-08, /* 0xb3be98b7 */
+ -7.0303097367e-02, /* 0xbd8ffb12 */
+ -1.4507384300e+00, /* 0xbfb9b1cc */
+ -7.6356959343e+00, /* 0xc0f4579f */
+ -1.1193166733e+01, /* 0xc1331736 */
+ -3.2336456776e+00, /* 0xc04ef40d */
+};
+#ifdef __STDC__
+static const float pS2[5] = {
+#else
+static float pS2[5] = {
+#endif
+ 2.2220300674e+01, /* 0x41b1c32d */
+ 1.3620678711e+02, /* 0x430834f0 */
+ 2.7047027588e+02, /* 0x43873c32 */
+ 1.5387539673e+02, /* 0x4319e01a */
+ 1.4657617569e+01, /* 0x416a859a */
+};
+
+#ifdef __STDC__
+ static float pzerof(float x)
+#else
+ static float pzerof(x)
+ float x;
+#endif
+{
+#ifdef __STDC__
+ const float *p,*q;
+#else
+ float *p,*q;
+#endif
+ float z,r,s;
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+ if(ix>=0x41000000) {p = pR8; q= pS8;}
+ else if(ix>=0x40f71c58){p = pR5; q= pS5;}
+ else if(ix>=0x4036db68){p = pR3; q= pS3;}
+ else {p = pR2; q= pS2;}
+ z = one/(x*x);
+ r = p[0]+z*(p[1]+z*(p[2]+z*(p[3]+z*(p[4]+z*p[5]))));
+ s = one+z*(q[0]+z*(q[1]+z*(q[2]+z*(q[3]+z*q[4]))));
+ return one+ r/s;
+}
+
+
+/* For x >= 8, the asymptotic expansions of qzero is
+ * -1/8 s + 75/1024 s^3 - ..., where s = 1/x.
+ * We approximate qzero by
+ * qzero(x) = s*(-1.25 + (R/S))
+ * where R = qR0 + qR1*s^2 + qR2*s^4 + ... + qR5*s^10
+ * S = 1 + qS0*s^2 + ... + qS5*s^12
+ * and
+ * | qzero(x)/s +1.25-R/S | <= 2 ** ( -61.22)
+ */
+#ifdef __STDC__
+static const float qR8[6] = { /* for x in [inf, 8]=1/[0,0.125] */
+#else
+static float qR8[6] = { /* for x in [inf, 8]=1/[0,0.125] */
+#endif
+ 0.0000000000e+00, /* 0x00000000 */
+ 7.3242187500e-02, /* 0x3d960000 */
+ 1.1768206596e+01, /* 0x413c4a93 */
+ 5.5767340088e+02, /* 0x440b6b19 */
+ 8.8591972656e+03, /* 0x460a6cca */
+ 3.7014625000e+04, /* 0x471096a0 */
+};
+#ifdef __STDC__
+static const float qS8[6] = {
+#else
+static float qS8[6] = {
+#endif
+ 1.6377603149e+02, /* 0x4323c6aa */
+ 8.0983447266e+03, /* 0x45fd12c2 */
+ 1.4253829688e+05, /* 0x480b3293 */
+ 8.0330925000e+05, /* 0x49441ed4 */
+ 8.4050156250e+05, /* 0x494d3359 */
+ -3.4389928125e+05, /* 0xc8a7eb69 */
+};
+
+#ifdef __STDC__
+static const float qR5[6] = { /* for x in [8,4.5454]=1/[0.125,0.22001] */
+#else
+static float qR5[6] = { /* for x in [8,4.5454]=1/[0.125,0.22001] */
+#endif
+ 1.8408595828e-11, /* 0x2da1ec79 */
+ 7.3242180049e-02, /* 0x3d95ffff */
+ 5.8356351852e+00, /* 0x40babd86 */
+ 1.3511157227e+02, /* 0x43071c90 */
+ 1.0272437744e+03, /* 0x448067cd */
+ 1.9899779053e+03, /* 0x44f8bf4b */
+};
+#ifdef __STDC__
+static const float qS5[6] = {
+#else
+static float qS5[6] = {
+#endif
+ 8.2776611328e+01, /* 0x42a58da0 */
+ 2.0778142090e+03, /* 0x4501dd07 */
+ 1.8847289062e+04, /* 0x46933e94 */
+ 5.6751113281e+04, /* 0x475daf1d */
+ 3.5976753906e+04, /* 0x470c88c1 */
+ -5.3543427734e+03, /* 0xc5a752be */
+};
+
+#ifdef __STDC__
+static const float qR3[6] = {/* for x in [4.547,2.8571]=1/[0.2199,0.35001] */
+#else
+static float qR3[6] = {/* for x in [4.547,2.8571]=1/[0.2199,0.35001] */
+#endif
+ 4.3774099900e-09, /* 0x3196681b */
+ 7.3241114616e-02, /* 0x3d95ff70 */
+ 3.3442313671e+00, /* 0x405607e3 */
+ 4.2621845245e+01, /* 0x422a7cc5 */
+ 1.7080809021e+02, /* 0x432acedf */
+ 1.6673394775e+02, /* 0x4326bbe4 */
+};
+#ifdef __STDC__
+static const float qS3[6] = {
+#else
+static float qS3[6] = {
+#endif
+ 4.8758872986e+01, /* 0x42430916 */
+ 7.0968920898e+02, /* 0x44316c1c */
+ 3.7041481934e+03, /* 0x4567825f */
+ 6.4604252930e+03, /* 0x45c9e367 */
+ 2.5163337402e+03, /* 0x451d4557 */
+ -1.4924745178e+02, /* 0xc3153f59 */
+};
+
+#ifdef __STDC__
+static const float qR2[6] = {/* for x in [2.8570,2]=1/[0.3499,0.5] */
+#else
+static float qR2[6] = {/* for x in [2.8570,2]=1/[0.3499,0.5] */
+#endif
+ 1.5044444979e-07, /* 0x342189db */
+ 7.3223426938e-02, /* 0x3d95f62a */
+ 1.9981917143e+00, /* 0x3fffc4bf */
+ 1.4495602608e+01, /* 0x4167edfd */
+ 3.1666231155e+01, /* 0x41fd5471 */
+ 1.6252708435e+01, /* 0x4182058c */
+};
+#ifdef __STDC__
+static const float qS2[6] = {
+#else
+static float qS2[6] = {
+#endif
+ 3.0365585327e+01, /* 0x41f2ecb8 */
+ 2.6934811401e+02, /* 0x4386ac8f */
+ 8.4478375244e+02, /* 0x44533229 */
+ 8.8293585205e+02, /* 0x445cbbe5 */
+ 2.1266638184e+02, /* 0x4354aa98 */
+ -5.3109550476e+00, /* 0xc0a9f358 */
+};
+
+#ifdef __STDC__
+ static float qzerof(float x)
+#else
+ static float qzerof(x)
+ float x;
+#endif
+{
+#ifdef __STDC__
+ const float *p,*q;
+#else
+ float *p,*q;
+#endif
+ float s,r,z;
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+ if(ix>=0x41000000) {p = qR8; q= qS8;}
+ else if(ix>=0x40f71c58){p = qR5; q= qS5;}
+ else if(ix>=0x4036db68){p = qR3; q= qS3;}
+ else {p = qR2; q= qS2;}
+ z = one/(x*x);
+ r = p[0]+z*(p[1]+z*(p[2]+z*(p[3]+z*(p[4]+z*p[5]))));
+ s = one+z*(q[0]+z*(q[1]+z*(q[2]+z*(q[3]+z*(q[4]+z*q[5])))));
+ return (-(float).125 + r/s)/x;
+}
--- /dev/null
+/* ef_j1.c -- float version of e_j1.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static float ponef(float), qonef(float);
+#else
+static float ponef(), qonef();
+#endif
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+huge = 1e30,
+one = 1.0,
+invsqrtpi= 5.6418961287e-01, /* 0x3f106ebb */
+tpi = 6.3661974669e-01, /* 0x3f22f983 */
+ /* R0/S0 on [0,2] */
+r00 = -6.2500000000e-02, /* 0xbd800000 */
+r01 = 1.4070566976e-03, /* 0x3ab86cfd */
+r02 = -1.5995563444e-05, /* 0xb7862e36 */
+r03 = 4.9672799207e-08, /* 0x335557d2 */
+s01 = 1.9153760746e-02, /* 0x3c9ce859 */
+s02 = 1.8594678841e-04, /* 0x3942fab6 */
+s03 = 1.1771846857e-06, /* 0x359dffc2 */
+s04 = 5.0463624390e-09, /* 0x31ad6446 */
+s05 = 1.2354227016e-11; /* 0x2d59567e */
+
+#ifdef __STDC__
+static const float zero = 0.0;
+#else
+static float zero = 0.0;
+#endif
+
+#ifdef __STDC__
+ float __ieee754_j1f(float x)
+#else
+ float __ieee754_j1f(x)
+ float x;
+#endif
+{
+ float z, s,c,ss,cc,r,u,v,y;
+ __int32_t hx,ix;
+
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(!FLT_UWORD_IS_FINITE(ix)) return one/x;
+ y = fabsf(x);
+ if(ix >= 0x40000000) { /* |x| >= 2.0 */
+ s = sinf(y);
+ c = cosf(y);
+ ss = -s-c;
+ cc = s-c;
+ if(ix<=FLT_UWORD_HALF_MAX) { /* make sure y+y not overflow */
+ z = cosf(y+y);
+ if ((s*c)>zero) cc = z/ss;
+ else ss = z/cc;
+ }
+ /*
+ * j1(x) = 1/sqrt(pi) * (P(1,x)*cc - Q(1,x)*ss) / sqrt(x)
+ * y1(x) = 1/sqrt(pi) * (P(1,x)*ss + Q(1,x)*cc) / sqrt(x)
+ */
+ if(ix>0x80000000) z = (invsqrtpi*cc)/__ieee754_sqrtf(y);
+ else {
+ u = ponef(y); v = qonef(y);
+ z = invsqrtpi*(u*cc-v*ss)/__ieee754_sqrtf(y);
+ }
+ if(hx<0) return -z;
+ else return z;
+ }
+ if(ix<0x32000000) { /* |x|<2**-27 */
+ if(huge+x>one) return (float)0.5*x;/* inexact if x!=0 necessary */
+ }
+ z = x*x;
+ r = z*(r00+z*(r01+z*(r02+z*r03)));
+ s = one+z*(s01+z*(s02+z*(s03+z*(s04+z*s05))));
+ r *= x;
+ return(x*(float)0.5+r/s);
+}
+
+#ifdef __STDC__
+static const float U0[5] = {
+#else
+static float U0[5] = {
+#endif
+ -1.9605709612e-01, /* 0xbe48c331 */
+ 5.0443872809e-02, /* 0x3d4e9e3c */
+ -1.9125689287e-03, /* 0xbafaaf2a */
+ 2.3525259166e-05, /* 0x37c5581c */
+ -9.1909917899e-08, /* 0xb3c56003 */
+};
+#ifdef __STDC__
+static const float V0[5] = {
+#else
+static float V0[5] = {
+#endif
+ 1.9916731864e-02, /* 0x3ca3286a */
+ 2.0255257550e-04, /* 0x3954644b */
+ 1.3560879779e-06, /* 0x35b602d4 */
+ 6.2274145840e-09, /* 0x31d5f8eb */
+ 1.6655924903e-11, /* 0x2d9281cf */
+};
+
+#ifdef __STDC__
+ float __ieee754_y1f(float x)
+#else
+ float __ieee754_y1f(x)
+ float x;
+#endif
+{
+ float z, s,c,ss,cc,u,v;
+ __int32_t hx,ix;
+
+ GET_FLOAT_WORD(hx,x);
+ ix = 0x7fffffff&hx;
+ /* if Y1(NaN) is NaN, Y1(-inf) is NaN, Y1(inf) is 0 */
+ if(!FLT_UWORD_IS_FINITE(ix)) return one/(x+x*x);
+ if(FLT_UWORD_IS_ZERO(ix)) return -one/zero;
+ if(hx<0) return zero/zero;
+ if(ix >= 0x40000000) { /* |x| >= 2.0 */
+ s = sinf(x);
+ c = cosf(x);
+ ss = -s-c;
+ cc = s-c;
+ if(ix<=FLT_UWORD_HALF_MAX) { /* make sure x+x not overflow */
+ z = cosf(x+x);
+ if ((s*c)>zero) cc = z/ss;
+ else ss = z/cc;
+ }
+ /* y1(x) = sqrt(2/(pi*x))*(p1(x)*sin(x0)+q1(x)*cos(x0))
+ * where x0 = x-3pi/4
+ * Better formula:
+ * cos(x0) = cos(x)cos(3pi/4)+sin(x)sin(3pi/4)
+ * = 1/sqrt(2) * (sin(x) - cos(x))
+ * sin(x0) = sin(x)cos(3pi/4)-cos(x)sin(3pi/4)
+ * = -1/sqrt(2) * (cos(x) + sin(x))
+ * To avoid cancellation, use
+ * sin(x) +- cos(x) = -cos(2x)/(sin(x) -+ cos(x))
+ * to compute the worse one.
+ */
+ if(ix>0x48000000) z = (invsqrtpi*ss)/__ieee754_sqrtf(x);
+ else {
+ u = ponef(x); v = qonef(x);
+ z = invsqrtpi*(u*ss+v*cc)/__ieee754_sqrtf(x);
+ }
+ return z;
+ }
+ if(ix<=0x24800000) { /* x < 2**-54 */
+ return(-tpi/x);
+ }
+ z = x*x;
+ u = U0[0]+z*(U0[1]+z*(U0[2]+z*(U0[3]+z*U0[4])));
+ v = one+z*(V0[0]+z*(V0[1]+z*(V0[2]+z*(V0[3]+z*V0[4]))));
+ return(x*(u/v) + tpi*(__ieee754_j1f(x)*__ieee754_logf(x)-one/x));
+}
+
+/* For x >= 8, the asymptotic expansions of pone is
+ * 1 + 15/128 s^2 - 4725/2^15 s^4 - ..., where s = 1/x.
+ * We approximate pone by
+ * pone(x) = 1 + (R/S)
+ * where R = pr0 + pr1*s^2 + pr2*s^4 + ... + pr5*s^10
+ * S = 1 + ps0*s^2 + ... + ps4*s^10
+ * and
+ * | pone(x)-1-R/S | <= 2 ** ( -60.06)
+ */
+
+#ifdef __STDC__
+static const float pr8[6] = { /* for x in [inf, 8]=1/[0,0.125] */
+#else
+static float pr8[6] = { /* for x in [inf, 8]=1/[0,0.125] */
+#endif
+ 0.0000000000e+00, /* 0x00000000 */
+ 1.1718750000e-01, /* 0x3df00000 */
+ 1.3239480972e+01, /* 0x4153d4ea */
+ 4.1205184937e+02, /* 0x43ce06a3 */
+ 3.8747453613e+03, /* 0x45722bed */
+ 7.9144794922e+03, /* 0x45f753d6 */
+};
+#ifdef __STDC__
+static const float ps8[5] = {
+#else
+static float ps8[5] = {
+#endif
+ 1.1420736694e+02, /* 0x42e46a2c */
+ 3.6509309082e+03, /* 0x45642ee5 */
+ 3.6956207031e+04, /* 0x47105c35 */
+ 9.7602796875e+04, /* 0x47bea166 */
+ 3.0804271484e+04, /* 0x46f0a88b */
+};
+
+#ifdef __STDC__
+static const float pr5[6] = { /* for x in [8,4.5454]=1/[0.125,0.22001] */
+#else
+static float pr5[6] = { /* for x in [8,4.5454]=1/[0.125,0.22001] */
+#endif
+ 1.3199052094e-11, /* 0x2d68333f */
+ 1.1718749255e-01, /* 0x3defffff */
+ 6.8027510643e+00, /* 0x40d9b023 */
+ 1.0830818176e+02, /* 0x42d89dca */
+ 5.1763616943e+02, /* 0x440168b7 */
+ 5.2871520996e+02, /* 0x44042dc6 */
+};
+#ifdef __STDC__
+static const float ps5[5] = {
+#else
+static float ps5[5] = {
+#endif
+ 5.9280597687e+01, /* 0x426d1f55 */
+ 9.9140142822e+02, /* 0x4477d9b1 */
+ 5.3532670898e+03, /* 0x45a74a23 */
+ 7.8446904297e+03, /* 0x45f52586 */
+ 1.5040468750e+03, /* 0x44bc0180 */
+};
+
+#ifdef __STDC__
+static const float pr3[6] = {
+#else
+static float pr3[6] = {/* for x in [4.547,2.8571]=1/[0.2199,0.35001] */
+#endif
+ 3.0250391081e-09, /* 0x314fe10d */
+ 1.1718686670e-01, /* 0x3defffab */
+ 3.9329774380e+00, /* 0x407bb5e7 */
+ 3.5119403839e+01, /* 0x420c7a45 */
+ 9.1055007935e+01, /* 0x42b61c2a */
+ 4.8559066772e+01, /* 0x42423c7c */
+};
+#ifdef __STDC__
+static const float ps3[5] = {
+#else
+static float ps3[5] = {
+#endif
+ 3.4791309357e+01, /* 0x420b2a4d */
+ 3.3676245117e+02, /* 0x43a86198 */
+ 1.0468714600e+03, /* 0x4482dbe3 */
+ 8.9081134033e+02, /* 0x445eb3ed */
+ 1.0378793335e+02, /* 0x42cf936c */
+};
+
+#ifdef __STDC__
+static const float pr2[6] = {/* for x in [2.8570,2]=1/[0.3499,0.5] */
+#else
+static float pr2[6] = {/* for x in [2.8570,2]=1/[0.3499,0.5] */
+#endif
+ 1.0771083225e-07, /* 0x33e74ea8 */
+ 1.1717621982e-01, /* 0x3deffa16 */
+ 2.3685150146e+00, /* 0x401795c0 */
+ 1.2242610931e+01, /* 0x4143e1bc */
+ 1.7693971634e+01, /* 0x418d8d41 */
+ 5.0735230446e+00, /* 0x40a25a4d */
+};
+#ifdef __STDC__
+static const float ps2[5] = {
+#else
+static float ps2[5] = {
+#endif
+ 2.1436485291e+01, /* 0x41ab7dec */
+ 1.2529022980e+02, /* 0x42fa9499 */
+ 2.3227647400e+02, /* 0x436846c7 */
+ 1.1767937469e+02, /* 0x42eb5bd7 */
+ 8.3646392822e+00, /* 0x4105d590 */
+};
+
+#ifdef __STDC__
+ static float ponef(float x)
+#else
+ static float ponef(x)
+ float x;
+#endif
+{
+#ifdef __STDC__
+ const float *p,*q;
+#else
+ float *p,*q;
+#endif
+ float z,r,s;
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+ if(ix>=0x41000000) {p = pr8; q= ps8;}
+ else if(ix>=0x40f71c58){p = pr5; q= ps5;}
+ else if(ix>=0x4036db68){p = pr3; q= ps3;}
+ else {p = pr2; q= ps2;}
+ z = one/(x*x);
+ r = p[0]+z*(p[1]+z*(p[2]+z*(p[3]+z*(p[4]+z*p[5]))));
+ s = one+z*(q[0]+z*(q[1]+z*(q[2]+z*(q[3]+z*q[4]))));
+ return one+ r/s;
+}
+
+
+/* For x >= 8, the asymptotic expansions of qone is
+ * 3/8 s - 105/1024 s^3 - ..., where s = 1/x.
+ * We approximate qone by
+ * qone(x) = s*(0.375 + (R/S))
+ * where R = qr1*s^2 + qr2*s^4 + ... + qr5*s^10
+ * S = 1 + qs1*s^2 + ... + qs6*s^12
+ * and
+ * | qone(x)/s -0.375-R/S | <= 2 ** ( -61.13)
+ */
+
+#ifdef __STDC__
+static const float qr8[6] = { /* for x in [inf, 8]=1/[0,0.125] */
+#else
+static float qr8[6] = { /* for x in [inf, 8]=1/[0,0.125] */
+#endif
+ 0.0000000000e+00, /* 0x00000000 */
+ -1.0253906250e-01, /* 0xbdd20000 */
+ -1.6271753311e+01, /* 0xc1822c8d */
+ -7.5960174561e+02, /* 0xc43de683 */
+ -1.1849806641e+04, /* 0xc639273a */
+ -4.8438511719e+04, /* 0xc73d3683 */
+};
+#ifdef __STDC__
+static const float qs8[6] = {
+#else
+static float qs8[6] = {
+#endif
+ 1.6139537048e+02, /* 0x43216537 */
+ 7.8253862305e+03, /* 0x45f48b17 */
+ 1.3387534375e+05, /* 0x4802bcd6 */
+ 7.1965775000e+05, /* 0x492fb29c */
+ 6.6660125000e+05, /* 0x4922be94 */
+ -2.9449025000e+05, /* 0xc88fcb48 */
+};
+
+#ifdef __STDC__
+static const float qr5[6] = { /* for x in [8,4.5454]=1/[0.125,0.22001] */
+#else
+static float qr5[6] = { /* for x in [8,4.5454]=1/[0.125,0.22001] */
+#endif
+ -2.0897993405e-11, /* 0xadb7d219 */
+ -1.0253904760e-01, /* 0xbdd1fffe */
+ -8.0564479828e+00, /* 0xc100e736 */
+ -1.8366960144e+02, /* 0xc337ab6b */
+ -1.3731937256e+03, /* 0xc4aba633 */
+ -2.6124443359e+03, /* 0xc523471c */
+};
+#ifdef __STDC__
+static const float qs5[6] = {
+#else
+static float qs5[6] = {
+#endif
+ 8.1276550293e+01, /* 0x42a28d98 */
+ 1.9917987061e+03, /* 0x44f8f98f */
+ 1.7468484375e+04, /* 0x468878f8 */
+ 4.9851425781e+04, /* 0x4742bb6d */
+ 2.7948074219e+04, /* 0x46da5826 */
+ -4.7191835938e+03, /* 0xc5937978 */
+};
+
+#ifdef __STDC__
+static const float qr3[6] = {
+#else
+static float qr3[6] = {/* for x in [4.547,2.8571]=1/[0.2199,0.35001] */
+#endif
+ -5.0783124372e-09, /* 0xb1ae7d4f */
+ -1.0253783315e-01, /* 0xbdd1ff5b */
+ -4.6101160049e+00, /* 0xc0938612 */
+ -5.7847221375e+01, /* 0xc267638e */
+ -2.2824453735e+02, /* 0xc3643e9a */
+ -2.1921012878e+02, /* 0xc35b35cb */
+};
+#ifdef __STDC__
+static const float qs3[6] = {
+#else
+static float qs3[6] = {
+#endif
+ 4.7665153503e+01, /* 0x423ea91e */
+ 6.7386511230e+02, /* 0x4428775e */
+ 3.3801528320e+03, /* 0x45534272 */
+ 5.5477290039e+03, /* 0x45ad5dd5 */
+ 1.9031191406e+03, /* 0x44ede3d0 */
+ -1.3520118713e+02, /* 0xc3073381 */
+};
+
+#ifdef __STDC__
+static const float qr2[6] = {/* for x in [2.8570,2]=1/[0.3499,0.5] */
+#else
+static float qr2[6] = {/* for x in [2.8570,2]=1/[0.3499,0.5] */
+#endif
+ -1.7838172539e-07, /* 0xb43f8932 */
+ -1.0251704603e-01, /* 0xbdd1f475 */
+ -2.7522056103e+00, /* 0xc0302423 */
+ -1.9663616180e+01, /* 0xc19d4f16 */
+ -4.2325313568e+01, /* 0xc2294d1f */
+ -2.1371921539e+01, /* 0xc1aaf9b2 */
+};
+#ifdef __STDC__
+static const float qs2[6] = {
+#else
+static float qs2[6] = {
+#endif
+ 2.9533363342e+01, /* 0x41ec4454 */
+ 2.5298155212e+02, /* 0x437cfb47 */
+ 7.5750280762e+02, /* 0x443d602e */
+ 7.3939318848e+02, /* 0x4438d92a */
+ 1.5594900513e+02, /* 0x431bf2f2 */
+ -4.9594988823e+00, /* 0xc09eb437 */
+};
+
+#ifdef __STDC__
+ static float qonef(float x)
+#else
+ static float qonef(x)
+ float x;
+#endif
+{
+#ifdef __STDC__
+ const float *p,*q;
+#else
+ float *p,*q;
+#endif
+ float s,r,z;
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+ if(ix>=0x40200000) {p = qr8; q= qs8;}
+ else if(ix>=0x40f71c58){p = qr5; q= qs5;}
+ else if(ix>=0x4036db68){p = qr3; q= qs3;}
+ else {p = qr2; q= qs2;}
+ z = one/(x*x);
+ r = p[0]+z*(p[1]+z*(p[2]+z*(p[3]+z*(p[4]+z*p[5]))));
+ s = one+z*(q[0]+z*(q[1]+z*(q[2]+z*(q[3]+z*(q[4]+z*q[5])))));
+ return ((float).375 + r/s)/x;
+}
--- /dev/null
+/* ef_jn.c -- float version of e_jn.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+invsqrtpi= 5.6418961287e-01, /* 0x3f106ebb */
+two = 2.0000000000e+00, /* 0x40000000 */
+one = 1.0000000000e+00; /* 0x3F800000 */
+
+#ifdef __STDC__
+static const float zero = 0.0000000000e+00;
+#else
+static float zero = 0.0000000000e+00;
+#endif
+
+#ifdef __STDC__
+ float __ieee754_jnf(int n, float x)
+#else
+ float __ieee754_jnf(n,x)
+ int n; float x;
+#endif
+{
+ __int32_t i,hx,ix, sgn;
+ float a, b, temp, di;
+ float z, w;
+
+ /* J(-n,x) = (-1)^n * J(n, x), J(n, -x) = (-1)^n * J(n, x)
+ * Thus, J(-n,x) = J(n,-x)
+ */
+ GET_FLOAT_WORD(hx,x);
+ ix = 0x7fffffff&hx;
+ /* if J(n,NaN) is NaN */
+ if(FLT_UWORD_IS_NAN(ix)) return x+x;
+ if(n<0){
+ n = -n;
+ x = -x;
+ hx ^= 0x80000000;
+ }
+ if(n==0) return(__ieee754_j0f(x));
+ if(n==1) return(__ieee754_j1f(x));
+ sgn = (n&1)&(hx>>31); /* even n -- 0, odd n -- sign(x) */
+ x = fabsf(x);
+ if(FLT_UWORD_IS_ZERO(ix)||FLT_UWORD_IS_INFINITE(ix))
+ b = zero;
+ else if((float)n<=x) {
+ /* Safe to use J(n+1,x)=2n/x *J(n,x)-J(n-1,x) */
+ a = __ieee754_j0f(x);
+ b = __ieee754_j1f(x);
+ for(i=1;i<n;i++){
+ temp = b;
+ b = b*((float)(i+i)/x) - a; /* avoid underflow */
+ a = temp;
+ }
+ } else {
+ if(ix<0x30800000) { /* x < 2**-29 */
+ /* x is tiny, return the first Taylor expansion of J(n,x)
+ * J(n,x) = 1/n!*(x/2)^n - ...
+ */
+ if(n>33) /* underflow */
+ b = zero;
+ else {
+ temp = x*(float)0.5; b = temp;
+ for (a=one,i=2;i<=n;i++) {
+ a *= (float)i; /* a = n! */
+ b *= temp; /* b = (x/2)^n */
+ }
+ b = b/a;
+ }
+ } else {
+ /* use backward recurrence */
+ /* x x^2 x^2
+ * J(n,x)/J(n-1,x) = ---- ------ ------ .....
+ * 2n - 2(n+1) - 2(n+2)
+ *
+ * 1 1 1
+ * (for large x) = ---- ------ ------ .....
+ * 2n 2(n+1) 2(n+2)
+ * -- - ------ - ------ -
+ * x x x
+ *
+ * Let w = 2n/x and h=2/x, then the above quotient
+ * is equal to the continued fraction:
+ * 1
+ * = -----------------------
+ * 1
+ * w - -----------------
+ * 1
+ * w+h - ---------
+ * w+2h - ...
+ *
+ * To determine how many terms needed, let
+ * Q(0) = w, Q(1) = w(w+h) - 1,
+ * Q(k) = (w+k*h)*Q(k-1) - Q(k-2),
+ * When Q(k) > 1e4 good for single
+ * When Q(k) > 1e9 good for double
+ * When Q(k) > 1e17 good for quadruple
+ */
+ /* determine k */
+ float t,v;
+ float q0,q1,h,tmp; __int32_t k,m;
+ w = (n+n)/(float)x; h = (float)2.0/(float)x;
+ q0 = w; z = w+h; q1 = w*z - (float)1.0; k=1;
+ while(q1<(float)1.0e9) {
+ k += 1; z += h;
+ tmp = z*q1 - q0;
+ q0 = q1;
+ q1 = tmp;
+ }
+ m = n+n;
+ for(t=zero, i = 2*(n+k); i>=m; i -= 2) t = one/(i/x-t);
+ a = t;
+ b = one;
+ /* estimate log((2/x)^n*n!) = n*log(2/x)+n*ln(n)
+ * Hence, if n*(log(2n/x)) > ...
+ * single 8.8722839355e+01
+ * double 7.09782712893383973096e+02
+ * long double 1.1356523406294143949491931077970765006170e+04
+ * then recurrent value may overflow and the result is
+ * likely underflow to zero
+ */
+ tmp = n;
+ v = two/x;
+ tmp = tmp*__ieee754_logf(fabsf(v*tmp));
+ if(tmp<(float)8.8721679688e+01) {
+ for(i=n-1,di=(float)(i+i);i>0;i--){
+ temp = b;
+ b *= di;
+ b = b/x - a;
+ a = temp;
+ di -= two;
+ }
+ } else {
+ for(i=n-1,di=(float)(i+i);i>0;i--){
+ temp = b;
+ b *= di;
+ b = b/x - a;
+ a = temp;
+ di -= two;
+ /* scale b to avoid spurious overflow */
+ if(b>(float)1e10) {
+ a /= b;
+ t /= b;
+ b = one;
+ }
+ }
+ }
+ b = (t*__ieee754_j0f(x)/b);
+ }
+ }
+ if(sgn==1) return -b; else return b;
+}
+
+#ifdef __STDC__
+ float __ieee754_ynf(int n, float x)
+#else
+ float __ieee754_ynf(n,x)
+ int n; float x;
+#endif
+{
+ __int32_t i,hx,ix,ib;
+ __int32_t sign;
+ float a, b, temp;
+
+ GET_FLOAT_WORD(hx,x);
+ ix = 0x7fffffff&hx;
+ /* if Y(n,NaN) is NaN */
+ if(FLT_UWORD_IS_NAN(ix)) return x+x;
+ if(FLT_UWORD_IS_ZERO(ix)) return -one/zero;
+ if(hx<0) return zero/zero;
+ sign = 1;
+ if(n<0){
+ n = -n;
+ sign = 1 - ((n&1)<<1);
+ }
+ if(n==0) return(__ieee754_y0f(x));
+ if(n==1) return(sign*__ieee754_y1f(x));
+ if(FLT_UWORD_IS_INFINITE(ix)) return zero;
+
+ a = __ieee754_y0f(x);
+ b = __ieee754_y1f(x);
+ /* quit if b is -inf */
+ GET_FLOAT_WORD(ib,b);
+ for(i=1;i<n&&ib!=0xff800000;i++){
+ temp = b;
+ b = ((float)(i+i)/x)*b - a;
+ GET_FLOAT_WORD(ib,b);
+ a = temp;
+ }
+ if(sign>0) return b; else return -b;
+}
--- /dev/null
+/* ef_log.c -- float version of e_log.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+ln2_hi = 6.9313812256e-01, /* 0x3f317180 */
+ln2_lo = 9.0580006145e-06, /* 0x3717f7d1 */
+two25 = 3.355443200e+07, /* 0x4c000000 */
+Lg1 = 6.6666668653e-01, /* 3F2AAAAB */
+Lg2 = 4.0000000596e-01, /* 3ECCCCCD */
+Lg3 = 2.8571429849e-01, /* 3E924925 */
+Lg4 = 2.2222198546e-01, /* 3E638E29 */
+Lg5 = 1.8183572590e-01, /* 3E3A3325 */
+Lg6 = 1.5313838422e-01, /* 3E1CD04F */
+Lg7 = 1.4798198640e-01; /* 3E178897 */
+
+#ifdef __STDC__
+static const float zero = 0.0;
+#else
+static float zero = 0.0;
+#endif
+
+float logf(float x)
+{
+return __ieee754_logf(x);
+}
+
+#ifdef __STDC__
+ float __ieee754_logf(float x)
+#else
+ float __ieee754_logf(x)
+ float x;
+#endif
+{
+ float hfsq,f,s,z,R,w,t1,t2,dk;
+ __int32_t k,ix,i,j;
+
+ GET_FLOAT_WORD(ix,x);
+
+ k=0;
+ if (FLT_UWORD_IS_ZERO(ix&0x7fffffff))
+ return -two25/zero; /* log(+-0)=-inf */
+ if (ix<0) return (x-x)/zero; /* log(-#) = NaN */
+ if (!FLT_UWORD_IS_FINITE(ix)) return x+x;
+ if (FLT_UWORD_IS_SUBNORMAL(ix)) {
+ k -= 25; x *= two25; /* subnormal number, scale up x */
+ GET_FLOAT_WORD(ix,x);
+ }
+ k += (ix>>23)-127;
+ ix &= 0x007fffff;
+ i = (ix+(0x95f64<<3))&0x800000;
+ SET_FLOAT_WORD(x,ix|(i^0x3f800000)); /* normalize x or x/2 */
+ k += (i>>23);
+ f = x-(float)1.0;
+ if((0x007fffff&(15+ix))<16) { /* |f| < 2**-20 */
+ if(f==zero) { if(k==0) return zero; else {dk=(float)k;
+ return dk*ln2_hi+dk*ln2_lo;}}
+ R = f*f*((float)0.5-(float)0.33333333333333333*f);
+ if(k==0) return f-R; else {dk=(float)k;
+ return dk*ln2_hi-((R-dk*ln2_lo)-f);}
+ }
+ s = f/((float)2.0+f);
+ dk = (float)k;
+ z = s*s;
+ i = ix-(0x6147a<<3);
+ w = z*z;
+ j = (0x6b851<<3)-ix;
+ t1= w*(Lg2+w*(Lg4+w*Lg6));
+ t2= z*(Lg1+w*(Lg3+w*(Lg5+w*Lg7)));
+ i |= j;
+ R = t2+t1;
+ if(i>0) {
+ hfsq=(float)0.5*f*f;
+ if(k==0) return f-(hfsq-s*(hfsq+R)); else
+ return dk*ln2_hi-((hfsq-(s*(hfsq+R)+dk*ln2_lo))-f);
+ } else {
+ if(k==0) return f-s*(f-R); else
+ return dk*ln2_hi-((s*(f-R)-dk*ln2_lo)-f);
+ }
+}
--- /dev/null
+/* ef_log10.c -- float version of e_log10.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+two25 = 3.3554432000e+07, /* 0x4c000000 */
+ivln10 = 4.3429449201e-01, /* 0x3ede5bd9 */
+log10_2hi = 3.0102920532e-01, /* 0x3e9a2080 */
+log10_2lo = 7.9034151668e-07; /* 0x355427db */
+
+#ifdef __STDC__
+static const float zero = 0.0;
+#else
+static float zero = 0.0;
+#endif
+
+#ifdef __STDC__
+ float __ieee754_log10f(float x)
+#else
+ float __ieee754_log10f(x)
+ float x;
+#endif
+{
+ float y,z;
+ __int32_t i,k,hx;
+
+ GET_FLOAT_WORD(hx,x);
+
+ k=0;
+ if (FLT_UWORD_IS_ZERO(hx&0x7fffffff))
+ return -two25/zero; /* log(+-0)=-inf */
+ if (hx<0) return (x-x)/zero; /* log(-#) = NaN */
+ if (!FLT_UWORD_IS_FINITE(hx)) return x+x;
+ if (FLT_UWORD_IS_SUBNORMAL(hx)) {
+ k -= 25; x *= two25; /* subnormal number, scale up x */
+ GET_FLOAT_WORD(hx,x);
+ }
+ k += (hx>>23)-127;
+ i = ((__uint32_t)k&0x80000000)>>31;
+ hx = (hx&0x007fffff)|((0x7f-i)<<23);
+ y = (float)(k+i);
+ SET_FLOAT_WORD(x,hx);
+ z = y*log10_2lo + ivln10*__ieee754_logf(x);
+ return z+y*log10_2hi;
+}
+
+float log10f(float x)
+{
+ return __ieee754_log10f(x);
+}
+
--- /dev/null
+/* ef_pow.c -- float version of e_pow.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __v810__
+#define const
+#endif
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+bp[] = {1.0, 1.5,},
+dp_h[] = { 0.0, 5.84960938e-01,}, /* 0x3f15c000 */
+dp_l[] = { 0.0, 1.56322085e-06,}, /* 0x35d1cfdc */
+zero = 0.0,
+one = 1.0,
+two = 2.0,
+two24 = 16777216.0, /* 0x4b800000 */
+huge = 1.0e30,
+tiny = 1.0e-30,
+ /* poly coefs for (3/2)*(log(x)-2s-2/3*s**3 */
+L1 = 6.0000002384e-01, /* 0x3f19999a */
+L2 = 4.2857143283e-01, /* 0x3edb6db7 */
+L3 = 3.3333334327e-01, /* 0x3eaaaaab */
+L4 = 2.7272811532e-01, /* 0x3e8ba305 */
+L5 = 2.3066075146e-01, /* 0x3e6c3255 */
+L6 = 2.0697501302e-01, /* 0x3e53f142 */
+P1 = 1.6666667163e-01, /* 0x3e2aaaab */
+P2 = -2.7777778450e-03, /* 0xbb360b61 */
+P3 = 6.6137559770e-05, /* 0x388ab355 */
+P4 = -1.6533901999e-06, /* 0xb5ddea0e */
+P5 = 4.1381369442e-08, /* 0x3331bb4c */
+lg2 = 6.9314718246e-01, /* 0x3f317218 */
+lg2_h = 6.93145752e-01, /* 0x3f317200 */
+lg2_l = 1.42860654e-06, /* 0x35bfbe8c */
+ovt = 4.2995665694e-08, /* -(128-log2(ovfl+.5ulp)) */
+cp = 9.6179670095e-01, /* 0x3f76384f =2/(3ln2) */
+cp_h = 9.6179199219e-01, /* 0x3f763800 =head of cp */
+cp_l = 4.7017383622e-06, /* 0x369dc3a0 =tail of cp_h */
+ivln2 = 1.4426950216e+00, /* 0x3fb8aa3b =1/ln2 */
+ivln2_h = 1.4426879883e+00, /* 0x3fb8aa00 =16b 1/ln2*/
+ivln2_l = 7.0526075433e-06; /* 0x36eca570 =1/ln2 tail*/
+
+
+float powf(float x, float y)
+{
+ return __ieee754_powf(x,y);
+}
+
+#ifdef __STDC__
+ float __ieee754_powf(float x, float y)
+#else
+ float __ieee754_powf(x,y)
+ float x, y;
+#endif
+{
+ float z,ax,z_h,z_l,p_h,p_l;
+ float y1,t1,t2,r,s,t,u,v,w;
+ __int32_t i,j,k,yisint,n;
+ __int32_t hx,hy,ix,iy,is;
+
+ GET_FLOAT_WORD(hx,x);
+ GET_FLOAT_WORD(hy,y);
+ ix = hx&0x7fffffff; iy = hy&0x7fffffff;
+
+ /* y==zero: x**0 = 1 */
+ if(FLT_UWORD_IS_ZERO(iy)) return one;
+
+ /* +-NaN return x+y */
+ if(FLT_UWORD_IS_NAN(ix) ||
+ FLT_UWORD_IS_NAN(iy))
+ return x+y;
+
+ /* determine if y is an odd int when x < 0
+ * yisint = 0 ... y is not an integer
+ * yisint = 1 ... y is an odd int
+ * yisint = 2 ... y is an even int
+ */
+ yisint = 0;
+ if(hx<0) {
+ if(iy>=0x4b800000) yisint = 2; /* even integer y */
+ else if(iy>=0x3f800000) {
+ k = (iy>>23)-0x7f; /* exponent */
+ j = iy>>(23-k);
+ if((j<<(23-k))==iy) yisint = 2-(j&1);
+ }
+ }
+
+ /* special value of y */
+ if (FLT_UWORD_IS_INFINITE(iy)) { /* y is +-inf */
+ if (ix==0x3f800000)
+ return y - y; /* inf**+-1 is NaN */
+ else if (ix > 0x3f800000)/* (|x|>1)**+-inf = inf,0 */
+ return (hy>=0)? y: zero;
+ else /* (|x|<1)**-,+inf = inf,0 */
+ return (hy<0)?-y: zero;
+ }
+ if(iy==0x3f800000) { /* y is +-1 */
+ if(hy<0) return one/x; else return x;
+ }
+ if(hy==0x40000000) return x*x; /* y is 2 */
+ if(hy==0x3f000000) { /* y is 0.5 */
+ if(hx>=0) /* x >= +0 */
+ return __ieee754_sqrtf(x);
+ }
+
+ ax = fabsf(x);
+ /* special value of x */
+ if(FLT_UWORD_IS_INFINITE(ix)||FLT_UWORD_IS_ZERO(ix)||ix==0x3f800000){
+ z = ax; /*x is +-0,+-inf,+-1*/
+ if(hy<0) z = one/z; /* z = (1/|x|) */
+ if(hx<0) {
+ if(((ix-0x3f800000)|yisint)==0) {
+ z = (z-z)/(z-z); /* (-1)**non-int is NaN */
+ } else if(yisint==1)
+ z = -z; /* (x<0)**odd = -(|x|**odd) */
+ }
+ return z;
+ }
+
+ /* (x<0)**(non-int) is NaN */
+ if(((((__uint32_t)hx>>31)-1)|yisint)==0) return (x-x)/(x-x);
+
+ /* |y| is huge */
+ if(iy>0x4d000000) { /* if |y| > 2**27 */
+ /* over/underflow if x is not close to one */
+ if(ix<0x3f7ffff8) return (hy<0)? huge*huge:tiny*tiny;
+ if(ix>0x3f800007) return (hy>0)? huge*huge:tiny*tiny;
+ /* now |1-x| is tiny <= 2**-20, suffice to compute
+ log(x) by x-x^2/2+x^3/3-x^4/4 */
+ t = x-1; /* t has 20 trailing zeros */
+ w = (t*t)*((float)0.5-t*((float)0.333333333333-t*(float)0.25));
+ u = ivln2_h*t; /* ivln2_h has 16 sig. bits */
+ v = t*ivln2_l-w*ivln2;
+ t1 = u+v;
+ GET_FLOAT_WORD(is,t1);
+ SET_FLOAT_WORD(t1,is&0xfffff000);
+ t2 = v-(t1-u);
+ } else {
+ float s2,s_h,s_l,t_h,t_l;
+ n = 0;
+ /* take care subnormal number */
+ if(FLT_UWORD_IS_SUBNORMAL(ix))
+ {ax *= two24; n -= 24; GET_FLOAT_WORD(ix,ax); }
+ n += ((ix)>>23)-0x7f;
+ j = ix&0x007fffff;
+ /* determine interval */
+ ix = j|0x3f800000; /* normalize ix */
+ if(j<=0x1cc471) k=0; /* |x|<sqrt(3/2) */
+ else if(j<0x5db3d7) k=1; /* |x|<sqrt(3) */
+ else {k=0;n+=1;ix -= 0x00800000;}
+ SET_FLOAT_WORD(ax,ix);
+
+ /* compute s = s_h+s_l = (x-1)/(x+1) or (x-1.5)/(x+1.5) */
+ u = ax-bp[k]; /* bp[0]=1.0, bp[1]=1.5 */
+ v = one/(ax+bp[k]);
+ s = u*v;
+ s_h = s;
+ GET_FLOAT_WORD(is,s_h);
+ SET_FLOAT_WORD(s_h,is&0xfffff000);
+ /* t_h=ax+bp[k] High */
+ SET_FLOAT_WORD(t_h,((ix>>1)|0x20000000)+0x0040000+(k<<21));
+ t_l = ax - (t_h-bp[k]);
+ s_l = v*((u-s_h*t_h)-s_h*t_l);
+ /* compute log(ax) */
+ s2 = s*s;
+ r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
+ r += s_l*(s_h+s);
+ s2 = s_h*s_h;
+ t_h = (float)3.0+s2+r;
+ GET_FLOAT_WORD(is,t_h);
+ SET_FLOAT_WORD(t_h,is&0xfffff000);
+ t_l = r-((t_h-(float)3.0)-s2);
+ /* u+v = s*(1+...) */
+ u = s_h*t_h;
+ v = s_l*t_h+t_l*s;
+ /* 2/(3log2)*(s+...) */
+ p_h = u+v;
+ GET_FLOAT_WORD(is,p_h);
+ SET_FLOAT_WORD(p_h,is&0xfffff000);
+ p_l = v-(p_h-u);
+ z_h = cp_h*p_h; /* cp_h+cp_l = 2/(3*log2) */
+ z_l = cp_l*p_h+p_l*cp+dp_l[k];
+ /* log2(ax) = (s+..)*2/(3*log2) = n + dp_h + z_h + z_l */
+ t = (float)n;
+ t1 = (((z_h+z_l)+dp_h[k])+t);
+ GET_FLOAT_WORD(is,t1);
+ SET_FLOAT_WORD(t1,is&0xfffff000);
+ t2 = z_l-(((t1-t)-dp_h[k])-z_h);
+ }
+
+ s = one; /* s (sign of result -ve**odd) = -1 else = 1 */
+ if(((((__uint32_t)hx>>31)-1)|(yisint-1))==0)
+ s = -one; /* (-ve)**(odd int) */
+
+ /* split up y into y1+y2 and compute (y1+y2)*(t1+t2) */
+ GET_FLOAT_WORD(is,y);
+ SET_FLOAT_WORD(y1,is&0xfffff000);
+ p_l = (y-y1)*t1+y*t2;
+ p_h = y1*t1;
+ z = p_l+p_h;
+ GET_FLOAT_WORD(j,z);
+ i = j&0x7fffffff;
+ if (j>0) {
+ if (i>FLT_UWORD_EXP_MAX)
+ return s*huge*huge; /* overflow */
+ else if (i==FLT_UWORD_EXP_MAX)
+ if(p_l+ovt>z-p_h) return s*huge*huge; /* overflow */
+ } else {
+ if (i>FLT_UWORD_EXP_MIN)
+ return s*tiny*tiny; /* underflow */
+ else if (i==FLT_UWORD_EXP_MIN)
+ if(p_l<=z-p_h) return s*tiny*tiny; /* underflow */
+ }
+ /*
+ * compute 2**(p_h+p_l)
+ */
+ k = (i>>23)-0x7f;
+ n = 0;
+ if(i>0x3f000000) { /* if |z| > 0.5, set n = [z+0.5] */
+ n = j+(0x00800000>>(k+1));
+ k = ((n&0x7fffffff)>>23)-0x7f; /* new k for n */
+ SET_FLOAT_WORD(t,n&~(0x007fffff>>k));
+ n = ((n&0x007fffff)|0x00800000)>>(23-k);
+ if(j<0) n = -n;
+ p_h -= t;
+ }
+ t = p_l+p_h;
+ GET_FLOAT_WORD(is,t);
+ SET_FLOAT_WORD(t,is&0xfffff000);
+ u = t*lg2_h;
+ v = (p_l-(t-p_h))*lg2+t*lg2_l;
+ z = u+v;
+ w = v-(z-u);
+ t = z*z;
+ t1 = z - t*(P1+t*(P2+t*(P3+t*(P4+t*P5))));
+ r = (z*t1)/(t1-two)-(w+z*w);
+ z = one-(r-z);
+ GET_FLOAT_WORD(j,z);
+ j += (n<<23);
+ if((j>>23)<=0) z = scalbnf(z,(int)n); /* subnormal output */
+ else SET_FLOAT_WORD(z,j);
+ return s*z;
+}
--- /dev/null
+/* ef_rem_pio2.c -- float version of e_rem_pio2.c
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ *
+ */
+
+/* __ieee754_rem_pio2f(x,y)
+ *
+ * return the remainder of x rem pi/2 in y[0]+y[1]
+ * use __kernel_rem_pio2f()
+ */
+
+#include "fdlibm.h"
+
+/*
+ * Table of constants for 2/pi, 396 Hex digits (476 decimal) of 2/pi
+ */
+#ifdef __STDC__
+static const __int32_t two_over_pi[] = {
+#else
+static __int32_t two_over_pi[] = {
+#endif
+0xA2, 0xF9, 0x83, 0x6E, 0x4E, 0x44, 0x15, 0x29, 0xFC,
+0x27, 0x57, 0xD1, 0xF5, 0x34, 0xDD, 0xC0, 0xDB, 0x62,
+0x95, 0x99, 0x3C, 0x43, 0x90, 0x41, 0xFE, 0x51, 0x63,
+0xAB, 0xDE, 0xBB, 0xC5, 0x61, 0xB7, 0x24, 0x6E, 0x3A,
+0x42, 0x4D, 0xD2, 0xE0, 0x06, 0x49, 0x2E, 0xEA, 0x09,
+0xD1, 0x92, 0x1C, 0xFE, 0x1D, 0xEB, 0x1C, 0xB1, 0x29,
+0xA7, 0x3E, 0xE8, 0x82, 0x35, 0xF5, 0x2E, 0xBB, 0x44,
+0x84, 0xE9, 0x9C, 0x70, 0x26, 0xB4, 0x5F, 0x7E, 0x41,
+0x39, 0x91, 0xD6, 0x39, 0x83, 0x53, 0x39, 0xF4, 0x9C,
+0x84, 0x5F, 0x8B, 0xBD, 0xF9, 0x28, 0x3B, 0x1F, 0xF8,
+0x97, 0xFF, 0xDE, 0x05, 0x98, 0x0F, 0xEF, 0x2F, 0x11,
+0x8B, 0x5A, 0x0A, 0x6D, 0x1F, 0x6D, 0x36, 0x7E, 0xCF,
+0x27, 0xCB, 0x09, 0xB7, 0x4F, 0x46, 0x3F, 0x66, 0x9E,
+0x5F, 0xEA, 0x2D, 0x75, 0x27, 0xBA, 0xC7, 0xEB, 0xE5,
+0xF1, 0x7B, 0x3D, 0x07, 0x39, 0xF7, 0x8A, 0x52, 0x92,
+0xEA, 0x6B, 0xFB, 0x5F, 0xB1, 0x1F, 0x8D, 0x5D, 0x08,
+0x56, 0x03, 0x30, 0x46, 0xFC, 0x7B, 0x6B, 0xAB, 0xF0,
+0xCF, 0xBC, 0x20, 0x9A, 0xF4, 0x36, 0x1D, 0xA9, 0xE3,
+0x91, 0x61, 0x5E, 0xE6, 0x1B, 0x08, 0x65, 0x99, 0x85,
+0x5F, 0x14, 0xA0, 0x68, 0x40, 0x8D, 0xFF, 0xD8, 0x80,
+0x4D, 0x73, 0x27, 0x31, 0x06, 0x06, 0x15, 0x56, 0xCA,
+0x73, 0xA8, 0xC9, 0x60, 0xE2, 0x7B, 0xC0, 0x8C, 0x6B,
+};
+
+/* This array is like the one in e_rem_pio2.c, but the numbers are
+ single precision and the last 8 bits are forced to 0. */
+#ifdef __STDC__
+static const __int32_t npio2_hw[] = {
+#else
+static __int32_t npio2_hw[] = {
+#endif
+0x3fc90f00, 0x40490f00, 0x4096cb00, 0x40c90f00, 0x40fb5300, 0x4116cb00,
+0x412fed00, 0x41490f00, 0x41623100, 0x417b5300, 0x418a3a00, 0x4196cb00,
+0x41a35c00, 0x41afed00, 0x41bc7e00, 0x41c90f00, 0x41d5a000, 0x41e23100,
+0x41eec200, 0x41fb5300, 0x4203f200, 0x420a3a00, 0x42108300, 0x4216cb00,
+0x421d1400, 0x42235c00, 0x4229a500, 0x422fed00, 0x42363600, 0x423c7e00,
+0x4242c700, 0x42490f00
+};
+
+/*
+ * invpio2: 24 bits of 2/pi
+ * pio2_1: first 17 bit of pi/2
+ * pio2_1t: pi/2 - pio2_1
+ * pio2_2: second 17 bit of pi/2
+ * pio2_2t: pi/2 - (pio2_1+pio2_2)
+ * pio2_3: third 17 bit of pi/2
+ * pio2_3t: pi/2 - (pio2_1+pio2_2+pio2_3)
+ */
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+zero = 0.0000000000e+00, /* 0x00000000 */
+half = 5.0000000000e-01, /* 0x3f000000 */
+two8 = 2.5600000000e+02, /* 0x43800000 */
+invpio2 = 6.3661980629e-01, /* 0x3f22f984 */
+pio2_1 = 1.5707855225e+00, /* 0x3fc90f80 */
+pio2_1t = 1.0804334124e-05, /* 0x37354443 */
+pio2_2 = 1.0804273188e-05, /* 0x37354400 */
+pio2_2t = 6.0770999344e-11, /* 0x2e85a308 */
+pio2_3 = 6.0770943833e-11, /* 0x2e85a300 */
+pio2_3t = 6.1232342629e-17; /* 0x248d3132 */
+
+#ifdef __STDC__
+ __int32_t __ieee754_rem_pio2f(float x, float *y)
+#else
+ __int32_t __ieee754_rem_pio2f(x,y)
+ float x,y[];
+#endif
+{
+ float z,w,t,r,fn;
+ float tx[3];
+ __int32_t i,j,n,ix,hx;
+ int e0,nx;
+
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(ix<=0x3f490fd8) /* |x| ~<= pi/4 , no need for reduction */
+ {y[0] = x; y[1] = 0; return 0;}
+ if(ix<0x4016cbe4) { /* |x| < 3pi/4, special case with n=+-1 */
+ if(hx>0) {
+ z = x - pio2_1;
+ if((ix&0xfffffff0)!=0x3fc90fd0) { /* 24+24 bit pi OK */
+ y[0] = z - pio2_1t;
+ y[1] = (z-y[0])-pio2_1t;
+ } else { /* near pi/2, use 24+24+24 bit pi */
+ z -= pio2_2;
+ y[0] = z - pio2_2t;
+ y[1] = (z-y[0])-pio2_2t;
+ }
+ return 1;
+ } else { /* negative x */
+ z = x + pio2_1;
+ if((ix&0xfffffff0)!=0x3fc90fd0) { /* 24+24 bit pi OK */
+ y[0] = z + pio2_1t;
+ y[1] = (z-y[0])+pio2_1t;
+ } else { /* near pi/2, use 24+24+24 bit pi */
+ z += pio2_2;
+ y[0] = z + pio2_2t;
+ y[1] = (z-y[0])+pio2_2t;
+ }
+ return -1;
+ }
+ }
+ if(ix<=0x43490f80) { /* |x| ~<= 2^7*(pi/2), medium size */
+ t = fabsf(x);
+ n = (__int32_t) (t*invpio2+half);
+ fn = (float)n;
+ r = t-fn*pio2_1;
+ w = fn*pio2_1t; /* 1st round good to 40 bit */
+ if(n<32&&(ix&0xffffff00)!=npio2_hw[n-1]) {
+ y[0] = r-w; /* quick check no cancellation */
+ } else {
+ __uint32_t high;
+ j = ix>>23;
+ y[0] = r-w;
+ GET_FLOAT_WORD(high,y[0]);
+ i = j-((high>>23)&0xff);
+ if(i>8) { /* 2nd iteration needed, good to 57 */
+ t = r;
+ w = fn*pio2_2;
+ r = t-w;
+ w = fn*pio2_2t-((t-r)-w);
+ y[0] = r-w;
+ GET_FLOAT_WORD(high,y[0]);
+ i = j-((high>>23)&0xff);
+ if(i>25) { /* 3rd iteration need, 74 bits acc */
+ t = r; /* will cover all possible cases */
+ w = fn*pio2_3;
+ r = t-w;
+ w = fn*pio2_3t-((t-r)-w);
+ y[0] = r-w;
+ }
+ }
+ }
+ y[1] = (r-y[0])-w;
+ if(hx<0) {y[0] = -y[0]; y[1] = -y[1]; return -n;}
+ else return n;
+ }
+ /*
+ * all other (large) arguments
+ */
+ if(!FLT_UWORD_IS_FINITE(ix)) {
+ y[0]=y[1]=x-x; return 0;
+ }
+ /* set z = scalbn(|x|,ilogb(x)-7) */
+ e0 = (int)((ix>>23)-134); /* e0 = ilogb(z)-7; */
+ SET_FLOAT_WORD(z, ix - ((__int32_t)e0<<23));
+ for(i=0;i<2;i++) {
+ tx[i] = (float)((__int32_t)(z));
+ z = (z-tx[i])*two8;
+ }
+ tx[2] = z;
+ nx = 3;
+ while(tx[nx-1]==zero) nx--; /* skip zero term */
+ n = __kernel_rem_pio2f(tx,y,e0,nx,2,two_over_pi);
+ if(hx<0) {y[0] = -y[0]; y[1] = -y[1]; return -n;}
+ return n;
+}
--- /dev/null
+/* ef_remainder.c -- float version of e_remainder.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float zero = 0.0;
+#else
+static float zero = 0.0;
+#endif
+
+
+#ifdef __STDC__
+ float __ieee754_remainderf(float x, float p)
+#else
+ float __ieee754_remainderf(x,p)
+ float x,p;
+#endif
+{
+ __int32_t hx,hp;
+ __uint32_t sx;
+ float p_half;
+
+ GET_FLOAT_WORD(hx,x);
+ GET_FLOAT_WORD(hp,p);
+ sx = hx&0x80000000;
+ hp &= 0x7fffffff;
+ hx &= 0x7fffffff;
+
+ /* purge off exception values */
+ if(FLT_UWORD_IS_ZERO(hp)||
+ !FLT_UWORD_IS_FINITE(hx)||
+ FLT_UWORD_IS_NAN(hp))
+ return (x*p)/(x*p);
+
+
+ if (hp<=FLT_UWORD_HALF_MAX) x = __ieee754_fmodf(x,p+p); /* now x < 2p */
+ if ((hx-hp)==0) return zero*x;
+ x = fabsf(x);
+ p = fabsf(p);
+ if (hp<0x01000000) {
+ if(x+x>p) {
+ x-=p;
+ if(x+x>=p) x -= p;
+ }
+ } else {
+ p_half = (float)0.5*p;
+ if(x>p_half) {
+ x-=p;
+ if(x>=p_half) x -= p;
+ }
+ }
+ GET_FLOAT_WORD(hx,x);
+ SET_FLOAT_WORD(x,hx^sx);
+ return x;
+}
--- /dev/null
+/* ef_scalb.c -- float version of e_scalb.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+#include <limits.h>
+
+#ifdef _SCALB_INT
+#ifdef __STDC__
+ float __ieee754_scalbf(float x, int fn)
+#else
+ float __ieee754_scalbf(x,fn)
+ float x; int fn;
+#endif
+#else
+#ifdef __STDC__
+ float __ieee754_scalbf(float x, float fn)
+#else
+ float __ieee754_scalbf(x,fn)
+ float x, fn;
+#endif
+#endif
+{
+#ifdef _SCALB_INT
+ return scalbnf(x,fn);
+#else
+ if (isnanf(x)||isnanf(fn)) return x*fn;
+ if (!finitef(fn)) {
+ if(fn>(float)0.0) return x*fn;
+ else return x/(-fn);
+ }
+ if (rintf(fn)!=fn) return (fn-fn)/(fn-fn);
+#if INT_MAX > 65000
+ if ( fn > (float)65000.0) return scalbnf(x, 65000);
+ if (-fn > (float)65000.0) return scalbnf(x,-65000);
+#else
+ if ( fn > (float)32000.0) return scalbnf(x, 32000);
+ if (-fn > (float)32000.0) return scalbnf(x,-32000);
+#endif
+ return scalbnf(x,(int)fn);
+#endif
+}
--- /dev/null
+/* ef_sinh.c -- float version of e_sinh.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float one = 1.0, shuge = 1.0e37;
+#else
+static float one = 1.0, shuge = 1.0e37;
+#endif
+
+#ifdef __STDC__
+ float __ieee754_sinhf(float x)
+#else
+ float __ieee754_sinhf(x)
+ float x;
+#endif
+{
+ float t,w,h;
+ __int32_t ix,jx;
+
+ GET_FLOAT_WORD(jx,x);
+ ix = jx&0x7fffffff;
+
+ /* x is INF or NaN */
+ if(!FLT_UWORD_IS_FINITE(ix)) return x+x;
+
+ h = 0.5;
+ if (jx<0) h = -h;
+ /* |x| in [0,22], return sign(x)*0.5*(E+E/(E+1))) */
+ if (ix < 0x41b00000) { /* |x|<22 */
+ if (ix<0x31800000) /* |x|<2**-28 */
+ if(shuge+x>one) return x;/* sinh(tiny) = tiny with inexact */
+ t = expm1f(fabsf(x));
+ if(ix<0x3f800000) return h*((float)2.0*t-t*t/(t+one));
+ return h*(t+t/(t+one));
+ }
+
+ /* |x| in [22, log(maxdouble)] return 0.5*exp(|x|) */
+ if (ix<=FLT_UWORD_LOG_MAX) return h*__ieee754_expf(fabsf(x));
+
+ /* |x| in [log(maxdouble), overflowthresold] */
+ if (ix<=FLT_UWORD_LOG_2MAX) {
+ w = __ieee754_expf((float)0.5*fabsf(x));
+ t = h*w;
+ return t*w;
+ }
+
+ /* |x| > overflowthresold, sinh(x) overflow */
+ return x*shuge;
+}
--- /dev/null
+/* ef_sqrtf.c -- float version of e_sqrt.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float one = 1.0, tiny=1.0e-30;
+#else
+static float one = 1.0, tiny=1.0e-30;
+#endif
+
+#ifdef __STDC__
+ float __ieee754_sqrtf(float x)
+#else
+ float __ieee754_sqrtf(x)
+ float x;
+#endif
+{
+ float z;
+ __int32_t sign = (__int32_t)0x80000000;
+ __uint32_t r,hx;
+ __int32_t ix,s,q,m,t,i;
+
+ GET_FLOAT_WORD(ix,x);
+ hx = ix&0x7fffffff;
+
+ /* take care of Inf and NaN */
+ if(!FLT_UWORD_IS_FINITE(hx))
+ return x*x+x; /* sqrt(NaN)=NaN, sqrt(+inf)=+inf
+ sqrt(-inf)=sNaN */
+ /* take care of zero and -ves */
+ if(FLT_UWORD_IS_ZERO(hx)) return x;/* sqrt(+-0) = +-0 */
+ if(ix<0) return (x-x)/(x-x); /* sqrt(-ve) = sNaN */
+
+ /* normalize x */
+ m = (ix>>23);
+ if(FLT_UWORD_IS_SUBNORMAL(hx)) { /* subnormal x */
+ for(i=0;(ix&0x00800000L)==0;i++) ix<<=1;
+ m -= i-1;
+ }
+ m -= 127; /* unbias exponent */
+ ix = (ix&0x007fffffL)|0x00800000L;
+ if(m&1) /* odd m, double x to make it even */
+ ix += ix;
+ m >>= 1; /* m = [m/2] */
+
+ /* generate sqrt(x) bit by bit */
+ ix += ix;
+ q = s = 0; /* q = sqrt(x) */
+ r = 0x01000000L; /* r = moving bit from right to left */
+
+ while(r!=0) {
+ t = s+r;
+ if(t<=ix) {
+ s = t+r;
+ ix -= t;
+ q += r;
+ }
+ ix += ix;
+ r>>=1;
+ }
+
+ /* use floating add to find out rounding direction */
+ if(ix!=0) {
+ z = one-tiny; /* trigger inexact flag */
+ if (z>=one) {
+ z = one+tiny;
+ if (z>one)
+ q += 2;
+ else
+ q += (q&1);
+ }
+ }
+ ix = (q>>1)+0x3f000000L;
+ ix += (m <<23);
+ SET_FLOAT_WORD(z,ix);
+ return z;
+}
+
+
+#ifdef __STDC__
+ float sqrtf(float x)
+#else
+ float sqrtf(x)
+ float x;
+#endif
+ {
+ return __ieee754_sqrtf(x);
+ }
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004, 2003 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: eqsf.c,v 1.5 2004/05/28 10:11:47 diwil Exp $
+ */
+
+/* TESTED */
+
+void
+__attribute__((naked)) __eqsf2()
+{
+ __asm__ __volatile("br #__cmpsf2");
+}
+
--- /dev/null
+/* erf_gamma.c -- float version of er_gamma.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ *
+ */
+
+/* __ieee754_gammaf_r(x, signgamp)
+ * Reentrant version of the logarithm of the Gamma function
+ * with user provide pointer for the sign of Gamma(x).
+ *
+ * Method: See __ieee754_lgammaf_r
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float __ieee754_gammaf_r(float x, int *signgamp)
+#else
+ float __ieee754_gammaf_r(x,signgamp)
+ float x; int *signgamp;
+#endif
+{
+ return __ieee754_lgammaf_r(x,signgamp);
+}
--- /dev/null
+/* erf_lgamma.c -- float version of er_lgamma.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ *
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+two23= 8.3886080000e+06, /* 0x4b000000 */
+half= 5.0000000000e-01, /* 0x3f000000 */
+one = 1.0000000000e+00, /* 0x3f800000 */
+pi = 3.1415927410e+00, /* 0x40490fdb */
+a0 = 7.7215664089e-02, /* 0x3d9e233f */
+a1 = 3.2246702909e-01, /* 0x3ea51a66 */
+a2 = 6.7352302372e-02, /* 0x3d89f001 */
+a3 = 2.0580807701e-02, /* 0x3ca89915 */
+a4 = 7.3855509982e-03, /* 0x3bf2027e */
+a5 = 2.8905137442e-03, /* 0x3b3d6ec6 */
+a6 = 1.1927076848e-03, /* 0x3a9c54a1 */
+a7 = 5.1006977446e-04, /* 0x3a05b634 */
+a8 = 2.2086278477e-04, /* 0x39679767 */
+a9 = 1.0801156895e-04, /* 0x38e28445 */
+a10 = 2.5214456400e-05, /* 0x37d383a2 */
+a11 = 4.4864096708e-05, /* 0x383c2c75 */
+tc = 1.4616321325e+00, /* 0x3fbb16c3 */
+tf = -1.2148628384e-01, /* 0xbdf8cdcd */
+/* tt = -(tail of tf) */
+tt = 6.6971006518e-09, /* 0x31e61c52 */
+t0 = 4.8383611441e-01, /* 0x3ef7b95e */
+t1 = -1.4758771658e-01, /* 0xbe17213c */
+t2 = 6.4624942839e-02, /* 0x3d845a15 */
+t3 = -3.2788541168e-02, /* 0xbd064d47 */
+t4 = 1.7970675603e-02, /* 0x3c93373d */
+t5 = -1.0314224288e-02, /* 0xbc28fcfe */
+t6 = 6.1005386524e-03, /* 0x3bc7e707 */
+t7 = -3.6845202558e-03, /* 0xbb7177fe */
+t8 = 2.2596477065e-03, /* 0x3b141699 */
+t9 = -1.4034647029e-03, /* 0xbab7f476 */
+t10 = 8.8108185446e-04, /* 0x3a66f867 */
+t11 = -5.3859531181e-04, /* 0xba0d3085 */
+t12 = 3.1563205994e-04, /* 0x39a57b6b */
+t13 = -3.1275415677e-04, /* 0xb9a3f927 */
+t14 = 3.3552918467e-04, /* 0x39afe9f7 */
+u0 = -7.7215664089e-02, /* 0xbd9e233f */
+u1 = 6.3282704353e-01, /* 0x3f2200f4 */
+u2 = 1.4549225569e+00, /* 0x3fba3ae7 */
+u3 = 9.7771751881e-01, /* 0x3f7a4bb2 */
+u4 = 2.2896373272e-01, /* 0x3e6a7578 */
+u5 = 1.3381091878e-02, /* 0x3c5b3c5e */
+v1 = 2.4559779167e+00, /* 0x401d2ebe */
+v2 = 2.1284897327e+00, /* 0x4008392d */
+v3 = 7.6928514242e-01, /* 0x3f44efdf */
+v4 = 1.0422264785e-01, /* 0x3dd572af */
+v5 = 3.2170924824e-03, /* 0x3b52d5db */
+s0 = -7.7215664089e-02, /* 0xbd9e233f */
+s1 = 2.1498242021e-01, /* 0x3e5c245a */
+s2 = 3.2577878237e-01, /* 0x3ea6cc7a */
+s3 = 1.4635047317e-01, /* 0x3e15dce6 */
+s4 = 2.6642270386e-02, /* 0x3cda40e4 */
+s5 = 1.8402845599e-03, /* 0x3af135b4 */
+s6 = 3.1947532989e-05, /* 0x3805ff67 */
+r1 = 1.3920053244e+00, /* 0x3fb22d3b */
+r2 = 7.2193557024e-01, /* 0x3f38d0c5 */
+r3 = 1.7193385959e-01, /* 0x3e300f6e */
+r4 = 1.8645919859e-02, /* 0x3c98bf54 */
+r5 = 7.7794247773e-04, /* 0x3a4beed6 */
+r6 = 7.3266842264e-06, /* 0x36f5d7bd */
+w0 = 4.1893854737e-01, /* 0x3ed67f1d */
+w1 = 8.3333335817e-02, /* 0x3daaaaab */
+w2 = -2.7777778450e-03, /* 0xbb360b61 */
+w3 = 7.9365057172e-04, /* 0x3a500cfd */
+w4 = -5.9518753551e-04, /* 0xba1c065c */
+w5 = 8.3633989561e-04, /* 0x3a5b3dd2 */
+w6 = -1.6309292987e-03; /* 0xbad5c4e8 */
+
+#ifdef __STDC__
+static const float zero= 0.0000000000e+00;
+#else
+static float zero= 0.0000000000e+00;
+#endif
+
+#ifdef __STDC__
+ static float sin_pif(float x)
+#else
+ static float sin_pif(x)
+ float x;
+#endif
+{
+ float y,z;
+ __int32_t n,ix;
+
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+
+ if(ix<0x3e800000) return __kernel_sinf(pi*x,zero,0);
+ y = -x; /* x is assume negative */
+
+ /*
+ * argument reduction, make sure inexact flag not raised if input
+ * is an integer
+ */
+ z = floorf(y);
+ if(z!=y) { /* inexact anyway */
+ y *= (float)0.5;
+ y = (float)2.0*(y - floorf(y)); /* y = |x| mod 2.0 */
+ n = (__int32_t) (y*(float)4.0);
+ } else {
+ if(ix>=0x4b800000) {
+ y = zero; n = 0; /* y must be even */
+ } else {
+ if(ix<0x4b000000) z = y+two23; /* exact */
+ GET_FLOAT_WORD(n,z);
+ n &= 1;
+ y = n;
+ n<<= 2;
+ }
+ }
+ switch (n) {
+ case 0: y = __kernel_sinf(pi*y,zero,0); break;
+ case 1:
+ case 2: y = __kernel_cosf(pi*((float)0.5-y),zero); break;
+ case 3:
+ case 4: y = __kernel_sinf(pi*(one-y),zero,0); break;
+ case 5:
+ case 6: y = -__kernel_cosf(pi*(y-(float)1.5),zero); break;
+ default: y = __kernel_sinf(pi*(y-(float)2.0),zero,0); break;
+ }
+ return -y;
+}
+
+
+#ifdef __STDC__
+ float __ieee754_lgammaf_r(float x, int *signgamp)
+#else
+ float __ieee754_lgammaf_r(x,signgamp)
+ float x; int *signgamp;
+#endif
+{
+ float t,y,z,nadj,p,p1,p2,p3,q,r,w;
+ __int32_t i,hx,ix;
+
+ GET_FLOAT_WORD(hx,x);
+
+ /* purge off +-inf, NaN, +-0, and negative arguments */
+ *signgamp = 1;
+ ix = hx&0x7fffffff;
+ if(ix>=0x7f800000) return x*x;
+ if(ix==0) return one/zero;
+ if(ix<0x1c800000) { /* |x|<2**-70, return -log(|x|) */
+ if(hx<0) {
+ *signgamp = -1;
+ return -__ieee754_logf(-x);
+ } else return -__ieee754_logf(x);
+ }
+ if(hx<0) {
+ if(ix>=0x4b000000) /* |x|>=2**23, must be -integer */
+ return one/zero;
+ t = sin_pif(x);
+ if(t==zero) return one/zero; /* -integer */
+ nadj = __ieee754_logf(pi/fabsf(t*x));
+ if(t<zero) *signgamp = -1;
+ x = -x;
+ }
+
+ /* purge off 1 and 2 */
+ if (ix==0x3f800000||ix==0x40000000) r = 0;
+ /* for x < 2.0 */
+ else if(ix<0x40000000) {
+ if(ix<=0x3f666666) { /* lgamma(x) = lgamma(x+1)-log(x) */
+ r = -__ieee754_logf(x);
+ if(ix>=0x3f3b4a20) {y = one-x; i= 0;}
+ else if(ix>=0x3e6d3308) {y= x-(tc-one); i=1;}
+ else {y = x; i=2;}
+ } else {
+ r = zero;
+ if(ix>=0x3fdda618) {y=(float)2.0-x;i=0;} /* [1.7316,2] */
+ else if(ix>=0x3F9da620) {y=x-tc;i=1;} /* [1.23,1.73] */
+ else {y=x-one;i=2;}
+ }
+ switch(i) {
+ case 0:
+ z = y*y;
+ p1 = a0+z*(a2+z*(a4+z*(a6+z*(a8+z*a10))));
+ p2 = z*(a1+z*(a3+z*(a5+z*(a7+z*(a9+z*a11)))));
+ p = y*p1+p2;
+ r += (p-(float)0.5*y); break;
+ case 1:
+ z = y*y;
+ w = z*y;
+ p1 = t0+w*(t3+w*(t6+w*(t9 +w*t12))); /* parallel comp */
+ p2 = t1+w*(t4+w*(t7+w*(t10+w*t13)));
+ p3 = t2+w*(t5+w*(t8+w*(t11+w*t14)));
+ p = z*p1-(tt-w*(p2+y*p3));
+ r += (tf + p); break;
+ case 2:
+ p1 = y*(u0+y*(u1+y*(u2+y*(u3+y*(u4+y*u5)))));
+ p2 = one+y*(v1+y*(v2+y*(v3+y*(v4+y*v5))));
+ r += (-(float)0.5*y + p1/p2);
+ }
+ }
+ else if(ix<0x41000000) { /* x < 8.0 */
+ i = (__int32_t)x;
+ t = zero;
+ y = x-(float)i;
+ p = y*(s0+y*(s1+y*(s2+y*(s3+y*(s4+y*(s5+y*s6))))));
+ q = one+y*(r1+y*(r2+y*(r3+y*(r4+y*(r5+y*r6)))));
+ r = half*y+p/q;
+ z = one; /* lgamma(1+s) = log(s) + lgamma(s) */
+ switch(i) {
+ case 7: z *= (y+(float)6.0); /* FALLTHRU */
+ case 6: z *= (y+(float)5.0); /* FALLTHRU */
+ case 5: z *= (y+(float)4.0); /* FALLTHRU */
+ case 4: z *= (y+(float)3.0); /* FALLTHRU */
+ case 3: z *= (y+(float)2.0); /* FALLTHRU */
+ r += __ieee754_logf(z); break;
+ }
+ /* 8.0 <= x < 2**58 */
+ } else if (ix < 0x5c800000) {
+ t = __ieee754_logf(x);
+ z = one/x;
+ y = z*z;
+ w = w0+z*(w1+y*(w2+y*(w3+y*(w4+y*(w5+y*w6)))));
+ r = (x-half)*(t-one)+w;
+ } else
+ /* 2**58 <= x <= inf */
+ r = x*(__ieee754_logf(x)-one);
+ if(hx<0) r = nadj - r;
+ return r;
+}
--- /dev/null
+
+/* @(#)fdlibm.h 5.1 93/09/24 */
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+/* CYGNUS LOCAL: Include files. */
+#include <sys/config.h>
+#include <math.h>
+#include <sys/ieeefp.h>
+
+/* CYGNUS LOCAL: Default to XOPEN_MODE. */
+#define _XOPEN_MODE
+
+/* Most routines need to check whether a float is finite, infinite, or not a
+ number, and many need to know whether the result of an operation will
+ overflow. These conditions depend on whether the largest exponent is
+ used for NaNs & infinities, or whether it's used for finite numbers. The
+ macros below wrap up that kind of information:
+
+ FLT_UWORD_IS_FINITE(X)
+ True if a positive float with bitmask X is finite.
+
+ FLT_UWORD_IS_NAN(X)
+ True if a positive float with bitmask X is not a number.
+
+ FLT_UWORD_IS_INFINITE(X)
+ True if a positive float with bitmask X is +infinity.
+
+ FLT_UWORD_MAX
+ The bitmask of FLT_MAX.
+
+ FLT_UWORD_HALF_MAX
+ The bitmask of FLT_MAX/2.
+
+ FLT_UWORD_EXP_MAX
+ The bitmask of the largest finite exponent (129 if the largest
+ exponent is used for finite numbers, 128 otherwise).
+
+ FLT_UWORD_LOG_MAX
+ The bitmask of log(FLT_MAX), rounded down. This value is the largest
+ input that can be passed to exp() without producing overflow.
+
+ FLT_UWORD_LOG_2MAX
+ The bitmask of log(2*FLT_MAX), rounded down. This value is the
+ largest input than can be passed to cosh() without producing
+ overflow.
+
+ FLT_LARGEST_EXP
+ The largest biased exponent that can be used for finite numbers
+ (255 if the largest exponent is used for finite numbers, 254
+ otherwise) */
+
+#ifdef _FLT_LARGEST_EXPONENT_IS_NORMAL
+#define FLT_UWORD_IS_FINITE(x) 1
+#define FLT_UWORD_IS_NAN(x) 0
+#define FLT_UWORD_IS_INFINITE(x) 0
+#define FLT_UWORD_MAX 0x7fffffff
+#define FLT_UWORD_EXP_MAX 0x43010000
+#define FLT_UWORD_LOG_MAX 0x42b2d4fc
+#define FLT_UWORD_LOG_2MAX 0x42b437e0
+#define HUGE ((float)0X1.FFFFFEP128)
+#else
+#define FLT_UWORD_IS_FINITE(x) ((x)<0x7f800000L)
+#define FLT_UWORD_IS_NAN(x) ((x)>0x7f800000L)
+#define FLT_UWORD_IS_INFINITE(x) ((x)==0x7f800000L)
+#define FLT_UWORD_MAX 0x7f7fffffL
+#define FLT_UWORD_EXP_MAX 0x43000000L
+#define FLT_UWORD_LOG_MAX 0x42b17217L
+#define FLT_UWORD_LOG_2MAX 0x42b2d4fcL
+#ifndef HUGE
+#define HUGE ((float)3.40282346638528860e+38)
+#endif
+#endif
+#define FLT_UWORD_HALF_MAX (FLT_UWORD_MAX-(1L<<23))
+#define FLT_LARGEST_EXP (FLT_UWORD_MAX>>23)
+
+/* Many routines check for zero and subnormal numbers. Such things depend
+ on whether the target supports denormals or not:
+
+ FLT_UWORD_IS_ZERO(X)
+ True if a positive float with bitmask X is +0. Without denormals,
+ any float with a zero exponent is a +0 representation. With
+ denormals, the only +0 representation is a 0 bitmask.
+
+ FLT_UWORD_IS_SUBNORMAL(X)
+ True if a non-zero positive float with bitmask X is subnormal.
+ (Routines should check for zeros first.)
+
+ FLT_UWORD_MIN
+ The bitmask of the smallest float above +0. Call this number
+ REAL_FLT_MIN...
+
+ FLT_UWORD_EXP_MIN
+ The bitmask of the float representation of REAL_FLT_MIN's exponent.
+
+ FLT_UWORD_LOG_MIN
+ The bitmask of |log(REAL_FLT_MIN)|, rounding down.
+
+ FLT_SMALLEST_EXP
+ REAL_FLT_MIN's exponent - EXP_BIAS (1 if denormals are not supported,
+ -22 if they are).
+*/
+
+#ifdef _FLT_NO_DENORMALS
+#define FLT_UWORD_IS_ZERO(x) ((x)<0x00800000L)
+#define FLT_UWORD_IS_SUBNORMAL(x) 0
+#define FLT_UWORD_MIN 0x00800000
+#define FLT_UWORD_EXP_MIN 0x42fc0000
+#define FLT_UWORD_LOG_MIN 0x42aeac50
+#define FLT_SMALLEST_EXP 1
+#else
+#define FLT_UWORD_IS_ZERO(x) ((x)==0)
+#define FLT_UWORD_IS_SUBNORMAL(x) ((x)<0x00800000L)
+#define FLT_UWORD_MIN 0x00000001
+#define FLT_UWORD_EXP_MIN 0x43160000
+#define FLT_UWORD_LOG_MIN 0x42cff1b5
+#define FLT_SMALLEST_EXP -22
+#endif
+
+#ifdef __STDC__
+#define __P(p) p
+#else
+#define __P(p) ()
+#endif
+
+/*
+ * set X_TLOSS = pi*2**52, which is possibly defined in <values.h>
+ * (one may replace the following line by "#include <values.h>")
+ */
+
+#define X_TLOSS 1.41484755040568800000e+16
+
+/* Functions that are not documented, and are not in <math.h>. */
+
+extern double logb __P((double));
+#ifdef _SCALB_INT
+extern double scalb __P((double, int));
+#else
+extern double scalb __P((double, double));
+#endif
+extern double significand __P((double));
+
+/* ieee style elementary functions */
+extern double __ieee754_sqrt __P((double));
+extern double __ieee754_acos __P((double));
+extern double __ieee754_acosh __P((double));
+extern double __ieee754_log __P((double));
+extern double __ieee754_atanh __P((double));
+extern double __ieee754_asin __P((double));
+extern double __ieee754_atan2 __P((double,double));
+extern double __ieee754_exp __P((double));
+extern double __ieee754_cosh __P((double));
+extern double __ieee754_fmod __P((double,double));
+extern double __ieee754_pow __P((double,double));
+extern double __ieee754_lgamma_r __P((double,int *));
+extern double __ieee754_gamma_r __P((double,int *));
+extern double __ieee754_log10 __P((double));
+extern double __ieee754_sinh __P((double));
+extern double __ieee754_hypot __P((double,double));
+extern double __ieee754_j0 __P((double));
+extern double __ieee754_j1 __P((double));
+extern double __ieee754_y0 __P((double));
+extern double __ieee754_y1 __P((double));
+extern double __ieee754_jn __P((int,double));
+extern double __ieee754_yn __P((int,double));
+extern double __ieee754_remainder __P((double,double));
+extern __int32_t __ieee754_rem_pio2 __P((double,double*));
+#ifdef _SCALB_INT
+extern double __ieee754_scalb __P((double,int));
+#else
+extern double __ieee754_scalb __P((double,double));
+#endif
+
+/* fdlibm kernel function */
+extern double __kernel_standard __P((double,double,int));
+extern double __kernel_sin __P((double,double,int));
+extern double __kernel_cos __P((double,double));
+extern double __kernel_tan __P((double,double,int));
+extern int __kernel_rem_pio2 __P((double*,double*,int,int,int,const __int32_t*));
+
+/* Undocumented float functions. */
+extern float logbf __P((float));
+#ifdef _SCALB_INT
+extern float scalbf __P((float, int));
+#else
+extern float scalbf __P((float, float));
+#endif
+extern float significandf __P((float));
+
+/* ieee style elementary float functions */
+extern float __ieee754_sqrtf __P((float));
+extern float __ieee754_acosf __P((float));
+extern float __ieee754_acoshf __P((float));
+extern float __ieee754_logf __P((float));
+extern float __ieee754_atanhf __P((float));
+extern float __ieee754_asinf __P((float));
+extern float __ieee754_atan2f __P((float,float));
+extern float __ieee754_expf __P((float));
+extern float __ieee754_coshf __P((float));
+extern float __ieee754_fmodf __P((float,float));
+extern float __ieee754_powf __P((float,float));
+extern float __ieee754_lgammaf_r __P((float,int *));
+extern float __ieee754_gammaf_r __P((float,int *));
+extern float __ieee754_log10f __P((float));
+extern float __ieee754_sinhf __P((float));
+extern float __ieee754_hypotf __P((float,float));
+extern float __ieee754_j0f __P((float));
+extern float __ieee754_j1f __P((float));
+extern float __ieee754_y0f __P((float));
+extern float __ieee754_y1f __P((float));
+extern float __ieee754_jnf __P((int,float));
+extern float __ieee754_ynf __P((int,float));
+extern float __ieee754_remainderf __P((float,float));
+extern __int32_t __ieee754_rem_pio2f __P((float,float*));
+#ifdef _SCALB_INT
+extern float __ieee754_scalbf __P((float,int));
+#else
+extern float __ieee754_scalbf __P((float,float));
+#endif
+
+/* float versions of fdlibm kernel functions */
+extern float __kernel_sinf __P((float,float,int));
+extern float __kernel_cosf __P((float,float));
+extern float __kernel_tanf __P((float,float,int));
+extern int __kernel_rem_pio2f __P((float*,float*,int,int,int,const __int32_t*));
+
+/* The original code used statements like
+ n0 = ((*(int*)&one)>>29)^1; * index of high word *
+ ix0 = *(n0+(int*)&x); * high word of x *
+ ix1 = *((1-n0)+(int*)&x); * low word of x *
+ to dig two 32 bit words out of the 64 bit IEEE floating point
+ value. That is non-ANSI, and, moreover, the gcc instruction
+ scheduler gets it wrong. We instead use the following macros.
+ Unlike the original code, we determine the endianness at compile
+ time, not at run time; I don't see much benefit to selecting
+ endianness at run time. */
+
+#ifndef __IEEE_BIG_ENDIAN
+#ifndef __IEEE_LITTLE_ENDIAN
+ #error Must define endianness
+#endif
+#endif
+
+/* A union which permits us to convert between a double and two 32 bit
+ ints. */
+
+#ifdef __IEEE_BIG_ENDIAN
+
+typedef union
+{
+ double value;
+ struct
+ {
+ __uint32_t msw;
+ __uint32_t lsw;
+ } parts;
+} ieee_double_shape_type;
+
+#endif
+
+#ifdef __IEEE_LITTLE_ENDIAN
+
+typedef union
+{
+ double value;
+ struct
+ {
+ __uint32_t lsw;
+ __uint32_t msw;
+ } parts;
+} ieee_double_shape_type;
+
+#endif
+
+/* Get two 32 bit ints from a double. */
+
+#define EXTRACT_WORDS(ix0,ix1,d) \
+do { \
+ ieee_double_shape_type ew_u; \
+ ew_u.value = (d); \
+ (ix0) = ew_u.parts.msw; \
+ (ix1) = ew_u.parts.lsw; \
+} while (0)
+
+/* Get the more significant 32 bit int from a double. */
+
+#define GET_HIGH_WORD(i,d) \
+do { \
+ ieee_double_shape_type gh_u; \
+ gh_u.value = (d); \
+ (i) = gh_u.parts.msw; \
+} while (0)
+
+/* Get the less significant 32 bit int from a double. */
+
+#define GET_LOW_WORD(i,d) \
+do { \
+ ieee_double_shape_type gl_u; \
+ gl_u.value = (d); \
+ (i) = gl_u.parts.lsw; \
+} while (0)
+
+/* Set a double from two 32 bit ints. */
+
+#define INSERT_WORDS(d,ix0,ix1) \
+do { \
+ ieee_double_shape_type iw_u; \
+ iw_u.parts.msw = (ix0); \
+ iw_u.parts.lsw = (ix1); \
+ (d) = iw_u.value; \
+} while (0)
+
+/* Set the more significant 32 bits of a double from an int. */
+
+#define SET_HIGH_WORD(d,v) \
+do { \
+ ieee_double_shape_type sh_u; \
+ sh_u.value = (d); \
+ sh_u.parts.msw = (v); \
+ (d) = sh_u.value; \
+} while (0)
+
+/* Set the less significant 32 bits of a double from an int. */
+
+#define SET_LOW_WORD(d,v) \
+do { \
+ ieee_double_shape_type sl_u; \
+ sl_u.value = (d); \
+ sl_u.parts.lsw = (v); \
+ (d) = sl_u.value; \
+} while (0)
+
+/* A union which permits us to convert between a float and a 32 bit
+ int. */
+
+typedef union
+{
+ float value;
+ __uint32_t word;
+} ieee_float_shape_type;
+
+/* Get a 32 bit int from a float. */
+
+#define GET_FLOAT_WORD(i,d) \
+do { \
+ ieee_float_shape_type gf_u; \
+ gf_u.value = (d); \
+ (i) = gf_u.word; \
+} while (0)
+
+/* Set a float from a 32 bit int. */
+
+#define SET_FLOAT_WORD(d,i) \
+do { \
+ ieee_float_shape_type sf_u; \
+ sf_u.word = (i); \
+ (d) = sf_u.value; \
+} while (0)
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: fixsfdi.c,v 1.3 2004/05/28 10:11:47 diwil Exp $
+ */
+
+
+/* TESTED */
+
+#include <limits.h>
+
+extern long long __fixunssfdi(long);
+
+long long __fixsfdi(long a1)
+{
+ if(!a1) return a1;
+
+ if(a1<0)
+ {
+ a1 &= 0x7fffffff;
+ return -__fixunssfdi(a1);
+ }
+ return __fixunssfdi(a1);
+}
+
+
+
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: fixsfsi.c,v 1.6 2004/05/28 10:11:47 diwil Exp $
+ */
+
+
+/* TESTED */
+
+#include <limits.h>
+
+extern long __fixunssfsi(long);
+
+long __fixsfsi(long a1)
+{
+ if(!a1) return a1;
+
+ if(a1<0)
+ {
+ a1 &= 0x7fffffff;
+ return -__fixunssfsi(a1);
+ }
+
+ return __fixunssfsi(a1);
+}
+
+
+
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: fixunssfdi.c,v 1.2 2004/05/28 10:11:47 diwil Exp $
+ */
+
+/* TESTED */
+
+
+#include <limits.h>
+
+unsigned long long __fixunssfdi(unsigned long a1)
+{
+ register int exp;
+ union {
+ long ll;
+ struct _li {int lo,hi;} li;
+ } at;
+
+ unsigned long long a2;
+
+
+ at.ll = a1;
+
+ if(!a1) return a1;
+
+ if(a1 >= 0x5f800000ul )
+ {
+ return ULONG_LONG_MAX;
+ }
+
+ exp = at.li.hi & 0x7f80;
+
+ exp >>= 7;
+
+ exp = exp - 126 - 64;
+
+ if( exp > 0 ) return (0xFFFFFFFFFFFFFFFFull);
+
+ a1 &= 0x007FFFFFul;
+ a1 |= 1ul << 23;
+
+ a1 <<= 8;
+
+ a2 = (unsigned long long)a1<<32;
+
+ exp = -exp;
+
+ while(exp--)
+ {
+ a2 >>= 1;
+ }
+
+ return a2;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: fixunssfsi.c,v 1.5 2004/05/28 10:11:47 diwil Exp $
+ */
+
+
+/* TESTED */
+
+#include <limits.h>
+
+unsigned long __fixunssfsi(unsigned long a1)
+{
+ register int exp;
+ union {
+ long ll;
+ struct _li {int lo,hi;} li;
+ } at;
+
+ at.ll = a1;
+
+ if(!a1) return a1;
+
+ if(a1 >= 0x4f800000ul )
+ {
+ return ULONG_MAX;
+ }
+
+ exp = at.li.hi & 0x7f80;
+
+ exp >>= 7;
+
+ exp = exp - 126 - 32;
+
+ if( exp > 0 ) return (0xFFFFFFFFul);
+
+ a1 &= 0x007FFFFFul;
+ a1 |= 1ul << 23;
+
+ a1 <<= 8;
+
+ exp = -exp;
+
+ while(exp--)
+ {
+ a1 >>= 1;
+ }
+
+ return a1;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: floatdisf.c,v 1.6 2004/05/28 10:11:47 diwil Exp $
+ */
+
+
+#define HIDDEN (1l << 23)
+
+/* 64 bit int to 32 bit float */
+
+/* TESTED */
+
+long __floatdisf(long long a1)
+{
+ register short sign;
+ register short exp = (63<<7) + (126<<7);
+ register unsigned long a2;
+
+ if(!a1) return 0l;
+
+ if(a1<0)
+ {
+ sign = 0x8000;
+ a1 = -a1;
+ }
+ else
+ {
+ sign = 0;
+ }
+
+ while ((unsigned long long)a1 < (1ull << 62))
+ {
+ a1 <<= 1;
+ exp -= (1 << 7);
+ }
+
+ /* _correct_ rounding */
+ if((a1&(0x7full<<32)) == (0x40ull<<32))
+ {
+ if(a1&(1ull<<39))
+ a1 += 0x40ull<<32;
+ }
+ else
+ {
+ a1 += 0x3full<<32;
+ }
+
+ if((unsigned long long)a1 >= (1ull << 63))
+ {
+ a1 >>= 1;
+ exp += (1<<7);
+ }
+
+ a2 = (unsigned long long)a1 >> 32;
+ a2 >>= 7;
+ a2 &= ~HIDDEN ;
+ a2 &= 0x7FFFFFul;
+
+ exp |= sign;
+
+ a2 = ((long)exp << 16) | a2;
+
+ return a2;
+}
+
+#if 0
+#include <stdio.h>
+
+int main()
+{
+ long long i;
+ union {
+ float f;
+ long l;
+ } n1,n2;
+
+
+ for(i = 0x10000000 ; i < 0x7fffffff; i++)
+ {
+
+ n1.f = (float)i;
+
+ n2.l = floatdisf(i);
+
+ if(n1.l != n2.l)
+ {
+ printf("rerr: %qd true:%x (%f), got:%x (%f)\n", i, n1.l,n1.f, n2.l, n2.f);
+ }
+
+ }
+
+ return 0;
+
+}
+#endif
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: floatsisf.c,v 1.6 2004/05/28 10:11:47 diwil Exp $
+ */
+
+
+
+#define EXCESS 126
+#define SIGNBIT 0x80000000ul
+#define HIDDEN (1ul << 23)
+#define SIGN(fp) ((fp) & SIGNBIT)
+#define EXP(fp) (((fp) >> 23) & 0x00FFul)
+#define MANT(fp) (((fp) & 0x7FFFFFul) | HIDDEN)
+#define PACK(s,e,m) ((s) | ((e) << 23) | (m))
+
+
+/* TESTED */
+
+/* 32 bit int to 32 bit float */
+long __floatsisf(long a1)
+{
+ register short sign;
+ register short exp = (31<<7) + (EXCESS<<7);
+
+
+ if(!a1) return a1;
+
+ if(a1<0)
+ {
+ sign = 0x8000ul;
+ a1 = -a1;
+ }
+ else
+ {
+ sign = 0;
+ }
+
+ while ((unsigned long)a1 < (1ul<<30) )
+ {
+ a1 <<= 1;
+ exp -= (1 << 7);
+ }
+
+ /* _correct_ rounding */
+ if((a1&0x7f) == 0x40)
+ {
+ if(a1&(1<<7))
+ a1 += 0x3f+1;
+ }
+ else
+ {
+ a1 += 0x3f;
+ }
+
+ if((unsigned long)a1 >= (1ul << 31))
+ {
+ a1 >>= 1;
+ exp += (1<<7);
+ }
+
+ a1 >>= 7;
+ a1 &= ~HIDDEN ;
+ a1 &= 0x7FFFFFul;
+
+ exp |= sign;
+
+ a1 = ((long)exp << 16) | a1;
+
+ return a1;
+}
+
+
+#if 0
+#include <stdio.h>
+
+int main()
+{
+ int i;
+ union {
+ float f;
+ long l;
+ } n1,n2;
+
+
+ floatsisf(33554431);
+
+ for(i = 0x10000000 ; i < 0x7fffffff; i++)
+ {
+
+ n1.f = i;
+
+ n2.l = floatsisf(i);
+
+ if(n1.l != n2.l)
+ {
+ printf("rerr: %d true:%x (%f), got:%x (%f)\n", i, n1.l,n1.f, n2.l, n2.f);
+ }
+
+ }
+
+return 0;
+
+}
+
+#endif
+
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: gesf.c,v 1.5 2004/05/28 10:11:47 diwil Exp $
+ */
+
+/* TESTED */
+
+#if 0
+extern int __cmpsf2 (long, long);
+
+int __gesf2(long a1, long a2)
+{
+ return __cmpsf2 (a1, a2);
+}
+#endif
+
+void
+__attribute__((naked)) __gesf2()
+{
+ __asm__ __volatile("br #__cmpsf2");
+}
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: gtsf.c,v 1.5 2004/05/28 10:11:47 diwil Exp $
+ */
+
+/* TESTED */
+
+void
+__attribute__((naked)) __gtsf2()
+{
+ __asm__ __volatile("br #__cmpsf2");
+}
--- /dev/null
+/* kf_cos.c -- float version of k_cos.c
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+one = 1.0000000000e+00, /* 0x3f800000 */
+C1 = 4.1666667908e-02, /* 0x3d2aaaab */
+C2 = -1.3888889225e-03, /* 0xbab60b61 */
+C3 = 2.4801587642e-05, /* 0x37d00d01 */
+C4 = -2.7557314297e-07, /* 0xb493f27c */
+C5 = 2.0875723372e-09, /* 0x310f74f6 */
+C6 = -1.1359647598e-11; /* 0xad47d74e */
+
+#ifdef __STDC__
+ float __kernel_cosf(float x, float y)
+#else
+ float __kernel_cosf(x, y)
+ float x,y;
+#endif
+{
+ float a,hz,z,r,qx;
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff; /* ix = |x|'s high word*/
+ if(ix<0x32000000) { /* if x < 2**27 */
+ if(((int)x)==0) return one; /* generate inexact */
+ }
+ z = x*x;
+ r = z*(C1+z*(C2+z*(C3+z*(C4+z*(C5+z*C6)))));
+ if(ix < 0x3e99999a) /* if |x| < 0.3 */
+ return one - ((float)0.5*z - (z*r - x*y));
+ else {
+ if(ix > 0x3f480000) { /* x > 0.78125 */
+ qx = (float)0.28125;
+ } else {
+ SET_FLOAT_WORD(qx,ix-0x01000000); /* x/4 */
+ }
+ hz = (float)0.5*z-qx;
+ a = one-qx;
+ return a - (hz - (z*r-x*y));
+ }
+}
--- /dev/null
+/* kf_rem_pio2.c -- float version of k_rem_pio2.c
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+/* In the float version, the input parameter x contains 8 bit
+ integers, not 24 bit integers. 113 bit precision is not supported. */
+
+#ifdef __STDC__
+static const int init_jk[] = {4,7,9}; /* initial value for jk */
+#else
+static int init_jk[] = {4,7,9};
+#endif
+
+#ifdef __STDC__
+static const float PIo2[] = {
+#else
+static float PIo2[] = {
+#endif
+ 1.5703125000e+00, /* 0x3fc90000 */
+ 4.5776367188e-04, /* 0x39f00000 */
+ 2.5987625122e-05, /* 0x37da0000 */
+ 7.5437128544e-08, /* 0x33a20000 */
+ 6.0026650317e-11, /* 0x2e840000 */
+ 7.3896444519e-13, /* 0x2b500000 */
+ 5.3845816694e-15, /* 0x27c20000 */
+ 5.6378512969e-18, /* 0x22d00000 */
+ 8.3009228831e-20, /* 0x1fc40000 */
+ 3.2756352257e-22, /* 0x1bc60000 */
+ 6.3331015649e-25, /* 0x17440000 */
+};
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+zero = 0.0,
+one = 1.0,
+two8 = 2.5600000000e+02, /* 0x43800000 */
+twon8 = 3.9062500000e-03; /* 0x3b800000 */
+
+#ifdef __STDC__
+ int __kernel_rem_pio2f(float *x, float *y, int e0, int nx, int prec, const __int32_t *ipio2)
+#else
+ int __kernel_rem_pio2f(x,y,e0,nx,prec,ipio2)
+ float x[], y[]; int e0,nx,prec; __int32_t ipio2[];
+#endif
+{
+ __int32_t jz,jx,jv,jp,jk,carry,n,iq[20],i,j,k,m,q0,ih;
+ float z,fw,f[20],fq[20],q[20];
+
+ /* initialize jk*/
+ jk = init_jk[prec];
+ jp = jk;
+
+ /* determine jx,jv,q0, note that 3>q0 */
+ jx = nx-1;
+ jv = (e0-3)/8; if(jv<0) jv=0;
+ q0 = e0-8*(jv+1);
+
+ /* set up f[0] to f[jx+jk] where f[jx+jk] = ipio2[jv+jk] */
+ j = jv-jx; m = jx+jk;
+ for(i=0;i<=m;i++,j++) f[i] = (j<0)? zero : (float) ipio2[j];
+
+ /* compute q[0],q[1],...q[jk] */
+ for (i=0;i<=jk;i++) {
+ for(j=0,fw=0.0;j<=jx;j++) fw += x[j]*f[jx+i-j]; q[i] = fw;
+ }
+
+ jz = jk;
+recompute:
+ /* distill q[] into iq[] reversingly */
+ for(i=0,j=jz,z=q[jz];j>0;i++,j--) {
+ fw = (float)((__int32_t)(twon8* z));
+ iq[i] = (__int32_t)(z-two8*fw);
+ z = q[j-1]+fw;
+ }
+
+ /* compute n */
+ z = scalbnf(z,(int)q0); /* actual value of z */
+ z -= (float)8.0*floorf(z*(float)0.125); /* trim off integer >= 8 */
+ n = (__int32_t) z;
+ z -= (float)n;
+ ih = 0;
+ if(q0>0) { /* need iq[jz-1] to determine n */
+ i = (iq[jz-1]>>(8-q0)); n += i;
+ iq[jz-1] -= i<<(8-q0);
+ ih = iq[jz-1]>>(7-q0);
+ }
+ else if(q0==0) ih = iq[jz-1]>>8;
+ else if(z>=(float)0.5) ih=2;
+
+ if(ih>0) { /* q > 0.5 */
+ n += 1; carry = 0;
+ for(i=0;i<jz ;i++) { /* compute 1-q */
+ j = iq[i];
+ if(carry==0) {
+ if(j!=0) {
+ carry = 1; iq[i] = 0x100- j;
+ }
+ } else iq[i] = 0xff - j;
+ }
+ if(q0>0) { /* rare case: chance is 1 in 12 */
+ switch(q0) {
+ case 1:
+ iq[jz-1] &= 0x7f; break;
+ case 2:
+ iq[jz-1] &= 0x3f; break;
+ }
+ }
+ if(ih==2) {
+ z = one - z;
+ if(carry!=0) z -= scalbnf(one,(int)q0);
+ }
+ }
+
+ /* check if recomputation is needed */
+ if(z==zero) {
+ j = 0;
+ for (i=jz-1;i>=jk;i--) j |= iq[i];
+ if(j==0) { /* need recomputation */
+ for(k=1;iq[jk-k]==0;k++); /* k = no. of terms needed */
+
+ for(i=jz+1;i<=jz+k;i++) { /* add q[jz+1] to q[jz+k] */
+ f[jx+i] = (float) ipio2[jv+i];
+ for(j=0,fw=0.0;j<=jx;j++) fw += x[j]*f[jx+i-j];
+ q[i] = fw;
+ }
+ jz += k;
+ goto recompute;
+ }
+ }
+
+ /* chop off zero terms */
+ if(z==(float)0.0) {
+ jz -= 1; q0 -= 8;
+ while(iq[jz]==0) { jz--; q0-=8;}
+ } else { /* break z into 8-bit if necessary */
+ z = scalbnf(z,-(int)q0);
+ if(z>=two8) {
+ fw = (float)((__int32_t)(twon8*z));
+ iq[jz] = (__int32_t)(z-two8*fw);
+ jz += 1; q0 += 8;
+ iq[jz] = (__int32_t) fw;
+ } else iq[jz] = (__int32_t) z ;
+ }
+
+ /* convert integer "bit" chunk to floating-point value */
+ fw = scalbnf(one,(int)q0);
+ for(i=jz;i>=0;i--) {
+ q[i] = fw*(float)iq[i]; fw*=twon8;
+ }
+
+ /* compute PIo2[0,...,jp]*q[jz,...,0] */
+ for(i=jz;i>=0;i--) {
+ for(fw=0.0,k=0;k<=jp&&k<=jz-i;k++) fw += PIo2[k]*q[i+k];
+ fq[jz-i] = fw;
+ }
+
+ /* compress fq[] into y[] */
+ switch(prec) {
+ case 0:
+ fw = 0.0;
+ for (i=jz;i>=0;i--) fw += fq[i];
+ y[0] = (ih==0)? fw: -fw;
+ break;
+ case 1:
+ case 2:
+ fw = 0.0;
+ for (i=jz;i>=0;i--) fw += fq[i];
+ y[0] = (ih==0)? fw: -fw;
+ fw = fq[0]-fw;
+ for (i=1;i<=jz;i++) fw += fq[i];
+ y[1] = (ih==0)? fw: -fw;
+ break;
+ case 3: /* painful */
+ for (i=jz;i>0;i--) {
+ fw = fq[i-1]+fq[i];
+ fq[i] += fq[i-1]-fw;
+ fq[i-1] = fw;
+ }
+ for (i=jz;i>1;i--) {
+ fw = fq[i-1]+fq[i];
+ fq[i] += fq[i-1]-fw;
+ fq[i-1] = fw;
+ }
+ for (fw=0.0,i=jz;i>=2;i--) fw += fq[i];
+ if(ih==0) {
+ y[0] = fq[0]; y[1] = fq[1]; y[2] = fw;
+ } else {
+ y[0] = -fq[0]; y[1] = -fq[1]; y[2] = -fw;
+ }
+ }
+ return n&7;
+}
--- /dev/null
+/* kf_sin.c -- float version of k_sin.c
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+half = 5.0000000000e-01,/* 0x3f000000 */
+S1 = -1.6666667163e-01, /* 0xbe2aaaab */
+S2 = 8.3333337680e-03, /* 0x3c088889 */
+S3 = -1.9841270114e-04, /* 0xb9500d01 */
+S4 = 2.7557314297e-06, /* 0x3638ef1b */
+S5 = -2.5050759689e-08, /* 0xb2d72f34 */
+S6 = 1.5896910177e-10; /* 0x2f2ec9d3 */
+
+#ifdef __STDC__
+ float __kernel_sinf(float x, float y, int iy)
+#else
+ float __kernel_sinf(x, y, iy)
+ float x,y; int iy; /* iy=0 if y is zero */
+#endif
+{
+ float z,r,v;
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff; /* high word of x */
+ if(ix<0x32000000) /* |x| < 2**-27 */
+ {if((int)x==0) return x;} /* generate inexact */
+ z = x*x;
+ v = z*x;
+ r = S2+z*(S3+z*(S4+z*(S5+z*S6)));
+ if(iy==0) return x+v*(S1+z*r);
+ else return x-((z*(half*y-v*r)-y)-v*S1);
+}
--- /dev/null
+/* kf_tan.c -- float version of k_tan.c
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+one = 1.0000000000e+00, /* 0x3f800000 */
+pio4 = 7.8539812565e-01, /* 0x3f490fda */
+pio4lo= 3.7748947079e-08, /* 0x33222168 */
+T[] = {
+ 3.3333334327e-01, /* 0x3eaaaaab */
+ 1.3333334029e-01, /* 0x3e088889 */
+ 5.3968254477e-02, /* 0x3d5d0dd1 */
+ 2.1869488060e-02, /* 0x3cb327a4 */
+ 8.8632395491e-03, /* 0x3c11371f */
+ 3.5920790397e-03, /* 0x3b6b6916 */
+ 1.4562094584e-03, /* 0x3abede48 */
+ 5.8804126456e-04, /* 0x3a1a26c8 */
+ 2.4646313977e-04, /* 0x398137b9 */
+ 7.8179444245e-05, /* 0x38a3f445 */
+ 7.1407252108e-05, /* 0x3895c07a */
+ -1.8558637748e-05, /* 0xb79bae5f */
+ 2.5907305826e-05, /* 0x37d95384 */
+};
+
+#ifdef __STDC__
+ float __kernel_tanf(float x, float y, int iy)
+#else
+ float __kernel_tanf(x, y, iy)
+ float x,y; int iy;
+#endif
+{
+ float z,r,v,w,s;
+ __int32_t ix,hx;
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff; /* high word of |x| */
+ if(ix<0x31800000) /* x < 2**-28 */
+ {if((int)x==0) { /* generate inexact */
+ if((ix|(iy+1))==0) return one/fabsf(x);
+ else return (iy==1)? x: -one/x;
+ }
+ }
+ if(ix>=0x3f2ca140) { /* |x|>=0.6744 */
+ if(hx<0) {x = -x; y = -y;}
+ z = pio4-x;
+ w = pio4lo-y;
+ x = z+w; y = 0.0;
+ }
+ z = x*x;
+ w = z*z;
+ /* Break x^5*(T[1]+x^2*T[2]+...) into
+ * x^5(T[1]+x^4*T[3]+...+x^20*T[11]) +
+ * x^5(x^2*(T[2]+x^4*T[4]+...+x^22*[T12]))
+ */
+ r = T[1]+w*(T[3]+w*(T[5]+w*(T[7]+w*(T[9]+w*T[11]))));
+ v = z*(T[2]+w*(T[4]+w*(T[6]+w*(T[8]+w*(T[10]+w*T[12])))));
+ s = z*x;
+ r = y + z*(s*(r+v)+y);
+ r += T[0]*s;
+ w = x+r;
+ if(ix>=0x3f2ca140) {
+ v = (float)iy;
+ return (float)(1-((hx>>30)&2))*(v-(float)2.0*(x-(w*w/(w+v)-r)));
+ }
+ if(iy==1) return w;
+ else { /* if allow error up to 2 ulp,
+ simply return -1.0/(x+r) here */
+ /* compute -1.0/(x+r) accurately */
+ float a,t;
+ __int32_t i;
+ z = w;
+ GET_FLOAT_WORD(i,z);
+ SET_FLOAT_WORD(z,i&0xfffff000);
+ v = r-(z - x); /* z+v = r+x */
+ t = a = -(float)1.0/w; /* a = -1.0/w */
+ GET_FLOAT_WORD(i,t);
+ SET_FLOAT_WORD(t,i&0xfffff000);
+ s = (float)1.0+t*z;
+ return t+a*(s+t*v);
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: lesf.c,v 1.5 2004/05/28 10:11:48 diwil Exp $
+ */
+
+/* TESTED */
+
+void
+__attribute__((naked)) __lesf2()
+{
+ __asm__ __volatile("br #__cmpsf2");
+}
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: ltsf.c,v 1.5 2004/05/28 10:11:48 diwil Exp $
+ */
+
+/* TESTED */
+
+
+void
+__attribute__((naked)) __ltsf2()
+{
+ __asm__ __volatile("br #__cmpsf2");
+}
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: mulsf.c,v 1.10 2004/05/28 10:11:48 diwil Exp $
+ */
+
+
+
+/* TESTED */
+
+/* long cause nobody cares */
+
+#define EXCESS 126
+#define SIGNBIT 0x80000000ul
+#define HIDDEN (1ul << 23)
+#define SIGN(fp) ((fp) & SIGNBIT)
+#define EXP(fp) (((fp) >> 23) & 0x00FFul)
+#define MANT(fp) (((fp) & 0x7FFFFFul) | HIDDEN)
+#define PACK(s,e,m) ((s) | ((e) << 23) | (m))
+
+
+unsigned long
+__fpmulparts(unsigned long a1, unsigned long a2)
+{
+ register unsigned long long result;
+
+#if 0
+ result = (a1 >> 8) * (a2 >> 8);
+ result += ((a1 & 0xFF) * (a2 >> 8)) >> 8;
+ result += ((a2 & 0xFF) * (a1 >> 8)) >> 8;
+#endif
+
+ result = ((unsigned long long)a1 * (unsigned long long)a2)>>16;
+
+ return result >>2;
+}
+
+unsigned long
+__mulsf3 (long a1, long a2)
+{
+ register unsigned long result;
+ register int sign;
+ register int exp;
+ register int tmp;
+
+
+ if(!a1 || !a2)
+ return 0l;
+#if 0
+ /* exp = EXP (fl1.l) - EXCESS + EXP (fl2.l); */
+ __asm__ __volatile__ (
+ "mov %B1, %0 \n\t"
+ "and #0x7f80, %0"
+ : "=r" (exp)
+ : "r" (a1)
+ );
+
+ exp = 0x7f80 & (a1>>16);
+ tmp = 0x7f80 & (a2>>16);
+
+ __asm__ __volatile__ (
+ "mov %B1, %0 \n\t"
+ "and #0x7f80, %0"
+ : "=r" (tmp)
+ : "r" (a2)
+ );
+#endif
+
+ exp = 0x7f80 & (a1>>16);
+ tmp = 0x7f80 & (a2>>16);
+
+ exp -= EXCESS<<7;
+ exp += tmp;
+
+
+ /* sign = (SIGN (a1) >> 16) ^ (SIGN (a2) >> 16); */
+#if 0
+
+ __asm__ __volatile__ (
+ "mov %B1, %0 \n\t"
+ "xor %B2, %0 \n\t"
+ "and #0x8000, %0"
+ : "=r" (sign)
+ : "r" (a1),
+ "r" (a2)
+ );
+#endif
+
+ sign = ((a1^a2)>>16)&0x8000;
+
+ a1 = MANT (a1);
+ a2 = MANT (a2);
+
+
+ result = __fpmulparts(a1,a2);
+
+ if (result & 0x20000000ul)
+ {
+ /* round */
+ result += 0x20ul;
+ result >>= 6;
+ }
+ else
+ {
+ /* round */
+ result += 0x10ul;
+ result >>= 5;
+ exp -= 1<<7;
+ }
+
+ if (result & (HIDDEN<<1))
+ {
+ result >>= 1;
+ exp += 1<<7;
+ }
+
+ result &= ~HIDDEN;
+
+
+ result |= ((long)(sign | exp)<<16);
+#if 0
+ __asm__ __volatile__ (
+ ";pack\n\t"
+ "bis %2, %1 \n\t"
+ "bis %1, %B0 \n\t"
+ : "+r" (result)
+ : "r" (sign),
+ "r" (exp)
+ );
+#endif
+ return result;
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: negsf.c,v 1.5 2004/05/28 10:11:48 diwil Exp $
+ */
+
+
+/* TESTED */
+
+
+long __negsf2 (long a1)
+{
+ if(!a1) return a1;
+
+ a1 ^= 0x80000000ul;
+
+ return a1;
+}
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004, 2003 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/* $Id: nesf.c,v 1.3 2004/05/28 10:11:48 diwil Exp $ */
+
+void
+__attribute__((naked)) __nesf2()
+{
+ __asm__ __volatile("br #__cmpsf2");
+}
--- /dev/null
+this is very experimental stuff. so, use it at your own risk
+
+
+Implemented:
+ float sqrt(float arg);
+
+
--- /dev/null
+/* sf_asinh.c -- float version of s_asinh.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+one = 1.0000000000e+00, /* 0x3F800000 */
+ln2 = 6.9314718246e-01, /* 0x3f317218 */
+huge= 1.0000000000e+30;
+
+#ifdef __STDC__
+ float asinhf(float x)
+#else
+ float asinhf(x)
+ float x;
+#endif
+{
+ float t,w;
+ __int32_t hx,ix;
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(!FLT_UWORD_IS_FINITE(ix)) return x+x; /* x is inf or NaN */
+ if(ix< 0x31800000) { /* |x|<2**-28 */
+ if(huge+x>one) return x; /* return x inexact except 0 */
+ }
+ if(ix>0x4d800000) { /* |x| > 2**28 */
+ w = __ieee754_logf(fabsf(x))+ln2;
+ } else if (ix>0x40000000) { /* 2**28 > |x| > 2.0 */
+ t = fabsf(x);
+ w = __ieee754_logf((float)2.0*t+one/(__ieee754_sqrtf(x*x+one)+t));
+ } else { /* 2.0 > |x| > 2**-28 */
+ t = x*x;
+ w =log1pf(fabsf(x)+t/(one+__ieee754_sqrtf(one+t)));
+ }
+ if(hx>0) return w; else return -w;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double asinh(double x)
+#else
+ double asinh(x)
+ double x;
+#endif
+{
+ return (double) asinhf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_atan.c -- float version of s_atan.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ *
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float atanhi[] = {
+#else
+static float atanhi[] = {
+#endif
+ 4.6364760399e-01, /* atan(0.5)hi 0x3eed6338 */
+ 7.8539812565e-01, /* atan(1.0)hi 0x3f490fda */
+ 9.8279368877e-01, /* atan(1.5)hi 0x3f7b985e */
+ 1.5707962513e+00, /* atan(inf)hi 0x3fc90fda */
+};
+
+#ifdef __STDC__
+static const float atanlo[] = {
+#else
+static float atanlo[] = {
+#endif
+ 5.0121582440e-09, /* atan(0.5)lo 0x31ac3769 */
+ 3.7748947079e-08, /* atan(1.0)lo 0x33222168 */
+ 3.4473217170e-08, /* atan(1.5)lo 0x33140fb4 */
+ 7.5497894159e-08, /* atan(inf)lo 0x33a22168 */
+};
+
+#ifdef __STDC__
+static const float aT[] = {
+#else
+static float aT[] = {
+#endif
+ 3.3333334327e-01, /* 0x3eaaaaaa */
+ -2.0000000298e-01, /* 0xbe4ccccd */
+ 1.4285714924e-01, /* 0x3e124925 */
+ -1.1111110449e-01, /* 0xbde38e38 */
+ 9.0908870101e-02, /* 0x3dba2e6e */
+ -7.6918758452e-02, /* 0xbd9d8795 */
+ 6.6610731184e-02, /* 0x3d886b35 */
+ -5.8335702866e-02, /* 0xbd6ef16b */
+ 4.9768779427e-02, /* 0x3d4bda59 */
+ -3.6531571299e-02, /* 0xbd15a221 */
+ 1.6285819933e-02, /* 0x3c8569d7 */
+};
+
+#ifdef __STDC__
+ static const float
+#else
+ static float
+#endif
+one = 1.0,
+huge = 1.0e30;
+
+#ifdef __STDC__
+ float atanf(float x)
+#else
+ float atanf(x)
+ float x;
+#endif
+{
+ float w,s1,s2,z;
+ __int32_t ix,hx,id;
+
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(ix>=0x50800000) { /* if |x| >= 2^34 */
+ if(FLT_UWORD_IS_NAN(ix))
+ return x+x; /* NaN */
+ if(hx>0) return atanhi[3]+atanlo[3];
+ else return -atanhi[3]-atanlo[3];
+ } if (ix < 0x3ee00000) { /* |x| < 0.4375 */
+ if (ix < 0x31000000) { /* |x| < 2^-29 */
+ if(huge+x>one) return x; /* raise inexact */
+ }
+ id = -1;
+ } else {
+ x = fabsf(x);
+ if (ix < 0x3f980000) { /* |x| < 1.1875 */
+ if (ix < 0x3f300000) { /* 7/16 <=|x|<11/16 */
+ id = 0; x = ((float)2.0*x-one)/((float)2.0+x);
+ } else { /* 11/16<=|x|< 19/16 */
+ id = 1; x = (x-one)/(x+one);
+ }
+ } else {
+ if (ix < 0x401c0000) { /* |x| < 2.4375 */
+ id = 2; x = (x-(float)1.5)/(one+(float)1.5*x);
+ } else { /* 2.4375 <= |x| < 2^66 */
+ id = 3; x = -(float)1.0/x;
+ }
+ }}
+ /* end of argument reduction */
+ z = x*x;
+ w = z*z;
+ /* break sum from i=0 to 10 aT[i]z**(i+1) into odd and even poly */
+ s1 = z*(aT[0]+w*(aT[2]+w*(aT[4]+w*(aT[6]+w*(aT[8]+w*aT[10])))));
+ s2 = w*(aT[1]+w*(aT[3]+w*(aT[5]+w*(aT[7]+w*aT[9]))));
+ if (id<0) return x - x*(s1+s2);
+ else {
+ z = atanhi[id] - ((x*(s1+s2) - atanlo[id]) - x);
+ return (hx<0)? -z:z;
+ }
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double atan(double x)
+#else
+ double atan(x)
+ double x;
+#endif
+{
+ return (double) atanf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_cbrt.c -- float version of s_cbrt.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ *
+ */
+
+#include "fdlibm.h"
+
+/* cbrtf(x)
+ * Return cube root of x
+ */
+#ifdef __STDC__
+static const __uint32_t
+#else
+static __uint32_t
+#endif
+ B1 = 709958130, /* B1 = (84+2/3-0.03306235651)*2**23 */
+ B2 = 642849266; /* B2 = (76+2/3-0.03306235651)*2**23 */
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+C = 5.4285717010e-01, /* 19/35 = 0x3f0af8b0 */
+D = -7.0530611277e-01, /* -864/1225 = 0xbf348ef1 */
+E = 1.4142856598e+00, /* 99/70 = 0x3fb50750 */
+F = 1.6071428061e+00, /* 45/28 = 0x3fcdb6db */
+G = 3.5714286566e-01; /* 5/14 = 0x3eb6db6e */
+
+#ifdef __STDC__
+ float cbrtf(float x)
+#else
+ float cbrtf(x)
+ float x;
+#endif
+{
+ __int32_t hx;
+ float r,s,t;
+ __uint32_t sign;
+ __uint32_t high;
+
+ GET_FLOAT_WORD(hx,x);
+ sign=hx&0x80000000; /* sign= sign(x) */
+ hx ^=sign;
+ if(!FLT_UWORD_IS_FINITE(hx))
+ return(x+x); /* cbrt(NaN,INF) is itself */
+ if(FLT_UWORD_IS_ZERO(hx))
+ return(x); /* cbrt(0) is itself */
+
+ SET_FLOAT_WORD(x,hx); /* x <- |x| */
+ /* rough cbrt to 5 bits */
+ if(FLT_UWORD_IS_SUBNORMAL(hx)) /* subnormal number */
+ {SET_FLOAT_WORD(t,0x4b800000); /* set t= 2**24 */
+ t*=x; GET_FLOAT_WORD(high,t); SET_FLOAT_WORD(t,high/3+B2);
+ }
+ else
+ SET_FLOAT_WORD(t,hx/3+B1);
+
+
+ /* new cbrt to 23 bits */
+ r=t*t/x;
+ s=C+r*t;
+ t*=G+F/(s+E+D/s);
+
+ /* retore the sign bit */
+ GET_FLOAT_WORD(high,t);
+ SET_FLOAT_WORD(t,high|sign);
+ return(t);
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double cbrt(double x)
+#else
+ double cbrt(x)
+ double x;
+#endif
+{
+ return (double) cbrtf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_ceil.c -- float version of s_ceil.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float huge = 1.0e30;
+#else
+static float huge = 1.0e30;
+#endif
+
+#ifdef __STDC__
+ float ceilf(float x)
+#else
+ float ceilf(x)
+ float x;
+#endif
+{
+ __int32_t i0,j0;
+ __uint32_t i,ix;
+ GET_FLOAT_WORD(i0,x);
+ ix = (i0&0x7fffffff);
+ j0 = (ix>>23)-0x7f;
+ if(j0<23) {
+ if(j0<0) { /* raise inexact if x != 0 */
+ if(huge+x>(float)0.0) {/* return 0*sign(x) if |x|<1 */
+ if(i0<0) {i0=0x80000000;}
+ else if(!FLT_UWORD_IS_ZERO(ix)) { i0=0x3f800000;}
+ }
+ } else {
+ i = (0x007fffff)>>j0;
+ if((i0&i)==0) return x; /* x is integral */
+ if(huge+x>(float)0.0) { /* raise inexact flag */
+ if(i0>0) i0 += (0x00800000)>>j0;
+ i0 &= (~i);
+ }
+ }
+ } else {
+ if(!FLT_UWORD_IS_FINITE(ix)) return x+x; /* inf or NaN */
+ else return x; /* x is integral */
+ }
+ SET_FLOAT_WORD(x,i0);
+ return x;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double ceil(double x)
+#else
+ double ceil(x)
+ double x;
+#endif
+{
+ return (double) ceilf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_copysign.c -- float version of s_copysign.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+/*
+ * copysignf(float x, float y)
+ * copysignf(x,y) returns a value with the magnitude of x and
+ * with the sign bit of y.
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float copysignf(float x, float y)
+#else
+ float copysignf(x,y)
+ float x,y;
+#endif
+{
+ __uint32_t ix,iy;
+ GET_FLOAT_WORD(ix,x);
+ GET_FLOAT_WORD(iy,y);
+ SET_FLOAT_WORD(x,(ix&0x7fffffff)|(iy&0x80000000));
+ return x;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double copysign(double x, double y)
+#else
+ double copysign(x,y)
+ double x,y;
+#endif
+{
+ return (double) copysignf((float) x, (float) y);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_cos.c -- float version of s_cos.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float one=1.0;
+#else
+static float one=1.0;
+#endif
+
+#ifdef __STDC__
+ float cosf(float x)
+#else
+ float cosf(x)
+ float x;
+#endif
+{
+ float y[2],z=0.0;
+ __int32_t n,ix;
+
+ GET_FLOAT_WORD(ix,x);
+
+ /* |x| ~< pi/4 */
+ ix &= 0x7fffffff;
+ if(ix <= 0x3f490fd8) return __kernel_cosf(x,z);
+
+ /* cos(Inf or NaN) is NaN */
+ else if (!FLT_UWORD_IS_FINITE(ix)) return x-x;
+
+ /* argument reduction needed */
+ else {
+ n = __ieee754_rem_pio2f(x,y);
+ switch(n&3) {
+ case 0: return __kernel_cosf(y[0],y[1]);
+ case 1: return -__kernel_sinf(y[0],y[1],1);
+ case 2: return -__kernel_cosf(y[0],y[1]);
+ default:
+ return __kernel_sinf(y[0],y[1],1);
+ }
+ }
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double cos(double x)
+#else
+ double cos(x)
+ double x;
+#endif
+{
+ return (double) cosf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_erf.c -- float version of s_erf.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __v810__
+#define const
+#endif
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+tiny = 1e-30,
+half= 5.0000000000e-01, /* 0x3F000000 */
+one = 1.0000000000e+00, /* 0x3F800000 */
+two = 2.0000000000e+00, /* 0x40000000 */
+ /* c = (subfloat)0.84506291151 */
+erx = 8.4506291151e-01, /* 0x3f58560b */
+/*
+ * Coefficients for approximation to erf on [0,0.84375]
+ */
+efx = 1.2837916613e-01, /* 0x3e0375d4 */
+efx8= 1.0270333290e+00, /* 0x3f8375d4 */
+pp0 = 1.2837916613e-01, /* 0x3e0375d4 */
+pp1 = -3.2504209876e-01, /* 0xbea66beb */
+pp2 = -2.8481749818e-02, /* 0xbce9528f */
+pp3 = -5.7702702470e-03, /* 0xbbbd1489 */
+pp4 = -2.3763017452e-05, /* 0xb7c756b1 */
+qq1 = 3.9791721106e-01, /* 0x3ecbbbce */
+qq2 = 6.5022252500e-02, /* 0x3d852a63 */
+qq3 = 5.0813062117e-03, /* 0x3ba68116 */
+qq4 = 1.3249473704e-04, /* 0x390aee49 */
+qq5 = -3.9602282413e-06, /* 0xb684e21a */
+/*
+ * Coefficients for approximation to erf in [0.84375,1.25]
+ */
+pa0 = -2.3621185683e-03, /* 0xbb1acdc6 */
+pa1 = 4.1485610604e-01, /* 0x3ed46805 */
+pa2 = -3.7220788002e-01, /* 0xbebe9208 */
+pa3 = 3.1834661961e-01, /* 0x3ea2fe54 */
+pa4 = -1.1089469492e-01, /* 0xbde31cc2 */
+pa5 = 3.5478305072e-02, /* 0x3d1151b3 */
+pa6 = -2.1663755178e-03, /* 0xbb0df9c0 */
+qa1 = 1.0642088205e-01, /* 0x3dd9f331 */
+qa2 = 5.4039794207e-01, /* 0x3f0a5785 */
+qa3 = 7.1828655899e-02, /* 0x3d931ae7 */
+qa4 = 1.2617121637e-01, /* 0x3e013307 */
+qa5 = 1.3637083583e-02, /* 0x3c5f6e13 */
+qa6 = 1.1984500103e-02, /* 0x3c445aa3 */
+/*
+ * Coefficients for approximation to erfc in [1.25,1/0.35]
+ */
+ra0 = -9.8649440333e-03, /* 0xbc21a093 */
+ra1 = -6.9385856390e-01, /* 0xbf31a0b7 */
+ra2 = -1.0558626175e+01, /* 0xc128f022 */
+ra3 = -6.2375331879e+01, /* 0xc2798057 */
+ra4 = -1.6239666748e+02, /* 0xc322658c */
+ra5 = -1.8460508728e+02, /* 0xc3389ae7 */
+ra6 = -8.1287437439e+01, /* 0xc2a2932b */
+ra7 = -9.8143291473e+00, /* 0xc11d077e */
+sa1 = 1.9651271820e+01, /* 0x419d35ce */
+sa2 = 1.3765776062e+02, /* 0x4309a863 */
+sa3 = 4.3456588745e+02, /* 0x43d9486f */
+sa4 = 6.4538726807e+02, /* 0x442158c9 */
+sa5 = 4.2900814819e+02, /* 0x43d6810b */
+sa6 = 1.0863500214e+02, /* 0x42d9451f */
+sa7 = 6.5702495575e+00, /* 0x40d23f7c */
+sa8 = -6.0424413532e-02, /* 0xbd777f97 */
+/*
+ * Coefficients for approximation to erfc in [1/.35,28]
+ */
+rb0 = -9.8649431020e-03, /* 0xbc21a092 */
+rb1 = -7.9928326607e-01, /* 0xbf4c9dd4 */
+rb2 = -1.7757955551e+01, /* 0xc18e104b */
+rb3 = -1.6063638306e+02, /* 0xc320a2ea */
+rb4 = -6.3756646729e+02, /* 0xc41f6441 */
+rb5 = -1.0250950928e+03, /* 0xc480230b */
+rb6 = -4.8351919556e+02, /* 0xc3f1c275 */
+sb1 = 3.0338060379e+01, /* 0x41f2b459 */
+sb2 = 3.2579251099e+02, /* 0x43a2e571 */
+sb3 = 1.5367296143e+03, /* 0x44c01759 */
+sb4 = 3.1998581543e+03, /* 0x4547fdbb */
+sb5 = 2.5530502930e+03, /* 0x451f90ce */
+sb6 = 4.7452853394e+02, /* 0x43ed43a7 */
+sb7 = -2.2440952301e+01; /* 0xc1b38712 */
+
+#ifdef __STDC__
+ float erff(float x)
+#else
+ float erff(x)
+ float x;
+#endif
+{
+ __int32_t hx,ix,i;
+ float R,S,P,Q,s,y,z,r;
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(!FLT_UWORD_IS_FINITE(ix)) { /* erf(nan)=nan */
+ i = ((__uint32_t)hx>>31)<<1;
+ return (float)(1-i)+one/x; /* erf(+-inf)=+-1 */
+ }
+
+ if(ix < 0x3f580000) { /* |x|<0.84375 */
+ if(ix < 0x31800000) { /* |x|<2**-28 */
+ if (ix < 0x04000000)
+ /*avoid underflow */
+ return (float)0.125*((float)8.0*x+efx8*x);
+ return x + efx*x;
+ }
+ z = x*x;
+ r = pp0+z*(pp1+z*(pp2+z*(pp3+z*pp4)));
+ s = one+z*(qq1+z*(qq2+z*(qq3+z*(qq4+z*qq5))));
+ y = r/s;
+ return x + x*y;
+ }
+ if(ix < 0x3fa00000) { /* 0.84375 <= |x| < 1.25 */
+ s = fabsf(x)-one;
+ P = pa0+s*(pa1+s*(pa2+s*(pa3+s*(pa4+s*(pa5+s*pa6)))));
+ Q = one+s*(qa1+s*(qa2+s*(qa3+s*(qa4+s*(qa5+s*qa6)))));
+ if(hx>=0) return erx + P/Q; else return -erx - P/Q;
+ }
+ if (ix >= 0x40c00000) { /* inf>|x|>=6 */
+ if(hx>=0) return one-tiny; else return tiny-one;
+ }
+ x = fabsf(x);
+ s = one/(x*x);
+ if(ix< 0x4036DB6E) { /* |x| < 1/0.35 */
+ R=ra0+s*(ra1+s*(ra2+s*(ra3+s*(ra4+s*(
+ ra5+s*(ra6+s*ra7))))));
+ S=one+s*(sa1+s*(sa2+s*(sa3+s*(sa4+s*(
+ sa5+s*(sa6+s*(sa7+s*sa8)))))));
+ } else { /* |x| >= 1/0.35 */
+ R=rb0+s*(rb1+s*(rb2+s*(rb3+s*(rb4+s*(
+ rb5+s*rb6)))));
+ S=one+s*(sb1+s*(sb2+s*(sb3+s*(sb4+s*(
+ sb5+s*(sb6+s*sb7))))));
+ }
+ GET_FLOAT_WORD(ix,x);
+ SET_FLOAT_WORD(z,ix&0xfffff000);
+ r = __ieee754_expf(-z*z-(float)0.5625)*__ieee754_expf((z-x)*(z+x)+R/S);
+ if(hx>=0) return one-r/x; else return r/x-one;
+}
+
+#ifdef __STDC__
+ float erfcf(float x)
+#else
+ float erfcf(x)
+ float x;
+#endif
+{
+ __int32_t hx,ix;
+ float R,S,P,Q,s,y,z,r;
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ if(!FLT_UWORD_IS_FINITE(ix)) { /* erfc(nan)=nan */
+ /* erfc(+-inf)=0,2 */
+ return (float)(((__uint32_t)hx>>31)<<1)+one/x;
+ }
+
+ if(ix < 0x3f580000) { /* |x|<0.84375 */
+ if(ix < 0x23800000) /* |x|<2**-56 */
+ return one-x;
+ z = x*x;
+ r = pp0+z*(pp1+z*(pp2+z*(pp3+z*pp4)));
+ s = one+z*(qq1+z*(qq2+z*(qq3+z*(qq4+z*qq5))));
+ y = r/s;
+ if(hx < 0x3e800000) { /* x<1/4 */
+ return one-(x+x*y);
+ } else {
+ r = x*y;
+ r += (x-half);
+ return half - r ;
+ }
+ }
+ if(ix < 0x3fa00000) { /* 0.84375 <= |x| < 1.25 */
+ s = fabsf(x)-one;
+ P = pa0+s*(pa1+s*(pa2+s*(pa3+s*(pa4+s*(pa5+s*pa6)))));
+ Q = one+s*(qa1+s*(qa2+s*(qa3+s*(qa4+s*(qa5+s*qa6)))));
+ if(hx>=0) {
+ z = one-erx; return z - P/Q;
+ } else {
+ z = erx+P/Q; return one+z;
+ }
+ }
+ if (ix < 0x41e00000) { /* |x|<28 */
+ x = fabsf(x);
+ s = one/(x*x);
+ if(ix< 0x4036DB6D) { /* |x| < 1/.35 ~ 2.857143*/
+ R=ra0+s*(ra1+s*(ra2+s*(ra3+s*(ra4+s*(
+ ra5+s*(ra6+s*ra7))))));
+ S=one+s*(sa1+s*(sa2+s*(sa3+s*(sa4+s*(
+ sa5+s*(sa6+s*(sa7+s*sa8)))))));
+ } else { /* |x| >= 1/.35 ~ 2.857143 */
+ if(hx<0&&ix>=0x40c00000) return two-tiny;/* x < -6 */
+ R=rb0+s*(rb1+s*(rb2+s*(rb3+s*(rb4+s*(
+ rb5+s*rb6)))));
+ S=one+s*(sb1+s*(sb2+s*(sb3+s*(sb4+s*(
+ sb5+s*(sb6+s*sb7))))));
+ }
+ GET_FLOAT_WORD(ix,x);
+ SET_FLOAT_WORD(z,ix&0xfffff000);
+ r = __ieee754_expf(-z*z-(float)0.5625)*
+ __ieee754_expf((z-x)*(z+x)+R/S);
+ if(hx>0) return r/x; else return two-r/x;
+ } else {
+ if(hx>0) return tiny*tiny; else return two-tiny;
+ }
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double erf(double x)
+#else
+ double erf(x)
+ double x;
+#endif
+{
+ return (double) erff((float) x);
+}
+
+#ifdef __STDC__
+ double erfc(double x)
+#else
+ double erfc(x)
+ double x;
+#endif
+{
+ return (double) erfcf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_expm1.c -- float version of s_expm1.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __v810__
+#define const
+#endif
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+one = 1.0,
+huge = 1.0e+30,
+tiny = 1.0e-30,
+ln2_hi = 6.9313812256e-01,/* 0x3f317180 */
+ln2_lo = 9.0580006145e-06,/* 0x3717f7d1 */
+invln2 = 1.4426950216e+00,/* 0x3fb8aa3b */
+ /* scaled coefficients related to expm1 */
+Q1 = -3.3333335072e-02, /* 0xbd088889 */
+Q2 = 1.5873016091e-03, /* 0x3ad00d01 */
+Q3 = -7.9365076090e-05, /* 0xb8a670cd */
+Q4 = 4.0082177293e-06, /* 0x36867e54 */
+Q5 = -2.0109921195e-07; /* 0xb457edbb */
+
+#ifdef __STDC__
+ float expm1f(float x)
+#else
+ float expm1f(x)
+ float x;
+#endif
+{
+ float y,hi,lo,c,t,e,hxs,hfx,r1;
+ __int32_t k,xsb;
+ __uint32_t hx;
+
+ GET_FLOAT_WORD(hx,x);
+ xsb = hx&0x80000000; /* sign bit of x */
+ if(xsb==0) y=x; else y= -x; /* y = |x| */
+ hx &= 0x7fffffff; /* high word of |x| */
+
+ /* filter out huge and non-finite argument */
+ if(hx >= 0x4195b844) { /* if |x|>=27*ln2 */
+ if(FLT_UWORD_IS_NAN(hx))
+ return x+x;
+ if(FLT_UWORD_IS_INFINITE(hx))
+ return (xsb==0)? x:-1.0;/* exp(+-inf)={inf,-1} */
+ if(xsb == 0 && hx > FLT_UWORD_LOG_MAX) /* if x>=o_threshold */
+ return huge*huge; /* overflow */
+ if(xsb!=0) { /* x < -27*ln2, return -1.0 with inexact */
+ if(x+tiny<(float)0.0) /* raise inexact */
+ return tiny-one; /* return -1 */
+ }
+ }
+
+ /* argument reduction */
+ if(hx > 0x3eb17218) { /* if |x| > 0.5 ln2 */
+ if(hx < 0x3F851592) { /* and |x| < 1.5 ln2 */
+ if(xsb==0)
+ {hi = x - ln2_hi; lo = ln2_lo; k = 1;}
+ else
+ {hi = x + ln2_hi; lo = -ln2_lo; k = -1;}
+ } else {
+ k = invln2*x+((xsb==0)?(float)0.5:(float)-0.5);
+ t = k;
+ hi = x - t*ln2_hi; /* t*ln2_hi is exact here */
+ lo = t*ln2_lo;
+ }
+ x = hi - lo;
+ c = (hi-x)-lo;
+ }
+ else if(hx < 0x33000000) { /* when |x|<2**-25, return x */
+ t = huge+x; /* return x with inexact flags when x!=0 */
+ return x - (t-(huge+x));
+ }
+ else k = 0;
+
+ /* x is now in primary range */
+ hfx = (float)0.5*x;
+ hxs = x*hfx;
+ r1 = one+hxs*(Q1+hxs*(Q2+hxs*(Q3+hxs*(Q4+hxs*Q5))));
+ t = (float)3.0-r1*hfx;
+ e = hxs*((r1-t)/((float)6.0 - x*t));
+ if(k==0) return x - (x*e-hxs); /* c is 0 */
+ else {
+ e = (x*(e-c)-c);
+ e -= hxs;
+ if(k== -1) return (float)0.5*(x-e)-(float)0.5;
+ if(k==1) {
+ if(x < (float)-0.25) return -(float)2.0*(e-(x+(float)0.5));
+ else return one+(float)2.0*(x-e);
+ }
+ if (k <= -2 || k>56) { /* suffice to return exp(x)-1 */
+ __int32_t i;
+ y = one-(e-x);
+ GET_FLOAT_WORD(i,y);
+ SET_FLOAT_WORD(y,i+(k<<23)); /* add k to y's exponent */
+ return y-one;
+ }
+ t = one;
+ if(k<23) {
+ __int32_t i;
+ SET_FLOAT_WORD(t,0x3f800000 - (0x1000000>>k)); /* t=1-2^-k */
+ y = t-(e-x);
+ GET_FLOAT_WORD(i,y);
+ SET_FLOAT_WORD(y,i+(k<<23)); /* add k to y's exponent */
+ } else {
+ __int32_t i;
+ SET_FLOAT_WORD(t,((0x7f-k)<<23)); /* 2^-k */
+ y = x-(e+t);
+ y += one;
+ GET_FLOAT_WORD(i,y);
+ SET_FLOAT_WORD(y,i+(k<<23)); /* add k to y's exponent */
+ }
+ }
+ return y;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double expm1(double x)
+#else
+ double expm1(x)
+ double x;
+#endif
+{
+ return (double) expm1f((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_fabs.c -- float version of s_fabs.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+/*
+ * fabsf(x) returns the absolute value of x.
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float fabsf(float x)
+#else
+ float fabsf(x)
+ float x;
+#endif
+{
+ __uint32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ SET_FLOAT_WORD(x,ix&0x7fffffff);
+ return x;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double fabs(double x)
+#else
+ double fabs(x)
+ double x;
+#endif
+{
+ return (double) fabsf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_finite.c -- float version of s_finite.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+/*
+ * finitef(x) returns 1 is x is finite, else 0;
+ * no branching!
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ int finitef(float x)
+#else
+ int finitef(x)
+ float x;
+#endif
+{
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+ return (FLT_UWORD_IS_FINITE(ix));
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ int finite(double x)
+#else
+ int finite(x)
+ double x;
+#endif
+{
+ return finitef((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_floor.c -- float version of s_floor.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+/*
+ * floorf(x)
+ * Return x rounded toward -inf to integral value
+ * Method:
+ * Bit twiddling.
+ * Exception:
+ * Inexact flag raised if x not equal to floorf(x).
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float huge = 1.0e30;
+#else
+static float huge = 1.0e30;
+#endif
+
+#ifdef __STDC__
+ float floorf(float x)
+#else
+ float floorf(x)
+ float x;
+#endif
+{
+ __int32_t i0,j0;
+ __uint32_t i,ix;
+ GET_FLOAT_WORD(i0,x);
+ ix = (i0&0x7fffffff);
+ j0 = (ix>>23)-0x7f;
+ if(j0<23) {
+ if(j0<0) { /* raise inexact if x != 0 */
+ if(huge+x>(float)0.0) {/* return 0*sign(x) if |x|<1 */
+ if(i0>=0) {i0=0;}
+ else if(!FLT_UWORD_IS_ZERO(ix))
+ { i0=0xbf800000;}
+ }
+ } else {
+ i = (0x007fffff)>>j0;
+ if((i0&i)==0) return x; /* x is integral */
+ if(huge+x>(float)0.0) { /* raise inexact flag */
+ if(i0<0) i0 += (0x00800000)>>j0;
+ i0 &= (~i);
+ }
+ }
+ } else {
+ if(!FLT_UWORD_IS_FINITE(ix)) return x+x; /* inf or NaN */
+ else return x; /* x is integral */
+ }
+ SET_FLOAT_WORD(x,i0);
+ return x;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double floor(double x)
+#else
+ double floor(x)
+ double x;
+#endif
+{
+ return (double) floorf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_frexp.c -- float version of s_frexp.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+two25 = 3.3554432000e+07; /* 0x4c000000 */
+
+#ifdef __STDC__
+ float frexpf(float x, int *eptr)
+#else
+ float frexpf(x, eptr)
+ float x; int *eptr;
+#endif
+{
+ __int32_t hx, ix;
+ GET_FLOAT_WORD(hx,x);
+ ix = 0x7fffffff&hx;
+ *eptr = 0;
+ if(!FLT_UWORD_IS_FINITE(ix)||FLT_UWORD_IS_ZERO(ix)) return x; /* 0,inf,nan */
+ if (FLT_UWORD_IS_SUBNORMAL(ix)) { /* subnormal */
+ x *= two25;
+ GET_FLOAT_WORD(hx,x);
+ ix = hx&0x7fffffff;
+ *eptr = -25;
+ }
+ *eptr += (ix>>23)-126;
+ hx = (hx&0x807fffff)|0x3f000000;
+ SET_FLOAT_WORD(x,hx);
+ return x;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double frexp(double x, int *eptr)
+#else
+ double frexp(x, eptr)
+ double x; int *eptr;
+#endif
+{
+ return (double) frexpf((float) x, eptr);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_ilogb.c -- float version of s_ilogb.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+#include <limits.h>
+
+#ifdef __STDC__
+ int ilogbf(float x)
+#else
+ int ilogbf(x)
+ float x;
+#endif
+{
+ __int32_t hx,ix;
+
+ GET_FLOAT_WORD(hx,x);
+ hx &= 0x7fffffff;
+ if(FLT_UWORD_IS_ZERO(hx))
+ return - INT_MAX; /* ilogb(0) = 0x80000001 */
+ if(FLT_UWORD_IS_SUBNORMAL(hx)) {
+ for (ix = -126,hx<<=8; hx>0; hx<<=1) ix -=1;
+ return ix;
+ }
+ else if (!FLT_UWORD_IS_FINITE(hx)) return INT_MAX;
+ else return (hx>>23)-127;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ int ilogb(double x)
+#else
+ int ilogb(x)
+ double x;
+#endif
+{
+ return ilogbf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/*
+ * infinityf () returns the representation of infinity.
+ * Added by Cygnus Support.
+ */
+
+#include "fdlibm.h"
+
+ float infinityf()
+{
+ float x;
+
+ SET_FLOAT_WORD(x,0x7f800000);
+ return x;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+ double infinity()
+{
+ return (double) infinityf();
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/*
+ * isinff(x) returns 1 if x is +-infinity, else 0;
+ * Added by Cygnus Support.
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ int isinff(float x)
+#else
+ int isinff(x)
+ float x;
+#endif
+{
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+ return FLT_UWORD_IS_INFINITE(ix);
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ int isinf(double x)
+#else
+ int isinf(x)
+ double x;
+#endif
+{
+ return isinff((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_isnan.c -- float version of s_isnan.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+/*
+ * isnanf(x) returns 1 is x is nan, else 0;
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ int isnanf(float x)
+#else
+ int isnanf(x)
+ float x;
+#endif
+{
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff;
+ return FLT_UWORD_IS_NAN(ix);
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ int isnan(double x)
+#else
+ int isnan(x)
+ double x;
+#endif
+{
+ return isnanf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_ldexp.c -- float version of s_ldexp.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+#include <errno.h>
+
+#ifdef __STDC__
+ float ldexpf(float value, int exp)
+#else
+ float ldexpf(value, exp)
+ float value; int exp;
+#endif
+{
+ if(!finitef(value)||value==(float)0.0) return value;
+ value = scalbnf(value,exp);
+ if(!finitef(value)||value==(float)0.0) errno = ERANGE;
+ return value;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double ldexp(double value, int exp)
+#else
+ double ldexp(value, exp)
+ double value; int exp;
+#endif
+{
+ return (double) ldexpf((float) value, exp);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_log1p.c -- float version of s_log1p.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+ln2_hi = 6.9313812256e-01, /* 0x3f317180 */
+ln2_lo = 9.0580006145e-06, /* 0x3717f7d1 */
+two25 = 3.355443200e+07, /* 0x4c000000 */
+Lp1 = 6.6666668653e-01, /* 3F2AAAAB */
+Lp2 = 4.0000000596e-01, /* 3ECCCCCD */
+Lp3 = 2.8571429849e-01, /* 3E924925 */
+Lp4 = 2.2222198546e-01, /* 3E638E29 */
+Lp5 = 1.8183572590e-01, /* 3E3A3325 */
+Lp6 = 1.5313838422e-01, /* 3E1CD04F */
+Lp7 = 1.4798198640e-01; /* 3E178897 */
+
+#ifdef __STDC__
+static const float zero = 0.0;
+#else
+static float zero = 0.0;
+#endif
+
+#ifdef __STDC__
+ float log1pf(float x)
+#else
+ float log1pf(x)
+ float x;
+#endif
+{
+ float hfsq,f,c,s,z,R,u;
+ __int32_t k,hx,hu,ax;
+
+ GET_FLOAT_WORD(hx,x);
+ ax = hx&0x7fffffff;
+
+ k = 1;
+ if (!FLT_UWORD_IS_FINITE(hx)) return x+x;
+ if (hx < 0x3ed413d7) { /* x < 0.41422 */
+ if(ax>=0x3f800000) { /* x <= -1.0 */
+ if(x==(float)-1.0) return -two25/zero; /* log1p(-1)=+inf */
+ else return (x-x)/(x-x); /* log1p(x<-1)=NaN */
+ }
+ if(ax<0x31000000) { /* |x| < 2**-29 */
+ if(two25+x>zero /* raise inexact */
+ &&ax<0x24800000) /* |x| < 2**-54 */
+ return x;
+ else
+ return x - x*x*(float)0.5;
+ }
+ if(hx>0||hx<=((__int32_t)0xbe95f61f)) {
+ k=0;f=x;hu=1;} /* -0.2929<x<0.41422 */
+ }
+ if(k!=0) {
+ if(hx<0x5a000000) {
+ u = (float)1.0+x;
+ GET_FLOAT_WORD(hu,u);
+ k = (hu>>23)-127;
+ /* correction term */
+ c = (k>0)? (float)1.0-(u-x):x-(u-(float)1.0);
+ c /= u;
+ } else {
+ u = x;
+ GET_FLOAT_WORD(hu,u);
+ k = (hu>>23)-127;
+ c = 0;
+ }
+ hu &= 0x007fffff;
+ if(hu<0x3504f7) {
+ SET_FLOAT_WORD(u,hu|0x3f800000);/* normalize u */
+ } else {
+ k += 1;
+ SET_FLOAT_WORD(u,hu|0x3f000000); /* normalize u/2 */
+ hu = (0x00800000-hu)>>2;
+ }
+ f = u-(float)1.0;
+ }
+ hfsq=(float)0.5*f*f;
+ if(hu==0) { /* |f| < 2**-20 */
+ if(f==zero) { if(k==0) return zero;
+ else {c += k*ln2_lo; return k*ln2_hi+c;}}
+ R = hfsq*((float)1.0-(float)0.66666666666666666*f);
+ if(k==0) return f-R; else
+ return k*ln2_hi-((R-(k*ln2_lo+c))-f);
+ }
+ s = f/((float)2.0+f);
+ z = s*s;
+ R = z*(Lp1+z*(Lp2+z*(Lp3+z*(Lp4+z*(Lp5+z*(Lp6+z*Lp7))))));
+ if(k==0) return f-(hfsq-s*(hfsq+R)); else
+ return k*ln2_hi-((hfsq-(s*(hfsq+R)+(k*ln2_lo+c)))-f);
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double log1p(double x)
+#else
+ double log1p(x)
+ double x;
+#endif
+{
+ return (double) log1pf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_logb.c -- float version of s_logb.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float logbf(float x)
+#else
+ float logbf(x)
+ float x;
+#endif
+{
+ __int32_t ix;
+ GET_FLOAT_WORD(ix,x);
+ ix &= 0x7fffffff; /* high |x| */
+ if(FLT_UWORD_IS_ZERO(ix)) return (float)-1.0/fabsf(x);
+ if(!FLT_UWORD_IS_FINITE(ix)) return x*x;
+ if((ix>>=23)==0) /* IEEE 754 logb */
+ return -126.0;
+ else
+ return (float) (ix-127);
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double logb(double x)
+#else
+ double logb(x)
+ double x;
+#endif
+{
+ return (double) logbf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_modf.c -- float version of s_modf.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float one = 1.0;
+#else
+static float one = 1.0;
+#endif
+
+#ifdef __STDC__
+ float modff(float x, float *iptr)
+#else
+ float modff(x, iptr)
+ float x,*iptr;
+#endif
+{
+ __int32_t i0,j0;
+ __uint32_t i;
+ GET_FLOAT_WORD(i0,x);
+ j0 = ((i0>>23)&0xff)-0x7f; /* exponent of x */
+ if(j0<23) { /* integer part in x */
+ if(j0<0) { /* |x|<1 */
+ SET_FLOAT_WORD(*iptr,i0&0x80000000); /* *iptr = +-0 */
+ return x;
+ } else {
+ i = (0x007fffff)>>j0;
+ if((i0&i)==0) { /* x is integral */
+ __uint32_t ix;
+ *iptr = x;
+ GET_FLOAT_WORD(ix,x);
+ SET_FLOAT_WORD(x,ix&0x80000000); /* return +-0 */
+ return x;
+ } else {
+ SET_FLOAT_WORD(*iptr,i0&(~i));
+ return x - *iptr;
+ }
+ }
+ } else { /* no fraction part */
+ __uint32_t ix;
+ *iptr = x*one;
+ GET_FLOAT_WORD(ix,x);
+ SET_FLOAT_WORD(x,ix&0x80000000); /* return +-0 */
+ return x;
+ }
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double modf(double x, double *iptr)
+#else
+ double modf(x, iptr)
+ double x,*iptr;
+#endif
+{
+ return (double) modff((float) x, (float *) iptr);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/*
+ * nanf () returns a nan.
+ * Added by Cygnus Support.
+ */
+
+#include "fdlibm.h"
+
+ float nanf()
+{
+ float x;
+
+ SET_FLOAT_WORD(x,0x7fc00000);
+ return x;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+ double nan()
+{
+ return (double) nanf();
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
+
--- /dev/null
+/* sf_nextafter.c -- float version of s_nextafter.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float nextafterf(float x, float y)
+#else
+ float nextafterf(x,y)
+ float x,y;
+#endif
+{
+ __int32_t hx,hy,ix,iy;
+
+ GET_FLOAT_WORD(hx,x);
+ GET_FLOAT_WORD(hy,y);
+ ix = hx&0x7fffffff; /* |x| */
+ iy = hy&0x7fffffff; /* |y| */
+
+ if(FLT_UWORD_IS_NAN(ix) ||
+ FLT_UWORD_IS_NAN(iy))
+ return x+y;
+ if(x==y) return x; /* x=y, return x */
+ if(FLT_UWORD_IS_ZERO(ix)) { /* x == 0 */
+ SET_FLOAT_WORD(x,(hy&0x80000000)|FLT_UWORD_MIN);
+ y = x*x;
+ if(y==x) return y; else return x; /* raise underflow flag */
+ }
+ if(hx>=0) { /* x > 0 */
+ if(hx>hy) { /* x > y, x -= ulp */
+ hx -= 1;
+ } else { /* x < y, x += ulp */
+ hx += 1;
+ }
+ } else { /* x < 0 */
+ if(hy>=0||hx>hy){ /* x < y, x -= ulp */
+ hx -= 1;
+ } else { /* x > y, x += ulp */
+ hx += 1;
+ }
+ }
+ hy = hx&0x7f800000;
+ if(hy>FLT_UWORD_MAX) return x+x; /* overflow */
+ if(hy<0x00800000) { /* underflow */
+ y = x*x;
+ if(y!=x) { /* raise underflow flag */
+ SET_FLOAT_WORD(y,hx);
+ return y;
+ }
+ }
+ SET_FLOAT_WORD(x,hx);
+ return x;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double nextafter(double x, double y)
+#else
+ double nextafter(x,y)
+ double x,y;
+#endif
+{
+ return (double) nextafterf((float) x, (float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_rint.c -- float version of s_rint.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+TWO23[2]={
+ 8.3886080000e+06, /* 0x4b000000 */
+ -8.3886080000e+06, /* 0xcb000000 */
+};
+
+#ifdef __STDC__
+ float rintf(float x)
+#else
+ float rintf(x)
+ float x;
+#endif
+{
+ __int32_t i0,j0,sx;
+ __uint32_t i,i1,ix;
+ float t;
+ volatile float w;
+ GET_FLOAT_WORD(i0,x);
+ sx = (i0>>31)&1;
+ ix = (i0&0x7fffffff);
+ j0 = (ix>>23)-0x7f;
+ if(j0<23) {
+ if(FLT_UWORD_IS_ZERO(ix))
+ return x;
+ if(j0<0) {
+ i1 = (i0&0x07fffff);
+ i0 &= 0xfff00000;
+ i0 |= ((i1|-i1)>>9)&0x400000;
+ SET_FLOAT_WORD(x,i0);
+ w = TWO23[sx]+x;
+ t = w-TWO23[sx];
+ GET_FLOAT_WORD(i0,t);
+ SET_FLOAT_WORD(t,(i0&0x7fffffff)|(sx<<31));
+ return t;
+ } else {
+ i = (0x007fffff)>>j0;
+ if((i0&i)==0) return x; /* x is integral */
+ i>>=1;
+ if((i0&i)!=0) i0 = (i0&(~i))|((0x100000)>>j0);
+ }
+ } else {
+ if(!FLT_UWORD_IS_FINITE(ix)) return x+x; /* inf or NaN */
+ else
+ return x; /* x is integral */
+ }
+ SET_FLOAT_WORD(x,i0);
+ w = TWO23[sx]+x;
+ return w-TWO23[sx];
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double rint(double x)
+#else
+ double rint(x)
+ double x;
+#endif
+{
+ return (double) rintf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_scalbn.c -- float version of s_scalbn.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+#include <limits.h>
+#include <float.h>
+
+#if INT_MAX > 50000
+#define OVERFLOW_INT 50000
+#else
+#define OVERFLOW_INT 30000
+#endif
+
+#ifdef __STDC__
+static const float
+#else
+static float
+#endif
+two25 = 3.355443200e+07, /* 0x4c000000 */
+twom25 = 2.9802322388e-08, /* 0x33000000 */
+huge = 1.0e+30,
+tiny = 1.0e-30;
+
+#ifdef __STDC__
+ float scalbnf (float x, int n)
+#else
+ float scalbnf (x,n)
+ float x; int n;
+#endif
+{
+ __int32_t k,ix;
+ __uint32_t hx;
+
+ GET_FLOAT_WORD(ix,x);
+ hx = ix&0x7fffffff;
+ k = hx>>23; /* extract exponent */
+ if (FLT_UWORD_IS_ZERO(hx))
+ return x;
+ if (!FLT_UWORD_IS_FINITE(hx))
+ return x+x; /* NaN or Inf */
+ if (FLT_UWORD_IS_SUBNORMAL(hx)) {
+ x *= two25;
+ GET_FLOAT_WORD(ix,x);
+ k = ((ix&0x7f800000)>>23) - 25;
+ if (n< -50000) return tiny*x; /*underflow*/
+ }
+ k = k+n;
+ if (k > FLT_LARGEST_EXP) return huge*copysignf(huge,x); /* overflow */
+ if (k > 0) /* normal result */
+ {SET_FLOAT_WORD(x,(ix&0x807fffff)|(k<<23)); return x;}
+ if (k < FLT_SMALLEST_EXP) {
+ if (n > OVERFLOW_INT) /* in case integer overflow in n+k */
+ return huge*copysignf(huge,x); /*overflow*/
+ else return tiny*copysignf(tiny,x); /*underflow*/
+ }
+ k += 25; /* subnormal result */
+ SET_FLOAT_WORD(x,(ix&0x807fffff)|(k<<23));
+ return x*twom25;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double scalbn(double x, int n)
+#else
+ double scalbn(x,n)
+ double x;
+ int n;
+#endif
+{
+ return (double) scalbnf((float) x, n);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_signif.c -- float version of s_signif.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float significandf(float x)
+#else
+ float significandf(x)
+ float x;
+#endif
+{
+ return __ieee754_scalbf(x,(float) -ilogbf(x));
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double significand(double x)
+#else
+ double significand(x)
+ double x;
+#endif
+{
+ return (double) significandf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_sin.c -- float version of s_sin.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float sinf(float x)
+#else
+ float sinf(x)
+ float x;
+#endif
+{
+ float y[2],z=0.0;
+ __int32_t n,ix;
+
+ GET_FLOAT_WORD(ix,x);
+
+ /* |x| ~< pi/4 */
+ ix &= 0x7fffffff;
+ if(ix <= 0x3f490fd8) return __kernel_sinf(x,z,0);
+
+ /* sin(Inf or NaN) is NaN */
+ else if (!FLT_UWORD_IS_FINITE(ix)) return x-x;
+
+ /* argument reduction needed */
+ else {
+ n = __ieee754_rem_pio2f(x,y);
+ switch(n&3) {
+ case 0: return __kernel_sinf(y[0],y[1],1);
+ case 1: return __kernel_cosf(y[0],y[1]);
+ case 2: return -__kernel_sinf(y[0],y[1],1);
+ default:
+ return -__kernel_cosf(y[0],y[1]);
+ }
+ }
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double sin(double x)
+#else
+ double sin(x)
+ double x;
+#endif
+{
+ return (double) sinf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_tan.c -- float version of s_tan.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+ float tanf(float x)
+#else
+ float tanf(x)
+ float x;
+#endif
+{
+ float y[2],z=0.0;
+ __int32_t n,ix;
+
+ GET_FLOAT_WORD(ix,x);
+
+ /* |x| ~< pi/4 */
+ ix &= 0x7fffffff;
+ if(ix <= 0x3f490fda) return __kernel_tanf(x,z,1);
+
+ /* tan(Inf or NaN) is NaN */
+ else if (!FLT_UWORD_IS_FINITE(ix)) return x-x; /* NaN */
+
+ /* argument reduction needed */
+ else {
+ n = __ieee754_rem_pio2f(x,y);
+ return __kernel_tanf(y[0],y[1],1-((n&1)<<1)); /* 1 -- n even
+ -1 -- n odd */
+ }
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double tan(double x)
+#else
+ double tan(x)
+ double x;
+#endif
+{
+ return (double) tanf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/* sf_tanh.c -- float version of s_tanh.c.
+ * Conversion to float by Ian Lance Taylor, Cygnus Support, ian@cygnus.com.
+ */
+
+/*
+ * ====================================================
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+ * ====================================================
+ */
+
+#include "fdlibm.h"
+
+#ifdef __STDC__
+static const float one=1.0, two=2.0, tiny = 1.0e-30;
+#else
+static float one=1.0, two=2.0, tiny = 1.0e-30;
+#endif
+
+#ifdef __STDC__
+ float tanhf(float x)
+#else
+ float tanhf(x)
+ float x;
+#endif
+{
+ float t,z;
+ __int32_t jx,ix;
+
+ GET_FLOAT_WORD(jx,x);
+ ix = jx&0x7fffffff;
+
+ /* x is INF or NaN */
+ if(!FLT_UWORD_IS_FINITE(ix)) {
+ if (jx>=0) return one/x+one; /* tanh(+-inf)=+-1 */
+ else return one/x-one; /* tanh(NaN) = NaN */
+ }
+
+ /* |x| < 22 */
+ if (ix < 0x41b00000) { /* |x|<22 */
+ if (ix<0x24000000) /* |x|<2**-55 */
+ return x*(one+x); /* tanh(small) = small */
+ if (ix>=0x3f800000) { /* |x|>=1 */
+ t = expm1f(two*fabsf(x));
+ z = one - two/(t+two);
+ } else {
+ t = expm1f(-two*fabsf(x));
+ z= -t/(t+two);
+ }
+ /* |x| > 22, return +-1 */
+ } else {
+ z = one - tiny; /* raised inexact flag */
+ }
+ return (jx>=0)? z: -z;
+}
+
+#ifdef _DOUBLE_IS_32BITS
+
+#ifdef __STDC__
+ double tanh(double x)
+#else
+ double tanh(x)
+ double x;
+#endif
+{
+ return (double) tanhf((float) x);
+}
+
+#endif /* defined(_DOUBLE_IS_32BITS) */
--- /dev/null
+/*
+ * Copyright (c) 2002 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: sqrt.S,v 1.1 2002/08/30 11:53:44 diwil Exp $
+ */
+ .file "sqrt.S"
+
+ .text
+ .p2align 1,0
+.global sqrt
+ .type sqrt,@function
+/***********************
+ * Function `sqrt': res = (float)sqrt(float arg);
+ * inputs
+ ***********************/
+
+#define argsave_lo r6
+#define argsave_hi r7
+
+#define y_lo r8
+#define y_hi r9
+
+#define yprev_lo r10
+#define yprev_hi r11
+
+
+
+sqrt:
+ tst r15
+ jn .Lsqrt_err
+
+ push argsave_lo
+ push argsave_hi
+ push y_lo
+ push y_hi
+ push yprev_lo
+ push yprev_hi
+
+ mov r14, argsave_lo
+ mov r15, argsave_hi
+ mov argsave_lo, y_lo
+ mov argsave_hi, y_hi
+ tst y_lo
+ jne +2
+ tst y_hi
+ jeq .Lfinish
+.Lloop:
+ mov y_lo, yprev_lo ; yprev = y
+ mov y_hi, yprev_hi
+ mov y_lo, r12
+ mov y_hi, r13
+ mov argsave_lo, r14 ; arg/y
+ mov argsave_hi, r15
+ call #__divsf3
+ mov y_lo, r12 ; +y
+ mov y_hi, r13
+ call #__addsf3
+ mov #llo(0x3f000000), r12 ; *0.5
+ mov #lhi(0x3f000000), r13
+ call #__mulsf3
+ mov r14, y_lo ; result id in r15:r14
+ mov r15, y_hi
+
+ cmp y_lo, yprev_lo
+ jne .Lloop
+ cmp y_hi, yprev_hi
+ jne .Lloop
+.Lfinish:
+ mov y_lo, r14
+ mov y_hi, r15
+
+ pop yprev_hi
+ pop yprev_lo
+ pop y_hi
+ pop y_lo
+ pop argsave_hi
+ pop argsave_lo
+ ret
+
+.Lsqrt_err:
+ mov #0xffff, r14
+ mov #0xffff, r15
+ ret
+
+.Lfe1:
+ .size sqrt,.Lfe1-sqrt
+
--- /dev/null
+/*
+ * Copyright (c) 2002 - 2004 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: subsf.c,v 1.7 2004/05/28 10:11:48 diwil Exp $
+ */
+
+/* TESTED */
+
+/*long __subsf3(long a1, long a2)
+ a1= r15,r14
+ a2= r13,r12*/
+
+void
+__attribute__((naked)) __subsf3()
+{
+
+ __asm__ __volatile("xor #0x8000, r13 \n\t"
+ "br #__addsf3");
+}
--- /dev/null
+
+/*
+ * Copyright (c) 2003 Dmitry Dicky diwil@mail.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: _init_section__.c,v 1.2 2003/02/07 12:56:30 diwil Exp $
+ */
+
+#include <sys/types.h>
+#include <sys/unistd.h>
+#include <string.h>
+
+int _init_section__(int section)
+{
+ uint16_t start, stop, size, stack, ret = 0;
+ void *from, *where;
+
+ if(section == MSP430_SECTION_BSS)
+ {
+ (uint16_t *)start = &__bss_start;
+ (uint16_t *)stop = &__bss_end;
+ bzero(&__bss_start,stop-start);
+ return ret;
+ }
+ else if(section == MSP430_SECTION_DATA)
+ {
+ (uint16_t *)start = &__data_start_rom;
+ (uint16_t *)stop = &_edata;
+ from = (void *)&_etext;
+ where = (void *)&__data_start;
+ size = ret = stop - start;
+ }
+ else if(section == MSP430_SECTION_NOINIT)
+ {
+ (uint16_t *)start = &__noinit_start_rom;
+ (uint16_t *)stop = &__noinit_end_rom;
+ from = (void *)&__noinit_start_rom;
+ where = (void *)&__bss_end;
+ size = ret = stop - start;
+ }
+ else
+ return -1;
+
+ /* check if stack bottom will be overriden */
+ __asm__ __volatile__("mov r1, %0" : "=r" (stack));
+ if(stack <= (uint16_t)where + size)
+ return -1;
+
+ while(size--)
+ {
+ *((char *)where)++ = *((char *)from)++;
+ }
+
+ return ret;
+}
+
--- /dev/null
+
+ .text
+ .p2align 1,0
+ .global abort
+abort:
+ jmp abort
+
--- /dev/null
+/* written by marekm@linux.org.pl, hardly worth copyrighting :-) */
+
+#include <stdlib.h>
+
+void
+abort(void)
+{
+ for (;;);
+}
--- /dev/null
+/* written by marekm@linux.org.pl, hardly worth copyrighting :-) */
+
+#include <stdlib.h>
+
+int
+abs(int x)
+{
+ return (x < 0) ? -x : x;
+}
--- /dev/null
+
+#include <stdlib.h>
+#include <ctype.h>
+
+
+int atoi( const char *p)
+{
+ int sign = 0;
+ int res = 0;
+
+ while( *p==' '
+ || *p=='\t'
+ || *p=='\n'
+ || *p=='\f'
+ || *p=='\r'
+ || *p=='\v' ) p++;
+
+ if(*p == '-' )
+ {
+ sign = 1;
+ p++;
+ }
+ else if(*p == '+') p++;
+
+ if(!isdigit(*p)) return 0;
+
+ while(1)
+ {
+ res += *p - '0';
+ p++;
+ if(!isdigit(*p)) break;
+ res = res*10;
+ }
+
+ if(sign) res = -res;
+
+ return res;
+}
+
--- /dev/null
+/* written by marekm@linux.org.pl, hardly worth copyrighting :-) */
+
+#include <stdlib.h>
+
+long
+atol(const char *p)
+{
+ return strtol(p, (char **) 0, 10);
+}
--- /dev/null
+/*
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <stdlib.h>
+
+/*
+ * Perform a binary search.
+ *
+ * The code below is a bit sneaky. After a comparison fails, we
+ * divide the work in half by moving either left or right. If lim
+ * is odd, moving left simply involves halving lim: e.g., when lim
+ * is 5 we look at item 2, so we change lim to 2 so that we will
+ * look at items 0 & 1. If lim is even, the same applies. If lim
+ * is odd, moving right again involes halving lim, this time moving
+ * the base up one item past p: e.g., when lim is 5 we change base
+ * to item 3 and make lim 2 so that we will look at items 3 and 4.
+ * If lim is even, however, we have to shrink it by one before
+ * halving: e.g., when lim is 4, we still looked at item 2, so we
+ * have to make lim 3, then halve, obtaining 1, so that we will only
+ * look at item 3.
+ */
+void *
+bsearch(key, base0, nmemb, size, compar)
+register const void *key;
+const void *base0;
+size_t nmemb;
+register size_t size;
+register int (*compar)(const void *, const void *);
+{
+ register const char *base = base0;
+ register size_t lim;
+ register int cmp;
+ register const void *p;
+
+ for (lim = nmemb; lim != 0; lim >>= 1)
+ {
+ p = base + (lim >> 1) * size;
+ cmp = (*compar)(key, p);
+ if (cmp == 0)
+ return ((void *)p);
+ if (cmp > 0)
+ { /* key > p: move right */
+ base = (char *)p + size;
+ lim--;
+ } /* else move left */
+ }
+ return (NULL);
+}
--- /dev/null
+/* ldiv() is the same as __divmodsi4() in libgcc */
+
+ .section .text
+ .global div
+div:
+;; save clobbers first
+ push r10
+ push r11
+;; mov registers.
+ mov r14, r10 ;; denom
+ mov r15, r12 ;; num
+;; divide
+ call #__divmodhi4
+ mov r14, r15
+ mov r12, r14
+;; result is in there already...
+;; restore regs and return.
+ pop r11
+ pop r10
+ ret
+
--- /dev/null
+/* written by marekm@linux.org.pl, hardly worth copyrighting :-) */
+
+#include <errno.h>
+
+int errno;
--- /dev/null
+/*
+ * Copyright (c) 2002 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: exit.S,v 1.2 2002/09/19 08:25:54 diwil Exp $
+ */
+
+/*
+ * Here, r15 contains LPM mode
+ * This one will stop MPU and has nothing with
+ * Multitasking exiting and such.
+ */
+
+ .text
+ .p2align 1,0
+ .global exit
+exit:
+ mov r15, r2
+ jmp exit
+
--- /dev/null
+/*******************************************************
+* Code contributed by Chris Takahashi, *
+* ctakahashi (at) users (dot) sourceforge (dot) net. *
+* See stdlib.h for licence. *
+* $Date: 2005/08/31 11:39:47 $ *
+*******************************************************/
+#include <stdlib.h>
+
+char *itoa(int num, char *str, int radix) {
+ char sign = 0;
+ char temp[17]; //an int can only be 16 bits long
+ //at radix 2 (binary) the string
+ //is at most 16 + 1 null long.
+ int temp_loc = 0;
+ int digit;
+ int str_loc = 0;
+
+ //save sign for radix 10 conversion
+ if (radix == 10 && num < 0) {
+ sign = 1;
+ num = -num;
+ }
+
+ //construct a backward string of the number.
+ do {
+ digit = (unsigned int)num % radix;
+ if (digit < 10)
+ temp[temp_loc++] = digit + '0';
+ else
+ temp[temp_loc++] = digit - 10 + 'A';
+ ((unsigned int)num) /= radix;
+ } while ((unsigned int)num > 0);
+
+ //now add the sign for radix 10
+ if (radix == 10 && sign) {
+ temp[temp_loc] = '-';
+ } else {
+ temp_loc--;
+ }
+
+
+ //now reverse the string.
+ while ( temp_loc >=0 ) {// while there are still chars
+ str[str_loc++] = temp[temp_loc--];
+ }
+ str[str_loc] = 0; // add null termination.
+
+ return str;
+}
+
--- /dev/null
+/* written by marekm@linux.org.pl, hardly worth copyrighting :-) */
+
+#include <stdlib.h>
+
+long
+labs(long x)
+{
+ return (x < 0) ? -x : x;
+}
--- /dev/null
+/* ldiv() is the same as __divmodsi4() in libgcc */
+
+ .section .text
+ .global ldiv
+ldiv:
+;; save clobbers first
+ push r8
+ push r9
+ push r10
+ push r11
+;; mov registers.
+ mov r13, r11 ;; denom
+ mov r12, r10
+ mov r15, r13 ;; num
+ mov r14, r12
+;; divide
+ call #__divmodsi4
+;; result is in there already...
+;; restore regs and return.
+ pop r11
+ pop r10
+ pop r9
+ pop r8
+ ret
+
--- /dev/null
+/*******************************************************
+* Code contributed by Chris Takahashi, *
+* ctakahashi (at) users (dot) sourceforge (dot) net. *
+* See stdlib.h for licence. *
+* $Date: 2005/08/31 11:39:47 $ *
+*******************************************************/
+#include <stdlib.h>
+
+char *ltoa(long num, char *str, int radix) {
+ char sign = 0;
+ char temp[33]; //an int can only be 32 bits long
+ //at radix 2 (binary) the string
+ //is at most 16 + 1 null long.
+ int temp_loc = 0;
+ int digit;
+ int str_loc = 0;
+
+ //save sign for radix 10 conversion
+ if (radix == 10 && num < 0) {
+ sign = 1;
+ num = -num;
+ }
+
+ //construct a backward string of the number.
+ do {
+ digit = (unsigned long)num % radix;
+ if (digit < 10)
+ temp[temp_loc++] = digit + '0';
+ else
+ temp[temp_loc++] = digit - 10 + 'A';
+ ((unsigned long)num) /= radix;
+ } while ((unsigned long)num > 0);
+
+ //now add the sign for radix 10
+ if (radix == 10 && sign) {
+ temp[temp_loc] = '-';
+ } else {
+ temp_loc--;
+ }
+
+
+ //now reverse the string.
+ while ( temp_loc >=0 ) {// while there are still chars
+ str[str_loc++] = temp[temp_loc--];
+ }
+ str[str_loc] = 0; // add null termination.
+
+ return str;
+}
+
--- /dev/null
+
+#include <stdlib.h>
+
+#define XSIZE(x) ((*x)>>1)
+#define FREE_P(x) (!((*x)&1))
+#define MARK_BUSY(x) ((*x)|=1)
+#define MARK_FREE(x) ((*x)&=0xfffe)
+
+extern size_t __bss_end;
+#define GET_HEAP_BOTTOM(__x) __asm__ __volatile__("mov r1, %0": "=r" ((uint16_t)__x) :)
+
+void *malloc (size_t size)
+{
+ static char once = 0;
+ size_t * heap_bottom;
+ size_t kk = (size_t) (&__bss_end); /* this will possibly introduce */
+ size_t * heap_top = (size_t *)((kk+1)&~1); /* 1 byte hole between .bss and heap */
+ char f = 0;
+
+ if (!once)
+ {
+ once = 1;
+ *heap_top = 0xFFFE;
+ }
+ GET_HEAP_BOTTOM (heap_bottom);
+ heap_bottom -= 20;
+ size = (size+1) >> 1; /* round to 2 */
+ do
+ {
+ size_t xsize = XSIZE (heap_top);
+ size_t * heap_next = &heap_top[xsize + 1];
+ if ((xsize<<1)+2 == 0)
+ {
+ f = 1;
+ }
+ if (FREE_P (heap_top))
+ {
+ if (f)
+ {
+ xsize = heap_bottom - heap_top - 1;
+ }
+ else if (FREE_P(heap_next))
+ {
+ *heap_top = ( (XSIZE(heap_next)<<1) + 2 == 0
+ ? 0xfffe
+ : (xsize + XSIZE(heap_next) + 1)<<1);
+ continue;
+ }
+ if (xsize >= size)
+ {
+ if (f)
+ heap_top[size + 1] = 0xfffe;
+ else if (xsize != size)
+ heap_top[size + 1] = (xsize - size - 1) << 1;
+ *heap_top = size << 1;
+ MARK_BUSY (heap_top);
+ return heap_top+1;
+ }
+ }
+ heap_top += xsize + 1;
+ }
+ while (!f);
+ return NULL;
+}
+
+void free (void *p)
+{
+ size_t *t = (size_t*)p - 1;
+ MARK_FREE (t);
+}
+
--- /dev/null
+/*
+ * Copyright (c) 2001 Dmitry Dicky diwil@eis.ru
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS `AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: mul10.S,v 1.2 2002/01/16 14:06:35 diwil Exp $
+ */
+
+/*
+ * mul10.S - optimized 16-bit multiply by 10
+ * This call does not handle overflow.
+ * int mul10(int)
+ * Actually, the compiler does it better!
+ */
+
+ .section .text
+ .global __mulhi_const_10
+__mulhi_const_10:
+ mov r15, r14
+ rla r15
+ rla r15
+ add r14, r15
+ rla r15
+ ret
+
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+
+
+#include <stdio.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+int printf(const char *string, ...)
+{
+ int len;
+ va_list args;
+ va_start(args, string);
+ len = vuprintf(putchar, string, args);
+ va_end(args);
+ return len;
+}
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+
+#include <stdio.h>
+
+
+int puts(const char *s) {
+ int ok = 0; //successfully write an empty string
+ while (*s && ((ok = putchar(*s++)) >= 0)) {}
+ if (ok >= 0) {
+ return putchar('\n');
+ } else {
+ return ok;
+ }
+}
+
--- /dev/null
+/* Copyright (C) 1991, 1992 Free Software Foundation, Inc.
+This file is part of the GNU C Library.
+Written by Douglas C. Schmidt (schmidt@ics.uci.edu).
+
+The GNU C Library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public License as
+published by the Free Software Foundation; either version 2 of the
+License, or (at your option) any later version.
+
+The GNU C Library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with the GNU C Library; see the file COPYING.LIB. If
+not, write to the Free Software Foundation, Inc., 675 Mass Ave,
+Cambridge, MA 02139, USA. */
+
+/* #include <ansidecl.h> */
+#include <stdlib.h>
+#include <string.h>
+
+#define __alloca __builtin_alloca
+#define _quicksort qsort
+
+/* Byte-wise swap two items of size SIZE. */
+#define SWAP(a, b, size) \
+do \
+{ \
+register size_t __size = (size); \
+register char *__a = (a), *__b = (b); \
+do \
+{ \
+char __tmp = *__a; \
+*__a++ = *__b; \
+*__b++ = __tmp; \
+} while (--__size > 0); \
+} while (0)
+
+/* Discontinue quicksort algorithm when partition gets below this size.
+ This particular magic number was chosen to work best on a Sun 4/260. */
+#define MAX_THRESH 4
+
+/* Stack node declarations used to store unfulfilled partition obligations. */
+typedef struct
+{
+ char *lo;
+ char *hi;
+}
+stack_node;
+
+/* The next 4 #defines implement a very fast in-line stack abstraction. */
+#define STACK_SIZE (8 * sizeof(unsigned long int))
+#define PUSH(low, high) ((void) ((top->lo = (low)), (top->hi = (high)), ++top))
+#define POP(low, high) ((void) (--top, (low = top->lo), (high = top->hi)))
+#define STACK_NOT_EMPTY (stack < top)
+
+
+/* Order size using quicksort. This implementation incorporates
+ four optimizations discussed in Sedgewick:
+
+ 1. Non-recursive, using an explicit stack of pointer that store the
+ next array partition to sort. To save time, this maximum amount
+ of space required to store an array of MAX_INT is allocated on the
+ stack. Assuming a 32-bit integer, this needs only 32 *
+ sizeof(stack_node) == 136 bits. Pretty cheap, actually.
+
+ 2. Chose the pivot element using a median-of-three decision tree.
+ This reduces the probability of selecting a bad pivot value and
+ eliminates certain extraneous comparisons.
+
+ 3. Only quicksorts TOTAL_ELEMS / MAX_THRESH partitions, leaving
+ insertion sort to order the MAX_THRESH items within each partition.
+ This is a big win, since insertion sort is faster for small, mostly
+ sorted array segements.
+
+ 4. The larger of the two sub-partitions is always pushed onto the
+ stack first, with the algorithm then concentrating on the
+ smaller partition. This *guarantees* no more than log (n)
+ stack size is needed (actually O(1) in this case)! */
+
+void
+_quicksort (void *pbase, size_t total_elems, size_t size, __compar_fn_t cmp)
+{
+ register char *base_ptr = (char *) pbase;
+
+ /* Allocating SIZE bytes for a pivot buffer facilitates a better
+ algorithm below since we can do comparisons directly on the pivot. */
+ char *pivot_buffer = (char *) __alloca (size);
+ const size_t max_thresh = MAX_THRESH * size;
+
+ if (total_elems == 0)
+ /* Avoid lossage with unsigned arithmetic below. */
+ return;
+
+ if (total_elems > MAX_THRESH)
+ {
+ char *lo = base_ptr;
+ char *hi = &lo[size * (total_elems - 1)];
+ /* Largest size needed for 32-bit int!!! */
+ stack_node stack[STACK_SIZE];
+ stack_node *top = stack + 1;
+
+ while (STACK_NOT_EMPTY)
+ {
+ char *left_ptr;
+ char *right_ptr;
+
+ char *pivot = pivot_buffer;
+
+ /* Select median value from among LO, MID, and HI. Rearrange
+ LO and HI so the three values are sorted. This lowers the
+ probability of picking a pathological pivot value and
+ skips a comparison for both the LEFT_PTR and RIGHT_PTR. */
+
+ char *mid = lo + size * ((hi - lo) / size >> 1);
+
+ if ((*cmp)((void *) mid, (void *) lo) < 0)
+ SWAP(mid, lo, size);
+ if ((*cmp)((void *) hi, (void *) mid) < 0)
+ SWAP(mid, hi, size);
+ else
+ goto jump_over;
+ if ((*cmp)((void *) mid, (void *) lo) < 0)
+ SWAP(mid, lo, size);
+jump_over:
+ ;
+ memcpy(pivot, mid, size);
+ pivot = pivot_buffer;
+
+ left_ptr = lo + size;
+ right_ptr = hi - size;
+
+ /* Here's the famous ``collapse the walls'' section of quicksort.
+ Gotta like those tight inner loops! They are the main reason
+ that this algorithm runs much faster than others. */
+ do
+ {
+ while ((*cmp)((void *) left_ptr, (void *) pivot) < 0)
+ left_ptr += size;
+
+ while ((*cmp)((void *) pivot, (void *) right_ptr) < 0)
+ right_ptr -= size;
+
+ if (left_ptr < right_ptr)
+ {
+ SWAP(left_ptr, right_ptr, size);
+ left_ptr += size;
+ right_ptr -= size;
+ }
+ else if (left_ptr == right_ptr)
+ {
+ left_ptr += size;
+ right_ptr -= size;
+ break;
+ }
+ }
+ while (left_ptr <= right_ptr);
+
+ /* Set up pointers for next iteration. First determine whether
+ left and right partitions are below the threshold size. If so,
+ ignore one or both. Otherwise, push the larger partition's
+ bounds on the stack and continue sorting the smaller one. */
+
+ if ((size_t) (right_ptr - lo) <= max_thresh)
+ {
+ if ((size_t) (hi - left_ptr) <= max_thresh)
+ /* Ignore both small partitions. */
+ POP(lo, hi);
+ else
+ /* Ignore small left partition. */
+ lo = left_ptr;
+ }
+ else if ((size_t) (hi - left_ptr) <= max_thresh)
+ /* Ignore small right partition. */
+ hi = right_ptr;
+ else if ((right_ptr - lo) > (hi - left_ptr))
+ {
+ /* Push larger left partition indices. */
+ PUSH(lo, right_ptr);
+ lo = left_ptr;
+ }
+ else
+ {
+ /* Push larger right partition indices. */
+ PUSH(left_ptr, hi);
+ hi = right_ptr;
+ }
+ }
+ }
+
+ /* Once the BASE_PTR array is partially sorted by quicksort the rest
+ is completely sorted using insertion sort, since this is efficient
+ for partitions below MAX_THRESH size. BASE_PTR points to the beginning
+ of the array to sort, and END_PTR points at the very last element in
+ the array (*not* one beyond it!). */
+
+#define min(x, y) ((x) < (y) ? (x) : (y))
+
+ {
+ char *const end_ptr = &base_ptr[size * (total_elems - 1)];
+ char *tmp_ptr = base_ptr;
+ char *thresh = min(end_ptr, base_ptr + max_thresh);
+ register char *run_ptr;
+
+ /* Find smallest element in first threshold and place it at the
+ array's beginning. This is the smallest array element,
+ and the operation speeds up insertion sort's inner loop. */
+
+ for (run_ptr = tmp_ptr + size; run_ptr <= thresh; run_ptr += size)
+ if ((*cmp)((void *) run_ptr, (void *) tmp_ptr) < 0)
+ tmp_ptr = run_ptr;
+
+ if (tmp_ptr != base_ptr)
+ SWAP(tmp_ptr, base_ptr, size);
+
+ /* Insertion sort, running from left-hand-side up to right-hand-side. */
+
+ run_ptr = base_ptr + size;
+ while ((run_ptr += size) <= end_ptr)
+ {
+ tmp_ptr = run_ptr - size;
+ while ((*cmp)((void *) run_ptr, (void *) tmp_ptr) < 0)
+ tmp_ptr -= size;
+
+ tmp_ptr += size;
+ if (tmp_ptr != run_ptr)
+ {
+ char *trav;
+
+ trav = run_ptr + size;
+ while (--trav >= run_ptr)
+ {
+ char c = *trav;
+ char *hi, *lo;
+
+ for (hi = lo = trav; (lo -= size) >= tmp_ptr; hi = lo)
+ *hi = *lo;
+ *hi = c;
+ }
+ }
+ }
+ }
+}
+
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Posix rand_r function added May 1999 by Wes Peters <wes@softweyr.com>.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)rand.c 8.1 (Berkeley) 6/14/93";
+#endif /* LIBC_SCCS and not lint */
+
+#if 0
+#include <sys/types.h>
+#endif
+#include <stdlib.h>
+
+#ifdef TEST
+#include <stdio.h>
+#endif /* TEST */
+
+static int
+do_rand(unsigned long *ctx)
+{
+ return ((*ctx = *ctx * 1103515245 + 12345) % ((unsigned long int)RAND_MAX + 1));
+}
+
+
+int
+rand_r(unsigned int *ctx)
+{
+ unsigned long int val = (unsigned long int) *ctx;
+ *ctx = do_rand(&val);
+ return (int) *ctx;
+}
+
+
+static unsigned long int next = 1;
+
+int
+rand(void)
+{
+ return do_rand(&next);
+}
+
+void
+srand(unsigned int seed)
+{
+ next = seed;
+}
+
+#ifdef TEST
+
+main()
+{
+ int i;
+ unsigned myseed;
+
+ printf("seeding rand with 0x19610910: \n");
+ srand(0x19610910);
+
+ printf("generating three pseudo-random numbers:\n");
+ for (i = 0; i < 3; i++)
+ {
+ printf("next random number = %d\n", rand());
+ }
+
+ printf("generating the same sequence with rand_r:\n");
+ myseed = 0x19610910;
+ for (i = 0; i < 3; i++)
+ {
+ printf("next random number = %d\n", rand_r(&myseed));
+ }
+
+ return 0;
+}
+
+#endif /* TEST */
+
--- /dev/null
+/* Copyright (C) 2001 Dmitry Diky <diwil@mail.ru>
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+author gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file. (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+General Public License for more details. */
+
+/*
+extern int setjmp(jmp_buf __jmpb);
+extern void longjmp(jmp_buf __jmpb, int __ret) __ATTR_NORETURN__;
+*/
+
+ .section .text
+ .global setjmp
+ .global longjmp
+
+setjmp:
+ mov @r1, 0(r15) ; save return address
+ mov r1, 2(r15) ; stack pointer
+ incd 2(r15) ; postdec saved SP cause it contains ret addr
+ mov r2, 4(r15) ; status register
+ mov r4, 6(r15)
+ mov r5, 8(r15)
+ mov r6, 10(r15)
+ mov r7, 12(r15)
+ mov r8, 14(r15)
+ mov r9, 16(r15)
+ mov r10, 18(r15)
+ mov r11, 20(r15)
+ mov #0, r15 ; return value
+ ret
+
+
+longjmp:
+ mov r15, r13
+ mov r14, r15 ; r15 now contains a return value
+ mov 2(r13), r1 ; restore registers
+ mov 4(r13), r2
+ mov 6(r13), r4
+ mov 8(r13), r5
+ mov 10(r13), r6
+ mov 12(r13), r7
+ mov 14(r13), r8
+ mov 16(r13), r9
+ mov 18(r13), r10
+ mov 20(r13), r11
+ br 0(r13) ; jump...
+
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+
+#include <stdio.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+int snprintf(char *dest, size_t maxsize, const char *string, ...)
+{
+ int len;
+ va_list args;
+ va_start(args, string);
+ len = vsnprintf(dest, maxsize, string, args);
+ va_end(args);
+ return len;
+}
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+
+#include <stdio.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+int sprintf(char *dest, const char *string, ...)
+{
+ int len;
+ va_list args;
+ va_start(args, string);
+ len = vsprintf(dest, string, args);
+ va_end(args);
+ return len;
+}
+
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)strtol.c 8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+
+#include <limits.h>
+#include <ctype.h>
+#include <errno.h>
+#include <stdlib.h>
+
+
+/*
+ * Convert a string to a long integer.
+ *
+ * Ignores `locale' stuff. Assumes that the upper and lower case
+ * alphabets and digits are each contiguous.
+ */
+long
+strtol(nptr, endptr, base)
+const char *nptr;
+char **endptr;
+register int base;
+{
+ register const char *s = nptr;
+ register unsigned long acc;
+ register unsigned char c;
+#if 1
+ register unsigned long cutoff;
+ register int cutlim;
+#else
+ ldiv_t cut;
+#define cutoff (cut.quot)
+#define cutlim ((int) cut.rem)
+#endif
+ register int neg = 0, any;
+
+ /*
+ * Skip white space and pick up leading +/- sign if any.
+ * If base is 0, allow 0x for hex and 0 for octal, else
+ * assume decimal; if base is already 16, allow 0x.
+ */
+ do
+ {
+ c = *s++;
+ }
+ while (isspace(c));
+ if (c == '-')
+ {
+ neg = 1;
+ c = *s++;
+ }
+ else if (c == '+')
+ c = *s++;
+ if ((base == 0 || base == 16) &&
+ c == '0' && (*s == 'x' || *s == 'X'))
+ {
+ c = s[1];
+ s += 2;
+ base = 16;
+ }
+ if (base == 0)
+ base = c == '0' ? 8 : 10;
+
+ /*
+ * Compute the cutoff value between legal numbers and illegal
+ * numbers. That is the largest legal value, divided by the
+ * base. An input number that is greater than this value, if
+ * followed by a legal input character, is too big. One that
+ * is equal to this value may be valid or not; the limit
+ * between valid and invalid numbers is then based on the last
+ * digit. For instance, if the range for longs is
+ * [-2147483648..2147483647] and the input base is 10,
+ * cutoff will be set to 214748364 and cutlim to either
+ * 7 (neg==0) or 8 (neg==1), meaning that if we have accumulated
+ * a value > 214748364, or equal but the next digit is > 7 (or 8),
+ * the number is too big, and we will return a range error.
+ *
+ * Set any if any `digits' consumed; make it negative to indicate
+ * overflow.
+ */
+#if 1
+ cutoff = neg ? -(unsigned long)LONG_MIN : LONG_MAX;
+ cutlim = cutoff % (unsigned long)base;
+ cutoff /= (unsigned long)base;
+#else
+ cut = ldiv(neg ? -(unsigned long)LONG_MIN : LONG_MAX,
+ (unsigned long)base);
+#endif
+ for (acc = 0, any = 0;; c = *s++)
+ {
+ if (!isascii(c))
+ break;
+ if (isdigit(c))
+ c -= '0';
+ else if (isalpha(c))
+ c -= isupper(c) ? 'A' - 10 : 'a' - 10;
+ else
+ break;
+ if (c >= base)
+ break;
+ if (any < 0
+ || acc > cutoff ||
+ (acc == cutoff && c > cutlim))
+ any = -1;
+ else
+ {
+ any = 1;
+ acc *= base;
+ acc += c;
+ }
+ }
+ if (any < 0)
+ {
+ acc = neg ? LONG_MIN : LONG_MAX;
+ errno = ERANGE;
+ }
+ else if (neg)
+ acc = -acc;
+ if (endptr != 0)
+ *endptr = (char *)(any ? s - 1 : nptr);
+ return (acc);
+}
--- /dev/null
+/*
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)strtoul.c 8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+
+#include <limits.h>
+#include <ctype.h>
+#include <errno.h>
+#include <stdlib.h>
+
+/*
+ * Convert a string to an unsigned long integer.
+ *
+ * Ignores `locale' stuff. Assumes that the upper and lower case
+ * alphabets and digits are each contiguous.
+ */
+
+/* ATT! ldiv does not work here cause of out-of-range error. */
+
+unsigned long
+strtoul(nptr, endptr, base)
+const char *nptr;
+char **endptr;
+register int base;
+{
+ register const char *s = nptr;
+ register unsigned long acc;
+ register unsigned char c;
+#if 1
+ register unsigned long cutoff;
+ register int cutlim;
+#else
+ ldiv_t cut;
+#define cutoff (cut.quot)
+#define cutlim ((int) cut.rem)
+#endif
+ register int neg = 0, any;
+
+ /*
+ * See strtol for comments as to the logic used.
+ */
+ do
+ {
+ c = *s++;
+ }
+ while (isspace(c));
+ if (c == '-')
+ {
+ neg = 1;
+ c = *s++;
+ }
+ else if (c == '+')
+ c = *s++;
+ if ((base == 0 || base == 16) &&
+ c == '0' && (*s == 'x' || *s == 'X'))
+ {
+ c = s[1];
+ s += 2;
+ base = 16;
+ }
+ if (base == 0)
+ base = c == '0' ? 8 : 10;
+#if 1
+ cutoff = (unsigned long)ULONG_MAX / (unsigned long)base;
+ cutlim = (unsigned long)ULONG_MAX % (unsigned long)base;
+#else
+ cut = ldiv((unsigned long)ULONG_MAX, (unsigned long)base);
+#endif
+ for (acc = 0, any = 0;; c = *s++)
+ {
+ if (!isascii(c))
+ break;
+ if (isdigit(c))
+ c -= '0';
+ else if (isalpha(c))
+ c -= isupper(c) ? 'A' - 10 : 'a' - 10;
+ else
+ break;
+ if (c >= base)
+ break;
+ if (any < 0 || acc > cutoff || (acc == cutoff && c > cutlim))
+ any = -1;
+ else
+ {
+ any = 1;
+ acc *= base;
+ acc += c;
+ }
+ }
+ if (any < 0)
+ {
+ acc = ULONG_MAX;
+ errno = ERANGE;
+ }
+ else if (neg)
+ acc = -acc;
+ if (endptr != 0)
+ *endptr = (char *)(any ? s - 1 : nptr);
+ return (acc);
+}
--- /dev/null
+/*******************************************************
+* Code contributed by Chris Takahashi, *
+* ctakahashi (at) users (dot) sourceforge (dot) net. *
+* See stdlib.h for licence. *
+* $Date: 2005/08/31 11:39:47 $ *
+*******************************************************/
+#include <stdlib.h>
+
+char *ultoa(unsigned long num, char *str, int radix) {
+ char temp[33]; //an int can only be 16 bits long
+ //at radix 2 (binary) the string
+ //is at most 16 + 1 null long.
+ int temp_loc = 0;
+ int digit;
+ int str_loc = 0;
+
+ //construct a backward string of the number.
+ do {
+ digit = (unsigned long)num % radix;
+ if (digit < 10)
+ temp[temp_loc++] = digit + '0';
+ else
+ temp[temp_loc++] = digit - 10 + 'A';
+ ((unsigned long)num) /= radix;
+ } while ((unsigned long)num > 0);
+
+ temp_loc--;
+
+
+ //now reverse the string.
+ while ( temp_loc >=0 ) {// while there are still chars
+ str[str_loc++] = temp[temp_loc--];
+ }
+ str[str_loc] = 0; // add null termination.
+
+ return str;
+}
+
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+
+
+#include <stdio.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+int uprintf (int (*func)(int), char const *string, ...)
+{
+ int len;
+ va_list args;
+ va_start(args, string);
+ len = vuprintf(func, string, args);
+ va_end(args);
+ return len;
+}
--- /dev/null
+/*******************************************************
+* Code contributed by Chris Takahashi, *
+* ctakahashi (at) users (dot) sourceforge (dot) net. *
+* See stdlib.h for licence. *
+* $Date: 2005/08/31 11:39:47 $ *
+*******************************************************/
+#include <stdlib.h>
+
+char *utoa(unsigned num, char *str, int radix) {
+ char temp[17]; //an int can only be 16 bits long
+ //at radix 2 (binary) the string
+ //is at most 16 + 1 null long.
+ int temp_loc = 0;
+ int digit;
+ int str_loc = 0;
+
+ //construct a backward string of the number.
+ do {
+ digit = (unsigned int)num % radix;
+ if (digit < 10)
+ temp[temp_loc++] = digit + '0';
+ else
+ temp[temp_loc++] = digit - 10 + 'A';
+ ((unsigned int)num) /= radix;
+ } while ((unsigned int)num > 0);
+
+ temp_loc--;
+
+
+ //now reverse the string.
+ while ( temp_loc >=0 ) {// while there are still chars
+ str[str_loc++] = temp[temp_loc--];
+ }
+ str[str_loc] = 0; // add null termination.
+
+ return str;
+}
+
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+
+
+#include <stdio.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+int vprintf(const char *string, va_list ap)
+{
+ return vuprintf(putchar, string, ap);
+}
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+
+#include <stdio.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+
+static char * mem;
+static size_t max_s_size;
+
+static int mem_putchar_limited(int c)
+{
+ if (max_s_size > 1)
+ {
+ *mem++ = c;
+ max_s_size--;
+ return (unsigned char)c;
+ }
+ else
+ {
+ return -1;
+ }
+}
+
+int vsnprintf(char *dest, size_t maxlen, const char *string, va_list ap)
+{
+ int len;
+ mem = dest;
+ max_s_size = maxlen;
+ len = vuprintf(mem_putchar_limited, string, ap);
+ dest[len] = '\0';
+ return len;
+}
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+
+#include <stdio.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+
+static char * mem;
+
+static int mem_putchar(int c)
+{
+ *mem++ = c;
+ return (unsigned char)c;
+}
+
+int vsprintf(char *dest, const char *string, va_list ap)
+{
+ int len;
+ mem = dest;
+ len = vuprintf(mem_putchar, string, ap);
+ dest[len] = '\0';
+ return len;
+}
--- /dev/null
+/*
+Copyright (C) 1993 Free Software Foundation
+
+This file is part of the GNU IO Library. This library is free
+software; you can redistribute it and/or modify it under the
+terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this library; see the file COPYING. If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+As a special exception, if you link this library with files
+compiled with a GNU compiler to produce an executable, this does not cause
+the resulting executable to be covered by the GNU General Public License.
+This exception does not however invalidate any other reasons why
+the executable file might be covered by the GNU General Public License. */
+
+/*
+ * Copyright (c) 1990 Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. [rescinded 22 July 1999]
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Sprintf is taken from dip122 project.
+ * I just adopted it that msp430-gcc can handle it
+ * The code is about 1500 bytes (depends on -O options)
+ *
+ * (c) msp gcc team http://mspgcc.sourceforge.net
+ */
+
+
+
+/******************************************************************************
+ This file is a patched version of printf called _printf_P
+ It is made to work with avr-gcc for Atmel AVR MCUs.
+ There are some differences from standard printf:
+ 1. There is no floating point support (with fp the code is about 8K!)
+ 2. Return type is void
+ 3. Format string must be in program memory (by using macro printf this is
+ done automaticaly)
+ 4. %n is not implemented (just remove the comment around it if you need it)
+ 5. If LIGHTPRINTF is defined, the code is about 550 bytes smaller and the
+ folowing specifiers are disabled :
+ space # * . - + p s o O
+ 6. A function void uart_sendchar(char c) is used for output. The UART must
+ be initialized before using printf.
+
+ Alexander Popov
+ sasho@vip.orbitel.bg
+
+ small modifications to make it work with liblcd_dip122.a
+ replaced uart_sendchar with (*write_char)(char)
+ 2001 Michael Schaenzler
+*******************************************************************************/
+
+/*
+ * Actual printf innards.
+ *
+ * This code is large and complicated...
+ */
+
+#include <string.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+static int (*__write_char) (int);
+static int total_len = 0;
+
+#define PRINTP PRINT
+
+static int PRINT(const char * ptr, unsigned int len)
+{
+ for(;len;len--)
+ {
+ if (__write_char(*ptr++) < 0)
+ {
+ return -1;
+ }
+ total_len++;
+ }
+ return 1;
+}
+
+#define PAD_SP(x) __write_pad(' ',x)
+#define PAD_0(x) __write_pad('0',x)
+
+static int __write_pad(char c, signed char howmany)
+{
+ for(;howmany>0;howmany--)
+ {
+ if (__write_char(c) < 0)
+ {
+ return -1;
+ }
+ total_len++;
+ }
+ return (unsigned char)c;
+}
+
+
+#define BUF 40
+
+#define PRG_RDB(x) *x
+
+
+/*
+ * Macros for converting digits to letters and vice versa
+ */
+#define to_digit(c) ((c) - '0')
+#define is_digit(c) ((c)<='9' && (c)>='0')
+#define to_char(n) ((n) + '0')
+
+/*
+ * Flags used during conversion.
+ */
+#define LONGINT 0x01 /* long integer */
+#define LONGDBL 0x02 /* long double; unimplemented */
+#define SHORTINT 0x04 /* short integer */
+#define ALT 0x08 /* alternate form */
+#define LADJUST 0x10 /* left adjustment */
+#define ZEROPAD 0x20 /* zero (as opposed to blank) pad */
+#define HEXPREFIX 0x40 /* add 0x or 0X prefix */
+
+
+int vuprintf(int (*func)(int), const char *fmt0, va_list ap)
+{
+ register const char *fmt; /* format string */
+ register char ch; /* character from fmt */
+ register int n; /* handy integer (short term usage) */
+ register char *cp; /* handy char pointer (short term usage) */
+ const char *fmark; /* for remembering a place in fmt */
+ register unsigned char flags; /* flags as above */
+ signed char width; /* width from format (%8d), or 0 */
+ signed char prec; /* precision from format (%.3d), or -1 */
+ char sign; /* sign prefix (' ', '+', '-', or \0) */
+ unsigned long _ulong=0; /* integer arguments %[diouxX] */
+#define OCT 8
+#define DEC 10
+#define HEX 16
+ unsigned char base; /* base for [diouxX] conversion */
+ signed char dprec; /* a copy of prec if [diouxX], 0 otherwise */
+ signed char dpad; /* extra 0 padding needed for integers */
+ signed char fieldsz; /* field size expanded by sign, dpad etc */
+ /* The initialization of 'size' is to suppress a warning that
+ 'size' might be used unitialized. It seems gcc can't
+ quite grok this spaghetti code ... */
+ signed char size = 0; /* size of converted field or string */
+ char buf[BUF]; /* space for %c, %[diouxX], %[eEfgG] */
+ char ox[2]; /* space for 0x hex-prefix */
+
+ total_len = 0;
+ __write_char = func;
+
+ fmt = fmt0;
+
+ /*
+ * Scan the format for conversions (`%' character).
+ */
+ for (;;)
+ {
+ for (fmark = fmt; (ch = PRG_RDB(fmt)) != '\0' && ch != '%'; fmt++)
+ /* void */;
+ if ((n = fmt - fmark) != 0)
+ {
+ if (PRINTP(fmark, n) < 0) goto done;
+ }
+ if (ch == '\0')
+ goto done;
+ fmt++; /* skip over '%' */
+
+ flags = 0;
+ dprec = 0;
+ width = 0;
+ prec = -1;
+ sign = '\0';
+
+rflag:
+ ch = PRG_RDB(fmt++);
+reswitch:
+ if (ch=='u' || (ch|0x20)=='x')
+ {
+ if (flags&LONGINT)
+ {
+ _ulong=va_arg(ap, unsigned long);
+ }
+ else
+ {
+ register unsigned int _d;
+ _d=va_arg(ap, unsigned int);
+ _ulong = flags&SHORTINT ? (unsigned long)(unsigned short)_d : (unsigned long)_d;
+ }
+ }
+
+ if(ch==' ')
+ {
+ /*
+ * ``If the space and + flags both appear, the space
+ * flag will be ignored.''
+ * -- ANSI X3J11
+ */
+ if (!sign)
+ sign = ' ';
+ goto rflag;
+ }
+ else if (ch=='#')
+ {
+ flags |= ALT;
+ goto rflag;
+ }
+ else if (ch=='*'||ch=='-')
+ {
+ if (ch=='*')
+ {
+ /*
+ * ``A negative field width argument is taken as a
+ * - flag followed by a positive field width.''
+ * -- ANSI X3J11
+ * They don't exclude field widths read from args.
+ */
+ if ((width = va_arg(ap, int)) >= 0)
+ goto rflag;
+ width = -width;
+ }
+ flags |= LADJUST;
+ flags &= ~ZEROPAD; /* '-' disables '0' */
+ goto rflag;
+ }
+ else if (ch=='+')
+ {
+ sign = '+';
+ goto rflag;
+ }
+ else if (ch=='.')
+ {
+ if ((ch = PRG_RDB(fmt++)) == '*')
+ {
+ n = va_arg(ap, int);
+ prec = n < 0 ? -1 : n;
+ goto rflag;
+ }
+ n = 0;
+ while (is_digit(ch))
+ {
+ n = n*10 + to_digit(ch);
+ ch = PRG_RDB(fmt++);
+ }
+ prec = n < 0 ? -1 : n;
+ goto reswitch;
+ }
+ else if (ch=='0')
+ {
+ /*
+ * ``Note that 0 is taken as a flag, not as the
+ * beginning of a field width.''
+ * -- ANSI X3J11
+ */
+ if (!(flags & LADJUST))
+ flags |= ZEROPAD; /* '-' disables '0' */
+ goto rflag;
+ }
+ else if (ch>='1' && ch<='9')
+ {
+ n = 0;
+ do
+ {
+ n = 10 * n + to_digit(ch);
+ ch = PRG_RDB(fmt++);
+ }
+ while (is_digit(ch));
+ width = n;
+ goto reswitch;
+ }
+ else if (ch=='h')
+ {
+ flags |= SHORTINT;
+ goto rflag;
+ }
+ else if (ch=='l')
+ {
+ flags |= LONGINT;
+ goto rflag;
+ }
+ else if (ch=='c')
+ {
+ *(cp = buf) = va_arg(ap, int);
+ size = 1;
+ sign = '\0';
+ }
+ else if (ch=='D'||ch=='d'||ch=='i')
+ {
+ if(ch=='D')
+ flags |= LONGINT;
+ if (flags&LONGINT)
+ {
+ _ulong=va_arg(ap, long);
+ }
+ else
+ {
+ register int _d;
+ _d=va_arg(ap, int);
+ _ulong = flags&SHORTINT ? (long)(short)_d : (long)_d;
+ }
+
+ if ((long)_ulong < 0)
+ {
+ _ulong = -_ulong;
+ sign = '-';
+ }
+ base = DEC;
+ goto number;
+ }
+ else if (ch=='O'||ch=='o')
+ {
+ if (ch=='O')
+ flags |= LONGINT;
+ base = OCT;
+ goto nosign;
+ }
+ else if (ch=='p')
+ {
+ /*
+ * ``The argument shall be a pointer to void. The
+ * value of the pointer is converted to a sequence
+ * of printable characters, in an implementation-
+ * defined manner.''
+ * -- ANSI X3J11
+ */
+ /* NOSTRICT */
+ _ulong = (unsigned int)va_arg(ap, void *);
+ base = HEX;
+ flags |= HEXPREFIX;
+ ch = 'x';
+ goto nosign;
+ }
+ else if (ch=='s')
+ { // print a string from RAM
+ if ((cp = va_arg(ap, char *)) == NULL)
+ {
+ cp=buf;
+ cp[0] = '(';
+ cp[1] = 'n';
+ cp[2] = 'u';
+ cp[4] = cp[3] = 'l';
+ cp[5] = ')';
+ cp[6] = '\0';
+ }
+ if (prec >= 0)
+ {
+ /*
+ * can't use strlen; can only look for the
+ * NUL in the first `prec' characters, and
+ * strlen() will go further.
+ */
+ char *p = (char*)memchr(cp, 0, prec);
+
+ if (p != NULL)
+ {
+ size = p - cp;
+ if (size > prec)
+ size = prec;
+ }
+ else
+ size = prec;
+ }
+ else
+ size = strlen(cp);
+ sign = '\0';
+ }
+ else if(ch=='U'||ch=='u')
+ {
+ if (ch=='U')
+ flags |= LONGINT;
+ base = DEC;
+ goto nosign;
+ }
+ else if (ch=='X'||ch=='x')
+ {
+ base = HEX;
+ /* leading 0x/X only if non-zero */
+ if (flags & ALT && _ulong != 0)
+ flags |= HEXPREFIX;
+
+ /* unsigned conversions */
+nosign:
+ sign = '\0';
+ /*
+ * ``... diouXx conversions ... if a precision is
+ * specified, the 0 flag will be ignored.''
+ * -- ANSI X3J11
+ */
+number:
+ if ((dprec = prec) >= 0)
+ flags &= ~ZEROPAD;
+
+ /*
+ * ``The result of converting a zero value with an
+ * explicit precision of zero is no characters.''
+ * -- ANSI X3J11
+ */
+ cp = buf + BUF;
+ if (_ulong != 0 || prec != 0)
+ {
+ register unsigned char _d, notlastdigit;
+ do
+ {
+ notlastdigit=(_ulong>=base);
+ _d = _ulong % base;
+
+ if (_d<10)
+ {
+ _d+='0';
+ }
+ else
+ {
+ _d+='a'-10;
+ if (ch=='X') _d&=~0x20;
+ }
+ *--cp=_d;
+ _ulong /= base;
+ }
+ while (notlastdigit);
+
+ // handle octal leading 0
+ if (base==OCT && flags & ALT && *cp != '0')
+ *--cp = '0';
+ }
+
+ size = buf + BUF - cp;
+ }
+ else
+ { //default
+ /* "%?" prints ?, unless ? is NUL */
+ if (ch == '\0')
+ goto done;
+ /* pretend it was %c with argument ch */
+ cp = buf;
+ *cp = ch;
+ size = 1;
+ sign = '\0';
+ }
+
+ /*
+ * All reasonable formats wind up here. At this point,
+ * `cp' points to a string which (if not flags&LADJUST)
+ * should be padded out to `width' places. If
+ * flags&ZEROPAD, it should first be prefixed by any
+ * sign or other prefix; otherwise, it should be blank
+ * padded before the prefix is emitted. After any
+ * left-hand padding and prefixing, emit zeroes
+ * required by a decimal [diouxX] precision, then print
+ * the string proper, then emit zeroes required by any
+ * leftover floating precision; finally, if LADJUST,
+ * pad with blanks.
+ */
+
+ /*
+ * compute actual size, so we know how much to pad.
+ */
+ fieldsz = size;
+
+ dpad = dprec - size;
+ if (dpad < 0)
+ {
+ dpad = 0;
+ }
+
+ if (sign)
+ {
+ fieldsz++;
+ }
+ else if (flags & HEXPREFIX)
+ {
+ fieldsz += 2;
+ }
+ fieldsz += dpad;
+
+ /* right-adjusting blank padding */
+ if ((flags & (LADJUST|ZEROPAD)) == 0)
+ {
+ n = width - fieldsz;
+ if (n > 0)
+ {
+ if (PAD_SP(n) < 0) goto done;
+ }
+ }
+
+ /* prefix */
+ if (sign)
+ {
+ if (PRINT(&sign, 1) < 0) goto done;
+ }
+ else if (flags & HEXPREFIX)
+ {
+ ox[0] = '0';
+ ox[1] = ch;
+ if (PRINT(ox, 2) < 0) goto done;
+ }
+
+ /* right-adjusting zero padding */
+ if ((flags & (LADJUST|ZEROPAD)) == ZEROPAD)
+ {
+ n = width - fieldsz;
+ if (n > 0)
+ {
+ if (PAD_0(n) < 0) goto done;
+ }
+ }
+
+ /* leading zeroes from decimal precision */
+ if(PAD_0(dpad) < 0) goto done;
+
+ /* the string or number proper */
+ if (PRINT(cp, size) < 0) goto done;
+
+ /* left-adjusting padding (always blank) */
+ if (flags & LADJUST)
+ {
+ n = width - fieldsz;
+ if (n > 0)
+ {
+ if (PAD_SP(n) < 0) goto done;
+ }
+ }
+ }
+done:
+ return total_len;
+}
--- /dev/null
+/* written by marekm@linux.org.pl, hardly worth copyrighting :-) */
+
+#include <stdlib.h>
+
+long
+atol(const char *p)
+{
+ return strtol(p, (char **) 0, 10);
+}
+
--- /dev/null
+/*
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <string.h>
+
+int
+bcmp(b1, b2, length)
+const void *b1, *b2;
+register size_t length;
+{
+ register char *p1, *p2;
+
+ if (length == 0)
+ return(0);
+ p1 = (char *)b1;
+ p2 = (char *)b2;
+ do
+ if (*p1++ != *p2++)
+ break;
+ while (--length);
+ return(length);
+}
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * sizeof(word) MUST BE A POWER OF TWO
+ * SO THAT wmask BELOW IS ALL ONES
+ */
+typedef int word; /* "word" used for optimal copy speed */
+
+#define wsize sizeof(word)
+#define wmask (wsize - 1)
+
+/*
+ * Copy a block of memory, handling overlap.
+ * This is the routine that actually implements
+ * (the portable versions of) bcopy, memcpy, and memmove.
+ */
+#ifdef MEMCOPY
+void *
+memcpy(dst0, src0, length)
+#else
+#ifdef MEMMOVE
+void *
+memmove(dst0, src0, length)
+#else
+void
+bcopy(src0, dst0, length)
+#endif
+#endif
+void *dst0;
+const void *src0;
+register size_t length;
+{
+ register char *dst = dst0;
+ register const char *src = src0;
+ register size_t t;
+
+ if (length == 0 || dst == src) /* nothing to do */
+ goto done;
+
+ /*
+ * Macros: loop-t-times; and loop-t-times, t>0
+ */
+#define TLOOP(s) if (t) TLOOP1(s)
+#define TLOOP1(s) do { s; } while (--t)
+
+ if ((unsigned int)dst < (unsigned int)src)
+ {
+ /*
+ * Copy forward.
+ */
+ t = (int)src; /* only need low bits */
+ if ((t | (int)dst) & wmask)
+ {
+ /*
+ * Try to align operands. This cannot be done
+ * unless the low bits match.
+ */
+ if ((t ^ (int)dst) & wmask || length < wsize)
+ t = length;
+ else
+ t = wsize - (t & wmask);
+ length -= t;
+ TLOOP1(*dst++ = *src++);
+ }
+ /*
+ * Copy whole words, then mop up any trailing bytes.
+ */
+ t = length / wsize;
+ TLOOP(*(word *)dst = *(word *)src; src += wsize; dst += wsize);
+ t = length & wmask;
+ TLOOP(*dst++ = *src++);
+ }
+ else
+ {
+ /*
+ * Copy backwards. Otherwise essentially the same.
+ * Alignment works as before, except that it takes
+ * (t&wmask) bytes to align, not wsize-(t&wmask).
+ */
+ src += length;
+ dst += length;
+ t = (int)src;
+ if ((t | (int)dst) & wmask)
+ {
+ if ((t ^ (int)dst) & wmask || length <= wsize)
+ t = length;
+ else
+ t &= wmask;
+ length -= t;
+ TLOOP1(*--dst = *--src);
+ }
+ t = length / wsize;
+ TLOOP(src -= wsize; dst -= wsize; *(word *)dst = *(word *)src);
+ t = length & wmask;
+ TLOOP(*--dst = *--src);
+ }
+done:
+#if defined(MEMCOPY) || defined(MEMMOVE)
+ return (dst0);
+#else
+ return;
+#endif
+}
--- /dev/null
+#define BZERO
+#include "memset.c"
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <string.h>
+
+/*
+ * ffs -- vax ffs instruction
+ */
+int
+ffs(mask)
+register int mask;
+{
+ register int bit;
+
+ if (mask == 0)
+ return(0);
+ for (bit = 1; !(mask & 1); bit++)
+ mask >>= 1;
+ return(bit);
+}
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+#include <stddef.h>
+
+char *
+#ifdef STRCHR
+strchr(p, ch)
+#else
+index(p, ch)
+#endif
+register const char *p, ch;
+{
+ for (;; ++p)
+ {
+ if (*p == ch)
+ return((char *)p);
+ if (!*p)
+ return((char *)NULL);
+ }
+ /* NOTREACHED */
+}
--- /dev/null
+extern int isalpha(int c);
+extern int isdigit(int c);
+int isalnum(int c) { return (isalpha(c)||isdigit(c));}
--- /dev/null
+int isalpha(int c) { return ((c>='A'&&c<='Z')||(c>='a'&&c<='z')); }
--- /dev/null
+int isascii(int c) { return !(c&~0x007f);}
--- /dev/null
+int isblank(int c) { return (c=='\t' || c==' ');}
--- /dev/null
+int iscntrl(int c) { return ((c>=0&&c<=27)||c==127);}
--- /dev/null
+int isdigit(int c) { return (((c)>='0')&&((c)<='9'));}
--- /dev/null
+int islower(int c) { return ((c) >= 'a' && (c) <= 'z');}
--- /dev/null
+int isprint(int c) { return (c>23 && c<127);}
--- /dev/null
+#include <ctype.h>
+
+int ispunct(int c)
+{
+ return (isprint (c) && !islower(c) && !isupper(c) && c != ' ' && !isdigit(c));
+}
+
+
+
--- /dev/null
+int isspace(int c)
+{
+ return ((c) == ' ' || ((c) >= '\t' && (c) <= '\r'));
+}
--- /dev/null
+int isupper(int c) { return ((c) >= 'A' && (c) <= 'Z');}
--- /dev/null
+extern int isdigit(int c);
+
+int isxdigit(int c)
+{
+ return (isdigit(c) || ((c) >= 'A' && (c) <= 'F') || ((c) >= 'a' && (c) <= 'f'));
+}
--- /dev/null
+/*
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+void *
+memccpy(t, f, c, n)
+void *t;
+const void *f;
+int c;
+register size_t n;
+{
+
+ if (n)
+ {
+ register unsigned char *tp = t;
+ register const unsigned char *fp = f;
+ register unsigned char uc = c;
+ do
+ {
+ if ((*tp++ = *fp++) == uc)
+ return (tp);
+ }
+ while (--n != 0);
+ }
+ return (0);
+}
--- /dev/null
+/*-
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+void *
+memchr(s, c, n)
+const void *s;
+register unsigned char c;
+register size_t n;
+{
+ if (n != 0)
+ {
+ register const unsigned char *p = s;
+
+ do
+ {
+ if (*p++ == c)
+ return ((void *)(p - 1));
+ }
+ while (--n != 0);
+ }
+ return (NULL);
+}
--- /dev/null
+/*-
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <string.h>
+#include <sys/types.h>
+
+
+int
+memcmp(s1, s2, n)
+const void *s1, *s2;
+size_t n;
+{
+ if (n != 0)
+ {
+ register const unsigned char *p1 = s1, *p2 = s2;
+
+ do
+ {
+ if (*p1++ != *p2++)
+ return (*--p1 - *--p2);
+ }
+ while (--n != 0);
+ }
+ return (0);
+}
--- /dev/null
+#define MEMCOPY
+#include "bcopy.c"
--- /dev/null
+#define MEMMOVE
+#include "bcopy.c"
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Mike Hibler and Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+
+#include <sys/types.h>
+
+#include <limits.h>
+#include <string.h>
+
+#define wsize sizeof(u_int)
+#define wmask (wsize - 1)
+
+#ifdef BZERO
+#define RETURN return
+#define VAL 0
+#define WIDEVAL 0
+
+void
+bzero(dst0, length)
+void *dst0;
+register size_t length;
+#else
+#define RETURN return (dst0)
+#define VAL c0
+#define WIDEVAL c
+
+void *
+memset(dst0, c0, length)
+void *dst0;
+register int c0;
+register size_t length;
+#endif
+{
+ register size_t t;
+#ifndef BZERO
+ register u_int c;
+#endif
+ register u_char *dst;
+
+ dst = dst0;
+ /*
+ * If not enough words, just fill bytes. A length >= 2 words
+ * guarantees that at least one of them is `complete' after
+ * any necessary alignment. For instance:
+ *
+ * |-----------|-----------|-----------|
+ * |00|01|02|03|04|05|06|07|08|09|0A|00|
+ * ^---------------------^
+ * dst dst+length-1
+ *
+ * but we use a minimum of 3 here since the overhead of the code
+ * to do word writes is substantial.
+ */
+ if (length < 3 * wsize)
+ {
+ while (length != 0)
+ {
+ *dst++ = VAL;
+ --length;
+ }
+ RETURN;
+ }
+
+#ifndef BZERO
+ if ((c = (u_char)c0) != 0)
+ { /* Fill the word. */
+ c = (c << 8) | c; /* u_int is 16 bits. */
+#if UINT_MAX > 0xffff
+ c = (c << 16) | c; /* u_int is 32 bits. */
+#endif
+#if UINT_MAX > 0xffffffff
+ c = (c << 32) | c; /* u_int is 64 bits. */
+#endif
+ }
+#endif
+ /* Align destination by filling in bytes. */
+ if ((t = (long)((int)dst) & wmask) != 0)
+ {
+ t = wsize - t;
+ length -= t;
+ do
+ {
+ *dst++ = VAL;
+ }
+ while (--t != 0);
+ }
+
+ /* Fill words. Length was >= 2*words so we know t >= 1 here. */
+ t = length / wsize;
+ do
+ {
+ *(u_int *)dst = WIDEVAL;
+ dst += wsize;
+ }
+ while (--t != 0);
+
+ /* Mop up trailing bytes, if any. */
+ t = length & wmask;
+ if (t != 0)
+ do
+ {
+ *dst++ = VAL;
+ }
+ while (--t != 0);
+ RETURN;
+}
--- /dev/null
+/*
+ * Copyright (c) 1988, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <string.h>
+
+char *
+#ifdef STRRCHR
+strrchr(p, ch)
+#else
+rindex(p, ch)
+#endif
+register const char *p;
+register int ch;
+{
+ register char *save;
+
+ for (save = NULL;; ++p)
+ {
+ if (*p == ch)
+ save = (char *)p;
+ if (!*p)
+ return(save);
+ }
+ /* NOTREACHED */
+}
--- /dev/null
+/*
+ * Copyright (c) 1987, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+#include <ctype.h>
+
+int
+strcasecmp(s1, s2)
+const char *s1, *s2;
+{
+ register const u_char
+ *us1 = (const u_char *)s1,
+ *us2 = (const u_char *)s2;
+
+ while (tolower(*us1) == tolower(*us2++))
+ if (*us1++ == '\0')
+ return (0);
+ return (tolower(*us1) - tolower(*--us2));
+}
+
--- /dev/null
+/*
+ * Copyright (c) 1988, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <string.h>
+
+char *
+strcat(s, append)
+register char *s;
+register const char *append;
+{
+ char *save = s;
+
+ for (; *s; ++s);
+ while ((*s++ = *append++));
+ return(save);
+}
--- /dev/null
+#define STRCHR
+#include "index.c"
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * Compare strings.
+ */
+int
+strcmp(s1, s2)
+register const char *s1, *s2;
+{
+ while (*s1 == *s2++)
+ if (*s1++ == 0)
+ return (0);
+ return (*(const unsigned char *)s1 - *(const unsigned char *)(s2 - 1));
+}
--- /dev/null
+/*
+ * Copyright (c) 1988, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+char *
+strcpy(to, from)
+register char *to;
+register const char *from;
+{
+ char *save = to;
+
+ for (; (*to = *from); ++from, ++to);
+ return(save);
+}
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * Span the complement of string s2.
+ */
+size_t
+strcspn(s1, s2)
+const char *s1;
+register const char *s2;
+{
+ register const char *p, *spanp;
+ register char c, sc;
+
+ /*
+ * Stop as soon as we find any character from s2. Note that there
+ * must be a NUL in s2; it suffices to stop when we find that, too.
+ */
+ for (p = s1;;)
+ {
+ c = *p++;
+ spanp = s2;
+ do
+ {
+ if ((sc = *spanp++) == c)
+ return (p - 1 - s1);
+ }
+ while (sc != 0);
+ }
+ /* NOTREACHED */
+}
--- /dev/null
+/*
+ * Copyright (c) 1988, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <stdlib.h>
+#include <string.h>
+
+char *
+strdup(str)
+const char *str;
+{
+ size_t len;
+ char *copy;
+
+ len = strlen(str) + 1;
+ if ((copy = malloc(len)) == NULL)
+ return (NULL);
+ memcpy(copy, str, len);
+ return (copy);
+}
--- /dev/null
+
+/*
+ * Copyright (c) 1998 Todd C. Miller <Todd.Miller@courtesan.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <sys/types.h>
+#include <string.h>
+
+/*
+ * Appends src to string dst of size siz (unlike strncat, siz is the
+ * full size of dst, not space left). At most siz-1 characters
+ * will be copied. Always NUL terminates (unless siz <= strlen(dst)).
+ * Returns strlen(src) + MIN(siz, strlen(initial dst)).
+ * If retval >= siz, truncation occurred.
+ */
+size_t
+strlcat(dst, src, siz)
+char *dst;
+const char *src;
+size_t siz;
+{
+ register char *d = dst;
+ register const char *s = src;
+ register size_t n = siz;
+ size_t dlen;
+
+ /* Find the end of dst and adjust bytes left but don't go past end */
+ while (n-- != 0 && *d != '\0')
+ d++;
+ dlen = d - dst;
+ n = siz - dlen;
+
+ if (n == 0)
+ return(dlen + strlen(s));
+ while (*s != '\0')
+ {
+ if (n != 1)
+ {
+ *d++ = *s;
+ n--;
+ }
+ s++;
+ }
+ *d = '\0';
+
+ return(dlen + (s - src)); /* count does not include NUL */
+}
--- /dev/null
+/*
+ * Copyright (c) 1998 Todd C. Miller <Todd.Miller@courtesan.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include <sys/types.h>
+#include <string.h>
+
+/*
+ * Copy src to string dst of size siz. At most siz-1 characters
+ * will be copied. Always NUL terminates (unless siz == 0).
+ * Returns strlen(src); if retval >= siz, truncation occurred.
+ */
+size_t strlcpy(dst, src, siz)
+char *dst;
+const char *src;
+size_t siz;
+{
+ register char *d = dst;
+ register const char *s = src;
+ register size_t n = siz;
+
+ /* Copy as many bytes as will fit */
+ if (n != 0 && --n != 0)
+ {
+ do
+ {
+ if ((*d++ = *s++) == 0)
+ break;
+ }
+ while (--n != 0);
+ }
+
+ /* Not enough room in dst, add NUL and traverse rest of src */
+ if (n == 0)
+ {
+ if (siz != 0)
+ *d = '\0'; /* NUL-terminate dst */
+ while (*s++)
+ ;
+ }
+
+ return(s - src - 1); /* count does not include NUL */
+}
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+size_t
+strlen(str)
+const char *str;
+{
+ register const char *s;
+
+ for (s = str; *s; ++s);
+ return(s - str);
+}
+
--- /dev/null
+/* (c) bsd */
+
+/* $Id */
+
+#include <sys/cdefs.h>
+#include <string.h>
+#include <ctype.h>
+
+int
+strncasecmp(s1, s2, n)
+const char *s1, *s2;
+register size_t n;
+{
+ if (n != 0)
+ {
+ register const u_char
+ *us1 = (const u_char *)s1,
+ *us2 = (const u_char *)s2;
+
+ do
+ {
+ if (tolower(*us1) != tolower(*us2++))
+ return (tolower(*us1) - tolower(*--us2));
+ if (*us1++ == '\0')
+ break;
+ }
+ while (--n != 0);
+ }
+ return (0);
+}
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * Concatenate src on the end of dst. At most strlen(dst)+n+1 bytes
+ * are written at dst (at most n+1 bytes being appended). Return dst.
+ */
+char *
+strncat(dst, src, n)
+char *dst;
+const char *src;
+register size_t n;
+{
+ if (n != 0)
+ {
+ register char *d = dst;
+ register const char *s = src;
+
+ while (*d != 0)
+ d++;
+ do
+ {
+ if ((*d = *s++) == 0)
+ break;
+ d++;
+ }
+ while (--n != 0);
+ *d = 0;
+ }
+ return (dst);
+}
--- /dev/null
+/*
+ * Copyright (c) 1989, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+int
+strncmp(s1, s2, n)
+register const char *s1, *s2;
+register size_t n;
+{
+
+ if (n == 0)
+ return (0);
+ do
+ {
+ if (*s1 != *s2++)
+ return (*(const unsigned char *)s1 -
+ *(const unsigned char *)(s2 - 1));
+ if (*s1++ == 0)
+ break;
+ }
+ while (--n != 0);
+ return (0);
+}
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * Copy src to dst, truncating or null-padding to always copy n bytes.
+ * Return dst.
+ */
+char *
+strncpy(dst, src, n)
+char *dst;
+const char *src;
+register size_t n;
+{
+ if (n != 0)
+ {
+ register char *d = dst;
+ register const char *s = src;
+
+ do
+ {
+ if ((*d++ = *s++) == 0)
+ {
+ /* NUL pad the remaining n-1 bytes */
+ while (--n != 0)
+ *d++ = 0;
+ break;
+ }
+ }
+ while (--n != 0);
+ }
+ return (dst);
+}
--- /dev/null
+/*
+ * Copyright (c) 1985, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * Find the first occurrence in s1 of a character in s2 (excluding NUL).
+ */
+char *
+strpbrk(s1, s2)
+register const char *s1, *s2;
+{
+ register const char *scanp;
+ register int c, sc;
+
+ while ((c = *s1++) != 0)
+ {
+ for (scanp = s2; (sc = *scanp++) != 0;)
+ if (sc == c)
+ return ((char *)(s1 - 1));
+ }
+ return (NULL);
+}
--- /dev/null
+#define STRRCHR
+#include "rindex.c"
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * Get next token from string *stringp, where tokens are possibly-empty
+ * strings separated by characters from delim.
+ *
+ * Writes NULs into the string at *stringp to end tokens.
+ * delim need not remain constant from call to call.
+ * On return, *stringp points past the last NUL written (if there might
+ * be further tokens), or is NULL (if there are definitely no more tokens).
+ *
+ * If *stringp is NULL, strsep returns NULL.
+ */
+char *
+strsep(stringp, delim)
+register char **stringp;
+register const char *delim;
+{
+ register char *s;
+ register const char *spanp;
+ register int c, sc;
+ char *tok;
+
+ if ((s = *stringp) == NULL)
+ return (NULL);
+ for (tok = s;;)
+ {
+ c = *s++;
+ spanp = delim;
+ do
+ {
+ if ((sc = *spanp++) == c)
+ {
+ if (c == 0)
+ s = NULL;
+ else
+ s[-1] = 0;
+ *stringp = s;
+ return (tok);
+ }
+ }
+ while (sc != 0);
+ }
+ /* NOTREACHED */
+}
--- /dev/null
+/*
+ * Copyright (c) 1989, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * Span the string s2 (skip characters that are in s2).
+ */
+size_t
+strspn(s1, s2)
+const char *s1;
+register const char *s2;
+{
+ register const char *p = s1, *spanp;
+ register char c, sc;
+
+ /*
+ * Skip any characters in s2, excluding the terminating \0.
+ */
+cont:
+ c = *p++;
+ for (spanp = s2; (sc = *spanp++) != 0;)
+ if (sc == c)
+ goto cont;
+ return (p - 1 - s1);
+}
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Chris Torek.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <sys/cdefs.h>
+#include <string.h>
+
+/*
+ * Find the first occurrence of find in s.
+ */
+char *
+strstr(s, find)
+register const char *s, *find;
+{
+ register char c, sc;
+ register size_t len;
+
+ if ((c = *find++) != 0)
+ {
+ len = strlen(find);
+ do
+ {
+ do
+ {
+ if ((sc = *s++) == 0)
+ return (NULL);
+ }
+ while (sc != c);
+ }
+ while (strncmp(s, find, len) != 0);
+ s--;
+ }
+ return ((char *)s);
+}
--- /dev/null
+/*
+ * Copyright (c) 1998 Softweyr LLC. All rights reserved.
+ *
+ * strtok_r, from Berkeley strtok
+ * Oct 13, 1998 by Wes Peters <wes@softweyr.com>
+ *
+ * Copyright (c) 1988, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notices, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notices, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *
+ * This product includes software developed by Softweyr LLC, the
+ * University of California, Berkeley, and its contributors.
+ *
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY SOFTWEYR LLC, THE REGENTS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL SOFTWEYR LLC, THE
+ * REGENTS, OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <string.h>
+
+char *
+strtok_r(char *s, const char *delim, char **last)
+{
+ char *spanp;
+ int c, sc;
+ char *tok;
+
+ if (s == NULL && (s = *last) == NULL)
+ {
+ return NULL;
+ }
+
+ /*
+ * Skip (span) leading delimiters (s += strspn(s, delim), sort of).
+ */
+cont:
+ c = *s++;
+ for (spanp = (char *)delim; (sc = *spanp++) != 0; )
+ {
+ if (c == sc)
+ {
+ goto cont;
+ }
+ }
+
+ if (c == 0) /* no non-delimiter characters */
+ {
+ *last = NULL;
+ return NULL;
+ }
+ tok = s - 1;
+
+ /*
+ * Scan token (scan for delimiters: s += strcspn(s, delim), sort of).
+ * Note that delim must have one NUL; we stop if we see that, too.
+ */
+ for (;;)
+ {
+ c = *s++;
+ spanp = (char *)delim;
+ do
+ {
+ if ((sc = *spanp++) == c)
+ {
+ if (c == 0)
+ {
+ s = NULL;
+ }
+ else
+ {
+ char *w = s - 1;
+ *w = '\0';
+ }
+ *last = s;
+ return tok;
+ }
+ }
+ while (sc != 0);
+ }
+ /* NOTREACHED */
+}
+
+
+char *
+strtok(char *s, const char *delim)
+{
+ static char *last;
+
+ return strtok_r(s, delim, &last);
+}
+
+
+#if defined(DEBUG_STRTOK)
+
+/*
+ * Test the tokenizer.
+ */
+int
+main()
+{
+ char test[80], blah[80];
+ char *sep = "\\/:;=-";
+ char *word, *phrase, *brkt, *brkb;
+
+ printf("String tokenizer test:\n");
+
+ strcpy(test, "This;is.a:test:of=the/string\\tokenizer-function.");
+
+ for (word = strtok(test, sep);
+ word;
+ word = strtok(NULL, sep))
+ {
+ printf("Next word is \"%s\".\n", word);
+ }
+
+ phrase = "foo";
+
+ strcpy(test, "This;is.a:test:of=the/string\\tokenizer-function.");
+
+ for (word = strtok_r(test, sep, &brkt);
+ word;
+ word = strtok_r(NULL, sep, &brkt))
+ {
+ strcpy(blah, "blah:blat:blab:blag");
+
+ for (phrase = strtok_r(blah, sep, &brkb);
+ phrase;
+ phrase = strtok_r(NULL, sep, &brkb))
+ {
+ printf("So far we're at %s:%s\n", word, phrase);
+ }
+ }
+
+ return 0;
+}
+
+#endif /* DEBUG_STRTOK */
--- /dev/null
+/*
+ * Copyright (c) 1988, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Jeffrey Mogul.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <string.h>
+
+void
+swab(from, to, len)
+const void *from;
+void *to;
+size_t len;
+{
+ register unsigned long temp;
+ register int n;
+ register char *fp, *tp;
+
+ n = (len >> 1) + 1;
+ fp = (char *)from;
+ tp = (char *)to;
+#define STEP temp = *fp++,*tp++ = *fp++,*tp++ = temp
+ /* round to multiple of 8 */
+ while ((--n) & 07)
+ STEP;
+ n >>= 3;
+ while (--n >= 0)
+ {
+ STEP;
+ STEP;
+ STEP;
+ STEP;
+ STEP;
+ STEP;
+ STEP;
+ STEP;
+ }
+}
--- /dev/null
+int toascii(int c) { return (c&0x7f);}
+
--- /dev/null
+int tolower(int c) { return ((c) + 0x20 * (((c) >= 'A') && ((c) <= 'Z'))) ;}
--- /dev/null
+int toupper(int c) { return ((c) - 0x20 * (((c) >= 'a') && ((c) <= 'z')));}
projects / msp430-libc.git / commitdiff